Startup and shutdown exception handling method for service user terminal equipment

Abstract

The invention provides a service user terminal equipment startup and shutdown exception handling method, which relates to the technical field of startup and shutdown exception handling, and comprises the following steps: acquiring a power management instruction sent to a CPLD (Complex Programmable Logic Device) by a core processor of target equipment, the power management instruction comprising a startup instruction and a shutdown instruction; the CPLD performs on-off operation on the target equipment according to the power management instruction; and judging whether the startup and shutdown operation is completed or not, and if not, triggering the startup and shutdown operation through a forced startup and shutdown mechanism. The technical problems that in the prior art, when an operating system is stuck or startup and shutdown are abnormal, physical intervention generally depends on plugging and unplugging of a power line, data in processing may be lost, damage to equipment may be aggravated or an electrical safety accident may be triggered, and the reliability of the equipment is insufficient are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of abnormal power - on and power - off processing, and particularly to a method for processing abnormal power - on and power - off of a service user terminal device. Background Art

[0002] During the use of a user service terminal (computer) device, problems such as the operating system freezing may occur. This problem can be caused by various factors. For example, when the memory is insufficient, the system frequently performs data exchange, and temporarily stores the data in the memory to the virtual memory of the hard disk, which will cause a significant decrease in the system running speed and even freeze; or incompatible driver programs may cause the hardware to malfunction, resulting in the system freezing, etc. When a failure occurs, the operating system will not respond to user operations.

[0003] In the face of an operating system freeze or abnormal power - on and power - off, existing processing methods usually rely on users to perform physical intervention, such as unplugging and plugging the power cord. This may cause the loss of data being processed, especially when the working state has not been correctly saved. Moreover, these methods also have potential safety hazards, especially in emergency situations, which may exacerbate equipment damage or trigger electrical safety accidents. Summary of the Invention

[0004] The present application provides a method for processing abnormal power - on and power - off of a service user terminal device, aiming to solve the technical problem in the prior art that in the face of an operating system freeze or abnormal power - on and power - off, physical intervention such as unplugging and plugging the power cord is usually relied on, which may cause the loss of data being processed, and may exacerbate equipment damage or trigger electrical safety accidents, resulting in insufficient reliability of the equipment.

[0005] The method for processing abnormal power - on and power - off of a service user terminal device disclosed in the present application includes: obtaining that the core processor of the target device sends a power management instruction to the CPLD, where the power management instruction includes a power - on instruction and a power - off instruction; the CPLD performs power - on and power - off operations on the target device according to the power management instruction; determining whether the power - on and power - off operations are completed. If not, the power - on and power - off operations are triggered through a forced power - on and power - off mechanism.

[0006] One or more technical solutions provided in the present application have at least the following beneficial effects:

[0007] The power management instructions, including power-on and power-off instructions, are processed using a CPLD (Complex Programmable Logic Device). This design reduces the risk of device unavailability caused by an operating system freeze or hardware power management issues; when an abnormality occurs during power-on or power-off, the CPLD can automatically judge and trigger the corresponding forced power-on and power-off mechanism, and users do not need to perform complex recovery steps, such as unplugging the power cord, which simplifies the operation process and reduces the risk of physical operation on the device; the forced power-on and power-off operations take into account system security and data integrity. Specifically, before forced power-off, an attempt is first made to perform a soft power-off to save data and safely shut down the system. Only when the soft power-off fails will a hard power-off and forced power-off be executed. Such a design avoids unnecessary hardware damage and data loss; generally speaking, through the service user terminal device power-on and power-off abnormality handling method, the service user terminal device can quickly recover from various potential power-on and power-off failures, reducing the risk of service interruption caused by device failures, thereby improving the convenience and security of device operation.

[0008] The above description is only an overview of the technical solution of this application. In order to be able to understand the technical means of this application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of this application more obvious and understandable, the following specifically gives the specific implementation manners of this application. Brief Description of the Drawings

[0009] Figure 1 This is a schematic flow chart of the method for handling power-on and power-off abnormalities of a service user terminal device provided by an embodiment of this application.

[0010] Figure 2 This is a schematic flow chart of triggering power-on and power-off operations through a forced power-on and power-off mechanism in the method for handling power-on and power-off abnormalities of a service user terminal device provided by an embodiment of this application.

[0011] Figure 3 This is a schematic flow chart of completing the power-off operation of a target device in the method for handling power-on and power-off abnormalities of a service user terminal device provided by an embodiment of this application.

[0012] Figure 4 This is a schematic flow chart of triggering a power-off operation in the method for handling power-on and power-off abnormalities of a service user terminal device provided by an embodiment of this application.

[0013] Figure 5 This is a schematic flow chart of the power-on process in the method for handling power-on and power-off abnormalities of a service user terminal device provided by an embodiment of this application. Detailed Description of the Preferred Embodiments

[0014] By providing a method for handling abnormal power - on and power - off of a service user terminal device in an embodiment of the present application, the technical problem in the prior art is solved. In the face of an operating system freeze or abnormal power - on and power - off, physical intervention by unplugging the power cord is usually relied on, which may lead to the loss of data being processed, and may exacerbate device damage or trigger electrical safety accidents, resulting in insufficient device reliability.

[0015] After introducing the basic principle of the present application, various non - restrictive implementation manners of the present application will be specifically introduced below in conjunction with the accompanying drawings of the specification.

[0016] As Figure 1 shown, an embodiment of the present application provides a method for handling abnormal power - on and power - off of a service user terminal device, and the method includes:

[0017] Step S100: Obtain that the core processor of the target device sends a power management instruction to the CPLD, where the power management instruction includes a power - on instruction and a power - off instruction.

[0018] The core processor generates specific power management instructions, which are defined according to the current state of the device and the operation to be performed (power - on or power - off). The specific instructions include a power - on instruction and a power - off instruction. When sending the power management instruction, the core processor sends pulses in a specific manner to the CPLD through PWR_CTR0 and PWR_CTR1, for example, 12 pulses, instructing the CPLD to perform corresponding operations. Among them, the power - on instruction instructs the CPLD to control the power - on of relevant hardware such as the motherboard according to the set power - on timing sequence to ensure the normal startup of the device; the power - off instruction instructs the CPLD to perform a power - down timing operation, sequentially turn off the motherboard power supply, and perform necessary hardware state resets to ensure the safe shutdown of the device.

[0019] Step S200: The CPLD performs power - on and power - off operations on the target device according to the power management instruction.

[0020] After receiving the power management instruction from the core processor, the CPLD performs corresponding operations according to the received instruction type. Among them, according to the received power - on instruction, the CPLD controls the power - on sequence of the device, including but not limited to activating the motherboard power supply, initializing the system bus, checking the peripheral status, etc. The power - on process needs to ensure that all system components are powered on step by step in the correct order to avoid any hardware damage or data loss; after receiving the power - off instruction, the CPLD sequentially disconnects the power of the device, including the motherboard, peripherals, etc., and performs it according to a safe power - down timing sequence to ensure system data integrity and hardware safety.

[0021] Step S300: Determine whether the power - on and power - off operation is completed. If not, trigger the power - on and power - off operation through a forced power - on and power - off mechanism.

[0022] Verify whether the power-on and power-off operations are successfully completed, which is specifically achieved by checking the system power status, reading hardware feedback signals, or monitoring system logs, etc. If the operation fails, enter the forced power-on and power-off process. Specifically, if the power-on operation fails to complete successfully, the CPLD will execute the forced power-on mechanism, including resetting the motherboard power supply, restarting the system initialization process, etc.; if the power-off operation fails to complete successfully, the CPLD will execute a forced power-off, including pressing and holding the power button for a long time to trigger a hard power-off, or directly cutting off the power supply. Further, when the CPLD executes the forced power-on and power-off operations, it will monitor the device status and attempt to execute multiple times until successful. During this process, the CPLD also needs to record relevant error logs or status information for troubleshooting and maintenance. Through the above steps, it is ensured that even in the face of anomalies or failures, the device can maintain the best operating state and data security. The CPLD reduces the need for manual intervention and potential operation risks through this highly automated method.

[0023] Furthermore, as Figure 2 shown, if not, trigger the power-on and power-off operations through the forced power-on and power-off mechanism, including:

[0024] Step S310: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the forced power-on mechanism.

[0025] Step S320: When the type of the power management instruction is a power-off instruction, the CPLD completes the power-off operation of the target device according to the forced power-off mechanism.

[0026] In the case where the type of the power management instruction is a power-on instruction, when the power-on instruction fails to execute, or the core processor detects through status detection that the device does not start as expected, the forced power-on mechanism will be triggered. The CPLD first checks the hardware status to confirm that there is no power failure or hardware damage. If the power supply has no response, relevant hardware components are reset through the reset key to clear possible error states. When the waiting duration reaches the preset duration, power is supplied to the CPU and other key components again according to the timing, and the device power button of the target device is pressed to complete the power-on operation.

[0027] In the case where the type of the power management instruction is a power-off instruction, when the power-off instruction cannot be completed, or the system detects an anomaly during the power-off process, the forced power-off mechanism will be triggered. Specifically, press and hold the device power button of the target device. After the CPLD receives the power button signal, continuous timing is performed. When the duration reaches the preset duration, the forced power-off mechanism is started to trigger the power-off operation.

[0028] Furthermore, as Figure 3As shown, when the type of the power management instruction is a shutdown instruction, the CPLD completes the shutdown operation of the target device according to the forced shutdown mechanism, including:

[0029] Step S321: Press and hold the device power button of the target device. After the CPLD receives the power button signal, it continuously measures the holding time using an internal timer to obtain the first continuous measurement duration.

[0030] Step S322: When the first continuous measurement duration is equal to the preset timing duration threshold, start the forced shutdown mechanism to trigger the shutdown operation.

[0031] The operator long-presses the power button of the target device. This is a physical operation, usually performed on the power button on the front panel or side panel of the device, as Figure 4 As shown, when the type of the power management instruction is a shutdown instruction, and the soft shutdown operation fails to be triggered and the hard shutdown operation fails to be triggered, it indicates that the shutdown is abnormal. At this time, when the power button is long-pressed, the CPLD receives the signal of the power button. The CPLD has the ability to detect the button state and can recognize the state of the button being pressed and held. An internal timer is started inside the CPLD to start recording the time when the button is held down. This internal timer is part of the CPLD design and is used to accurately measure the duration of the button being pressed. The timer will keep running and record the first continuous measurement duration.

[0032] The preset timing duration threshold is a duration threshold preset inside the CPLD, such as 3 seconds. This threshold is preset according to the specific hardware design and safety requirements of the device to ensure that necessary hardware resets are not missed due to too fast operations. When the first continuous measurement duration is equal to the preset timing duration threshold, the CPLD determines that the condition for triggering forced shutdown is met. In this case, the forced shutdown operation is immediately executed, including sending a power-off signal to the motherboard and other key hardware, quickly cutting off the power supply to ensure that the device stops running. This series of operations is an emergency measure when the normal shutdown process of the device fails or there is no response, ensuring that the device can be safely shut down under control and preventing problems such as long-term operation or overheating.

[0033] Furthermore, when the type of the power management instruction is a startup instruction, the CPLD completes the startup operation of the target device according to the forced startup mechanism, including:

[0034] Step S311: Press the device power button of the target device and determine whether there is a response. If not, press and hold the device reset button.

[0035] Step S312: After the CPLD receives the reset button signal, it continuously measures the holding time using an internal timer to obtain the second continuous measurement duration.

[0036] Step S313: When the second continuous timing duration is equal to a preset timing threshold, power off the main board according to the power-down timing sequence; and Step S314: Power on the main board according to the power-on timing sequence, and press the device power button of the target device again to complete the boot operation.

[0037] The operator presses the power button of the target device to attempt a normal boot. If the device does not respond, that is, there is no boot signal, startup sound, or indicator change, etc., further fault handling operations need to be performed. Specifically, since the power button does not cause a system response, the reset button of the device needs to be pressed. The reset button is designed to quickly interrupt the power supply and restart the system. This is an emergency recovery function in hardware. Keep pressing the reset button to ensure that the system can fully recognize and execute the reset command.

[0038] The CPLD receives a reset button signal when the reset button is pressed. This signal directly affects the system power management and notifies the CPLD to immediately execute the restart program. The CPLD starts a timer internally to record the time the reset button is continuously pressed. This time is closely related to the reset logic of the device. For example, some devices require the reset button to be continuously pressed for several seconds to ensure it is not a misoperation. Record the specific time from when the reset button is pressed to when it is released to obtain the second continuous timing duration.

[0039] When the second continuous timing duration is equal to the preset timing threshold, it means that a reset operation needs to be performed to ensure that the device state is completely cleared. Among them, the preset timing threshold is preset according to the specific hardware design and safety requirements of the device to ensure that necessary hardware resets are not missed due to too fast operations. The CPLD instructs the main board to perform a power-off operation, specifically to disconnect the main power supply and all associated power lines to ensure that all memory and caches are emptied. The power-off operation is an important part of the hardware reset, which can eliminate persistent problems caused by software errors or hardware failures.

[0040] When the power-off is complete, the CPLD restarts the main board according to the set power-on timing sequence. The power-on timing sequence includes gradually restoring the power supply, first for key components such as the CPU and memory, and then for peripheral devices. This timing sequence is pre-designed to avoid voltage surges or other possible hardware damages during the startup process. After completing the power-on sequence, the operator needs to press the power button again to start the device. This step is a regular boot process to ensure that the device has been reset at both the hardware and software levels and is ready to restart.

[0041] This series of operations is a key part of the emergency restart process. Through these steps, the device can be safely reset and restored when encountering serious faults or response failures. This process not only helps solve problems caused by software faults but also can handle the symptoms of certain hardware faults, improving the reliability of the device and the user's operation experience.

[0042] Furthermore, the CPLD performs power-on and power-off operations on the target device according to the power management instruction, including:

[0043] Step S210: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the power-on process.

[0044] Step S220: When the type of the power management instruction is a power-off instruction, the CPLD completes the power-off operation of the target device according to the power-off process.

[0045] When the core processor detects the need to start the device, it sends a power-on instruction to the CPLD. After receiving the power-on instruction, the CPLD activates the power management sequence of the device, including starting the main power supply and sequentially activating key components such as the CPU, memory, and storage device. The CPLD is also responsible for monitoring the power stability at each stage and the self-check process of the system to ensure that all components work as expected. During the power-on process, the CPLD continuously feeds back the system status to the core processor, including any possible errors or abnormal conditions.

[0046] When the core processor detects the need to shut down the device, it sends a power-off instruction to the CPLD. This instruction instructs the CPLD to start executing the power-off sequence. The CPLD gradually cuts off the power of the device according to the received power-off instruction, first for non-critical peripheral devices, and then for major hardware components such as memory and CPU. The power-off process also includes saving necessary system status and user data to ensure data integrity. The CPLD monitors the entire power-down process to ensure that all components are safely powered off, preventing hardware damage or data loss.

[0047] Furthermore, when the type of the power management instruction is a power-off instruction, the CPLD completes the power-off operation of the target device according to the power-off process, including:

[0048] Step S221: After the CPLD receives the power-off instruction, it determines whether to trigger a soft power-off operation. If so, the power-off operation is completed.

[0049] Step S221: If not, the mainboard power-off and processor power-off are sequentially performed according to the power-down timing sequence, and the reset signal is pulled low to complete the power-off operation.

[0050] The CPLD receives a shutdown instruction from the core processor. This instruction marks the start of the shutdown process. The information of the shutdown instruction includes the shutdown type, such as soft shutdown, hard shutdown, etc. It determines whether to trigger the soft shutdown operation according to the shutdown type. Soft shutdown is an operating system-level shutdown operation. The purpose of soft shutdown is to orderly shut down the operating system and running applications, save necessary states, and close the file system to ensure data integrity. If the soft shutdown operation is triggered, the corresponding soft shutdown operation is performed to complete the shutdown.

[0051] If the soft shutdown operation is not triggered, the mainboard power-off and processor power-off are performed in sequence according to the power-down timing. This can avoid damage caused by sudden power changes and ensure that each hardware component can be safely powered off. During the power-down process, the CPLD is also responsible for pulling down the reset signal to ensure that all circuits are completely powered off, reset all states, and prepare for the next startup. Pulling down the reset signal also helps prevent unpredictable behaviors caused by residual voltage after the power is disconnected. When all steps are completed, the CPLD effectively manages the entire shutdown process, ensuring the safety and integrity of the shutdown operation, which is crucial for protecting the long-term stable operation of the device and data security.

[0052] Furthermore, when the type of the power management instruction is a startup instruction, the CPLD completes the startup operation of the target device according to the startup process, including:

[0053] Step S211: After the CPLD receives the startup instruction, it powers on the mainboard according to the power-up timing.

[0054] Step S212: When the mainboard power-up is completed, power on the ALX.

[0055] Step S213: Determine whether the ALX power-up is completed. If so, supply power to the processor power supply to complete the startup operation.

[0056] The CPLD receives a startup instruction from the core processor. This instruction initiates the power-up process of the entire device. The CPLD starts to power on the mainboard according to the preset power-up timing. The power-up timing is based on the electrical safety design of the electronic device to avoid power surges. Specifically, first activate the main power supply and gradually increase it to the normal operating voltage while ensuring power stability and the electrical safety of the system.

[0057] As Figure 5 shown, when the startup action is triggered and the mainboard is successfully powered on, the CPLD continues to execute the next stage, that is, power on the ALX module. ALX refers to an auxiliary logic or functional module in the device, which is responsible for specific tasks such as audio processing, network communication, etc. The CPLD controls the power supply to the ALX module, which is an independent step after the mainboard to ensure that other modules are powered on after the mainboard is stable.

[0058] Determine whether the ALX module has been successfully powered on and is operating normally, including detecting the feedback signal of the module or confirming through voltage detection. When it is confirmed that the ALX module has completed power-on, the CPLD continues to supply power to the processor. This is the last important step in the startup process because the processor is the core of the device's operation. After the processor is powered on, the startup operation is completed, the device enters the final operating state, the operating system starts to load, and the user can start using the device.

[0059] Furthermore, the core processor of the target device sends power management instructions to the CPLD through PWR_CTR0 and PWR_CTR1.

[0060] The core processor of the target device sends power management instructions to the CPLD through PWR_CTR0 and PWR_CTR1. PWR_CTR0 and PWR_CTR1 are power management signals controlled by the core processor and are used to communicate directly with the CPLD. These signals represent different power states or commands, such as power-on, power-off, restart, etc. The specific signal combinations and states depend on the system design. When the core processor needs to perform a specific power operation, it sets PWR_CTR0 and PWR_CTR1 to appropriate logic levels. For example, 1 is used to represent activation and 2 is used to represent deactivation. These signals are directly transmitted to the CPLD through the hardware interface.

[0061] The CPLD continuously monitors the PWR_CTR0 and PWR_CTR1 signals from the core processor and executes corresponding power management tasks, including starting the startup sequence, executing the shutdown process, or other power-related operations. Through this design, the core processor can control complex power management tasks through simple signals, and the high programmability of the CPLD ensures the precise execution of the response to these instructions.

[0062] In summary, the service user terminal device power-on and power-off exception handling method provided by the embodiments of the present application has the following technical effects:

[0063] The processing of power management instructions, including power-on and power-off instructions, is implemented using a CPLD (Complex Programmable Logic Device). This design reduces the risk of device unavailability caused by operating system freezes or hardware power management issues; when an abnormality occurs during power-on or power-off, the CPLD can automatically judge and trigger the corresponding forced power-on and power-off mechanisms, and users do not need to perform complex recovery steps, such as unplugging the power cord, which simplifies the operation process and reduces the risk of physical operation on the device; the forced power-on and power-off operations take into account system security and data integrity. Specifically, before forced shutdown, an attempt is first made to perform a soft shutdown to save data and safely shut down the system. Only when the soft shutdown fails will a hard power-off and forced shutdown be performed. Such a design avoids unnecessary hardware damage and data loss; generally speaking, through the method for handling abnormal power-on and power-off of the service user terminal device, the service user terminal device can quickly recover from various potential power-on and power-off failures, reducing the risk of service interruption caused by device failures, thereby improving the convenience and security of device operation.

[0064] The foregoing description of the disclosed embodiments enables those skilled in the art to practice or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for handling abnormal power on and off of a service user terminal device, characterized in that: The method comprises: Obtain a power management instruction from a core processor of a target device to a CPLD, wherein the power management instruction includes a power-on instruction and a power-off instruction; The CPLD performs power on / off operations on the target device according to the power management instruction; Determine whether the power on / off operation is completed, and if not, trigger the power on / off operation through a forced power on / off mechanism.

2. The method for handling abnormal startup and shutdown of a service user terminal device according to claim 1, characterized in that: If not, the forced power on / off mechanism is used to trigger the power on / off operation, including: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the forced power-on mechanism; When the type of the power management instruction is a shutdown instruction, the CPLD completes the shutdown operation of the target device according to the forced shutdown mechanism.

3. The method for handling abnormal startup and shutdown of a service user terminal device according to claim 2, characterized in that: When the type of the power management instruction is a shutdown instruction, the CPLD completes the shutdown operation of the target device according to the forced shutdown mechanism, including: The device power button of the target device is pressed and held, and after the CPLD receives the power button signal, it uses an internal timer to continuously count the holding time to obtain a first continuous timing duration; When the first continuous timing duration is equal to a preset timing duration threshold, a forced shutdown mechanism is started to trigger a shutdown operation.

4. The method for handling abnormal startup and shutdown of a service user terminal device according to claim 2, characterized in that: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the forced power-on mechanism, including: Press the device power button of the target device to determine whether it responds, if not, press and hold the device reset button; After receiving the reset button signal, the CPLD uses an internal timer to continuously count the holding time to obtain a second continuous timing duration; When the second continuous timing duration is equal to the preset timing duration threshold, powering off the mainboard according to the power-off sequence; and Complete the mainboard power-on according to the power-on sequence, and press the device power button of the target device again to complete the power-on operation.

5. The method for handling abnormal startup and shutdown of a service user terminal device according to claim 1, characterized in that: The CPLD performs power on / off operations on the target device according to the power management instruction, including: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the power-on process; When the type of the power management instruction is a shutdown instruction, the CPLD completes the shutdown operation of the target device according to the shutdown process.

6. The method for handling abnormal power on and off of a service user terminal device according to claim 5, characterized in that: When the type of the power management instruction is a shutdown instruction, the CPLD completes the shutdown operation of the target device according to the shutdown process, including: When the CPLD receives the shutdown command, it determines whether a soft shutdown operation is triggered. If so, the shutdown operation is completed; If not, the mainboard and processor are powered off in sequence, and the reset signal is pulled low to complete the shutdown operation.

7. The method for handling abnormal power on and off of a service user terminal device according to claim 5, characterized in that: When the type of the power management instruction is a power-on instruction, the CPLD completes the power-on operation of the target device according to the power-on process, including: After receiving the power-on command, the CPLD powers on the mainboard according to the power-on sequence; After the mainboard is powered on, power on the ALX; It is determined whether the ALX power-on is completed. If so, the processor power supply is powered to complete the power-on operation.

8. The method for handling abnormal power on and off of a service user terminal device according to claim 1, characterized in that: The core processor of the target device sends a power management instruction to the CPLD through PWR_CTR0 and PWR_CTR1.

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