Cache line redirection system

Abstract

The invention relates to the technical field of storage management, in particular to a cache line redirection system which determines an index deviation value according to address information corresponding to a target request and a range identification value in a range identification register, and determines a cache line according to the address information corresponding to the target request, a first group of index identifiers and the index deviation value. And determining a second group of index identifiers, and counting the number of all groups corresponding to the reference identifiers in the index range to update the second group of index identifiers so as to determine a redirection result, so that an existing cache structure can be efficiently utilized, additional hardware cost is not increased, redirection is carried out at the same cache level, the redirection delay is relatively low, and the redirection efficiency is improved. And the cache redirection efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of storage management, and in particular to a high-speed cache line redirection system. Background Art

[0002] When there are bad pixels in the tag array or data array of the on-chip cache and the error-correcting code (ECC) algorithm cannot repair it, the entire cache or even the entire chip will be unusable because it is difficult to determine which specific request will be assigned to the damaged group in the cache.

[0003] In response to the above problems, the prior art has proposed a variety of processing methods. One processing method is to add redundant cache lines, which are initially idle. When a request is assigned to a damaged group, it is redirected to the redundant cache line. However, this method increases the hardware cost of the cache and reduces the utilization efficiency of hardware resources. One processing method is, in a multi-level cache scenario, when a request is assigned to a damaged group, it is redirected to the cache line of other levels. However, this method will introduce delays and bandwidth consumption caused by transmitting data across cache levels, reducing the efficiency of data access. One processing method is to change the page table to change the physical address of the request when the request is assigned to a damaged group. However, this method requires a large number of complex operations at the operating system or software level, and will also introduce large additional delays. One processing method is to back up the data to a safe storage area before it is stored in the cache line. When the request is assigned to the damaged group, the software restores the data from the backup area to the new cache line. However, this method will also increase the hardware cost of the cache and reduce the utilization efficiency of hardware resources.

[0004] Therefore, how to improve the efficiency of cache redirection without increasing hardware costs has become an urgent problem to be solved. Summary of the invention

[0005] In view of the above technical problems, the technical solution adopted by the present invention is: A cache line redirection system, the system comprising: a cache, a group identification register, a range identification register, a processor and a memory storing a computer program, wherein the cache comprises M groups, each group comprises N ways, M and N are both integers greater than one, the range identification register is configured with a range identification value, and when the computer program is executed by the processor, the following steps are implemented: S101, obtaining groups to be redirected in the cache, and recording group identifiers corresponding to the groups to be redirected as reference identifiers in the group identifier register.

[0006] S102: Obtain a target request, and determine a first group of index identifiers according to address information corresponding to the target request.

[0007] S103, if the group identifier register contains a reference identifier that is the same as the first group index identifier, execute step S104, otherwise, execute step S109.

[0008] S104: Determine an index offset value according to the address information corresponding to the target request and the range identifier value in the range identifier register.

[0009] S105: Determine a second group of index identifiers according to the address information corresponding to the target request, the first group of index identifiers, and the index offset value.

[0010] S106: Determine an index range according to the first group of index identifiers and the second group of index identifiers.

[0011] S107, counting the number P of all groups corresponding to reference identifiers in the index range.

[0012] S108, update the second group of index identifiers according to P, and execute step S110.

[0013] S109: Determine that the first group of index identifiers is a second group of index identifiers.

[0014] S110: Determine a redirection result corresponding to the target request according to the second group of index identifiers.

[0015] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solution, a cache line redirection system provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects: The present invention provides a cache line redirection system, the system comprising: a cache, a group identification register, a range identification register, a processor and a memory storing a computer program, wherein the cache comprises M groups, each group comprises N ways, M and N are both integers greater than one, the range identification register is configured with a range identification value, and when the computer program is executed by the processor, the following steps are implemented: S101, obtaining groups to be redirected in the cache, and recording group identifications corresponding to each group to be redirected as reference identifications in the group identification register; S102, obtaining a target request, and determining a first group index identification according to address information corresponding to the target request; S103, if the group identification register contains a reference identification identical to the first group index identification, executing Perform step S104, otherwise, execute step S109, S104, determine the index offset value according to the address information corresponding to the target request and the range identifier value in the range identifier register, S105, determine the second group of index identifiers according to the address information corresponding to the target request, the first group of index identifiers and the index offset value, S106, determine the index range according to the first group of index identifiers and the second group of index identifiers, S107, count the number P of all groups with reference identifiers in the index range, S108, update the second group of index identifiers according to P, execute step S110, S109, determine the first group of index identifiers as the second group of index identifiers, S110, determine the redirection result corresponding to the target request according to the second group of index identifiers.

[0016] It can be seen that the index offset value is determined according to the address information corresponding to the target request and the range identifier value in the range identifier register, and then the second group of index identifiers is determined according to the address information corresponding to the target request, the first group of index identifiers and the index offset value, and the number of all groups with corresponding reference identifiers in the index range is counted to update the second group of index identifiers, and then the redirection result is determined. This can efficiently utilize the existing cache structure without increasing additional hardware costs, and redirection is performed at the same cache level, with a lower redirection delay, thereby improving the efficiency of cache redirection. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 A schematic diagram of a flow chart of a computer program being executed by a processor in a cache line redirection system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0020] This embodiment provides a cache line redirection system. Figure 1 , is a flow chart of a computer program executed by a processor in a cache line redirection system provided by an embodiment of the present invention, the system comprising: a cache, a group identification register, a range identification register, a processor and a memory storing the computer program, wherein the cache comprises M groups, each group comprises N ways, M and N are both integers greater than one, the range identification register is configured with a range identification value, and when the computer program is executed by the processor, the following steps are implemented: S101, obtaining the groups to be redirected in the cache, and recording the group identifiers corresponding to the groups to be redirected as reference identifiers in the group identifier register; S102, obtaining a target request, and determining a first group of index identifiers according to address information corresponding to the target request; S103, if the group identifier register contains a reference identifier that is the same as the first group index identifier, execute step S104, otherwise, execute step S109; S104, determining an index offset value according to the address information corresponding to the target request and the range identifier value in the range identifier register; S105, determining a second group of index identifiers according to the address information corresponding to the target request, the first group of index identifiers, and the index offset value; S106, determining an index range according to the first group of index identifiers and the second group of index identifiers; S107, counting the number P of all groups corresponding to reference identifiers in the index range; S108, updating the second group of index identifiers according to P, and executing step S110; S109, determining that the first group of index identifiers is a second group of index identifiers; S110: Determine a redirection result corresponding to the target request according to the second group of index identifiers.

[0021] Among them, the cache can be located in the chip. Usually, the chip can include multi-level cache, such as L1 cache, L2 cache, L3 cache, etc. In this embodiment, cache line redirection is performed with a single cache as the object, and the processing of caches of different levels is not involved. Therefore, only a single cache is used as the object for description. The cache described in this embodiment can belong to any cache level.

[0022] The cache is divided into multiple groups. Groups are used to determine the location range of data storage, and ways can be used to determine cache lines within a single group.

[0023] The range identifier value can be used to determine the offset range of redirection, the group identifier register can be used to record the group to be redirected through the reference identifier, the group identifier register can include several sub-registers, each sub-register records a reference identifier, and accordingly, when judging whether there is a reference identifier identical to the first group index identifier in the group identifier register, the first group index identifier is compared with the reference identifier corresponding to each sub-register.

[0024] The first group index identifier may refer to a group index determined based on the address information corresponding to the target request. If the first group index identifier has no corresponding reference identifier, it means that the group corresponding to the first group index identifier is not damaged and does not need to be redirected. Therefore, step S109 can be executed. Otherwise, redirection processing needs to be performed, that is, steps S104 to S108.

[0025] The index offset value can determine the second group of index identifiers, which are used to indicate which group near the group corresponding to the first group of index identifiers to redirect to. The index range can refer to the groups covered between the first group of index identifiers and the second group of index identifiers.

[0026] It should be noted that this embodiment is described with respect to the groups to be redirected in the cache. The groups to be redirected may generally refer to damaged groups. However, in actual application, if the implementer needs certain groups to perform special purposes and does not want these groups to be replaced, the group identifiers corresponding to these groups may also be recorded as reference identifiers in the group identifier register.

[0027] In a specific implementation, step S101 includes the following steps: S1011, obtaining groups that are damaged in the cache during the factory test as groups to be redirected, and using group identifiers corresponding to the groups to be redirected as reference identifiers; S1012, for any group in the cache, obtaining damage flag information of first returned data corresponding to each historical request after the group sends several historical requests to the subordinate object in the historical time period; S1013, if the damage flag bit information of the first returned data corresponding to any historical request is the first preset value, obtaining the verification information of the second returned data corresponding to the historical request returned by the group to the upper-level object; S1014, counting the number A of all historical requests with verification information showing verification errors; S1015: If A is greater than a preset number threshold, the group is determined to be a damaged group, and is determined to be a group to be redirected, and a group identifier corresponding to the group is used as a reference identifier.

[0028] Among them, groups with bad points in the cache can be detected during the chip factory test, but there will also be groups to be redirected that are damaged during the chip use process.

[0029] A historical time period may refer to a time period determined from a historical time point to a current time point. The historical time point may be set by the implementer. A historical request may refer to a request whose group index corresponds to the address information in the historical time period. Depending on the level of the cache, its subordinate objects may be subordinate caches or memory, and its superior objects may be superior caches or core units.

[0030] The damage mark bit information may refer to the ECC mark bit. The damage mark bit information is carried by the first return data. The first preset value may be 0. When the damage mark bit information of the first return data corresponding to the historical request is the first preset value, it may indicate that the first return data is not damaged. Otherwise, it may indicate that the first return data is damaged.

[0031] The verification information may refer to the verification result of the second returned data, and the verification information includes verification errors and verification correctness. In this embodiment, verification information statistics are only performed on historical requests in which the first returned data is not damaged, and the statistical verification information is historical requests with verification errors. Such historical requests can be considered to be errors in the group. In order to avoid misjudgment, this embodiment sets a preset number threshold to determine whether the group is a damaged group, that is, to determine whether the group is a group to be redirected.

[0032] In one embodiment, the number E of historical requests whose verification information is verification errors and continuous can also be counted, and based on the comparison result of E and the preset number threshold, it is determined whether the group is the group to be redirected. Accordingly, the implementer can adjust the value of the preset number threshold according to the actual situation.

[0033] In a specific implementation, step S104 includes the following steps: S1041, when the range identification value C in the range identification register is 0, determining that the index offset value is 1; S1042: when the range identifier value C in the range identifier register is greater than 0, the range identifier B is set according to the preset start bit identifier B.1 and the range identification value C in the range identification register to determine the end bit identification B 2 ; S1043, from the address information corresponding to the target request, according to the B 1 To B 2 The address segment of the bits determines the index offset value.

[0034] Among them, B 2 =B 1 +C-1, when C=0, the index offset value is 1.

[0035] When C=1, B 2 =B 1 , then the index offset value is based on the address information in the B 1 The corresponding value of the address of the bit is determined by adding one; when C=2, B 2 =B 1 +1, the index offset value is based on the address information in the B 1 To B 2 The corresponding value of the address segment of the bit is determined by adding one; when C=3, B 2 =B 1 +2, the index offset value is based on the address information in the B 1 To B 2 The corresponding value of the address segment of the bit is determined by adding one, and so on.

[0036] For example, when C=2, B 1 =1, the index offset value is determined by adding one to the corresponding value of the address segment from the first to the second bit of the address information. When C=3, B 1 =1, the index offset value is determined by adding one to the corresponding value of the address segment from the 1st to the 3rd bit of the address information.

[0037] In a specific implementation, step S105 includes the following steps: S1051, according to a preset reference bit identifier D, determining the Dth bit from the address information corresponding to the target request as a direction identifier value; S1052: when the direction identifier value is 0, subtract the first group index identifier from the index offset value to obtain a first intermediate index; S1053: If the first intermediate index is less than 0, the sum of the first intermediate index and M is used as the second group index identifier; otherwise, the first intermediate index is used as the second group index identifier; S1054: when the direction identifier value is 1, add the first group index identifier and the index offset value to obtain a second intermediate index; S1055: If the second intermediate index is greater than or equal to M, the difference between the second intermediate index and M is used as the second group index identifier; otherwise, the second intermediate index is used as the second group index identifier.

[0038] The direction identification value may be used to indicate whether the first group of index identifications is offset in a positive direction or a negative direction.

[0039] Specifically, in this embodiment, the index identifier range corresponding to each group is [0, M-1]. When the index identifier range is exceeded, correction is required to ensure that the second group of index identifiers has a corresponding group.

[0040] In a specific implementation, step S106 includes the following steps: S1061: If the direction identifier value is 0 and the first intermediate index is less than 0, use 0 to the first group index identifier as a first sub-range, use the second group index identifier to M-1 as a second sub-range, and the first sub-range and the second sub-range form the index range; S1062: If the direction identifier value is 1 and the second intermediate index is greater than or equal to M, the first group of index identifiers to M-1 are used as a third sub-range, and 0 to the second group of index identifiers are used as a fourth sub-range, and the third sub-range and the fourth sub-range form the index range; S1063: If the direction identifier value is 0 and the first intermediate index is greater than or equal to 0, use the second group index identifier to the first group index identifier as the index range; S1064: If the direction identifier value is 1 and the second intermediate index is less than M, the first group of index identifiers to the second group of index identifiers are used as the index range.

[0041] In order to prevent the second group of index identifiers from corresponding to the group to be redirected, an index range is determined to perform subsequent updating of the second group of index identifiers.

[0042] In a specific implementation, step S108 includes the following steps: S1081, adding P and the second group of index identifiers, and updating the second group of index identifiers with the addition result; S1082: if the updated second group index identifier is greater than or equal to M, update the second group index identifier again by the difference between the updated second group index identifier and M; S1083: Otherwise, the updated second group of index identifiers is not updated again.

[0043] In a specific implementation, step S110 includes the following steps: S1101, according to the second group of index identifiers and a preset cache replacement algorithm, determine the path corresponding to the target request from the group corresponding to the second group of index identifiers as the redirection result, and the redirection result is used to store the data corresponding to the target request and the request identifier information.

[0044] Among them, the cache replacement algorithm may refer to a least recently used algorithm, a least recently used algorithm, a first-in-first-out algorithm, etc. After determining the group corresponding to the second group of index identifiers, according to the cache replacement algorithm, the path corresponding to the target request is determined from the group corresponding to the second group of index identifiers as the redirection result, that is, the corresponding cache line is determined as the redirection result.

[0045] The request identification information may be used to determine the request corresponding to the data in the corresponding cache line.

[0046] In a specific implementation, the address information corresponding to the target request includes a first address segment and a second address segment; The request identification information includes a first address segment and a second address segment in the address information corresponding to the target request.

[0047] Among them, in the prior art, if the address information is processed by address mapping to obtain a group index, and the second address segment corresponding to the same group is the same, only the first address segment needs to be stored; and if the address information is processed by hash calculation to obtain a group index, both the first address segment and the second address segment need to be stored.

[0048] However, in a redirection scenario, the second address segment corresponding to the same group may be different, that is, it may be directly located to the group or redirected to the group. In order to effectively record the requests corresponding to the data in the cache line, unlike the prior art that uses address mapping to process the address information to obtain the group index and only stores the first address segment, in this embodiment, regardless of the method used to process the address information to obtain the group index, the request identification information includes the first address segment and the second address segment in the address information corresponding to the target request.

[0049] It can be seen that this embodiment determines the index offset value based on the address information corresponding to the target request and the range identifier value in the range identifier register, and then determines the second group of index identifiers based on the address information corresponding to the target request, the first group of index identifiers and the index offset value, and counts the number of all groups with reference identifiers in the index range to update the second group of index identifiers, and then determines the redirection result. It can efficiently utilize the existing cache structure without increasing additional hardware costs, and redirection is performed at the same cache level, with low redirection delay, thereby improving the efficiency of cache redirection.

[0050] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A cache line redirection system, characterized in that: The system comprises: a cache, a group identification register, a range identification register, a processor and a memory storing a computer program, wherein the cache comprises M groups, each group comprises N ways, M and N are both integers greater than one, the range identification register is configured with a range identification value, and when the computer program is executed by the processor, the following steps are implemented: S101, obtaining the groups to be redirected in the cache, and recording the group identifiers corresponding to the groups to be redirected as reference identifiers in the group identifier register; S102, obtaining a target request, and determining a first group of index identifiers according to address information corresponding to the target request; S103, if the group identifier register contains a reference identifier that is the same as the first group index identifier, execute step S104, otherwise, execute step S109; S104, determining an index offset value according to the address information corresponding to the target request and the range identifier value in the range identifier register; S105, determining a second group of index identifiers according to the address information corresponding to the target request, the first group of index identifiers, and the index offset value; S106, determining an index range according to the first group of index identifiers and the second group of index identifiers; S107, counting the number P of all groups corresponding to reference identifiers in the index range; S108, updating the second group of index identifiers according to P, and executing step S110; S109, determining that the first group of index identifiers is a second group of index identifiers; S110: Determine a redirection result corresponding to the target request according to the second group of index identifiers.

2. The cache line redirection system according to claim 1, characterized in that: Step S101 includes the following steps: S1011, obtaining groups that are damaged in the cache during the factory test as groups to be redirected, and using group identifiers corresponding to the groups to be redirected as reference identifiers; S1012, for any group in the cache, obtaining damage flag information of first returned data corresponding to each historical request after the group sends several historical requests to the subordinate object in the historical time period; S1013, if the damage flag bit information of the first returned data corresponding to any historical request is the first preset value, obtaining the verification information of the second returned data corresponding to the historical request returned by the group to the upper-level object; S1014, counting the number A of all historical requests with verification information showing verification errors; S1015: If A is greater than a preset number threshold, the group is determined to be a damaged group, and is determined to be a group to be redirected, and a group identifier corresponding to the group is used as a reference identifier.

3. The cache line redirection system according to claim 1, characterized in that: Step S104 includes the following steps: S1041, when the range identification value C in the range identification register is 0, determining that the index offset value is 1; S1042, when the range identification value C in the range identification register is greater than 0, determining the end bit identification B2 according to the preset start bit identification B1 and the range identification value C in the range identification register; S1043, determining the index offset value according to the address segment from the B1th bit to the B2th bit in the address information corresponding to the target request.

4. The cache line redirection system according to claim 1, wherein: Step S105 includes the following steps: S1051, according to a preset reference bit identifier D, determining the Dth bit from the address information corresponding to the target request as a direction identifier value; S1052: when the direction identifier value is 0, subtract the first group index identifier from the index offset value to obtain a first intermediate index; S1053: If the first intermediate index is less than 0, the sum of the first intermediate index and M is used as the second group index identifier; otherwise, the first intermediate index is used as the second group index identifier; S1054: when the direction identifier value is 1, add the first group index identifier and the index offset value to obtain a second intermediate index; S1055: If the second intermediate index is greater than or equal to M, the difference between the second intermediate index and M is used as the second group index identifier; otherwise, the second intermediate index is used as the second group index identifier.

5. The cache line redirection system according to claim 4, characterized in that: Step S106 includes the following steps: S1061: If the direction identifier value is 0 and the first intermediate index is less than 0, use 0 to the first group index identifier as a first sub-range, use the second group index identifier to M-1 as a second sub-range, and the first sub-range and the second sub-range form the index range; S1062: If the direction identifier value is 1 and the second intermediate index is greater than or equal to M, the first group of index identifiers to M-1 are used as a third sub-range, and 0 to the second group of index identifiers are used as a fourth sub-range, and the third sub-range and the fourth sub-range form the index range; S1063: If the direction identifier value is 0 and the first intermediate index is greater than or equal to 0, use the second group index identifier to the first group index identifier as the index range; S1064: If the direction identifier value is 1 and the second intermediate index is less than M, the first group of index identifiers to the second group of index identifiers are used as the index range.

6. The cache line redirection system according to claim 2, characterized in that: Step S108 includes the following steps: S1081, adding P and the second group of index identifiers, and updating the second group of index identifiers with the addition result; S1082: if the updated second group index identifier is greater than or equal to M, update the second group index identifier again by the difference between the updated second group index identifier and M; S1083: Otherwise, the updated second group of index identifiers is not updated again.

7. The cache line redirection system according to claim 1, wherein: Step S110 includes the following steps: S1101, according to the second group of index identifiers and a preset cache replacement algorithm, determine the path corresponding to the target request from the group corresponding to the second group of index identifiers as the redirection result, and the redirection result is used to store the data corresponding to the target request and the request identifier information.

8. The cache line redirection system according to claim 7, characterized in that: The address information corresponding to the target request includes a first address segment and a second address segment; The request identification information includes a first address segment and a second address segment in the address information corresponding to the target request.

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