Heat dissipation ring, preparation method thereof and semiconductor heat dissipation packaging structure

Abstract

The invention provides a heat dissipation ring, a preparation method thereof and a semiconductor heat dissipation packaging structure, right angles of a second rectangle projected on a first plane of an inner ring surface of the heat dissipation ring are all replaced with a closed plane pattern of a preset pattern, so that each right angle position, close to a chip, of the heat dissipation ring comprises a material adding area. The preset pattern is arranged on the inner ring surface, so that the material adding area is added to the position, corresponding to the right angle of the chip, of the heat dissipation ring, the heat dissipation efficiency of the diagonal area of the chip is improved, and larger warping deformation of the chip in the diagonal area is reduced; meanwhile, the processing shape of the radiating ring is changed to reduce the warping degree of the chip, the problems of additional cost, volume increase and the like are avoided, and low cost and small volume of the radiating ring are ensured; in addition, the preset pattern is a polygon comprising a right angle, the adaptation degree of the heat dissipation ring and an existing machining technology is improved, and improvement convenience is improved; and finally, the preset graph is set to be a right triangle, the heat dissipation ring is improved under the lowest processing difficulty, and the heat dissipation efficiency of the heat dissipation ring to the diagonal region of the chip is maximized.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor integrated circuit manufacturing, and particularly relates to a heat dissipation ring, a preparation method thereof, and a semiconductor heat dissipation packaging structure. Background Art

[0002] In the field of semiconductor manufacturing technology, the manufacturing and packaging of advanced semiconductor chips are key links to enable the chips to have characteristics such as high computing power, high heat dissipation, and small volume, so as to meet the requirements of modern electronic devices. Among them, the heat dissipation packaging of advanced semiconductor chips is an even more crucial link.

[0003] Traditional chip heat dissipation packaging includes heat sink packaging and heat dissipation ring packaging. Among them, as Figure 1 shown, heat sink packaging is to directly fix the heat sink on the chip and utilize the heat conduction performance of the heat sink to dissipate heat; however, heat sink packaging is easily restricted by heat dissipation glue, resulting in the inability to meet the high heat dissipation requirements of advanced semiconductor chips. And as Figure 2 shown, heat dissipation ring packaging is to fix the heat dissipation ring around the chip and utilize the heat conduction performance and structural design of the heat dissipation ring to dissipate heat; however, heat dissipation ring packaging is likely to cause the chip to warp, and the chip itself will inevitably deform under the action of force and heat during the packaging production process, which will also cause warping. The warping between the chip and the heat dissipation ring will cause poor contact between the chip and the heat dissipation ring, thereby affecting the heat dissipation effect of the heat dissipation ring on the chip.

[0004] Therefore, there is an urgent need for a structure or method that can improve the heat dissipation performance of semiconductor chip heat dissipation packaging.

[0005] It should be noted that the above introduction of the technical background is only for the convenience of clearly and completely explaining the technical solutions of the present application and facilitating the understanding of those skilled in the art. It cannot be considered that the above technical solutions are well-known to those skilled in the art just because these solutions are described in the background art part of the present application. Summary of the Invention

[0006] In view of the above disadvantages of the prior art, the purpose of the present invention is to provide a heat dissipation ring, a preparation method thereof, and a semiconductor heat dissipation packaging structure, which are used to solve the problem that the heat dissipation performance of semiconductor chip heat dissipation packaging in the prior art is restricted.

[0007] To achieve the above object, the present invention provides a heat dissipation ring, which includes an inner ring surface and an outer ring surface. The center points of the inner ring surface and the outer ring surface coincide with the central axis of the heat dissipation ring; the central axis is perpendicular to the first plane, and the heat dissipation ring is used to dissipate heat from a chip placed inside the heat dissipation ring. The projection of the chip on the first plane is a first rectangle; each right angle of the projection of the inner ring surface on the first plane, which is a second rectangle, is replaced by a closed planar figure of a preset pattern, and the center points of the first rectangle and the second rectangle coincide; the preset pattern of the inner ring surface enables the heat dissipation ring to include a material adding area at each right angle position close to the chip to be cooled, and the inner ring surface includes the inner walls of each of the material adding areas.

[0008] Optionally, each of the preset patterns is a polygon including a right angle, and the right angles of each of the preset patterns respectively coincide pairwise with a right angle of the second rectangle.

[0009] Optionally, each of the preset patterns is a right triangle, and the right angles of each of the right triangles respectively coincide pairwise with a right angle of the second rectangle; each of the closed planar figures is an octagon, and the hypotenuses of each of the right triangles are respectively one side of the octagon.

[0010] Optionally, the hypotenuse side lengths of each of the right triangles are all 1.95 millimeters - 2.05 millimeters.

[0011] Optionally, the material of the heat dissipation ring is copper.

[0012] Optionally, the length of the heat dissipation ring in the direction of the central axis is 1 millimeter - 2 millimeters.

[0013] Optionally, the heat dissipation ring is an integrated structure including each of the material adding areas.

[0014] The present invention also provides a semiconductor heat dissipation packaging structure, which includes any one of the above heat dissipation rings.

[0015] Optionally, the semiconductor heat dissipation packaging structure further includes a chip, the heat dissipation ring surrounds the chip, and the overlapping area of the projection of each material adding area of the heat dissipation ring on the first plane and the projection of each right angle of the chip on the first plane is greater than a preset area.

[0016] The present invention also provides a preparation method for the heat dissipation ring, which is used to prepare any one of the above heat dissipation rings, and the preparation method is an integral molding processing method.

[0017] As described above, the heat dissipation ring, its preparation method and the semiconductor heat dissipation packaging structure of the present invention have the following beneficial effects:

[0018] By providing a preset pattern on the inner ring surface of the heat dissipation ring, the present invention increases the material-added area at the positions of the heat dissipation ring corresponding to the right angles of the chip, so as to improve the heat dissipation efficiency of the diagonal area of the chip, reduce the greater warpage deformation of the chip in the diagonal area, and alleviate the warpage problem during the heat dissipation packaging of the chip.

[0019] By simply changing the processing shape of the heat dissipation ring, the present invention can reduce the warpage degree of the chip, avoid problems such as increased cost and volume caused by using other warpage reduction schemes, and ensure the low cost and small volume of the heat dissipation ring.

[0020] The present invention sets the preset pattern as a polygon including right angles, which improves the compatibility of the heat dissipation ring with the existing processing technology and enhances the improvement convenience.

[0021] By setting the preset pattern as a right triangle, the present invention improves the heat dissipation ring with the lowest integrated processing difficulty and maximizes the heat dissipation efficiency of the heat dissipation ring for the diagonal area of the chip. Description of the Drawings

[0022] Figure 1 Shows a schematic structural diagram of a heat sink package in the prior art.

[0023] Figure 2 Shows a schematic structural diagram of a heat dissipation ring package in the prior art.

[0024] Figure 3 Shows a schematic structural diagram of a square-ring heat dissipation ring in the prior art.

[0025] Figure 4 Shows a schematic structural diagram of the heat dissipation ring in the present invention.

[0026] Figure 5 Shows a contour map of the warpage deformation amount corresponding to a chip packaged with a traditional square-ring heat dissipation ring in the prior art at different temperatures.

[0027] Figure 6 Shows a comparison table of the maximum warpage deformation amounts of a chip using a square-ring heat dissipation ring in the prior art and a chip using the heat dissipation ring in the present invention at high temperatures.

[0028] Figure 7 Shows a comparison table of the advantages and disadvantages of various warpage reduction improvement methods in the prior art and the present invention.

[0029] Explanation of the Reference Numerals in the Drawings

[0030] 1. Heat sink; 2. (Traditional zigzag-shaped) heat dissipation ring; 21. Second rectangle; 3. Chip; 4. (Heat dissipation ring with additional material area); 41. Inner ring surface; 42. Outer ring surface; 43. Closed planar figure; 44. Additional material area; 45. Right angle; 46. Hypotenuse. Detailed implementation manners

[0031] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0032] When detailing the embodiments of the present invention, for the convenience of description, the schematic diagrams showing the device structure will be enlarged locally in a non-general proportion, and the schematic diagrams are only examples, which should not limit the protection scope of the present invention here. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.

[0033] For the convenience of description, spatial relationship terms such as "below", "beneath", "lower than", "under", "above", "on" etc. may be used herein to describe the relationship between one element or feature shown in the drawings and other elements or features. It will be understood that these spatial relationship terms are intended to include other directions of the device in use or operation besides the directions depicted in the drawings.

[0034] In the context of this application, the structure where the first feature is "above" the second feature may include embodiments where the first and second features are in direct contact, and may also include embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0035] It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in its actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0036] In the field of semiconductor manufacturing technology, due to characteristics such as high computing power, high heat dissipation, and small volume, advanced semiconductor chips 3 have higher requirements for the heat dissipation performance of heat dissipation packaging. Traditional heat dissipation packaging for chips 3 includes heat sink 1 packaging and heat dissipation ring 4 packaging. However, heat sink 1 packaging is easily restricted by heat dissipation glue, resulting in the inability to meet the high heat dissipation requirements of advanced semiconductor chips 3; and using such as Figure 3The heat dissipation ring encapsulation of the shown figure-eight heat dissipation ring 2 is prone to causing warping problems in the chip 3. Moreover, the chip 3 itself will inevitably deform under the action of force and heat during the packaging production process (including the thermal stress accumulated during wafer dicing, the thermal process of the die bonding process, the stress generated by uneven glue application in the dispensing process, the pressing force generated when installing the heat sink 1, the thermal process of chip 3 ball planting, etc.), which will bring warping. At the same time, it will also cause the heat dissipation ring 2 itself to warp. As a result, the obvious warping between the chip 3 and the heat dissipation ring 2 will lead to poor contact between the chip 3 and the heat dissipation ring 2, thereby affecting the heat dissipation effect of the heat dissipation ring 2 on the chip 3.

[0037] The present invention provides a heat dissipation ring 4, as Figure 4 shown. The heat dissipation ring 4 includes an inner ring surface 41 and an outer ring surface 42. The center point of the inner ring surface 41 and the center point of the outer ring surface 42 both coincide with the central axis of the heat dissipation ring 4; the central axis is perpendicular to the first plane. The heat dissipation ring 4 is used to dissipate heat from the chip 3 placed inside the heat dissipation ring 4. The projection of the chip 3 on the first plane is a first rectangle; each right angle 45 of the projection of the inner ring surface 41 on the first plane, which is a second rectangle 21, is replaced with a closed planar graph 43 of a preset graph. The center points of the first rectangle and the second rectangle 21 coincide; the preset graph of the inner ring surface 41 enables the heat dissipation ring 4 to include a material adding area 44 at each right angle 45 position close to the chip 3 to be cooled. The inner ring surface 41 includes the inner walls of each of the material adding areas 44.

[0038] As Figure 5 shown, when the chip 3 corresponding to the figure-eight heat dissipation ring 2 in the prior art works for a period of time and the temperature rises from 30°C to a high temperature of 260°C, the warping deformation amount distribution nephogram of each position of the chip 3 relative to the zero reference plane can be seen. It can be seen that when the temperature is 30°C, the maximum warping deformation amount of the chip 3 is 200 microns. After the temperature rises to 260°C, the deformation amounts of each position of the chip 3 change. The maximum warping deformation amount of the chip 3 becomes -132 microns, changing from warping upward to warping downward, and the maximum warping deformation amount changes by 332 microns. In particular, the warping deformation amount at the diagonal position of the chip 3 changes most significantly. As a result, the deformation generated when the diagonal position of the chip 3 undergoes reverse warping at high temperature is particularly obvious, and the product risk brought is also the greatest. By setting a preset graph on the inner ring surface 41 of the heat dissipation ring 4 for heat dissipation packaging of the chip 3, the present invention enables the heat dissipation ring 4 to increase the material adding area 44 at the positions corresponding to the right angles 45 of the chip 3. Since the diagonal area of the semiconductor chip 3 is often more severely affected by warping deformation at high temperature, the setting of the material adding area 44 in the heat dissipation ring 4 can reduce the larger warping deformation of the chip 3 in the diagonal area. As Figure 6The following is a comparison table of the maximum warpage deformation of the chip 3 using the traditional zigzag heat dissipation ring 2 and the chip 3 using the heat dissipation ring 4 in this solution with respect to the zero reference plane at 260°C. The maximum warpage deformation of the chip 3 using the traditional zigzag heat dissipation ring 2 at 260°C is -132 micrometers, while the maximum warpage deformation of the chip 3 using the heat dissipation ring 4 with the added material region 44 set in this solution at 260°C is -100 micrometers. The maximum downward warpage deformation of the chip 3 using the heat dissipation ring including the added material region 44 in this solution compared to the zero reference plane after the temperature rises to 260°C is reduced by 32 micrometers, significantly alleviating the warpage problem during the heat dissipation packaging of the chip 3, making the heat conduction contact state between the heat dissipation ring 4 and the chip 3 more reliable, improving the heat dissipation efficiency of the heat dissipation ring 4 for the diagonal region of the chip 3, and thus enhancing the heat dissipation efficiency and heat dissipation effect of the heat dissipation ring 4 packaging for the chip 3. At the same time, by simply changing the processing shape of the heat dissipation ring 4, the warpage degree of the chip 3 can be reduced, without having to adopt solutions such as using a heat dissipation ring 2 material with higher strength to reduce the warpage degree of the chip 3 in the prior art, which causes an increase in cost, or using a thicker heat dissipation ring 2, which increases the volume and cost of the heat dissipation packaging of the chip 3, and other additional problems brought by the solutions to reduce the warpage problem. This ensures the low cost and small volume of the heat dissipation ring 4, which is conducive to large-scale practical industrial promotion and use, such as Figure 7 The following shows the advantages and disadvantages comparison among various improved methods for reducing the warpage degree of the chip 3; and there is greater flexibility in the selection of the material of the heat dissipation ring 4, and appropriate materials can be selected according to specific application requirements and cost considerations, thereby further optimizing the comprehensive performance; in addition, this solution can be adaptively improved for chips 3 of different sizes and shapes, with stronger applicability, and can be widely used in the packaging production of various high-order semiconductor chips 3, and has a broader application prospect; finally, since the design of the heat dissipation ring 4 reduces the warpage of the heat dissipation ring 4 and the chip 3, it can also reduce the adverse effects of the warpage of the heat dissipation ring 4 and the chip 3 itself on the performance reliability of the chip 3, thereby improving the product yield of the semiconductor chip 3 heat dissipation packaging.

[0039] Specifically, the solution in the present invention is to solve the warping problem between the heat dissipation ring 4 and the chip 3 without introducing other additional negative impacts such as cost and volume. Those skilled in the art can also cooperate to optimize the process parameters and control measures in the chip 3 packaging production process according to requirements to reduce the thermo-mechanical effects on the chip 3, or select high-strength materials, increase the thickness of the heat dissipation ring 4, or adopt thermal management technologies such as heat pipes, heat sinks 1, and fans to improve the heat dissipation performance of the chip 3 and reduce the impact of heat accumulation on the chip 3, or improve the material preparation process and material formula of the heat dissipation ring 4 to develop a heat dissipation ring 4 material with higher strength and better thermal conductivity, or simultaneously optimize the heat dissipation structure through technical means such as thermal simulation to improve the heat dissipation effect, thereby further reducing the deformation and warping between the heat dissipation ring 4 and the chip 3, and further improving the packaging effect of the heat dissipation ring 4 on the chip 3, all of which are within the protection scope of the present invention.

[0040] In one embodiment, each of the preset patterns is a polygon including a 45-degree right angle, and the 45-degree right angles of each of the preset patterns respectively coincide pairwise with a 45-degree right angle of the second rectangle 21.

[0041] The present invention sets the preset pattern as a polygon including a 45-degree right angle. Without changing the 45-degree right angle shape of the outer ring surface 42 of the heat dissipation ring 4, only by modifying the shape of the inner ring surface 41 can the material adding region 44 be set. While improving the heat dissipation efficiency of the heat dissipation ring 4 for the chip 3, it also improves the compatibility of the heat dissipation ring 4 with the existing processing technology, improves the improvement convenience, reduces the improvement cost of the heat dissipation ring 4, and improves the feasibility of popularizing and applying this solution in the actual industry.

[0042] In one embodiment, each of the preset patterns is a 45-degree right triangle, and the 45-degree right angles of each of the 45-degree right triangles respectively coincide pairwise with a 45-degree right angle of the second rectangle 21; each of the closed planar patterns 43 is an octagon, and the hypotenuses 46 of each of the 45-degree right triangles are respectively one side of the octagon.

[0043] In the present invention, by setting the preset pattern as a right-angled 45-degree triangle and modifying the right-angled 45-degree machining of the inner ring surface 41 into linear machining, the improvement of the heat dissipation ring 4 is achieved with the lowest integrated machining difficulty. Moreover, the machining speed can even be higher than that of the square-ring heat dissipation ring 2 in the prior art, without the need to introduce a new production line or complex process flow, thereby improving production efficiency, shortening the production cycle, and being conducive to large-scale production. At the same time, the material-added area 44 of the right-angled 45-degree triangle can further optimize the heat dissipation efficiency of the heat dissipation ring 4 for the diagonal area of the chip 3. Additionally, by setting the inner ring surface 41 of the heat dissipation ring 4 as an octagon, the strength of the heat dissipation ring 4 can itself be increased, thereby enhancing its ability to resist deformation under thermal action, and thus reducing the risk of poor thermal conduction contact with the chip 3 caused by warping deformation of the heat dissipation ring 4 itself.

[0044] Specifically, the preset pattern can also be set as other various different shapes such as a sector, a polygon, etc. according to requirements to further reduce the influence of the heat dissipation ring 4 on the warping of the chip 3, so that the material-added area 44 forming the heat dissipation ring 4 can improve the heat dissipation efficiency of the heat dissipation ring 4 for the diagonal area of the chip 3, and all are within the protection scope of the present invention.

[0045] In one embodiment, the length of the hypotenuse 46 of each right-angled 45-degree triangle is 1.95 mm - 2.05 mm.

[0046] In one embodiment, the length of the hypotenuse 46 of each right-angled 45-degree triangle is 2 mm.

[0047] Specifically, the length of the hypotenuse 46 of the right-angled 45-degree triangle can also be set as other appropriate sizes according to the size of the chip 3 and the requirements of heat dissipation packaging, and all are within the protection scope of the present invention.

[0048] In one embodiment, the material of the heat dissipation ring 4 is copper.

[0049] Specifically, since the method of changing the shape of the heat dissipation ring 4 in the present invention can reduce the warping influence of the heat dissipation ring 4 on the chip 3, materials with lower costs but poorer deformation resistance such as copper materials that were discarded in the prior art for improving the warping of the chip 3 can be used. Thus, while ensuring that the heat dissipation effect of the heat dissipation ring 4 on the chip 3 meets the requirements, the cost can be ensured not to increase.

[0050] In one embodiment, the material of the heat dissipation ring 4 is C1100 (electrolytic tough pitch copper).

[0051] In one embodiment, the material of the heat dissipation ring 4 is SUS304 (austenitic stainless steel).

[0052] In one embodiment, the material of the heat dissipation ring 4 can also be selected according to requirements to be a material with higher strength, such as aluminum alloy, titanium alloy, steel material or other suitable materials, in cooperation with the design of the heat dissipation ring 4 of the present invention, so as to further improve the warping effect of the heat dissipation ring 4 on the chip 3 and improve the heat dissipation efficiency of the heat dissipation ring 4 for the chip 3.

[0053] In one embodiment, the length of the heat dissipation ring 4 in the direction of the central axis is 1 mm - 2 mm.

[0054] In one embodiment, the length of the heat dissipation ring 4 in the direction of the central axis is 1 mm.

[0055] In one embodiment, the length of the heat dissipation ring 4 in the direction of the central axis is 1.5 mm.

[0056] Specifically, since the method of changing the shape of the heat dissipation ring 4 in the present invention can reduce the warping effect of the heat dissipation ring 4 on the chip 3, the solution of miniaturizing the heat dissipation package volume of the chip 3, which was abandoned in the prior art by using a thicker heat dissipation ring 2 to improve the warping of the chip 3, can be used. Thus, while ensuring that the heat dissipation effect of the heat dissipation ring 4 on the chip 3 meets the requirements, the miniaturization of the volume of the chip 3 heat dissipation package and low cost can be ensured; those skilled in the art can also select other suitable thicknesses of the heat dissipation ring 4 according to requirements, all within the protection scope of the present invention.

[0057] In one embodiment, the ring diameter at the position where the heat dissipation ring 4 does not have the material adding area 44 is 9.5 mm - 10.5 mm.

[0058] In one embodiment, the ring diameter at the position where the heat dissipation ring 4 does not have the material adding area 44 is 10 mm.

[0059] Specifically, the specific dimensions of the heat dissipation ring 4 can be adjusted according to requirements, all within the protection scope of the present invention.

[0060] Preferably, the heat dissipation ring 4 is an integrated structure including each of the material adding areas 44.

[0061] In the present invention, by setting the heat dissipation ring 4 to be an integrated structure including the material adding area 44, the heat dissipation ring 4 in this solution can be obtained by simply modifying the original processing path of the heat dissipation ring 2, without the need to additionally use materials or process steps, thereby ensuring the lowest cost and convenience of the improvement of the heat dissipation ring 4.

[0062] Specifically, other structures can also be used according to requirements to add the material adding area 44 to the heat dissipation ring 4, but the process efficiency and heat dissipation effect will be affected, all within the protection scope of the present invention.

[0063] The present invention also provides a semiconductor heat dissipation packaging structure, and the semiconductor heat dissipation packaging structure includes the heat dissipation ring 4 described in any one of the above.

[0064] In one embodiment, the semiconductor heat dissipation packaging structure further includes a chip 3, the heat dissipation ring 4 surrounds the chip 3, and the overlapping area of the projection of each material adding region 44 of the heat dissipation ring 4 on the first plane and the respective right angles 45 of the chip 3 on the first plane is greater than a preset area.

[0065] Specifically, the preset area can be designed according to actual heat dissipation simulation or experimental results to minimize the warping effect of the heat dissipation ring 4 on the chip 3 and optimize the heat dissipation effect of the heat dissipation ring 4 packaging on the chip 3.

[0066] In one embodiment, the deformation and warping of the chip 3 can be further reduced and the heat dissipation efficiency of the semiconductor heat dissipation packaging structure can be improved by setting the cutting speed during wafer cutting, the temperature during chip mounting, the temperature during dispensing, the pressure during heat sink 1 mounting, and the temperature during ball planting in the preparation process of the semiconductor heat dissipation packaging structure to 10 mm / s, 200 °C, 150 °C, 50 N, and 250 °C, respectively.

[0067] The present invention also provides a preparation method for the heat dissipation ring 4, and the preparation method is used to prepare the heat dissipation ring 4 described in any one of the above, and the preparation method is an integral molding processing method.

[0068] The present invention prepares the heat dissipation ring 4 including the material adding region 44 by an integral molding processing method, and the heat dissipation ring 4 in the present solution can be obtained by simply modifying the original processing path of the heat dissipation ring 2 without the need to additionally use materials or process steps, so as to ensure the lowest cost and improvement convenience of the improvement of the heat dissipation ring 4.

[0069] Specifically, other processing methods can also be used according to requirements to add the material adding region 44 of the heat dissipation ring 4, but the process efficiency and heat dissipation effect will be affected, and all are within the protection scope of the present invention.

[0070] In summary, for the heat dissipation ring of the present invention, its preparation method, and the semiconductor heat dissipation packaging structure, by setting a preset pattern on the inner ring surface of the heat dissipation ring, a material adding area can be added to the positions of the heat dissipation ring corresponding to the right angles of the chip, so as to improve the heat dissipation efficiency of the diagonal area of the chip, reduce the larger warping deformation of the chip in the diagonal area, and alleviate the warping problem during the heat dissipation packaging of the chip; at the same time, by simply changing the processing shape of the heat dissipation ring, the warping degree of the chip can be reduced, avoiding problems such as increased cost and volume caused by using other warping reduction schemes, and ensuring the low cost and small volume of the heat dissipation ring; in addition, setting the preset pattern as a polygon including right angles improves the compatibility of the heat dissipation ring with the existing processing technology and the improvement convenience; finally, by setting the preset pattern as a right triangle, the heat dissipation ring can be improved with the lowest integrated processing difficulty and the heat dissipation efficiency of the diagonal area of the chip can be maximized.

[0071] Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.

[0072] The above embodiments are only illustrative of the principles and effects of the present invention, and are not used to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A heat dissipation ring, characterized in that: The heat dissipation ring includes an inner ring surface and an outer ring surface, and the center points of the inner ring surface and the outer ring surface both coincide with the center axis of the heat dissipation ring; the center axis is perpendicular to a first plane, and the heat dissipation ring is used to dissipate heat for a chip placed in the heat dissipation ring, and the projection of the chip on the first plane is a first rectangle; the projection of the inner ring surface on the first plane is a closed plane figure in which each right angle of the second rectangle is replaced by a preset figure, and the center points of the first rectangle and the second rectangle coincide with each other; the preset figure of the inner ring surface enables the heat dissipation ring to include a material increase area at each right angle close to the chip to be cooled, and the inner ring surface includes the inner walls of each of the material increase areas.

2. The heat dissipation ring according to claim 1, characterized in that: Each of the preset figures is a polygon including a right angle, and the right angles of each of the preset figures coincide with a right angle of the second rectangle in pairs.

3. The heat dissipation ring according to claim 2, characterized in that: Each of the preset figures is a right triangle, and the right angles of each of the right triangles coincide with a right angle of the second rectangle in pairs; each of the closed plane figures is an octagon, and the hypotenuse of each of the right triangles is a side of the octagon.

4. The heat dissipation ring according to claim 3, characterized in that: The length of the hypotenuse of each right triangle is 1.95 mm-2.05 mm.

5. The heat dissipation ring according to any one of claims 1 to 4, characterized in that: The heat dissipation ring is made of copper.

6. The heat dissipation ring according to any one of claims 1 to 4, characterized in that: The length of the heat dissipation ring along the direction of the central axis is 1 mm to 2 mm.

7. The heat dissipation ring according to any one of claims 1, characterized in that: The heat dissipation ring is an integrated structure including each of the material-increasing areas.

8. A semiconductor heat dissipation packaging structure, characterized in that: The semiconductor heat dissipation packaging structure comprises the heat dissipation ring described in any one of claims 1-7.

9. The semiconductor heat dissipation packaging structure according to claim 8, characterized in that: The semiconductor heat dissipation packaging structure also includes a chip, the heat dissipation ring surrounds the chip, and the overlapping areas of the projections of each material-increasing area of ​​the heat dissipation ring on the first plane and the projections of each right angle of the chip on the first plane are greater than a preset area.

10. A method for preparing a heat dissipation ring, characterized in that: The preparation method is used to prepare the heat dissipation ring described in any one of claims 1 to 7, and the preparation method is an integrated molding processing method.

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