Mixed-order SMASH Sigma-Delta modulator

Abstract

The invention discloses a mixed-order SMASH Sigma-Delta modulator, which comprises a first-stage modulator, a second-stage modulator and an inter-stage analog path, and is characterized in that the first-stage modulator comprises a first loop filter, a first quantizer, a first summator, a second summator and a first feedback loop; the second-stage modulator comprises a first integrator, a second integrator, a second quantizer and a second feedback loop; and the inter-stage analog path is connected to the input of the second-stage modulator through the output of the second adder, and comprises a unit delay module z-1. Through the specific second-stage modulator structure and the inter-stage simulation path with unit time delay, the shaping order of the quantization noise of the first-stage modulator can be increased on the premise that the number of integrators is not changed, so that the precision of the overall output signal of the modulator is improved, and the circuit power consumption and the layout area are saved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and particularly to a hybrid-order SMASH Sigma-Delta modulator. Background Art

[0002] High-performance analog-to-digital converters are the bridges for information transfer between analog and digital integrated circuits, and determine the performance of the entire signal processing system. Different types of analog-to-digital converters are suitable for different signal processing scenarios. Parallel-comparison analog-to-digital converters complete the comparison and quantization of analog signals in a parallel manner, and can achieve a very high conversion rate, but their resolution is not high and the power consumption is often large. Successive-approximation analog-to-digital converters can also achieve a relatively fast conversion speed, but under Nyquist sampling conditions, traditional-architecture successive-approximation analog-to-digital converters cannot achieve high precision. Sigma-Delta analog-to-digital converters can achieve high precision on the premise of only consuming low power, and can achieve a resolution of more than 16 bits in application fields such as audio and other low-frequency signals, and have high application value.

[0003] The Sigma-delta modulator moves most of the noise to outside the signal band through oversampling and noise shaping, and then uses a decimation filter to filter out the out-of-band noise, so as to achieve high-precision conversion. The modulator improves the conversion precision by increasing the oversampling rate and the noise shaping order, but as the shaping order increases, the stability of the single-loop modulator decreases. Multistage modulators can also have high-order noise shaping capabilities, but because the number of integrators in a single loop is small and the single-loop shaping order is low, the stability is better.

[0004] Typical multistage modulators such as MASH modulators can achieve noise cancellation by combining digital filtering and analog filtering, further improving the precision that the modulator can achieve. However, due to the limitations of circuit non-ideal factors, analog filters cannot achieve the established transfer function without deviation, so there will be noise leakage in MASH-architecture modulators, seriously affecting the precision. The SMASH architecture cancels the digital filter part in the modulator, reduces the precision requirements for integrators, and solves the problem of noise leakage. If the noise shaping ability of the SMASH architecture can be improved without consuming much additional power, that is, without adding additional integrators, the conversion precision of the modulator can be further improved. Summary of the Invention

[0005] The object of the present invention is: in view of the above-mentioned prior art, the present invention provides a hybrid-order SMASH Sigma-Delta modulator, which realizes different shaping orders for the quantization noise of the two-stage modulator, so as to improve the noise shaping ability of the SMASH architecture, and the chip area and power consumption will not increase significantly.

[0006] The technical solution of the present invention is as follows:

[0007] A mixed-order SMASH Sigma-Delta modulator, comprising: a first-stage modulator, a second-stage modulator, and an inter-stage analog path, wherein,

[0008] The first-stage modulator includes a first loop filter, a first quantizer, a first adder, a second adder, and a first feedback loop; the input of the first loop filter is connected to the input signal X(z), the input of the first quantizer is connected to the output of the first loop filter, the input of the first adder is connected to the output of the first quantizer and the output of the second-stage modulator, and the output is the output signal Y(z), the first feedback loop is the output of the first adder fed back to the input of the first loop filter, and the input of the second adder is connected to the input and output of the first quantizer;

[0009] The second-stage modulator includes a first integrator, a second integrator, a second quantizer, and a second feedback loop; the first integrator, the second integrator, and the second quantizer are connected in sequence, and the second feedback loop is the output of the second quantizer fed back to the inputs of the first integrator and the second integrator;

[0010] The inter-stage analog path is connected from the output of the second adder to the input of the second-stage modulator and includes a unit delay module z -1 .

[0011] Preferably, the input of the second-stage modulator is connected to the input of the first integrator through the coefficient module a1, to the input of the second integrator through the coefficient module a2, and to the input of the second quantizer through the coefficient module a3.

[0012] Preferably, the signal transfer function STF 1 (z), the noise transfer function NTF 1 (z) of the first-stage modulator, and the quantization noise E 1 (z) of the first quantizer;

[0013] Preferably, the transfer function H 1 (z) of the first integrator, the transfer function H 2 (z) of the second integrator, the signal transfer function STF 2 (z), the noise transfer function NTF 2 (z) of the second-stage modulator, and the quantization noise E 2 (z) of the second quantizer.

[0014] Preferably, the coefficient module a1 is 1, the coefficient module a2 is 1.5, the coefficient module a3 is 3, and the transfer function H 1 (z) of the first integrator is 0.5z-1 / (1 - z -1 ), the transfer function H 2 (z) of the second integrator is 2z -1 / (1 - z -1 ).

[0015] Preferably, the loop filter of the first - stage modulator includes two - stage integrators, and the transfer functions of the two - stage integrators are 0.5z -1 / (1 - z -1 ) and z -1 / (1 - z -1 ), and the first feedback loop is connected to the inputs of the two - stage integrators.

[0016] Preferably, the noise transfer function NTF 2 = 1 / (1 + H 2 (z)+H 1 (z)H 2 (z))=(1 - z -1 ), and the signal transfer function STF 2 = (3 + 1.5H 2 (z)+H 2 (z)+H 1 (z)H 2 (z))NTF 2 = z -2 - 3z -1 + 3.

[0017] Preferably, the first quantizer is a 3 - bit quantizer and the second quantizer is a 4 - bit quantizer.

[0018] Preferably, the transfer function of the SMASH Sigma - Delta modulator with a hybrid order is as follows:

[0019]

[0020] The advantages of the present invention are:

[0021] Compared with the traditional SMASH architecture, the present invention proposes to modify the analog inter - stage path based on the traditional SMASH structure, and cooperate with the input coefficient module of the second - stage modulator, which can achieve a higher - order noise - shaping ability for the quantization noise of the first - stage modulator; although the noise - shaping ability is improved, no additional integrator is added, so that no more additional power consumption and system complexity are brought, and the layout area overhead is saved; it can be better applied to the field of high - precision and low - power analog - to - digital conversion. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0023] Figure 1 is the system block diagram of the SMASH Sigma-Delta modulator of the present invention with a mixed order;

[0024] Figure 2 is a specific embodiment of the present invention based on the SMASH 2-2 structure;

[0025] Figure 3 is the output signal spectrum waveform of the embodiment of the present invention;

[0026] Figure 4 is the structure of a traditional SMASH 2-2 modulator;

[0027] Figure 5 is the curve of the SNDR of the embodiment of the present invention and the traditional SMASH 2-2 modulator changing with the input signal amplitude. Specific Embodiments

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0029] Based on the SMASH structure, the present invention proposes a new cascaded structure modulator circuit. On the basis of the original SMASH structure modulator, the cascaded path is modified and a specific second-stage modulator structure is used to achieve a higher-order noise shaping ability for the quantization noise of the first-stage modulator. At the same time, no additional integrator is required, avoiding more additional power consumption, saving the layout area, and simplifying the circuit complexity.

[0030] The transfer function of the Sigma-Delta modulator with the traditional SMASH structure is as shown in (1):

[0031] Y(z) = STF a (z)X(z) - NTF a (z)NTF b (z)E b (z) + NTEa (z)(1 - STF b (z))E a (z)(1)

[0033] where Y(z) is the output of the modulator, X(z) is the input of the modulator, and E a (z) is the quantization noise of the first - stage modulator, and E b (z) is the quantization noise of the second - stage modulator. STF a (z) is the signal transfer function of the first - stage modulator, and STF b (z) is the signal transfer function of the second - stage modulator, and NTF a (z) is the noise transfer function of the first - stage modulator, and NTF b (z) is the noise transfer function of the second - stage modulator.

[0034] For a modulator with a SMASH 2 - 2 structure, it is usually set that 1 - STF a (z)=NTF b (z). If NTF a =NTF b =(1 - z -1 ) 2 , then the transfer function of the modulator of this structure is as in (2):

[0035] Y(z)=STF 1 X(z)-NTF 1 (z)NTF 2 (z)E 2 (z)+NTF 1 (z)NTF 2 (z)E 1 (z)

[0036] =STF 1 X(z)-(1 - z -1 ) 4 (E 2 (z)-E 1 (z))(2)

[0037] It can be seen from equation (2) that the traditional SMASH 2 - 2 structure modulator realizes fourth - order noise shaping for the quantization noise of both stages of the modulator. If higher - order noise shaping can be achieved for the quantization noise of one of the stages of the modulator, then the output signal Y(z) will have higher precision in the band.

[0038] The hybrid - order SMASH - structured modulator proposed by the present invention is as Figure 1 shown.

[0039] The hybrid-order SMASH Sigma-Delta modulator of the present invention includes a first-stage modulator, a second-stage modulator, and an inter-stage analog path; the first-stage modulator includes a first loop filter, a first quantizer, a first adder, a second adder, and a first feedback loop; the input of the first loop filter is connected to the input signal X(z), the input of the first quantizer is connected to the output of the first loop filter, the input of the first adder is connected to the output of the first quantizer and the output of the second-stage modulator, and the output is the output signal Y(z). The first feedback loop is the feedback of the output of the first adder to the input of the first loop filter. The input of the second adder is connected to the input and output of the first quantizer. The signal transfer function STF 1 (z), the noise transfer function NTF 1 (z), and the quantization noise E 1 (z) of the quantizer; the second-stage modulator includes a first integrator, a second integrator, a second quantizer, and a second feedback loop; the first integrator, the second integrator, and the second quantizer are connected in sequence. The second feedback loop is the feedback of the output of the second quantizer to the inputs of the first integrator and the second integrator. The transfer function H 1 (z) of the first integrator, the transfer function H 2 (z) of the second integrator, the signal transfer function STF 1 (z), the noise transfer function NTF 1 (z), and the quantization noise E 2 (z) of the second-stage quantizer; the inter-stage analog path is connected from the output of the second adder to the input of the second-stage modulator and includes a unit delay module z -1 .

[0040] In the present invention, the input of the second-stage modulator is connected to the input of the first integrator through the coefficient module a1, to the input of the second integrator through the coefficient module a2, and to the input of the second quantizer through the coefficient module a3. The coefficient module a1 is 1, the coefficient module a2 is 1.5, and the coefficient module a3 is 3. The transfer function H 1 (z) of the first integrator is 0.5z -1 / (1 - z -1 ), the transfer function H 2 (z) of the second integrator is 2z -1 / (1 - z -1 ); the noise transfer function NTF 2 of the second-stage modulator = 1 / (1 + H 2 (z) + H 1 (z)H 2 (z)) = (1 - z -1 ) 2, Signal Transfer Function STF 2 =(3 + 1.5H 2 (z)+H 1 (z)H 2 (z))NTF 2 =z -2 -3z -1 +3.

[0041] As shown Figure 2 is a specific embodiment of the present invention based on the SMASH 2-2 structure.

[0042] In this embodiment, X(z) is the input signal, Y(z) is the output signal, and E1(z) and E2(z) are quantization noises. The quantization noise introduced by the quantizer is pushed to the high-frequency band through the feedback path of the low-pass filter formed by cascading integrators. At the same time, the input signal remains almost unchanged after passing through the loop with a feedback coefficient of 1, thereby realizing the high-precision analog-to-digital conversion of the Sigma-Delta modulator. The loop filter of the first-stage modulator includes two-stage integrators, and the transfer functions of the two-stage integrators are 0.5z -1 / (1 - z -1 ) and z -1 / (1 - z -1 ), and the first feedback loop is connected to the inputs of the two-stage integrators. The noise transfer function NTF 1 (z)=(1 - z -1 ) 2 / (1 - z -1 +0.5z -2 ), and the signal transfer function STF 1 (z)=0.5z -1 / (1 - z -1 +0.5z -2 ). The noise transfer function NTF 2 (z)=(1 - z -1 ) 2 of the second-stage modulator, and the signal transfer function STF 2 (z)=z -2 -3z -1 +3. The first quantizer is a 3-bit quantizer, and the second quantizer is a 4-bit quantizer.

[0043] The modulator transfer function in this embodiment is as in (3):

[0044]

[0045] Compared with the traditional SMASH 2-2 structure modulator, the modulator in this embodiment obtains a fifth-order noise shaping function for the quantization noise of the second-stage modulator by adding a unit delay module in the inter-stage path and adopting a suitable second-stage modulator structure, which improves the noise shaping ability by one order compared with the traditional SMASH 2-2 structure. Moreover, no additional integrator is used, so it will not increase much additional power consumption and layout area.

[0046] As Figure 3 shown is the output spectrum of this embodiment obtained by MATLAB simulation. The oversampling rate is 48, the amplitude of the input signal is -2.5 dBFS, the abscissa of the spectrum is displayed in powers of 10, and the ordinate ranges from 0 to -160 dB. It is shown in the figure that after the in-band noise is shaped by noise shaping, the output precision SNDR of the in-band signal is 141.4 dB, with 23 effective bits.

[0047] As Figure 4 shown is the structure of the traditional SMASH 2-2 modulator. The signal transfer function and the noise transfer function of the first-stage modulator are both equal to those of the first-stage modulator in this embodiment, and the noise transfer function of the second-stage modulator is equal to that of the second-stage modulator in this embodiment. The signal transfer function is 1-(1-z -1 ) 2 .

[0048] As Figure 5 shown are the SNDR change curves of the traditional SMASH 2-2 structure modulator and the mixed-order SMASH 2-2 structure modulator of this invention embodiment at different input signal amplitudes. In the figure, the abscissa is the dB value of the input signal, and the ordinate is SNDR. The oversampling rate is 48. At different input signal amplitudes, the mixed-order SMASH 2-2 modulator of this embodiment has a higher SNDR than the traditional SMASH 2-2 modulator.

[0049] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A mixed order SMASH Sigma-Delta modulator, characterized in that: include: The first-stage modulator, the second-stage modulator, and the inter-stage analog path, where: The first-stage modulator comprises a first loop filter, a first quantizer, a first adder, a second adder and a first feedback loop; the input of the first loop filter is connected to an input signal X(z), the input of the first quantizer is connected to an output of the first loop filter, the input of the first adder is connected to an output of the first quantizer and an output of the second-stage modulator, and the output is an output signal Y(z); the first feedback loop is a first adder output fed back to an input of the first loop filter, and the input of the second adder is connected to an input and an output of the first quantizer; The second-stage modulator comprises a first integrator, a second integrator, a second quantizer and a second feedback loop; the first integrator, the second integrator and the second quantizer are connected in sequence, and the second feedback loop is the second quantizer output fed back to the first integrator and the second integrator input; The inter-stage analog path is connected from the output of the second adder to the input of the second modulator, and includes a unit delay module z -1 .

2. The mixed order SMASH Sigma-Delta modulator according to claim 1, characterized in that: The second-stage modulator input is connected to the first integrator input through the coefficient module a1, connected to the second integrator input through the coefficient module a2, and connected to the second quantizer input through the coefficient module a3.

3. The mixed order SMASH Sigma-Delta modulator according to claim 1, characterized in that: The first-stage modulator has a signal transfer function STF1(z), a noise transfer function NTF1(z), and the first quantizer has a quantization noise E1(z).

4. The mixed order SMASH Sigma-Delta modulator according to claim 1, characterized in that: The transfer function H1(z) of the first integrator, the transfer function H2(z) of the second integrator, the signal transfer function STF2(z) of the second-stage modulator, the noise transfer function NTF2(z), and the quantization noise E2(z) of the second-stage quantizer.

5. The mixed order SMASH Sigma-Delta modulator according to claim 2, characterized in that: The coefficient module a1 is 1, the coefficient module a2 is 1.5, the coefficient module a3 is 3, and the transfer function H1(z) of the first integrator is 0.5z -1 / (1-z -1 ), the transfer function H2(z) of the second integrator is 2z -1 / (1-z -1 ).

6. The mixed order SMASH Sigma-Delta modulator according to claim 1, characterized in that: The loop filter of the first-stage modulator includes two-stage integrators, and the transfer functions of the two-stage integrators are 0.5z -1 / (1-z -1 ) and z -1 / (1-z -1 ), the first feedback loop is connected to the input of the two-stage integrator.

7. The mixed-order SMASH Sigma-Delta modulator according to claim 5, characterized in that: The noise transfer function of the second stage modulator NTF2 = 1 / (1 + H2(z) + H1(z)H2(z)) = (1 - z -1 ) 2 , signal transfer function STF2 = (3 + 1.5H2 (z) + H1 (z) H2 (z)) NTF2 = z -2 -3z -1 +3.

8. The mixed-order SMASH Sigma-Delta modulator according to claim 7, characterized in that: The first quantizer is a 3-bit quantizer, and the second quantizer is a 4-bit quantizer.

9. The mixed-order SMASH Sigma-Delta modulator according to claim 8, characterized in that: The transfer function of the mixed order SMASH Sigma-Delta modulator is:

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