Gigabit Ethernet card of PXIe bus

By designing a Gigabit Ethernet card for PXIe bus, using PXIe interface module, MAC layer processing module, PHY layer processing module, cache module, control module and network interface module, the delay and connection distance problems of existing Gigabit fiber Ethernet cards in high concurrent data transmission and long-distance transmission are solved, and the rapid, accurate and flexible data transmission is achieved.

CN120050124APending Publication Date: 2025-05-27XIAN KAIRUI MEASUREMENT & CONTROL TECH CO LTD
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Patent Information

Application Number
CN202510158671.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-13
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

Existing Gigabit fiber Ethernet cards may experience transmission bottlenecks when facing a large number of concurrent data transmission, resulting in increased data transmission delays. The connection distance of the USB 3.0 interface is relatively short, which cannot meet the needs of long-distance transmission.

Method used

A gigabit Ethernet card with PXIe bus is designed, which adopts PXIe interface module, MAC layer processing module, PHY layer processing module, cache module, control module and network interface module. It is connected to the host through the PXIe interface module, and uses the MAC and PHY layer processing modules to perform data link and physical layer processing. The cache module buffers data transmission discontinuity, and the control module monitors and manages the network card status in real time. The network interface module uses the standard RJ45 interface to connect to the Ethernet network.

Benefits of technology

The design achieves rapid data transmission and accuracy through efficient PXIe interface module and advanced data processing module, and effectively buffers data discontinuity. The control module improves the adaptability and flexibility of the network card. The network interface module facilitates connection with various Ethernet networks, solving the problems of transmission delay and connection distance.

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Abstract

The invention discloses a gigabit Ethernet card of a PXIe bus, and relates to the technical field of Ethernet cards, and the gigabit Ethernet card comprises a PXIe interface module, an MAC (Media Access Control) layer processing module, a PHY (Physical Layer) layer processing module, a cache module, a control module and a network interface module. According to the gigabit Ethernet card of the PXIe bus, efficient compatibility with the PXIe bus of a host is achieved through the PXIe interface module, the high-speed data transmission capacity of the PXIe bus can be fully utilized, a reliable channel is provided for rapid transmission of data, the MAC layer processing module and the PHY layer processing module are adopted, an Ethernet data link layer and a physical layer are processed respectively, and the data transmission efficiency is improved. The accuracy and reliability of the data in the network transmission process are ensured, and the problems of data packet loss, delay and the like are effectively reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of Ethernet network cards, and specifically to a gigabit Ethernet network card for the PXIe bus. Background Art

[0002] In modern computer network communication, high-speed and stable data transmission is crucial. With the continuous development of technology, the requirements for network transmission speed and data processing ability are getting higher and higher. Traditional network interface cards are difficult to meet the needs of some specific fields, such as industrial automation control, high-speed data acquisition and processing, etc. Gigabit Ethernet connectors have gradually emerged in the market, which can connect a computer to a fiber optic network. However, these existing gigabit Ethernet connectors mainly use the plug-in method of PCI or PCI-E interfaces to insert into the motherboard slot to access the network.

[0003] The invention patent with the publication number CN104113421A discloses a USB3.0 gigabit fiber optic Ethernet network card, including a USB3.0 interface for hot-pluggable connection with a smart terminal, a gigabit Ethernet network card core, a gigabit network transformer, a loading conversion chip, and an SFP fiber optic connector for accessing a fiber optic network. The USB3.0 interface is electrically connected to the gigabit network transformer through the gigabit Ethernet network card core, and the gigabit network transformer is electrically connected to the SFP fiber optic connector through the loading conversion chip.

[0004] Existing gigabit fiber optic Ethernet network cards use the USB3.0 interface to connect to a smart terminal, and use a gigabit Ethernet network card core, a gigabit network transformer, and a loading conversion chip to transform signals, and then access the fiber optic network through the SFP fiber optic connector. However, although the bandwidth of the USB3.0 interface is relatively high, when facing a large number of concurrent data transmissions, there may be a transmission bottleneck, resulting in an increase in data transmission delay. Moreover, the physical characteristics of the USB3.0 interface determine that its connection distance is relatively short, and it cannot meet the actual needs in some scenarios that require long-distance transmission. Summary of the Invention

[0005] Aiming at the deficiencies of the prior art, the present invention provides a gigabit Ethernet network card for the PXIe bus, which solves the existing problems.

[0006] To achieve the above objectives, the present invention is realized through the following technical solutions: A gigabit Ethernet network card for the PXIe bus includes a PXIe interface module, a MAC (Media Access Control) layer processing module, a PHY (Physical Layer) layer processing module, a cache module, a control module, and a network interface module;

[0007] The PXIe interface module is used to achieve PXIe bus connection with the host and provide a high-speed data transmission channel. The module uses an interface chip that complies with the PXIe bus standard and can support a variety of data transmission rates and bandwidth modes to ensure stable and efficient data interaction with the host.

[0008] The MAC layer processing module is connected to the PXIe interface module and is used for protocol processing of the Ethernet data link layer. It can encapsulate and parse the data received from the PXIe interface module, add or remove the header information of the MAC layer according to the requirements of the Ethernet protocol, and realize the correct transmission and reception of data;

[0009] The PHY layer processing module is connected to the MAC layer processing module and is used for signal processing at the Ethernet physical layer. It converts the digital signal output by the MAC layer processing module into an analog signal suitable for transmission on the Ethernet. It also converts the analog signal received from the network into a digital signal and performs signal amplification, filtering and other processing to ensure signal quality and transmission reliability.

[0010] The cache module is connected to the MAC layer processing module and the PHY layer processing module and is used to cache data. During the data transmission process, due to the difference in network bandwidth and data generation rate, discontinuity of data transmission may occur. The cache module can temporarily store data, play a role of buffering and coordination, and avoid data loss and transmission congestion;

[0011] The control module is connected to the PXIe interface module, the MAC layer processing module, the PHY layer processing module and the cache module, and is used to control and manage the working state of the entire network card. It can adjust the working parameters of the network card, such as data transmission rate, flow control, etc., according to the host's instructions and the actual situation of the network, to ensure the stable operation of the network card;

[0012] The network interface module is connected to the PHY layer processing module and is used to connect to an external Ethernet network. The module uses a standard RJ45 interface and can be easily connected to an Ethernet cable to achieve data communication with other network devices.

[0013] Preferably, the PXIe interface module further includes a bus clock synchronization circuit for achieving clock synchronization with the host PXIe bus to ensure accuracy and stability of data transmission.

[0014] Preferably, the MAC layer processing module uses hardware logic circuits to implement protocol processing of the Ethernet data link layer, thereby improving the speed and efficiency of data processing.

[0015] Preferably, the PHY layer processing module uses an integrated PHY chip that supports the physical layer standard of Gigabit Ethernet and can achieve an adaptive network connection of 10 / 100 / 1000 Mbps.

[0016] Preferably, the cache module uses a high-speed SRAM (Static Random Access Memory) chip with fast data read and write speeds, which can meet the cache requirements for Gigabit Ethernet data transmission.

[0017] Preferably, the control module uses a high-performance microprocessor that can quickly process various control instructions to achieve real-time monitoring and management of the network card.

[0018] Preferably, the interface chip used in the PXIe interface module supports multiple data transfer rates and bandwidth modes and can automatically adjust the working mode according to the configuration of the host.

[0019] Preferably, when the data is transmitted from the PXIe interface module, the MAC layer processing module parses the data, removes the header information of the PXIe bus, and adds MAC layer header information including fields such as source MAC address, destination MAC address, and type according to the requirements of the Ethernet protocol; when data is sent, the data to be sent is encapsulated, and after adding the corresponding MAC layer header information, the data is sent to the PHY layer processing module.

[0020] Preferably, the network interface module uses a standard RJ45 interface. When data is sent, the analog signal output by the PHY layer processing module is sent to the Ethernet cable through the RJ45 interface; when data is received, the analog signal is received from the Ethernet cable and transmitted to the PHY layer processing module for processing.

[0021] Advantageous Effects

[0022] The present invention provides a Gigabit Ethernet network card for PXIe bus. Compared with the prior art, it has the following advantageous effects:

[0023] 1. The Gigabit Ethernet network card for PXIe bus realizes efficient compatibility with the host PXIe bus through the PXIe interface module, can make full use of the high-speed data transmission ability of the PXIe bus, provides a reliable channel for fast data transmission, and uses the MAC layer processing module and the PHY layer processing module to process the Ethernet data link layer and physical layer respectively, ensuring the accuracy and reliability of data during network transmission, and effectively reducing problems such as data packet loss and delay.

[0024] 2. The gigabit Ethernet network card of the PXIe bus. The setting of the cache module can effectively buffer the discontinuity in the data transmission process, improve the stability of data transmission, and avoid data loss caused by the differences in network bandwidth and data generation rate. The control module can monitor and manage the working status of the network card in real time, adjust the working parameters according to the actual situation, improve the adaptability and flexibility of the network card, and can meet the diverse needs of different users. The network interface module uses a standard RJ45 interface, which is convenient for connecting with Ethernet cables, enabling the network card to be widely used in various Ethernet network environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic structural connection diagram of the Ethernet network card of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0027] Refer to Figure 1 , the present invention provides a gigabit Ethernet network card of the PXIe bus, including a PXIe interface module, a MAC (Media Access Control) layer processing module, a PHY (Physical Layer) layer processing module, a cache module, a control module, and a network interface module.

[0028] The PXIe interface module uses an interface chip that complies with the PXIe bus standard. This chip has advanced signal processing and data transmission capabilities. It synchronizes with the clock signal of the host PXIe bus through a bus clock synchronization circuit to ensure the accuracy of data transmission. The bus clock synchronization circuit continuously monitors the clock signal of the host PXIe bus. Once a change in the clock signal is detected, it quickly adjusts its own clock frequency and phase to match the host clock. This interface chip can support multiple data transfer rates and bandwidth modes and automatically adjusts its operating mode according to the host configuration. For example, when the host requires a higher data transfer rate, the interface chip automatically switches to the corresponding high-speed transfer mode to meet the need for fast data transfer. At the same time, the interface chip also has good compatibility and can stably connect to different models and specifications of host PXIe buses to ensure the reliability of data interaction. In practical applications, when the host starts up, the PXIe interface module communicates with the host for initialization. The host sends configuration instructions, and the interface module adjusts its own operating parameters, including data transfer rate, bandwidth mode, etc., and then establishes a stable data transfer channel to prepare for subsequent data transfer.

[0029] The MAC layer processing module uses hardware logic circuits to implement the protocol processing of the Ethernet data link layer. Such hardware logic circuits feature high-speed processing and low latency. When data is transmitted from the PXIe interface module, the MAC layer processing module parses the data, removes the PXIe bus header information, and adds MAC layer header information in accordance with the requirements of the Ethernet protocol, including fields such as source MAC address, destination MAC address, and type. Specifically, the MAC layer processing module first judges and parses the format of the data transmitted from the PXIe interface module, identifies the valid part of the data, and then, according to the pre-set Ethernet protocol rules, sets the source MAC address to the MAC address of the network card itself, sets the destination MAC address to the MAC address of the data recipient, determines the type of the data (such as IP datagram, ARP message, etc.), and adds it to the data header. When data is sent, the MAC layer processing module encapsulates the data to be sent, adds the corresponding MAC layer header information, and then sends the data to the PHY layer processing module. In addition, the MAC layer processing module also has traffic control and error detection functions. When network congestion occurs, the MAC layer processing module sends a signal to pause sending to the sender according to the traffic control mechanism to avoid data loss and worsening network congestion. At the same time, error detection is performed on the data through algorithms such as cyclic redundancy check (CRC). Once a data error is found, a retransmission request is sent to ensure the accuracy of the data.

[0030] The PHY layer processing module uses an integrated PHY chip that supports the Gigabit Ethernet physical layer standard. This chip can convert the digital signals output by the MAC layer processing module into analog signals suitable for transmission over the Ethernet, and send them to the external Ethernet network through the RJ45 interface of the network interface module. During the signal conversion process, the PHY chip encodes and modulates the digital signals to make them conform to the signal transmission standards of the Ethernet physical layer. At the same time, the PHY chip can convert the analog signals received from the network into digital signals, and perform signal amplification, filtering and other processing, and then send the processed digital signals to the MAC layer processing module. Specifically, when receiving an analog signal from the network, the PHY chip first amplifies the signal to enhance its strength, then removes the noise and interference in the signal through a filtering circuit, and finally decodes and digitally converts the processed signal to obtain a digital signal that can be recognized by the MAC layer processing module. In practical applications, the PHY chip can automatically adjust the signal transmission power and receiving sensitivity according to the changes in the network environment to adapt to different network transmission distances and signal quality requirements. For example, in the case of a long network transmission distance or weak signal, the PHY chip will automatically increase the signal transmission power to ensure that the signal can be accurately transmitted to the receiving end.

[0031] The cache module uses a high-speed SRAM chip, and its data read and write speed can meet the requirements of Gigabit Ethernet data transmission. During data transmission, when the data output rate of the MAC layer processing module is higher than the processing rate of the PHY layer processing module, the cache module can temporarily store these data to avoid data loss. When the PHY layer processing module finishes processing the current data, it reads the data from the cache module and continues the processing. The storage capacity of the cache module is configured according to actual needs to ensure that enough data can be stored. During data storage and reading, the cache module adopts advanced cache management algorithms, such as the Least Recently Used (LRU) algorithm, to optimize the storage and reading order of data and improve the cache hit rate. For example, when the data in the cache module reaches a certain storage capacity, the cache management algorithm will automatically delete the least recently used data to make room for new data. At the same time, the cache module also has a data consistency maintenance function to ensure the consistency of the data in the cache and the original data, and avoid errors caused by data inconsistency.

[0032] The control module uses a high-performance microprocessor. By communicating with the PXIe interface module, MAC layer processing module, PHY layer processing module, and cache module, it monitors the working status of the network card in real time. The control module can adjust the working parameters of the network card according to the instructions of the host and the actual situation of the network, such as data transmission rate, flow control, etc. For example, when the network is congested, the control module can reduce the data transmission rate to avoid data packet loss. The control module also has the functions of fault diagnosis and recovery. When a fault is detected in a certain module of the network card, the control module will immediately conduct fault diagnosis to determine the location and cause of the fault, and try to take corresponding recovery measures, such as re-initializing the faulty module, switching to the standby module, etc. In practical applications, the control module can also communicate with the network management system through network management protocols (such as SNMP), and report the working status and fault information of the network card to the network administrator, which is convenient for the network administrator to remotely monitor and manage the network card.

[0033] The network interface module uses a standard RJ45 interface and is connected to other devices in the external Ethernet network through an Ethernet cable. When sending data, the network interface module sends the analog signal output by the PHY layer processing module to the Ethernet cable through the RJ45 interface; when receiving data, the network interface module receives the analog signal from the Ethernet cable and transmits it to the PHY layer processing module for processing. The network interface module also has the function of monitoring the Ethernet link status, and can monitor the connection status and signal quality of the Ethernet cable in real time. When it detects that the Ethernet link is disconnected or the signal quality deteriorates, the network interface module will notify the control module in time, and the control module can take corresponding measures, such as trying to reconnect the Ethernet link or adjusting the working parameters of the network card, to ensure the stability of the network connection. In addition, the network interface module supports Power over Ethernet (PoE) function, and can provide power supply for the connected devices through the Ethernet cable, which is convenient for the installation and use of the devices.

[0034] Meanwhile, the content not described in detail in this specification belongs to the prior art well known to those skilled in the art.

[0035] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not expressly listed, or elements inherent to such process, method, article or device.

[0036] Although embodiments of the present invention have been shown and described, those of ordinary skill in the art will appreciate that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A Gigabit Ethernet card for a PXIe bus, characterized in that: It includes a PXIe interface module, a MAC layer processing module, a PHY layer processing module, a cache module, a control module and a network interface module; The PXIe interface module is used to realize the PXIe bus connection with the host and provide a high-speed data transmission channel; The MAC layer processing module is connected to the PXIe interface module and is used for protocol processing of the Ethernet data link layer; The PHY layer processing module is connected to the MAC layer processing module and is used for signal processing of the Ethernet physical layer; The cache module is connected to the MAC layer processing module and the PHY layer processing module, and is used to cache data; The control module is connected to the PXIe interface module, the MAC layer processing module, the PHY layer processing module and the cache module, and is used to control and manage the working status of the entire network card; The network interface module is connected to the PHY layer processing module and is used to connect to an external Ethernet network.

2. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The PXIe interface module also includes a bus clock synchronization circuit for achieving clock synchronization with the host PXIe bus.

3. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The MAC layer processing module uses hardware logic circuits to implement protocol processing of the Ethernet data link layer.

4. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The PHY layer processing module adopts an integrated PHY chip, which supports the physical layer standard of Gigabit Ethernet and can realize 10 / 100 / 1000Mbps adaptive network connection.

5. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The cache module adopts a high-speed SRAM chip, has a fast data reading and writing speed, and supports the cache requirements of Gigabit Ethernet data transmission.

6. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The control module adopts a high-performance microprocessor, which can quickly process various control instructions and realize real-time monitoring and management of the network card.

7. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The interface chip used in the PXIe interface module can support multiple data transmission rates and bandwidth modes, and can automatically adjust the working mode according to the configuration of the host.

8. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: When data is transmitted from the PXIe interface module, the MAC layer processing module parses the data, removes the header information of the PXIe bus, and adds the MAC layer header information including the source MAC address, the destination MAC address, and the type field according to the requirements of the Ethernet protocol; when data is sent, the data to be sent is encapsulated, and after adding the corresponding MAC layer header information, the data is sent to the PHY layer processing module.

9. The Gigabit Ethernet card of a PXIe bus according to claim 1, characterized in that: The network interface module adopts a standard RJ45 interface. When sending data, the analog signal output by the PHY layer processing module is sent to the Ethernet cable through the RJ45 interface; when receiving data, the analog signal is received from the Ethernet cable and transmitted to the PHY layer processing module for processing.

Citation Information

Patent Citations

  • USB3.0 gigabit fiber Ethernet card

    CN104113421A