Balanced management system for monitoring state of power battery

Abstract

The invention discloses an equalization management system for monitoring the state of a power battery. The equalization management system comprises a main control unit, a battery information acquisition unit, a battery charging and discharging unit, a battery equalization unit, a safety protection unit, a power supply unit and a communication unit, the battery information acquisition unit is used for acquiring voltage data, current data and temperature data of a battery pack, the battery charging and discharging unit is used for controlling the battery pack to perform charging and discharging operation, the battery equalization unit is used for controlling charging and discharging operation of single batteries, and the main control unit is used for acquiring, analyzing and processing the data acquired by the battery information acquisition unit. And the battery charging and discharging unit, the battery equalization unit and the safety protection unit are controlled to realize monitoring and equalization management of the health state of the power battery pack. Dynamic monitoring of the health state of the power battery pack is achieved, performance differences between single batteries in the battery pack are eliminated through balance management, the use efficiency of the battery pack is improved, and the service life of the battery pack is prolonged.

Description

Technical Field

[0001] The present invention relates to the technical field of battery state monitoring and equalization management, and particularly to an equalization management system for monitoring the state of power batteries. Background Art

[0002] With the rapid development of social science and technology, the new energy industry is also booming, and new energy vehicles driven by new energy have gradually become the most popular type of vehicle at present. For small means of transportation, battery-powered vehicles have become the means of transportation commonly used by people, which can not only achieve zero pollution emissions, but also have fast power improvement and low power consumption cost. The battery has also become the carrier of the driving energy of battery-powered vehicles.

[0003] To meet the voltage and power requirements of battery-powered vehicles, multiple batteries are usually connected in series or in parallel. In theory, these single batteries should have exactly the same characteristics, but in the manufacturing and use processes, it is very difficult to ensure that the performance of each single battery is highly consistent. Especially during the charge and discharge process of a series-connected group of single batteries, as the number of charge and discharge cycles of the battery increases, the performance differences such as capacity, internal resistance, and charge and discharge efficiency between single batteries will become larger, resulting in a decrease in the available capacity of the battery pack, a reduction in the use efficiency of the battery pack, and a shortening of the service life of the battery pack. Summary of the Invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art. The present invention provides an equalization management system for monitoring the state of power batteries, which can dynamically monitor the health state of the power battery pack, and through equalization management, eliminate the performance differences between single batteries in the battery pack, improve the use efficiency of the battery pack, and extend the service life of the battery pack.

[0005] The present invention provides an equalization management system for monitoring the state of power batteries. The system includes a main control unit, a battery information acquisition unit, a battery charge and discharge unit, a battery equalization unit, a safety protection unit, a power supply unit, and a communication unit. The main control unit is respectively connected to the battery information acquisition unit, the battery charge and discharge unit, the battery equalization unit, the safety protection unit, the power supply unit, and the communication unit. The battery information acquisition unit, the battery charge and discharge unit, the battery equalization unit, and the safety protection unit are connected to the power battery pack. The power supply unit is connected to an external power source. The main control unit establishes a communication connection with a host computer based on the communication unit;

[0006] The battery information acquisition unit is used to acquire voltage data, current data and temperature data of the power battery pack. The battery charge and discharge unit is used to control the charge and discharge operations of the power battery pack. The battery equalization unit is used to control the charge and discharge operations of the individual batteries within the power battery pack to achieve voltage equalization among the series-connected individual batteries in the power battery pack. The safety protection unit is used to perform safety protection actions when the power battery pack has an abnormality. The main control unit is used to acquire, analyze and process the data acquired by the battery information acquisition unit, and control the battery charge and discharge unit, battery equalization unit and safety protection unit to monitor and equally manage the health status of the power battery pack.

[0007] Further, the main control unit includes a main control chip, and the model of the main control chip is STM32F103C8T6 main control chip.

[0008] Further, the battery information acquisition unit includes a battery information management unit, a voltage information acquisition unit, a current information acquisition unit and a temperature information acquisition unit. The battery information management unit is respectively connected to the voltage information acquisition unit, the current information acquisition unit and the temperature information acquisition unit, and is connected to the main control unit;

[0009] The voltage information acquisition unit is used to acquire the overall voltage data of the power battery pack and the individual voltage data of each individual battery in the power battery pack. The current information acquisition unit is used to acquire the overall current data of the power battery pack. The temperature information acquisition unit is used to acquire the temperature data during the operation of the power battery pack. The battery information management unit is used to receive and collate the overall voltage data, individual voltage data, overall current data and temperature data, and send them to the main control unit.

[0010] Further, the battery information management unit includes a battery information management chip, and the model of the battery information management chip is BQ7694003DBT. The battery information management chip includes a voltage information management interface, a current information management interface and a temperature information management interface. The voltage information management interface is connected to the voltage information acquisition unit. The current information management interface is connected to the current information acquisition unit. The temperature information management interface is connected to the temperature information acquisition unit.

[0011] Further, the voltage information acquisition unit includes a plurality of individual voltage information acquisition units which are in parallel. Each individual voltage information acquisition unit is connected to the corresponding individual battery in the power battery pack. Each individual voltage information acquisition unit includes a first voltage-dividing resistor, a second voltage-dividing resistor and a first capacitor;

[0012] The first end of the first voltage-dividing resistor is connected to the positive electrode of the corresponding single battery cell. The first end of the second voltage-dividing resistor is connected to the negative electrode of the corresponding single battery cell. The second end of the second voltage-dividing resistor is connected to the first end of the first capacitor. The second end of the first voltage-dividing resistor and the second end of the first capacitor are connected to the voltage information management interface on the battery information management chip.

[0013] Further, the current information acquisition unit includes five sampling resistors, a first amplification resistor, a second amplification resistor, a second capacitor, a third capacitor, a fourth capacitor, a first switching diode, and a first reverse connection prevention diode.

[0014] The five sampling resistors are connected in parallel. The first ends of the five sampling resistors and the first end of the first amplification resistor are connected to the power battery pack. The second ends of the five sampling resistors are connected to the first end of the second amplification resistor. The second end of the first amplification resistor, the second end of the second amplification resistor, the second capacitor, the third capacitor, the fourth capacitor, and the first switching diode are connected to the current information management interface on the battery information management chip. The first reverse connection prevention diode is arranged between the positive electrode and the negative electrode of the power battery pack.

[0015] Further, the battery charge and discharge unit includes a charging circuit and a discharging circuit, and both the charging circuit and the discharging circuit are connected to the power battery pack.

[0016] The charging circuit includes six parallel-connected charging MOSFETs, a first switching MOSFET, a first resistor, a second resistor, a first zener diode, a second zener diode, and a second reverse connection prevention diode. The gates of the six parallel-connected charging MOSFETs are connected in parallel and are connected to the first end of the first resistor, the first end of the second resistor, the cathode of the first zener diode, and the cathode of the second zener diode. The sources of the six parallel-connected charging MOSFETs are connected in parallel and are connected to the second end of the first resistor and the anode of the first zener diode. The drains of the six parallel-connected charging MOSFETs are connected in parallel. The anode of the second zener diode and the second end of the second resistor are connected to the drain of the first switching MOSFET. The source of the first switching MOSFET is connected to the charging circuit control interface of the main control unit. The second reverse connection prevention diode is arranged between the positive connection point and the negative connection point of the external charger or load.

[0017] The discharge circuit includes six parallel-connected discharge MOSFETs, a third resistor, and a fourth resistor. The gates of the six parallel-connected discharge MOSFETs are connected in parallel and are connected to the first end of the third resistor and the first end of the fourth resistor. The sources of the six parallel-connected discharge MOSFETs are connected in parallel and are connected to the second end of the third resistor. The drains of the six parallel-connected discharge MOSFETs are connected in parallel. The second end of the fourth resistor is connected to the discharge circuit control interface of the main control unit.

[0018] Further, the battery equalization unit includes several single-cell battery equalization units that are in parallel. Each of the several single-cell battery equalization units is connected to a corresponding single cell in the power battery pack. Each single-cell battery equalization unit includes an equalization MOSFET, a third zener diode, a fifth resistor, a sixth resistor, a seventh resistor, and a fifth capacitor.

[0019] The drain of the equalization MOSFET is connected to the first end of the fifth resistor. The gate of the equalization MOSFET is connected to the anode of the third zener diode and the first end of the seventh resistor. The second end of the fifth resistor and the first end of the sixth resistor are connected to the negative electrode of the corresponding single cell. The second end of the sixth resistor and the first end of the fifth capacitor are connected to the equalization unit control interface of the main control unit. The source of the equalization MOSFET, the cathode of the third zener diode, the second end of the fifth capacitor, and the second end of the seventh resistor are connected to the positive electrode of the corresponding single cell.

[0020] Further, the power supply unit includes a step-down unit and a voltage stabilization unit. The input end of the step-down unit is connected to an external power supply. The output end of the step-down unit is connected to the input end of the voltage stabilization unit. The output end of the voltage stabilization unit is connected to the power supply interface of the main control unit.

[0021] Further, the communication unit includes a serial port RS232 to USB communication unit, an RS485 communication unit, and a CAN communication unit.

[0022] The present invention provides an equalization management system for monitoring the state of a power battery. By setting a battery information acquisition unit to monitor the health state of the power battery pack in real time, including the overall voltage data, overall current data, and temperature data of the battery pack, as well as the single-cell voltage data of single cells collected by setting multiple parallel single-cell voltage information acquisition units, and then controlling the battery pack to perform charge and discharge operations through a battery charge and discharge unit. Among them, several parallel single-cell battery equalization units in the battery equalization unit are used to perform single-cell charge and discharge operations on the corresponding single cells in the battery pack, so as to achieve the equalization of the power between the single cells in the battery pack, eliminate the performance differences between the single cells in the battery pack, improve the use efficiency of the battery pack, and extend the service life of the battery pack. Description of the Drawings

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0024] Figure 1 It is the architecture diagram of the equalization management system for monitoring the state of power batteries in the embodiments of the present invention;

[0025] Figure 2 It is the schematic diagram of the circuit principle of the main control unit in the embodiments of the present invention;

[0026] Figure 3 It is the architecture diagram of the battery information acquisition unit in the embodiments of the present invention;

[0027] Figure 4 It is the schematic diagram of the circuit principle of the battery information management unit in the embodiments of the present invention;

[0028] Figure 5 It is the schematic diagram of the circuit principle of the single - cell voltage information acquisition unit in the embodiments of the present invention;

[0029] Figure 6 It is the schematic diagram of the circuit principle of the current information acquisition unit in the embodiments of the present invention;

[0030] Figure 7 It is the schematic diagram of the circuit principle of the battery charge - discharge unit in the embodiments of the present invention;

[0031] Figure 8 It is the schematic diagram of the circuit principle of the battery equalization unit in the embodiments of the present invention;

[0032] Figure 9 It is the schematic diagram of the circuit principle of the single - cell battery equalization unit in the embodiments of the present invention;

[0033] Figure 10 It is the schematic diagram of the circuit principle of the power supply unit in the embodiments of the present invention;

[0034] Figure 11 It is the schematic diagram of the circuit principle of the serial port RS232 - to - USB communication unit in the embodiments of the present invention;

[0035] Figure 12 It is the schematic diagram of the circuit principle of the RS485 communication unit in the embodiments of the present invention;

[0036] Figure 13 It is the schematic diagram of the circuit principle of the CAN communication unit in the embodiments of the present invention. Detailed implementation manners

[0037] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without any creative work shall fall within the protection scope of the present invention.

[0038] In the present invention, it should be understood that terms such as "including" or "having" are intended to indicate the existence of features, numbers, steps, actions, components, parts, or combinations thereof disclosed in this specification, and do not preclude the possibility of the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0039] In addition, it should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the drawings and in combination with the embodiments.

[0040] An embodiment of the present invention provides a balanced management system for monitoring the state of a power battery. The system includes a main control unit, a battery information acquisition unit, a battery charge and discharge unit, a battery balancing unit, a safety protection unit, a power supply unit, and a communication unit. The main control unit is respectively connected to the battery information acquisition unit, the battery charge and discharge unit, the battery balancing unit, the safety protection unit, the power supply unit, and the communication unit. The battery information acquisition unit, the battery charge and discharge unit, the battery balancing unit, and the safety protection unit are connected to the power battery pack. The power supply unit is connected to an external power source. The main control unit establishes a communication connection with a host computer based on the communication unit. The battery information acquisition unit is used to acquire voltage data, current data, and temperature data of the power battery pack. The battery charge and discharge unit is used to control the power battery pack to perform charge and discharge operations. The battery balancing unit is used to control the charge and discharge operations of the individual batteries in the power battery pack to achieve voltage balance between the mutually series-connected individual batteries in the power battery pack. The safety protection unit is used to perform safety protection actions when the power battery pack has an abnormality. The main control unit is used to acquire and analyze the data acquired by the battery information acquisition unit, and control the battery charge and discharge unit, the battery balancing unit, and the safety protection unit to realize the monitoring and balanced management of the health state of the power battery pack.

[0041] In an alternative implementation of this embodiment, as Figure 1 shown Figure 1The figure shows the architecture diagram of the balancing management system for monitoring the state of power batteries in an embodiment of the present invention. The system includes a main control unit, a battery information acquisition unit, a battery charging and discharging unit, a battery balancing unit, a safety protection unit, a power supply unit, and a communication unit. The main control unit is connected to the battery information acquisition unit, the battery charging and discharging unit, the battery balancing unit, and the safety protection unit based on I2C communication. The main control unit is also connected to the power supply unit and the communication unit. The battery information acquisition unit, the battery charging and discharging unit, the battery balancing unit, and the safety protection unit are connected to a power battery pack. The power battery pack includes a plurality of series-connected single cells. The power supply unit is connected to an external power source. The main control unit establishes a communication connection with a host computer based on the communication unit.

[0042] In an alternative implementation of this embodiment, the main control unit includes a main control chip, and the model of the main control chip is the STM32F103C8T6 main control chip.

[0043] Specifically, the main control unit is used to acquire, analyze, and process the data collected by the battery information acquisition unit, and control the battery charging and discharging unit, the battery balancing unit, and the safety protection unit to realize the monitoring and balancing management of the health state of the power battery pack.

[0044] Furthermore, as Figure 2 shown, Figure 2 The figure shows the schematic circuit principle diagram of the main control unit in an embodiment of the present invention. The main control unit includes a main control chip U2, and the main control chip U2 is the STM32F103C8T6 main control chip. This main control chip is a 32-bit high-performance microprocessor STM32 chip, based on the ARM Cortex-M3 core, with a main frequency of 72 MHz, a 32-bit bus width, has a single-precision floating-point unit, supports single-precision data processing instructions and data types, has 192 KB of SRAM and 512 KB - 1 MB of FLASH and timer resources inside, supports USART, SPI, I2C, and CAN communications, and can be multiplexed into other functions by configuring the pin modes. Its specific structure includes 48 pins, and the pin identifiers are as Figure 2 shown.

[0045] Here, the STM32F103C8T6 is used as the main control chip, which has the characteristics of high performance, low cost, low power consumption, stability, and reliability, and has strong computing and communication capabilities, and is suitable for the balancing management system for monitoring the state of power batteries in this embodiment.

[0046] In an alternative implementation of this embodiment, the battery information acquisition unit is used to acquire the voltage data, current data, and temperature data of the power battery pack.

[0047] Specifically, as Figure 3As shown Figure 3 The figure shows the architecture diagram of the battery information acquisition unit in an embodiment of the present invention. The battery information acquisition unit includes a battery information management unit, a voltage information acquisition unit, a current information acquisition unit, and a temperature information acquisition unit. The battery information management unit is respectively connected to the voltage information acquisition unit, the current information acquisition unit, and the temperature information acquisition unit, and is also connected to the main control unit.

[0048] Furthermore, the voltage information acquisition unit is used to acquire the overall voltage data of the power battery pack and the individual voltage data of each single battery in the power battery pack. The current information acquisition unit is used to acquire the overall current data of the power battery pack. The temperature information acquisition unit is used to acquire the temperature data during the operation of the power battery pack. The battery information management unit is used to receive and organize the overall voltage data, individual voltage data, overall current data, and temperature data, and send them to the main control unit.

[0049] In an optional implementation manner of this embodiment, the battery information management unit includes a battery information management chip, and the model of the battery information management chip is BQ7694003DBT. The battery information management chip includes a voltage information management interface, a current information management interface, and a temperature information management interface. The voltage information management interface is connected to the voltage information acquisition unit, the current information management interface is connected to the current information acquisition unit, and the temperature information management interface is connected to the temperature information acquisition unit.

[0050] Specifically, as Figure 4 shown Figure 4 The figure shows the schematic circuit diagram of the battery information management unit in an embodiment of the present invention. The battery information management unit includes a battery information management chip U1, and the model of the battery information management chip is BQ7694003DBT, which has 44 pins. Among them, the voltage information management interface is the VC pin, and there are 16 VC pins numbered from 0 to 15, that is, pins 24 - 41, which can monitor 15 single batteries simultaneously. The current information management interface is the SRP pin and the SRN pin, that is, pins 42 and 43. The temperature information management interface is the TS1, TS2, and TS3 pins, that is, pins 6, 13, and 18. The voltage information management interface is used to receive the voltage data acquired by the voltage information acquisition unit. The current information management interface is used to receive the current data acquired by the current information acquisition unit. The temperature information management interface is used to receive the temperature data acquired by the temperature information acquisition unit.

[0051] Furthermore, the battery information management unit further includes a peripheral unit, and the peripheral unit includes resistors R196, R197, R198, R199, R200, R201, R202, R203, capacitors C93, C94, C95, C96, C97, C98, C99, C100, C101, C102, C103, diodes D49, D50, D51, D52, D53, D54, D55, and MOSFET Q37, and their connection manner, model, and component value are as Figure 4 shown.

[0052] Here, a battery information management unit is provided, and a battery information management chip with the model BQ7694003DBT is provided to realize the acquisition of voltage data, current data, and temperature data of the battery pack, as well as the acquisition of the individual voltage data of any single battery in the battery pack, and to monitor the abnormal conditions of any single battery in real time, and then activate the protection mechanism to ensure the safe and reliable operation of the battery pack.

[0053] In an alternative implementation manner of this embodiment, the voltage information acquisition unit includes a plurality of individual voltage information acquisition units in parallel. Each of the plurality of individual voltage information acquisition units is connected to the corresponding single battery in the power battery pack. Each individual voltage information acquisition unit includes a first voltage-dividing resistor, a second voltage-dividing resistor, and a first capacitor. The first end of the first voltage-dividing resistor is connected to the positive electrode of the corresponding single battery, the first end of the second voltage-dividing resistor is connected to the negative electrode of the corresponding single battery, the second end of the second voltage-dividing resistor is connected to the first end of the first capacitor, and the second end of the first voltage-dividing resistor and the second end of the first capacitor are connected to the voltage information management interface on the battery information management chip.

[0054] Specifically, as Figure 5 shown, Figure 5 shows a schematic diagram of the circuit principle of the individual voltage information acquisition unit in the embodiment of the present invention. In the voltage information acquisition unit of the embodiment of the present invention, a total of fifteen individual voltage information acquisition units in parallel are provided, and the individual voltage data of fifteen separate single batteries can be acquired. In Figure 5Only the circuit principle schematic diagram of the first single-cell voltage information acquisition unit is shown for illustration. The circuit structures of the other single-cell voltage information acquisition units are the same as that of the first single-cell voltage information acquisition unit. The first single-cell voltage information acquisition unit includes a first voltage-dividing resistor R100, a second voltage-dividing resistor R102, and a first capacitor C10. The first end of the first voltage-dividing resistor R100 is connected to the positive electrode (CELL0) of the first single-cell battery, the first end of the second voltage-dividing resistor R102 is connected to the negative electrode (CELL1) of the first single-cell battery, the second end of the second voltage-dividing resistor R102 is connected to the first end of the first capacitor C10, and the second ends of the first voltage-dividing resistor R100 and the first capacitor C10 are connected to the first voltage information management sub-interface in the voltage information management interface on the battery information management chip U1, that is, pin VC0.

[0055] Furthermore, the voltage information acquisition unit is used to monitor the single-cell voltage of the single-cell batteries in the battery pack and the overall voltage after all the single-cell batteries are connected in series, and convert the acquired voltage data into voltage signals and transmit them to the voltage information management interface of the battery information management chip U1, where the single-cell voltage signals of each single-cell battery are transmitted to the corresponding voltage information management sub-interfaces.

[0056] In an optional implementation manner of this embodiment, the single-cell voltage information acquisition unit adopts the method of a voltage-dividing unit and adds an RC filtering unit to filter out the high-frequency clutter in the input signal, improve the acquisition accuracy, enhance the anti-interference ability of the acquisition unit, and enhance the stability and effectiveness of the acquired signal.

[0057] In an optional implementation manner of this embodiment, the working principle of the single-cell voltage information acquisition unit is as follows: The voltage information acquisition unit updates the voltage data of the current battery pack every 250 ms. After the voltage information acquisition unit measures the digital voltage value, it transmits the acquired digital voltage value to the battery information management chip. The battery information management chip uses a 14-bit ADC to measure a 14-bit ADC reading, and converts the acquisition reading into a battery voltage value, that is, an analog voltage value, through the following conversion formula:

[0058] V(cell) = GAIN × ADC(cell) + OFFSET

[0059] In the formula, ADC(cell) represents the sampling value of the single-cell battery, V(cell) represents the voltage value of the single-cell battery, GAIN represents the linear gain calibration coefficient of the voltage value, with the unit of uV / LSB, and OFFSET represents the zero-point deviation calibration compensation amount, with the unit of mV.

[0060] It should be noted that the parameters GAIN and OFFSET are pre-stored in the EEPROM of the battery information management chip, and these two values are obtained by calling the register through I2C when calculation is required.

[0061] Furthermore, after the digital voltage values of all individual batteries are collected, the overall voltage value of the battery pack is calculated through the following conversion formula:

[0062] V(bat) = 4 × GAIN × ADC(cell) + (cells × OFFSET)

[0063] In the formula, ADC(cell) represents the sampling value of the individual battery, V(bat) represents the overall voltage value of the battery pack, GAIN represents the linear gain calibration coefficient of the voltage value, with the unit of uV / LSB, OFFSET represents the zero-point deviation calibration compensation amount, with the unit of mV, and cells represents the number of individual batteries in the battery pack.

[0064] Here, a voltage information acquisition unit is set up, including several parallel individual voltage information acquisition units. While collecting the overall voltage information of the battery pack for subsequent charge and discharge operations of the battery pack, it also collects the individual voltage information of each individual battery in the battery pack for subsequent individual battery equalization operations within the battery pack, realizing the charge balance between individual batteries in the battery pack, eliminating the performance differences between individual batteries in the battery pack, improving the usage efficiency of the battery pack, and extending the service life of the battery pack.

[0065] In an optional implementation manner of this embodiment, the current information acquisition unit includes five sampling resistors, a first amplification resistor, a second amplification resistor, a second capacitor, a third capacitor, a fourth capacitor, a first switching diode, and a first reverse connection prevention diode; the five sampling resistors are connected in parallel, the first ends of the five sampling resistors and the first end of the first amplification resistor are connected to the power battery pack, the second ends of the five sampling resistors are connected to the first end of the second amplification resistor, the second end of the first amplification resistor, the second end of the second amplification resistor, the second capacitor, the third capacitor, the fourth capacitor, and the first switching diode are connected to the current information management interface on the battery information management chip, and the first reverse connection prevention diode is arranged between the positive pole and the negative pole of the power battery pack.

[0066] Specifically, as Figure 6 shown, Figure 6The schematic diagram of the circuit principle of the current information acquisition unit in the embodiment of the present invention is shown. The current information acquisition unit includes sampling resistors R178, R179, R180, R181, R182, a first amplification resistor R176, a second amplification resistor R177, a second capacitor C92, a third capacitor C90, a fourth capacitor C91, a first switching diode U34, and a first reverse connection prevention diode U6. The sampling resistors R178, R179, R180, R181, R182 are connected in parallel with each other. The first ends of the sampling resistors R178, R179, R180, R181, R182 and the first end of the first amplification resistor R176 are connected to the power battery pack (BAT+, BAT-). The second ends of the sampling resistors R178, R179, R180, R181, R182 are connected to the first end of the second amplification resistor R177. The first amplification resistor R176, the second amplification resistor R177, the second capacitor C92, the third capacitor C90, the fourth capacitor C91, and the first switching diode U34 are connected to the current information management interface (i.e., pin SRP and pin SRN) on the battery information management chip U1. The first reverse connection prevention diode U6 is disposed between the positive electrode (BAT+) and the negative electrode (BAT-) of the power battery pack.

[0067] Furthermore, the current information acquisition unit can measure the cumulative charge flowing through the sampling resistor. Five high-precision, high-power, 1mΩ withstand voltage resistors are selected as the sampling resistors and connected in parallel, which can effectively ensure the uniform distribution of current, improve the current measurement accuracy and stability. The five parallel sampling resistors are connected to the low-voltage side of the battery pack circuit. The sampling period is 250ms, and the sampling accuracy is ±100mA. The two series-connected 100Ω amplification resistors are used to amplify the voltage. The battery information management chip U1 is connected to the sampling resistor of the current information acquisition unit through the SRP pin and the SRN pin to obtain the charge and discharge current of the battery pack.

[0068] In the current information acquisition unit, the sampling resistor is set in a way that five low-value sampling resistors are connected in parallel. The design advantages include: 1. Improving the current handling capacity. Since the power-bearing capacity of a single low-value resistor is limited, by connecting multiple resistors in parallel, the current can be shared, thus improving the current handling capacity of the entire current information acquisition unit. In this embodiment, when applied to the high-current application of a 15-series single-cell battery, adopting this circuit structure can improve the current-bearing capacity of the circuit. 2. Reducing the thermal effect. After multiple resistors are connected in parallel, the current flowing through each resistor decreases, thereby reducing the heat generation of a single resistor. This can reduce measurement errors or resistor damage caused by overheating. 3. Improving the measurement accuracy. The parallel resistors can reduce the overall temperature coefficient because the temperature effects of multiple resistors will cancel each other out to some extent. This helps to improve the accuracy and stability of current measurement. 4. The parallel resistors can provide redundancy to ensure that even if one resistor fails, the other resistors can still continue to work, guaranteeing the normal operation of the system.

[0069] Here, a current information acquisition unit is set up to collect the working current data of the battery pack, providing data support for subsequent battery charging, discharging, and balancing operations.

[0070] In an alternative implementation of this embodiment, the temperature information acquisition unit includes three 10kΩ NTC thermistors, which are respectively placed at different positions in the battery pack to monitor and collect the temperature of the battery pack housing. The resistance value of the thermistor will decrease as the temperature rises. The three thermistors are respectively connected to the TS1 pin, TS2 pin, and TS3 pin of the battery information management chip U1. After the battery information management chip U1 collects the voltage of the thermistor, it transmits the result to the main control unit. The main control unit calculates the actual temperature value of the battery pack through the following formula:

[0071]

[0072] In the formula, V TS is the voltage value of the thermistor, 10000 represents the pull-up resistor inside the battery information management chip, and R TS is the resistance value of the thermistor.

[0073] After calculating and obtaining the resistance value of the thermistor, through the temperature-resistance correspondence table of the adopted thermistor, the current temperature value of the battery pack is obtained.

[0074] Here, a temperature information acquisition unit is set up to effectively monitor the heat generation of the battery pack.

[0075] In an alternative implementation of this embodiment, the battery charge and discharge unit includes a charging circuit and a discharging circuit. The charging circuit is connected to the discharging circuit, and both the charging circuit and the discharging circuit are connected to the power battery pack. The charging circuit includes six parallel-connected charging MOSFETs, a first switching MOSFET, a first resistor, a second resistor, a first zener diode, a second zener diode, and a second reverse connection prevention diode. The gates of the six parallel-connected charging MOSFETs are connected in parallel and are connected to the first end of the first resistor, the first end of the second resistor, the cathode of the first zener diode, and the cathode of the second zener diode. The sources of the six parallel-connected charging MOSFETs are connected in parallel and are connected to the second end of the first resistor and the anode of the first zener diode. The drains of the six parallel-connected charging MOSFETs are connected in parallel. The anode of the second zener diode and the second end of the second resistor are connected to the drain of the first switching MOSFET. The source of the first switching MOSFET is connected to the charging circuit control interface of the main control unit. The second reverse connection prevention diode is disposed between the positive and negative electrodes of the battery charger. The discharging circuit includes six parallel-connected discharging MOSFETs, a third resistor, and a fourth resistor. The gates of the six parallel-connected discharging MOSFETs are connected in parallel and are connected to the first end of the third resistor and the first end of the fourth resistor. The sources of the six parallel-connected discharging MOSFETs are connected in parallel and are connected to the second end of the third resistor. The drains of the six parallel-connected discharging MOSFETs are connected in parallel. The second end of the fourth resistor is connected to the discharging circuit control interface of the main control unit.

[0076] Specifically, the battery charge and discharge unit is used to control the power battery pack to perform charge and discharge operations, such as Figure 7 shown, Figure 7 FIG. shows a schematic diagram of the circuit principle of the battery charge and discharge unit in an embodiment of the present invention. The battery charge and discharge unit includes a charging circuit and a discharging circuit. The charging circuit is connected to the discharging circuit, and both the charging circuit and the discharging circuit are connected to the power battery pack;

[0077] The charging circuit includes a parallel connection of charging MOSFETs Q27, Q28, Q29, Q30, Q31, Q32, a first switching MOSFET Q33, a first resistor R186, a second resistor R187, a first zener diode U35, a second zener diode U36, and a second reverse connection prevention diode U5. The gates of the parallel-connected charging MOSFETs Q27, Q28, Q29, Q30, Q31, Q32 are connected in parallel and are connected to the first end of the first resistor R186, the first end of the second resistor R187, the cathode of the first zener diode U35, and the cathode of the second zener diode U36. The sources of the parallel-connected charging MOSFETs Q27, Q28, Q29, Q30, Q31, Q32 are connected in parallel and are connected to the second end of the first resistor R186 and the anode of the first zener diode U35. The drains of the parallel-connected charging MOSFETs Q27, Q28, Q29, Q30, Q31, Q32 are connected in parallel. The anode of the second zener diode U36 and the second end of the second resistor R187 are connected to the drain of the first switching MOSFET Q33. The source of the first switching MOSFET Q33 is connected to the charging circuit control interface (pin CHG) of the main control chip U2 of the main control unit. The second reverse connection prevention diode U5 is disposed between the positive connection point (PACK+) and the negative connection point (PACK-) of the external charger or load.

[0078] The discharging circuit includes a parallel connection of charging MOSFETs Q21, Q22, Q23, Q24, Q25, Q26, a third resistor R184, and a fourth resistor R185. The gates of the parallel-connected charging MOSFETs Q21, Q22, Q23, Q24, Q25, Q26 are connected in parallel and are connected to the first end of the third resistor R184 and the first end of the fourth resistor R185. The sources of the parallel-connected charging MOSFETs Q21, Q22, Q23, Q24, Q25, Q26 are connected in parallel and are connected to the second end of the third resistor R184. The drains of the parallel-connected charging MOSFETs Q21, Q22, Q23, Q24, Q25, Q26 are connected in parallel. The second end of the fourth resistor R185 is connected to the discharging circuit control interface (pin DSG) of the main control chip U2 of the main control unit.

[0079] Furthermore, the working principle of the charging circuit includes: the positive pole of the battery charger is connected to the PACK+ positive connection point, and current is introduced into the positive pole of the battery pack. After being controlled and managed by the charging MOSFETs, it flows to the negative pole of the battery pack, then returns to the PACK- negative connection point, and further returns to the negative pole of the battery charger, realizing the closed-loop of the battery charging process.

[0080] The working principle of the discharge circuit is as follows: The positive electrode of the battery pack is connected to the PACK+ positive connection point and then to the load. The current consumes electrical energy through the load, and after being controlled and managed by the discharge MOSFET, it returns to the PACK- negative connection point through the load and flows to the negative electrode of the battery pack, realizing a closed-loop of the battery discharge process.

[0081] Setting multiple parallel MOSFETs in the charging circuit and the discharge circuit has the following advantages: 1. It can evenly share the current and avoid local overheating and damage caused by uneven current distribution. 2. It increases the current handling capacity. Since the current-carrying capacity of a single MOSFET is limited, paralleling multiple MOSFETs can significantly improve the current handling capacity of the entire charge-discharge unit circuit to meet the application requirements of high charging currents. 3. It reduces the on-resistance. When multiple MOSFETs are paralleled, the overall on-resistance will decrease, and the total resistance will be less than the on-resistance of a single MOSFET. A smaller on-resistance will result in less heat generated by the MOSFET at the same current and higher efficiency. 4. It improves reliability. By paralleling multiple MOSFETs, the system reliability can be improved to a certain extent, ensuring that even if one MOSFET fails, the other MOSFETs can still work and guarantee the normal operation of the system. 5. It enables better thermal management. Multiple MOSFETs sharing the current can reduce the heat generation of a single MOSFET and at the same time reduce heat loss.

[0082] Here, a battery charge-discharge unit is set up to perform charge and discharge operations on the battery pack, which can judge the current state of the battery to control the charging, discharging or pause mode of the battery, improve the usage efficiency of the battery pack, and extend the service life of the battery pack.

[0083] In an optional implementation manner of this embodiment, the battery balancing unit includes several single-cell battery balancing units in parallel. Each single-cell battery balancing unit is connected to the corresponding single cell in the power battery pack. Each single-cell battery balancing unit includes a balancing MOSFET, a third zener diode, a fifth resistor, a sixth resistor, a seventh resistor, and a fifth capacitor; the drain of the balancing MOSFET is connected to the first end of the fifth resistor, the gate of the balancing MOSFET is connected to the anode of the third zener diode and the first end of the seventh resistor, the second end of the fifth resistor and the first end of the sixth resistor are connected to the negative electrode of the corresponding single cell, the second end of the sixth resistor and the first end of the fifth capacitor are connected to the balancing unit control interface of the main control unit, and the source of the balancing MOSFET, the cathode of the third zener diode, the second end of the fifth capacitor, and the second end of the seventh resistor are connected to the positive electrode of the corresponding single cell.

[0084] Specifically, as Figure 8 and Figure 9 shown,Figure 8 It shows a schematic diagram of the circuit principle of the battery equalization unit in an embodiment of the present invention. Figure 9 It shows a schematic diagram of the circuit principle of the single-cell battery equalization unit in an embodiment of the present invention. Figure 8 The battery equalization unit shown therein includes fifteen parallel single-cell battery equalization units, which are divided into three groups, and each group includes five parallel single-cell battery equalization units. Figure 9 The circuit principle diagram of the first single-cell battery equalization unit shown therein is described.

[0085] Further, as Figure 9 shown, the first single-cell battery equalization unit is connected to the first single cell in the power battery pack, and includes an equalization MOSFET U16, a third zener diode D25, a fifth resistor R99, a sixth resistor R100, a seventh resistor R101, and a fifth capacitor C56; the drain of the equalization MOSFET U16 is connected to the first end of the fifth resistor R99, the gate of the equalization MOSFET U16 is connected to the anode of the third zener diode D25 and the first end of the seventh resistor R101, the second end of the fifth resistor R99 and the first end of the sixth resistor R100 are connected to the negative electrode (CELL0) of the first single cell, the second end of the sixth resistor R100 and the first end of the fifth capacitor C56 are connected to the first equalization unit control interface (pin VC0) of the equalization unit control interface of the main control chip U2 of the main control unit, and the source of the equalization MOSFET U16, the cathode of the third zener diode D25, the second end of the fifth capacitor C56, and the second end of the seventh resistor R101 are connected to the positive electrode (CELL1) of the first single cell.

[0086] Furthermore, the working principle of the battery balancing unit includes: the external balancing MOSFET is controlled by the battery information management chip U1 to allow the battery current to flow through a resistor for energy consumption, thereby achieving balance among the batteries in the battery pack. Since all the batteries are in series during the balancing process, it is necessary to prevent damage caused by excessive input current. If a group of batteries are balanced simultaneously, the superimposed input current may exceed the maximum current limit that the chip can withstand. However, if the batteries are balanced at intervals, the voltage across the batteries not participating in the balancing will be doubled. Therefore, it is necessary to ensure that the balancing current is within the range that the batteries can withstand. The control of the balancing MOSFET is determined by the voltage across the two ends of the Rc input resistor. In this embodiment, the balancing MOSFET is an N-channel balancing MOSFET with a relatively small resistor. The voltage across the drain-source resistance RDS(ON) is approximately half of the battery voltage range. Since these MOSFETs usually have a relatively small maximum gate voltage value, the gate voltage needs to be protected by a third zener diode. The gate voltage is connected to the input resistor to limit the current flowing through when the third zener diode conducts. During normal operation, the third zener diode does not conduct. When there is a large load, such as a short circuit, the voltage at the battery input terminal will drop to near the negative pole of the battery, and the initial states of the voltage information management interface pins (VC0 - VC15) of the battery information management chip U2 are within their normal voltage values. The zener diode can prevent high voltage from reaching the gate. Most of the input resistor voltage will drop across the gate resistor, and the gate resistor current will affect the voltage drop across the Cf capacitor. Therefore, the gate resistor should be relatively large. When the short circuit is removed, the voltage across the input filter resistor will reverse, and the gate protection diode will conduct in the opposite direction. Briefly speaking, it is to transfer the energy of the high-capacity single cells in the battery pack to the low-capacity single cells to achieve energy balance among the single cells.

[0087] Here, a battery balancing unit is provided, which can perform balancing operations on individual cells separately according to the performance differences among different individual cells in the battery pack, including differences in capacity, internal resistance, charge and discharge efficiency, etc., that is, separate charge and discharge operations, and implement a balancing process of raising the low and compensating the high to eliminate the performance differences among the individual cells in the battery pack, improve the usage efficiency of the battery pack, and extend the service life of the battery pack.

[0088] It should be noted that the balancing management tasks of the battery information management chip for the three groups of individual cell balancing units in the battery pack are independent of each other. When one group of individual cells is in the state of power balancing operation and another group of individual cells is in the state of battery information collection, the collected voltage will be affected by the balancing current of the common channel at this time. Therefore, a low resistance of the common channel is maintained near the battery pack, and wide traces are used to reduce the influence of the return current.

[0089] In an alternative implementation manner of this embodiment, the safety protection unit is used to perform safety protection actions when an abnormality occurs in the power battery pack.

[0090] Specifically, when the main control unit determines that the power battery pack is abnormal according to the data sent by the battery information acquisition unit, the safety protection unit performs safety protection actions on the power battery pack, including overcurrent protection, overvoltage protection, overtemperature protection, etc.

[0091] In an alternative implementation of this embodiment, the power supply unit includes a step-down unit and a voltage stabilization unit. The input end of the step-down unit is connected to an external power supply, the output end of the step-down unit is connected to the input end of the voltage stabilization unit, and the output end of the voltage stabilization unit is connected to the power supply interface of the main control unit.

[0092] Specifically, as Figure 10 shown, Figure 10 FIG. shows the schematic circuit principle diagram of the power supply unit in the embodiment of the present invention. The power supply unit includes a step-down unit and a voltage stabilization unit. The step-down unit includes a step-down chip U32. The model of the step-down chip U32 is LM5007, which can stably convert the input high voltage into a lower 10V working voltage to supply power to the equalization management system for monitoring the state of the power battery in this embodiment. The voltage stabilization unit includes a voltage stabilization chip LDO1. The model of the voltage stabilization chip LDO1 is TPS70933DBVR, which can perform voltage stabilization operations on the input voltage. The working principle includes: the step-down unit performs a step-down operation on the voltage of the external power supply, and the voltage stabilization unit performs a voltage stabilization operation on the voltage after the step-down operation and outputs it to the power supply interface of the main control unit.

[0093] Furthermore, the step-down chip U32 is an LM5007 high-voltage step-down converter, which can step down the input high voltage of 12-75V battery to 10V working voltage to supply power to the system. As Figure 10 shown, in the step-down chip U32, VIN is the voltage input pin, the output voltage is 10V, VOUT is the voltage output pin, which is determined by two external resistors. The output voltage value is set using the following formula:

[0094] V out = V FB × (R FB2 / R FB1 + 1)

[0095] In the formula, V out is the output voltage, V FB is the regulated voltage, with a value of 2.5V, R FB1 , R FB2 are the resistance values of the feedback resistors. The ratio of R FB2 to R FB1 is 3:1, that is, R FB2 takes a value of 3.01kΩ, and R FBt takes a value of 1kΩ.

[0096] Furthermore, the voltage regulator chip LDO1 is a TPS70933 low-dropout linear regulator chip, which has the advantages of low static current, low dropout voltage, and low noise, and is widely used in battery-powered devices. The chip has a wide input voltage range of 2.2V to 20V, and the output voltage is fixed at 3.3V. In this chip, EN is the start-up pin. Pulling this pin high will enable the chip, and pulling down the voltage of this pin will put the device into a low-current shutdown state. The OUT pin is the output voltage adjusted by the TPS79033 chip. Connect a 2.2uF or larger ceramic capacitor to the ground to ensure stability. In this embodiment, the output voltage of the output pin is 3.3V.

[0097] In an alternative implementation of this embodiment, the communication unit includes a serial port RS232 to USB communication unit, an RS485 communication unit, and a CAN communication unit.

[0098] Specifically, as Figure 11 shown, Figure 11 FIG. shows the circuit principle schematic diagram of the serial port RS232 to USB communication unit in the embodiment of the present invention. The serial port RS232 to USB communication unit includes a serial port RS232 communication chip U8, with the model number CH340E. The VCC and V3 pins of the serial port RS232 communication chip U8 are connected to the system 3.3V power supply. A 12MHz external crystal oscillator provides a clock signal for the chip. The TXD and RXD pins of the chip are connected to the serial port transceiver interface (pins TX1 and RX1) of the main control unit.

[0099] Furthermore, as Figure 12 shown, Figure 12 FIG. shows the circuit principle schematic diagram of the RS485 communication unit in the embodiment of the present invention. The RS485 communication unit includes an RS485 communication chip U11, with the model number MAX3485, which is a 3.3V-powered RS485 level transceiver chip and supports a transmission speed of up to 2.5Mbps. The RE and DE pins of the RS485 communication chip U11 are the receive and transmit enable pins respectively. The main control unit is connected to both the RE and DE pins simultaneously, which plays the role of receive / transmit enable control. RO and DI are data communication interfaces. The connected resistors can eliminate signal reflection during communication transmission and enhance signal stability. The function of the triode Q15 is to absorb surge power and protect the chip.

[0100] Furthermore, as Figure 13 shown, Figure 13The schematic diagram of the circuit principle of the CAN communication unit in the embodiment of the present invention is shown. The CAN communication unit includes a CAN communication chip U13, with the model SN65HVD230, which is a high-speed CAN bus transceiver. The chip has high electromagnetic interference resistance and low electromagnetic radiation characteristics, and can be used for data communication with a rate up to 1 Mbps. It can be used in cooperation with a microcontroller with a CAN protocol. Among them, the chip pin CANL is the low-level CAN bus, the pin CANH is the high-level CAN bus, and the R and D pins are connected to the CAN_RX and CAN_TX pins of the main control chip U2, and the CANH and CANL pins are connected to the CAN bus.

[0101] It should be noted that usually, a 120Ω resistor is used to connect the two ends of CANL and CANH of the CAN bus. However, since the common-mode voltage of the CAN bus in this embodiment needs to be filtered and regulated, a split-end wiring method is adopted, that is, two 60Ω resistors (R84, R89) are used for the split-end connection, and a grounding capacitor (C49) is connected in the middle of the two resistors. This split-end wiring method can eliminate the bus common-mode voltage fluctuation that appears when starting and ending message transmission, thereby improving the electromagnetic radiation performance of the network.

[0102] Three communication units are set here, and the communication method can be selected according to the actual situation to improve the communication efficiency.

[0103] The main working principle includes: the battery information acquisition unit acquires the voltage data and current data of the power battery pack, and the battery charge and discharge unit performs battery charge and discharge operations on the battery pack according to the voltage data and current data; the battery information acquisition unit also acquires the single-cell voltage data of the single cells in the power battery pack, and the battery equalization unit performs single-cell charge and discharge operations on the single cells according to the single-cell voltage data, that is, equalization operations.

[0104] In summary, the embodiment of the present invention provides an equalization management system for monitoring the state of a power battery. By setting a battery information acquisition unit to monitor the health state of the power battery pack in real time, including the overall voltage data, overall current data, and temperature data of the battery pack, as well as the single-cell voltage data of the single cells collected by setting a multi-channel parallel single-cell voltage information acquisition unit, and then controlling the battery pack to perform charge and discharge operations through the battery charge and discharge unit. Among them, several parallel single-cell battery equalization units in the battery equalization unit are used to perform single-cell charge and discharge operations on the corresponding single cells in the battery pack, so as to achieve the power balance between the single cells in the battery pack, eliminate the performance differences between the single cells in the battery pack, improve the use efficiency of the battery pack, and extend the service life of the battery pack.

[0105] The above has introduced in detail an equalization management system for monitoring the state of power batteries. Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. The storage medium can include: read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical discs, etc.

[0106] In addition, the above has introduced the embodiments of the present invention in detail. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation on the present invention.

Claims

1. A balancing management system for monitoring the status of a power battery, characterized in that: The system includes a main control unit, a battery information acquisition unit, a battery charging and discharging unit, a battery balancing unit, a safety protection unit, a power supply unit, and a communication unit. The main control unit is connected to the battery information acquisition unit, the battery charging and discharging unit, the battery balancing unit, the safety protection unit, the power supply unit, and the communication unit respectively. The battery information acquisition unit, the battery charging and discharging unit, the battery balancing unit, and the safety protection unit are connected to a power battery pack. The power supply unit is connected to an external power supply. The main control unit establishes a communication connection with a host computer based on the communication unit; The battery information acquisition unit is used to collect voltage data, current data and temperature data of the power battery pack, the battery charging and discharging unit is used to control the charging and discharging operations of the power battery pack, the battery balancing unit is used to control the charging and discharging operations of the single cells in the power battery pack, and realize the voltage balance between the single cells connected in series in the power battery pack, the safety protection unit is used to perform safety protection actions when an abnormality occurs in the power battery pack, and the main control unit is used to obtain and analyze and process the data collected by the battery information acquisition unit, and control the battery charging and discharging unit, the battery balancing unit, and the safety protection unit to realize the monitoring and balancing management of the health status of the power battery pack.

2. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The main control unit includes a main control chip, and the model of the main control chip is STM32F103C8T6 main control chip.

3. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The battery information acquisition unit includes a battery information management unit, a voltage information acquisition unit, a current information acquisition unit, and a temperature information acquisition unit. The battery information management unit is respectively connected to the voltage information acquisition unit, the current information acquisition unit, and the temperature information acquisition unit, and is also connected to the main control unit; The voltage information acquisition unit is used to collect the overall voltage data of the power battery pack and the single cell voltage data of each single cell in the power battery pack. The current information acquisition unit is used to collect the overall current data of the power battery pack. The temperature information acquisition unit is used to collect the temperature data of the power battery pack during operation. The battery information management unit is used to receive and organize the overall voltage data, single cell voltage data, overall current data and temperature data, and send them to the main control unit.

4. The equalization management system for monitoring the power battery status according to claim 3, characterized in that: The battery information management unit includes a battery information management chip, the model of the battery information management chip is BQ7694003DBT, and the battery information management chip includes a voltage information management interface, a current information management interface and a temperature information management interface. The voltage information management interface is connected to the voltage information acquisition unit, the current information management interface is connected to the current information acquisition unit, and the temperature information management interface is connected to the temperature information acquisition unit.

5. The equalization management system for monitoring the power battery status according to claim 4, characterized in that: The voltage information acquisition unit includes a plurality of single-cell voltage information acquisition units, the plurality of single-cell voltage information acquisition units are connected in parallel, each single-cell voltage information acquisition unit is connected to a corresponding single-cell battery in the power battery pack, and each single-cell voltage information acquisition unit includes a first voltage-dividing resistor, a second voltage-dividing resistor, and a first capacitor; The first end of the first voltage-dividing resistor is connected to the positive electrode of the corresponding single cell battery, the first end of the second voltage-dividing resistor is connected to the negative electrode of the corresponding single cell battery, the second end of the second voltage-dividing resistor is connected to the first end of the first capacitor, and the second end of the first voltage-dividing resistor and the second end of the first capacitor are connected to the voltage information management interface on the battery information management chip.

6. The equalization management system for monitoring the power battery status according to claim 4, characterized in that: The current information acquisition unit includes five sampling resistors, a first amplifying resistor, a second amplifying resistor, a second capacitor, a third capacitor, a fourth capacitor, a first switching diode, and a first anti-reverse connection diode; The five sampling resistors are connected in parallel, the first ends of the five sampling resistors and the first end of the first amplifying resistor are connected to the power battery pack, the second ends of the five sampling resistors are connected to the first end of the second amplifying resistor, the second end of the first amplifying resistor, the second end of the second amplifying resistor, the second capacitor, the third capacitor, the fourth capacitor, and the first switching diode are connected to the current information management interface on the battery information management chip, and the first anti-reverse connection diode is arranged between the positive electrode and the negative electrode of the power battery pack.

7. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The battery charging and discharging unit includes a charging circuit and a discharging circuit, and the charging circuit and the discharging circuit are both connected to the power battery pack; The charging circuit includes six parallel charging MOSFET tubes, a first switch MOSFET tube, a first resistor, a second resistor, a first voltage regulator diode, a second voltage regulator diode, and a second anti-reverse connection diode. The gates of the six parallel charging MOSFET tubes are connected in parallel and connected to the first end of the first resistor, the first end of the second resistor, the cathode of the first voltage regulator diode, and the cathode of the second voltage regulator diode. The sources of the six parallel charging MOSFET tubes are connected in parallel and connected to the second end of the first resistor and the anode of the first voltage regulator diode. The drains of the six parallel charging MOSFET tubes are connected in parallel, the anode of the second voltage regulator diode and the second end of the second resistor are connected to the drain of the first switch MOSFET tube. The source of the first switch MOSFET tube is connected to the charging circuit control interface of the main control unit. The second anti-reverse connection diode is arranged between the positive connection point and the negative connection point of the external charger or load. The discharge circuit includes six parallel discharge MOSFET tubes, a third resistor, and a fourth resistor. The gates of the six parallel discharge MOSFET tubes are connected in parallel and connected to the first end of the third resistor and the first end of the fourth resistor. The sources of the six parallel discharge MOSFET tubes are connected in parallel and connected to the second end of the third resistor. The drains of the six parallel discharge MOSFET tubes are connected in parallel, and the second end of the fourth resistor is connected to the discharge circuit control interface of the main control unit.

8. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The battery balancing unit includes a plurality of single cell balancing units, the plurality of single cell balancing units are connected in parallel, each single cell balancing unit is connected to a corresponding single cell in a power battery pack, and each single cell balancing unit includes a balancing MOSFET tube, a third voltage stabilizing diode, a fifth resistor, a sixth resistor, a seventh resistor, and a fifth capacitor; The drain of the balancing MOSFET tube is connected to the first end of the fifth resistor, the gate of the balancing MOSFET tube is connected to the anode of the third voltage stabilizing diode and the first end of the seventh resistor, the second end of the fifth resistor and the first end of the sixth resistor are connected to the negative electrode of the corresponding single battery, the second end of the sixth resistor and the first end of the fifth capacitor are connected to the balancing unit control interface of the main control unit, and the source of the balancing MOSFET tube, the cathode of the third voltage stabilizing diode, the second end of the fifth capacitor, and the second end of the seventh resistor are connected to the positive electrode of the corresponding single battery.

9. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The power supply unit includes a step-down unit and a voltage stabilizing unit, the input end of the step-down unit is connected to an external power supply, the output end of the step-down unit is connected to the input end of the voltage stabilizing unit, and the output end of the voltage stabilizing unit is connected to the power interface of the main control unit.

10. The equalization management system for monitoring the power battery status according to claim 1, characterized in that: The communication unit includes a serial port RS232 to USB communication unit, an RS485 communication unit and a CAN communication unit.

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