Polar plate signal driving circuit for micro-resistivity imaging logging instrument

Abstract

The invention relates to the technical field of petroleum logging, in particular to a pole plate signal driving circuit for a micro-resistivity imaging logging instrument, which is characterized in that a signal buffer module and a signal driving module group are connected in series, and the signal driving module group comprises a plurality of signal driving modules; the signal input end of the signal buffer module is connected with a first sequential logic signal and a second sequential logic signal. The signal output end of the signal buffer module is connected to the input ends of the signal driving modules in parallel, and the signal driving modules output pole plate driving signals; after an original sequential logic input signal passes through the signal buffer module and the signal driving module, the original logic signal is divided into multiple paths of completely same parallel logic signals, the stability and the driving capability of the signals are greatly improved, and after isolation, gating, voltage stabilization and driving of the signal driving module, the parallel logic signals are output. And the output multiple groups of polar plate driving signals have the characteristics of high driving, high stability, low noise and low temperature drift.

Description

Technical Field

[0001] The present invention relates to the technical field of oil logging, and specifically to a plate signal driving circuit for a micro-resistivity imaging logging tool. Background Art

[0002] As an important logging method, resistivity imaging logging technology is widely used in the measurement and imaging of formation resistivity. Its working principle is based on lateral focusing. By utilizing the resistivity difference generated when an alternating current passes through the formation, a high-resolution image of the formation is formed. In a micro-resistivity imaging logging tool, the plate body plays a key role. A micro-resistivity imaging tool is usually equipped with multiple plate bodies, and each plate body has multiple electrodes. They emit alternating current, which returns to the upper loop electrode of the tool through the mud in the wellbore and the formation loop, and then the formation resistivity is displayed according to the magnitude of the electrode current, thereby realizing the measurement of the formation resistivity. As the number of electrodes on the plate body increases, the measurement accuracy and imaging resolution also increase accordingly, thus more accurately revealing the resistivity changes of the formation. Currently, a micro-resistivity imaging logging tool usually has six plate circuits, and each plate circuit needs to be driven by a plate control signal. However, the existing micro-resistivity imaging logging tool only provides one-way plate control signal, which cannot meet the simultaneous driving requirements of six plate circuits. Summary of the Invention

[0003] In order to overcome the defects existing in the above-mentioned prior art, the purpose of the present invention is to provide a plate signal driving circuit for a micro-resistivity imaging logging tool, so as to solve the technical problem that the micro-resistivity imaging logging tool in the prior art cannot meet the simultaneous driving requirements of multiple groups of plate circuits.

[0004] The present invention is realized through the following technical solutions:

[0005] A plate signal driving circuit for a micro-resistivity imaging logging tool includes a signal buffer module and a signal driving module group; the signal driving module group includes several signal driving modules; the signal input terminals of the signal buffer module are respectively connected to a first timing logic signal and a second timing logic signal; the signal output terminals of the signal buffer module are respectively connected in parallel to the input terminals of several signal driving modules, and several signal driving modules output plate driving signals.

[0006] Preferably, the signal buffer module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a first buffer;

[0007] The output terminal of the third resistor is connected to the first input terminal of the first buffer, the input terminal of the third resistor is connected to the first timing logic signal, and the input terminal of the third resistor is connected to the ground through the first resistor;

[0008] The output terminal of the fourth resistor is connected to the second input terminal of the first buffer, and the input terminal of the fourth resistor is connected to the second timing logic signal, wherein the input terminal of the fourth resistor is connected to the ground through the first resistor;

[0009] One end of the first capacitor is connected to the VCC terminal of the first buffer through the 3.3V power supply, and the other end of the first capacitor is connected to the ground.

[0010] Further, the third input terminal, the fourth input terminal, the first output disable terminal, the second output disable terminal, the third output disable terminal, and the fourth output disable terminal of the first buffer are all connected to the ground. The first output terminal u1 and the second output terminal u2 of the first buffer are connected in parallel to the input terminals of a plurality of signal driving modules.

[0011] Preferably, the plurality of signal driving modules have the same composition structure.

[0012] Further, the signal driving module includes a signal isolation module, a signal gating module, a signal voltage stabilizing module, a signal output driving module, and a signal driving protection module; the input terminal of the signal isolation module is connected to the input terminal of the signal buffer module, the output terminal of the signal isolation module is connected to the input terminal of the signal gating module, the output terminal of the signal gating module is connected to the input terminal of the signal voltage stabilizing module, the output terminal of the signal voltage stabilizing module is connected to the input terminal of the signal output driving module, the output terminal of the signal output driving module is connected to the input terminal of the signal driving protection module, and the output terminal of the signal driving protection module outputs a plate driving signal.

[0013] Furthermore, the signal isolation module includes a second capacitor, a third capacitor, and a second isolator; one end of the second capacitor is connected to the 3.3V power supply, and the other end is connected to the ground; one end of the third capacitor is connected to the 5V power supply, and the other end is connected to the ground; the first input terminal and the second input terminal of the second isolator are respectively connected to the output terminal of the signal buffer module; the third input terminal of the second isolator is connected to the ground, and the first enable terminal and the second enable terminal of the second isolator are respectively connected to the 3.3V power supply and the 5V power supply; the first output terminal u3 and the second output terminal u4 of the second isolator are connected to the input terminal of the signal gating module.

[0014] Furthermore, the input terminal of the signal gating module is also connected to the reference voltage input terminal.

[0015] Further, the signal gating module includes a fifth resistor, a sixth resistor, a third analog switch, and a fourth analog switch; one end of the fifth resistor is connected to a 9V power supply, and the other end is connected to the first input terminal of the third analog switch; one end of the sixth resistor is connected to the 9V power supply, and the other end is connected to the first input terminal of the fourth analog switch; the logic input terminals of the third analog switch and the fourth analog switch are connected to the output terminal of the signal isolation module; the output terminal of the third analog switch is connected to the output terminal of the fourth analog switch and then merged into an output terminal u5 which is connected to the signal voltage stabilization module.

[0016] Further, the signal voltage stabilization module includes a seventh resistor, a first voltage stabilizing diode, a second voltage stabilizing diode, and a fourth capacitor; the positive electrodes of the first voltage stabilizing diode and the second voltage stabilizing diode are connected to each other, the negative electrodes of the first voltage stabilizing diode and the second voltage stabilizing diode are connected in parallel to the fourth capacitor, one end of the fourth capacitor is connected to the output terminal of the signal gating module and also connected to one end of the seventh resistor, and the other end of the seventh resistor, the output terminal u6, is connected to the signal output driving module.

[0017] Further, the signal driving protection module includes a fifth operational amplifier, a fifth capacitor, a sixth capacitor, an eighth resistor, a ninth resistor, a third voltage stabilizing diode, and a fourth voltage stabilizing diode; the 9V power supply is connected to the ground through the fifth capacitor, and the -9V power supply is connected to the ground through the sixth capacitor; one end of the eighth resistor is connected to the output terminal of the fifth operational amplifier, and the other end of the eighth resistor is connected in parallel to the negative electrode of the third voltage stabilizing diode and the positive electrode of the fourth voltage stabilizing diode, and the positive electrode of the third voltage stabilizing diode and the negative electrode of the fourth voltage stabilizing diode are connected to the ground through the ninth resistor and output the plate driving signal at the same time.

[0018] Compared with the prior art, the present invention has the following beneficial technical effects:

[0019] The present invention provides a plate signal driving circuit for a micro-resistivity imaging logging tool, which connects a signal buffering module and a signal driving module group in series. The signal driving module group includes several signal driving modules. The signal input ends of the signal buffering module are respectively connected to a first timing logic signal and a second timing logic signal. The signal output ends of the signal buffering module are respectively connected in parallel to the input ends of several signal driving modules, and several signal driving modules output plate driving signals. When the original timing logic input signal passes through the signal buffering module and the signal driving module, the original logic signal is divided into multiple identical parallel logic signals, and at the same time, the stability and driving ability of the signal are greatly improved. Among them, after the signal buffering module buffers the input signal, the stability of the output signal is better than that of the original input logic signal. Then, after being isolated, gated, voltage-stabilized, and driven by the signal driving module, the output multi-group plate driving signals have the characteristics of high driving, high stability, low noise, and low temperature drift. The plate driving circuit generated by this driving circuit can ensure that the plates of the micro-resistivity imaging instrument work normally and stably in the complex downhole environment.

[0020] Furthermore, the present invention designs a plate driving circuit that can convert a group of plate control signals into multiple groups of plate control signals, improve the quality of the driving signal and reduce noise interference at the same time, so as to achieve precise control of multiple plates. The implementation of this invention can perform time-sharing control on the multi-channel electrode signals of the plates, so that the signals are uploaded to the acquisition system one by one in the pre-determined order, improving the measurement accuracy and reliability of the micro-resistivity logging tool.

[0021] Furthermore, the present invention can optimize the quality of the plate driving signal of the micro-resistivity imaging instrument, convert the original input logic signal into multiple groups of plate driving signals in parallel and drive multiple groups of plates of the micro-resistivity imaging instrument, so as to achieve the purpose of optimizing the instrument performance and improving the instrument efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic structural diagram of the plate signal driving circuit for the micro-resistivity imaging logging tool in the present invention;

[0023] Figure 2 It is a schematic diagram of the input of the timing logic signal in the present invention;

[0024] Figure 3 It is a schematic structural diagram of the signal driving module in the present invention;

[0025] Figure 4 It is a schematic structural diagram of the signal buffering module in the present invention;

[0026] Figure 5 It is a schematic structural diagram of the signal isolation module in the present invention;

[0027] Figure 6Schematic diagram of the signal gating module structure in the present invention;

[0028] Figure 7 Schematic diagram of the signal voltage stabilization module structure in the present invention;

[0029] Figure 8 Schematic diagram of the signal driving and protecting module structure in the present invention;

[0030] In the figure: 1 - signal buffer module; 2 - signal driving module group; 3 - signal driving module; 31 - signal isolation module; 32 - signal gating module; 33 - signal voltage stabilization module; 34 - signal output driving module; 35 - signal driving and protecting module; R1 - first resistor; R2 - second resistor; R3 - third resistor; R4 - fourth resistor; C1 - first capacitor; U1 - first buffer; C2 - second capacitor; C3 - third capacitor; U2 - second isolator; R5 - fifth resistor; R6 - sixth resistor; U3 - third analog switch; U4 - fourth analog switch; R7 - seventh resistor; D1 - first voltage stabilizing diode; D2 - second voltage stabilizing diode; C4 - fourth capacitor; U5 - fifth operational amplifier; C5 - fifth capacitor; C6 - sixth capacitor; R8 - eighth resistor; R9 - ninth resistor. Detailed implementation manners

[0031] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0032] The present invention will be further described in detail below in conjunction with the accompanying drawings:

[0033] The purpose of the present invention is to provide a pole signal driving circuit for a micro-resistivity imaging logging tool to solve the technical problem that the micro-resistivity imaging logging tool in the prior art cannot meet the simultaneous driving requirements of multiple groups of pole circuits.

[0034] Refer to Figure 1 , in an embodiment of the present invention, a pole signal driving circuit for a micro-resistivity imaging logging tool is provided, which includes a signal buffer module 1 and a signal driving module group 2. The signal driving module group 2 includes six signal driving modules 3. The signal buffer module 1 is connected in parallel with the six signal driving modules 3, and the six signal driving modules 3 have exactly the same composition structure.

[0035] According to Figure 2The figure shows a specific implementation form for the first timing logic signal and the second timing logic signal.

[0036] In this embodiment, the signal buffer module 1 is used to buffer the input signal, thereby improving the stability and reliability of the input signal. Six groups of signal driving modules 3 divide the voltage signal output from the signal buffer module 1 into six groups of signals for parallel processing simultaneously. The signal driving module effectively optimizes and improves the quality of the input signal and outputs the processed plate driving signal.

[0037] According to Figure 4 As shown in the figure, the signal buffer module 1 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, and a first buffer U1. The model of the first buffer U1 is preferably 74LCX125.

[0038] One end of the third resistor R3 is connected to the first input terminal of the first buffer U1, and the other end of the third resistor R3 is connected to the first timing logic signal. At the same time, this end is connected to the ground through the first resistor R1. One end of the fourth resistor R4 is connected to the second input terminal of the first buffer U1, and the other end of the fourth resistor R4 is connected to the second timing logic signal. At the same time, this end is connected to the ground through the second resistor R2. One end of the first capacitor C1 is connected to the 3.3V power supply, and the other end of the first capacitor C1 is connected to the ground. The third input terminal, the fourth input terminal, the first output enable terminal, the second output enable terminal, the third output enable terminal, and the fourth output enable terminal of the first buffer U1 are connected to the ground. The first output terminal and the second output terminal of the first buffer U1 are denoted as u1 and u2, and u1 and u2 are used as the input voltage signals of the isolation module.

[0039] According to Figure 3 As shown in the figure, the signal driving module 3 includes a signal isolation module 31, a signal gating module 32, a signal voltage stabilizing module 33, a signal output driving module 34, and a signal driving protection module 35. The input terminal of the signal isolation module 31 is connected to the input terminal of the signal buffer module 1, the output terminal of the signal isolation module 31 is connected to the input terminal of the signal gating module 32, the output terminal of the signal gating module 32 is connected to the input terminal of the signal voltage stabilizing module 33, the output terminal of the signal voltage stabilizing module 33 is connected to the input terminal of the signal output driving module 34, the output terminal of the signal output driving module 34 is connected to the input terminal of the signal driving protection module 35, and the output terminal of the signal driving protection module 35 outputs the plate driving signal. Among them, the input terminal of the signal gating module 32 is also connected to the reference voltage input terminal.

[0040] Specifically, according to Figure 5 As shown in the figure, the signal isolation module 31 includes a second capacitor C2, a third capacitor C3, and a second isolator U2. The model of the second isolator U2 is preferably ISO7241.

[0041] One end of the second capacitor C2 is connected to the 3.3V power supply, and the other end is connected to the ground. One end of the third capacitor C3 is connected to the 5V power supply, and the other end is connected to the ground. The first input terminal of the second isolator U2 is connected to the above voltage signal U1, the second input terminal of the second isolator U2 is connected to the above voltage signal U2, the third input terminal of the second isolator U2 is connected to the ground, the first enable terminal and the second enable terminal of the second isolator U2 are respectively connected to the power supplies 3.3V and 5V, and the voltages of the first output terminal and the second output terminal of the second isolator U2 are respectively denoted as u3 and u4, and u3 and u4 serve as the input voltage signals of the signal gating module.

[0042] Specifically, according to Figure 6 As shown, the signal gating module 32 includes a fifth resistor R5, a sixth resistor R6, a third analog switch U3, and a fourth analog switch U4; among them, the models of the third analog switch U3 and the fourth analog switch U4 are preferably ADG1419.

[0043] One end of the fifth resistor R5 is connected to the 9V power supply, and the other end is connected to the first input terminal of the third analog switch U3. One end of the sixth resistor R6 is connected to the 9V power supply, and the other end is connected to the first input terminal of the fourth analog switch U4. The logic input terminal of the third analog switch U3 is connected to the above voltage signal U3, and the logic input terminal of the fourth analog switch U4 is connected to the above voltage signal U4. The output terminal of the third analog switch U3 is connected to the output terminal of the fourth analog switch U4, and the connection point is denoted as u5, and u5 serves as the input signal of the voltage stabilization module.

[0044] Specifically, according to Figure 7 As shown, the signal voltage stabilization module 33 includes a seventh resistor R7, a first voltage stabilizing diode D1, a second voltage stabilizing diode D2, and a fourth capacitor C4;

[0045] The positive electrode of the first voltage stabilizing diode D1 is connected to the positive electrode of the second voltage stabilizing diode D2. The negative electrode of the first voltage stabilizing diode D1 and the negative electrode of the second voltage stabilizing diode D2 are connected in parallel to the fourth capacitor C4. One end of the fourth capacitor C4 is simultaneously connected to the above voltage signal U5 and also connected to one end of the seventh resistor R7. The voltage signal at the other end of the seventh resistor R7 is denoted as u6, and u6 serves as the voltage signal connected to the output driving module. The other end of the fourth capacitor C4 is connected to the ground.

[0046] Specifically, according to Figure 8 As shown, the signal driving and protecting module 35 includes a fifth operational amplifier U5, a fifth capacitor C5, a sixth capacitor C6, an eighth resistor R8, a ninth resistor R9, a third voltage stabilizing diode D3, and a fourth voltage stabilizing diode D4; among them, the model of the fifth operational amplifier U5 is preferably HA9P5002.

[0047] The 9V power supply is connected to the ground through the fifth capacitor C5, and the -9V power supply is connected to the ground through the sixth capacitor C6. One end of the eighth resistor R8 is connected to the output terminal of the fifth operational amplifier U5, and the other end of the eighth resistor R8 is connected in parallel to the negative electrode of the third voltage-regulating diode D3 and the positive electrode of the fourth voltage-regulating diode D4. The positive electrode of the third voltage-regulating diode D3 and the negative electrode of the fourth voltage-regulating diode D4 are connected to the ground through the ninth resistor R9, and this point is denoted as Uout. Uout is the final output plate driving signal processed by the above circuit.

[0048] In summary, the present invention provides a plate signal driving circuit for a micro-resistivity imaging logging tool, which connects a signal buffering module and a signal driving module group in series, and the signal driving module group includes several signal driving modules; the signal input terminals of the signal buffering module are respectively connected to the first timing logic signal and the second timing logic signal; the signal output terminals of the signal buffering module are respectively connected in parallel to the input terminals of several signal driving modules, and several signal driving modules output plate driving signals; when the original timing logic input signal passes through the signal buffering module and the signal driving module, the original logic signal is divided into multiple identical parallel logic signals, and at the same time, the stability and driving ability of the signal are greatly improved. Among them, after the signal buffering module buffers the input signal, the stability of the output signal is better than that of the original input logic signal. Then, after being isolated, gated, voltage-regulated, and driven by the signal driving module, the output multi-group plate driving signals have the characteristics of high driving, high stability, low noise, and low temperature drift. The plate driving circuit generated by this driving circuit can ensure that the plates of the micro-resistivity imaging instrument work normally and stably in the complex downhole environment.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: the specific implementation manners of the present invention can still be modified or equivalently replaced, and any modification or equivalent replacement without departing from the spirit and scope of the present invention shall be covered by the protection scope of the claims of the present invention.

Claims

1. A plate signal driving circuit for a micro-resistivity imaging logging tool, characterized in that, it includes a signal buffer module (1) and a signal driving module group (2); the signal driving module group (2) includes several signal driving modules (3); the signal input ends of the signal buffer module (1) are respectively connected to a first timing logic signal and a second timing logic signal; the signal output ends of the signal buffer module (1) are respectively connected in parallel to the input ends of several signal driving modules (3), and several signal driving modules (3) output plate driving signals.

2. The plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 1, characterized in that, the signal buffer module (1) includes a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a first capacitor (C1) and a first buffer (U1); the output end of the third resistor (R3) is connected to the first input end of the first buffer (U1), the input end of the third resistor (R3) is connected to the first timing logic signal, and the input end of the third resistor (R3) is connected to the ground through the first resistor (R1); the output end of the fourth resistor (R4) is connected to the second input end of the first buffer (U1), the input end of the fourth resistor (R4) is connected to the second timing logic signal, and the input end of the fourth resistor (R4) is connected to the ground through the second resistor (R2); one end of the first capacitor (C1) is connected to the VCC end of the first buffer (U1) through a 3.3V power supply, and the other end of the first capacitor (C1) is connected to the ground.

3. The plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 2, characterized in that, the third input end, the fourth input end, the first output non-enable end, the second output non-enable end, the third output non-enable end and the fourth output non-enable end of the first buffer (U1) are all connected to the ground, and the first output end u1 and the second output end u2 of the first buffer (U1) are connected in parallel to the input ends of several signal driving modules (3).

4. The plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 1, characterized in that, the composition structures of several signal driving modules (3) are the same.

5. The plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 4, characterized in that, The signal driving module (3) includes a signal isolation module (31), a signal gating module (32), a signal voltage stabilizing module (33), a signal output driving module (34), and a signal driving protection module (35); the input end of the signal isolation module (31) is connected to the input end of the signal buffer module (1), the output end of the signal isolation module (31) is connected to the input end of the signal gating module (32), the output end of the signal gating module (32) is connected to the input end of the signal voltage stabilizing module (33), the output end of the signal voltage stabilizing module (33) is connected to the input end of the signal output driving module (34), the output end of the signal output driving module (34) is connected to the input end of the signal driving protection module (35), and the output end of the signal driving protection module (35) outputs a plate driving signal.

6. A plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 5, characterized in that the signal isolation module (31) includes a second capacitor (C2), a third capacitor (C3), and a second isolator (U2); one end of the second capacitor (C2) is connected to the 3.3V power supply, and the other end is connected to the ground; one end of the third capacitor (C3) is connected to the 5V power supply, and the other end is connected to the ground; the first input end and the second input end of the second isolator (U2) are respectively connected to the output end of the signal buffer module (1); the third input end of the second isolator (U2) is connected to the ground, and the first enable end and the second enable end of the second isolator (U2) are respectively connected to the 3.3V power supply and the 5V power supply; the first output end u3 and the second output end u4 of the second isolator (U2) are connected to the input end of the signal gating module (32).

7. A plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 5, characterized in that the input end of the signal gating module (32) is further connected to a reference voltage input end.

8. A plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 7, characterized in that the signal gating module (32) includes a fifth resistor (R5), a sixth resistor (R6), a third analog switch (U3), and a fourth analog switch (U4); one end of the fifth resistor (R5) is connected to the 9V power supply, and the other end is connected to the first input end of the third analog switch (U3), one end of the sixth resistor (R6) is connected to the 9V power supply, and the other end is connected to the first input end of the fourth analog switch (U4); the logic input ends of the third analog switch (U3) and the fourth analog switch (U4) are connected to the output end of the signal isolation module (31); the output end of the third analog switch (U3) is connected to the output end of the fourth analog switch (U4) and then merged into an output end u5 and connected to the signal voltage stabilizing module (33).

9. A plate signal driving circuit for a micro-resistivity imaging logging tool according to claim 5, characterized in that The signal voltage stabilizing module (33) includes a seventh resistor (R7), a first voltage stabilizing diode (D1), a second voltage stabilizing diode (D2), and a fourth capacitor (C4); the positive electrodes of the first voltage stabilizing diode (D1) and the second voltage stabilizing diode (D2) are connected, and the negative electrodes of the first voltage stabilizing diode (D1) and the second voltage stabilizing diode (D2) are connected in parallel to the fourth capacitor (C4). One end of the fourth capacitor (C4) is connected to the output end of the signal gating module (32), and is also connected to one end of the seventh resistor (R7). The other end of the seventh resistor (R7), the output end u6, is connected to the signal output driving module.

10. The plate signal driving circuit for a microresistivity imaging logging tool according to claim 5, characterized in that the signal driving and protecting module (35) includes a fifth operational amplifier (U5), a fifth capacitor (C5), a sixth capacitor (C6), an eighth resistor (R8), a ninth resistor (R9), a third voltage stabilizing diode (D3), and a fourth voltage stabilizing diode (D4); the 9V power supply is connected to the ground through the fifth capacitor (C5), and the -9V power supply is connected to the ground through the sixth capacitor (C6); one end of the eighth resistor (R8) is connected to the output end of the fifth operational amplifier (U5), and the other end of the eighth resistor (R8) is connected in parallel to the negative electrode of the third voltage stabilizing diode (D3) and the positive electrode of the fourth voltage stabilizing diode (D4). The positive electrode of the third voltage stabilizing diode (D3) and the negative electrode of the fourth voltage stabilizing diode (D4) are connected to the ground through the ninth resistor (R9) and output the plate driving signal at the same time.

Images