Radar system for detecting internal defects of concrete member in super high-rise building

By designing a radar system that includes picosecond-level narrow pulses and sampling integration circuits, the problem that traditional radar detection technology is difficult to meet the internal defect detection requirements of super-large concrete components in super-high-rise buildings is solved, and high-precision and depth detection effects are achieved, and portability is achieved.

CN120065213APending Publication Date: 2025-05-30CHINA INST OF BUILDING STANDARD DESIGN & RES
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Patent Information

Application Number
CN202510541071.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-28
Publication Date
2025-05-30

AI Technical Summary

Technical Problem

Traditional radar detection technology is difficult to meet the detection needs of internal defects of super-large concrete components in super-high-rise buildings, especially in terms of depth and accuracy.

Method used

A radar system including antennas, transmitters, receivers, main control modules and display modules is designed, and a picosecond-level narrow pulse and sampling integration circuit are used to realize high-precision detection of internal defects of concrete components in super-high-rise buildings.

Benefits of technology

The depth detection of internal defects of super-large concrete components in super-high-rise buildings is realized. The detection depth is greater than 60 cm and the detection accuracy within a 30 cm depth is less than 1 cm, which meets the detection requirements for super-large concrete components. At the same time, the equipment weight is controlled within 10 kg, which is portable.

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Abstract

The invention discloses a radar system for detecting internal defects of a concrete member in a super high-rise building. The radar system comprises an antenna, a transmitter, a receiver, a main control module and a display module, the antenna is a 1000 MHz antenna; the transmitter is used for generating picosecond-level narrow pulses; the receiver is an ultra-wideband receiver. The effective detection depth of the radar system is larger than 60 centimeters, the detection precision of the radar system at the depth of 60 centimeters is smaller than 4 centimeters, the detection precision of the radar system within the depth of 30 centimeters is smaller than 1 centimeter, the detection depth and precision of the radar system both meet the detection requirements for oversized concrete members, the equipment weight is controlled within 10 kilograms, and the radar system has the advantages of being portable and convenient to use.
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Description

Technical Field

[0001] The present invention relates to the technical field of radar detection, and particularly to a radar system for detecting internal defects of concrete components in super high-rise buildings. Background Art

[0002] Defects in concrete components pose problems of potential safety hazards and aesthetics in building structures. External defects such as honeycombing and holes affect aesthetics, while internal defects weaken the compactness and durability of concrete, leading to potential safety hazards in building structures. At the same time, external defects and internal defects are not unified, and it is impossible to deduce whether there are internal defects from external defects. Therefore, other technical means are needed to detect internal defects of concrete components, and generally, radar detection is used.

[0003] There are various types of defects inside concrete. For example, cracks can be divided into shrinkage cracks, temperature cracks, and load cracks according to their causes, which will seriously affect the structural strength and durability; high porosity caused by excessive water-cement ratio, insufficient vibration, or improper curing will affect the building lifespan; in addition, internal micro-cracks caused by stress concentration or non-uniform material properties inside concrete, although difficult to detect by the naked eye, will affect the strength and durability of concrete; and structural cracks are caused by external loads or structural self-weight, and such cracks have a greater impact on structural safety. The above defects have a greater impact on the safety of building structures. For super high-rise buildings with a height exceeding 300m, the size of their concrete components is extremely large, and the traditional radar detection depth and accuracy cannot meet the requirements. The present invention provides a radar system for detecting internal defects of concrete components in super high-rise buildings to solve the above problems. Summary of the Invention

[0004] The radar system for detecting internal defects of concrete components in super high-rise buildings provided by the present invention is characterized by being light in weight, small in size, large in detection depth, and high in accuracy, and realizes the detection of internal defects of super-large concrete components in super high-rise buildings.

[0005] The technical solution adopted by the present invention to solve the above technical problems is: A radar system for detecting internal defects of concrete components in super high-rise buildings, comprising an antenna, a transmitter, a receiver, a main control module, and a display module; The antenna is used for transmitting and receiving electromagnetic waves; The transmitter is used for generating picosecond-level narrow pulses, and comprises a driving circuit, an SRD pulse forming circuit, and a single-cycle pulse forming circuit. The driving circuit accelerates and shapes the edge of the trigger signal to obtain a driving pulse signal. The SRD pulse forming circuit is used for receiving the driving pulse signal and obtaining a negative-polarity narrow pulse. The single-cycle pulse forming circuit is used for receiving the negative-polarity narrow pulse and obtaining a single-cycle narrow pulse; The receiver is provided with a sampling and integrating circuit, which includes a sampling pulse generation circuit and a sampling gate circuit. The sampling pulse generation circuit is used to obtain sampling pulses, and the sampling gate circuit performs equivalent sampling on the signal to be sampled and reconstructs its corresponding baseband signal; The main control module is used to control the transmitter, the receiver and the display module; The display module is used for displaying.

[0006] Further, the antenna includes a metal shielding cavity, a radiating antenna and a radiating backplane. The front side of the metal shielding cavity is open. The radiating antenna is arranged on the front side of the metal shielding cavity and is connected to the metal shielding cavity. The radiating antenna includes an insulating dielectric plate and antenna radiation arms. The antenna radiation arms are semi-elliptical and symmetrically arranged on the insulating dielectric plate. The radiating backplane is arranged on the back of the insulating dielectric plate.

[0007] Further, the radiating backplane is semi-elliptical and is arranged opposite to the antenna radiation arms.

[0008] Further, the drive circuit is provided with bipolar transistors Q1 and Q2 to shape the input trigger signal in sequence and generate a positive-polarity pulse signal; The drive circuit is also provided with a triode Q3 for broadband linear power amplification to amplify and shape the pulse signal generated by Q1 and Q2 and generate a drive pulse signal.

[0009] Further, the SRD pulse formation circuit is provided with step recovery diodes D1 and D2. When the drive pulse signal arrives, minority carriers form a reverse current under the action of the reverse voltage. After the minority carriers are consumed, the reverse current rapidly drops to 0. D1 generates a current step in an extremely short time, and then a negative-polarity narrow pulse is formed at D2.

[0010] Further, the single-cycle pulse formation circuit is provided with a first branch and a second branch. The first branch is the output port of the single-cycle pulse formation circuit. A winding inductor L3 is arranged in the second branch. The negative-polarity narrow pulse is transmitted through L3 and also arrives at the circuit output port after a short time delay, forming a signal with the same magnitude and opposite direction as the original signal. The signals of the two propagation paths are superimposed at the output port to obtain a single-cycle narrow pulse signal.

[0011] Further, the sampling pulse generation circuit is provided with a radio frequency triode switch circuit and a step recovery diode; The input balanced trigger signal is shaped by the triode Q3 to generate a pair of balanced drive pulse signals. When the step recovery diodes D1, D2, and D3 change from the conducting state to the cut-off state, a step effect is generated. D1 shapes the leading edge of the previous-stage balanced drive pulse signal, D2 shapes the trailing edge of the negative-polarity drive pulse signal, and D3 shapes the trailing edge of the positive-polarity drive pulse signal, generating a pair of balanced picosecond-level Gaussian narrow pulse signals.

[0012] Further, a sampling diode, an integrator-hold circuit, and a differential amplifier are provided in the sampling gate circuit; The integrator-hold circuit is provided with capacitors C7, C8, C9 and resistors R15, R16. Under the combined action of the bias voltage and the sampled Gaussian narrow pulse signal, the sampling diode changes from cut-off to conduction. The sampling integration capacitors C7, C8, C9 sample and integrate the pulse signal to be sampled. After multiple samplings, signal accumulation is achieved. Under the amplification and holding effects of the differential amplifier, a low-frequency baseband signal with the pulse signal to be sampled broadened in the time domain is obtained.

[0013] Further, the main control module includes a programmable logic device FPGA and a digital signal processor DSP. The programmable logic device FPGA and the digital signal processor DSP are signal-connected. The programmable logic device FPGA is signal-connected to the transmitter and the receiver, and the digital signal processor DSP is signal-connected to the display module.

[0014] The beneficial effects of the present invention are as follows: The effective detection depth of the radar system is greater than 60 cm. At a depth of 60 cm, its detection accuracy is less than 4 cm. Within a depth of 30 cm, the detection accuracy is less than 1 cm. Its detection depth and accuracy both meet the detection requirements for ultra-large concrete components, and the equipment weight is controlled within 10 kg, having the advantages of being portable and easy to use. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the overall module connection state of the present invention; Figure 2 It is a schematic diagram of the overall structure of the antenna of the present invention; Figure 3 It is a schematic diagram of the internal structure of the antenna of the present invention; Figure 4 It is a schematic diagram of the measured antenna echo of the present invention; Figure 5 It is a schematic diagram of the modularization of the transmitter circuit of the present invention; Figure 6 It is a schematic diagram of the transmitter drive circuit of the present invention; Figure 7Schematic diagram of the transmitter SRD pulse formation circuit of the present invention; Figure 8 Schematic diagram of the single-cycle pulse formation circuit of the transmitter of the present invention; Figure 9 Schematic diagram of the transmitted pulse signal of the present invention; Figure 10 Schematic diagram of the modularization of the receiver circuit of the present invention; Figure 11 Schematic diagram of the sampling pulse generation circuit of the receiver of the present invention; Figure 12 Schematic diagram of the sampling gate circuit of the receiver of the present invention; Figure 13 Schematic diagram of the output waveform of the sampling pulse of the receiver of the present invention; Figure 14 Schematic diagram of the frequency conversion loss curve of the receiver of the present invention; Figure 15 Schematic diagram of the module connection status of the main control module of the present invention.

[0016] Reference numerals: 1, metal shielding cavity; 2, radiation antenna; 21, insulating dielectric plate; 22, antenna radiation arm; 3, radiation backplane. Detailed implementation manners

[0017] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings of the specification. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0018] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention.

[0019] Such as Figure 1As shown in the figure, a radar system for detecting internal defects in concrete components of super high-rise buildings includes an antenna, a transmitter, a receiver, a main control module, and a display module. In order to detect super-large-sized concrete components, the radar system needs to have a large detection depth and high detection accuracy, and higher detection accuracy at a general detection depth. At the same time, in order to meet the requirement of convenient transfer and use at the construction site, it needs to have the characteristics of small structure and light self-weight. The radar system of the present invention designs the antenna, transmitter, and receiver to meet the detection requirements for large-sized concrete components. The specific indicators of the antenna, transmitter, and receiver are as follows: The antenna is an ultra-wideband antenna, with specific dimensions of 185 mm × 92m × 50mm. The antenna is set to transmit and receive one by one and is polarized in a linear polarization manner. The operating frequency of the antenna is 400MHz to 1200MHz, the center frequency is 800MHz, the relative bandwidth is 100%, and within the operating frequency band, the voltage standing wave ratio of the antenna is less than 2.0 within this frequency band. The low-frequency band gain is -10dBi, the gain monotonically increases within the entire operating frequency band, the gain at the center frequency is -3dBi, and the gain at 1200MHz reaches 1.8dBi, which can meet the detection requirements; The center frequency of the transmitted pulse of the transmitter is 1GHz, the -3dB bandwidth is 1GHz, the pulse width is 1.2ns, and the peak-to-peak value is 60.5V; The dynamic range of the receiver is 56dB, and the sensitivity is -48dBm.

[0020] As Figure 2 、 3 shown in the figure, further, the antenna is used to transmit and receive electromagnetic waves, and includes a metal shielding cavity 1, a radiation antenna 2, and a radiation backplane 3. The front side of the metal shielding cavity 1 is open. The radiation antenna 2 is arranged on the front side of the metal shielding cavity 1 and is connected to the metal shielding cavity 1. The radiation antenna 2 includes an insulating dielectric plate 21 and antenna radiation arms 22. The antenna radiation arms 22 are semi-elliptical and symmetrically arranged on the insulating dielectric plate 21, so that the current flows through a larger path at a small size, enhancing radiation. The radiation backplane 3 is arranged on the back of the insulating dielectric plate 21.

[0021] As Figure 2 、 3 shown in the figure, further, the radiation backplane 3 is semi-elliptical and is arranged opposite to the antenna radiation arms 22; its principle is to load a resistor in the radiation backplane 3, and the current is coupled to the back through the dielectric for absorption to improve the radiation efficiency of the antenna.

[0022] Further, the radiation antenna 2 is a folded bowtie antenna, and the folded bowtie antenna is combined with the metal shielding cavity 1 through electrical contact to suppress backscattering and external interference.

[0023] As Figure 4As shown, the voltage standing wave ratio (VSWR) is an important parameter of the ultra-wideband antenna. Specifically, it refers to the ratio of the voltage at the antinode of the standing wave to the voltage at the node, also known as the standing wave ratio. The VSWR of the antenna represents the ratio of the radiated energy to the reflected energy of the antenna. When this parameter is 1, it means that all the energy is radiated by the antenna; when this parameter is infinite, no energy is radiated. The vector network analyzer is used to measure the VSWR of the folded bowtie antenna used by the antenna. The test results show that the VSWR of the antenna is less than 2.0 within the operating frequency band of 400 MHz to 1200 MHz, with good performance, meeting the requirements of the miniaturized radar system. And whether the quality of the echo signal of the folded bowtie antenna meets the system requirements is crucial. During the test, the receiver is connected to the oscilloscope, and the oscilloscope is used to observe the quality of the echo signal. From the test results of the antenna echo signal, it can be seen that the amplitude of the secondary reflection generated by the cable is 20% of the echo signal, and the antenna trailing situation basically meets the requirements.

[0024] As Figure 5 、 6 shown in Figures 7, 8, and 9, further, the transmitter is used to generate picosecond-level narrow pulses, including a drive circuit, an SRD pulse forming circuit, and a single-cycle pulse forming circuit. The drive circuit accelerates and shapes the edge of the trigger signal to obtain a drive pulse signal. The SRD pulse forming circuit is used to receive the drive pulse signal and obtain a negative-polarity narrow pulse. The single-cycle pulse forming circuit is used to receive the negative-polarity narrow pulse and obtain a single-cycle narrow pulse.

[0025] As Figure 6 shown, further, the drive circuit is provided with bipolar transistors Q1 and Q2 to sequentially shape the input trigger signal and generate a positive-polarity pulse signal; The drive circuit is also provided with a triode Q3 for broadband linear power amplification to amplify and shape the pulse signal generated by Q1 and Q2 to generate a drive pulse signal; R3 and R5 are respectively used to limit the base currents of Q2 and Q3. C1 and C2 are coupling capacitors, and L1 is a wound inductance used to increase the shaping ability.

[0026] As Figure 7 shown, further, the SRD pulse forming circuit is used to obtain a negative-polarity narrow pulse signal, which is provided with step recovery diodes D1 and D2. The specific working principle is as follows: before the drive signal arrives, D1 and D2 are in the forward-biased state under the action of the bias voltage, and minority carriers are stored near their PN junctions; when the drive pulse signal arrives, the minority carriers form a reverse current under the action of the reverse voltage. After the minority carriers are consumed, the reverse current rapidly drops to 0, and D1 generates a current step in a very short time, thereby forming a negative-polarity narrow pulse at D2; where the function of L2 is energy storage.

[0027] As Figure 8 shown, further, the single-cycle pulse forming circuit is used to obtain a single-cycle narrow pulse signal, which is provided with a first branch and a second branch. The first branch is the output port of the single-cycle pulse forming circuit, and a winding inductor L3 is arranged in the second branch. The specific working principle is as follows: The negative narrow pulse signal output by the SRD pulse forming circuit has two propagation directions: one propagation direction is the output port of the single-cycle pulse forming circuit of the first branch, and the other propagation path is to pass through the second branch and be transmitted through L3. After a short time delay, the negative narrow pulse signal also reaches the circuit output port. Due to the reflection effect at the end of the short-circuit microstrip line, a signal with the same magnitude and opposite direction to the original signal is formed. The signals of the two propagation paths are superimposed at the output port to obtain a single-cycle narrow pulse signal; By changing the size of L3, the amplitude and pulse width of the output signal can be adjusted. C5 and diode D4 are used to suppress the tail oscillation and overshoot of the output signal.

[0028] As Figure 10 、 11 、12 shown, further, the receiver is an ultra-wideband receiver, which is provided with a sampling and integrating circuit. The sampling and integrating circuit includes a sampling pulse generating circuit and a sampling gate circuit; the sampling pulse generating circuit is composed of a radio frequency triode switch circuit and a step recovery diode, and generates a pair of balanced picosecond-level Gaussian narrow pulse signals to provide the required sampling pulse signals for the sampling gate circuit; the sampling gate circuit is composed of a full-bridge Schottky diode integrated chip, an integrating and holding circuit, and a differential amplifier circuit, and performs equivalent sampling on the signal to be sampled to reconstruct its corresponding baseband signal.

[0029] As Figure 11 shown, further, the sampling pulse generating circuit is provided with a radio frequency triode switch circuit and a step recovery diode; The sampling pulse generation circuit uses a transformer to convert a single-ended trigger signal into a balanced trigger signal. As the radio frequency triode, transistor Q3 has the function of quickly conducting and closing, shaping and amplifying the input balanced trigger signal, sharpening the rising edge of the trigger signal, amplifying the output amplitude of the trigger signal, and having a stronger driving ability. After being shaped by the radio frequency triode, a pair of balanced drive pulse signals are generated. The specific principle is as follows: Step recovery diodes D1, D2, and D3 are in the conducting state under forward bias, and charges are stored near the pn junction; when the drive pulse signal arrives, the stored charges are continuously extracted until the charges are completely extracted, and the step recovery diodes change from the conducting state to the cut-off state, generating a step effect; D1 shapes the leading edge of the previous-stage balanced drive pulse signal, D2 shapes the trailing edge of the negative-polarity drive pulse signal, and D3 shapes the trailing edge of the positive-polarity drive pulse signal, generating a pair of balanced picosecond-level Gaussian narrow pulse signals.

[0030] As Figure 12 shown, further, a sampling diode, an integrator-hold circuit, and a differential amplifier are provided in the sampling gate circuit; Capacitors C7, C8, C9 and resistors R15, R16 form an integrator-hold circuit. Under the combined action of the bias voltage and the sampling Gaussian narrow pulse signal, the sampling diode changes from cut-off to conduction. The sampling integration capacitors C7, C8, C9 sample and integrate the pulse signal to be sampled. After multiple samplings, the signal is accumulated, and under the amplification and holding action of the differential amplifier, a low-frequency baseband signal with the pulse signal to be sampled broadened in the time domain is obtained.

[0031] By adjusting the width and amplitude of the sampling pulse, and the magnitudes of the bias voltages +bias voltage and -bias voltage, the opening aperture time of the sampling gate can be changed. The smaller the opening aperture time, the larger the sampling bandwidth of the receiver. The selection of the bias voltages +bias voltage and -bias voltage is crucial. When the bias voltage is too high, if the amplitude of the generated sampling pulse signal is not large enough, the sampling gate chip will not be able to conduct or even if it conducts, its internal Schottky diode will be in a non-linear region with a very large resistance, and at this time the sampling efficiency is very low and the signal is prone to serious non-linear distortion. When the bias voltage is too low, the too large sampling aperture will reduce the sampling bandwidth of the circuit. Therefore, it is necessary to reasonably select the magnitudes of the bias voltages +bias voltage and -bias voltage.

[0032] As Figure 13As shown, further, the trigger signal is provided by an AFG3252 signal source, and the load is a DSA71604C broadband oscilloscope with a 50Ω impedance to measure the output waveform of the circuit. When the repetition frequency of the input trigger signal is 400KHz, the test results of the output pulse signal of the sampling pulse generation circuit show that the pulse half-height width is 165ps and the peak voltage amplitude is ±5.2V. By adjusting the magnitude of the DC bias voltage applied to the sampling gate, the opening aperture time of the sampling gate can be changed, thereby making the sampling bandwidth of the receiver adjustable. In this embodiment, the opening aperture time of the sampling gate is 90ps, and the theoretical value of the receiver sampling bandwidth is 3.88GHz.

[0033] Further, a 20GHz signal source, Agilent Technologies E8257D, is used as the sine signal source. One of the bridge sampling gate circuits of the receiver in this embodiment performs equivalent sampling on the 10MHz to 7GHz sine signal provided by the signal source. When the effect of the differential amplifier is not considered, the measured frequency conversion loss is as Figure 14 shown. It can be seen that when the frequency conversion loss ranges from -7dB to -10dB, the corresponding -3dB bandwidth is 3.8GHz, which is almost the same as the theoretical calculated value of 3.88GHz. After testing, the dynamic range of this receiver is 56dB, and the sensitivity is -48dBm.

[0034] As Figure 15 shown, further, the main control module is used to control the transmitter, receiver, and display module. The main control module includes a programmable logic device FPGA and a digital signal processor DSP. The programmable logic device FPGA and the digital signal processor DSP are signal-connected to each other. The programmable logic device FPGA is signal-connected to the transmitter and receiver, and the digital signal processor DSP is signal-connected to the display module. The functions of the main control module are: generating and timing control of the trigger signals for the transmitter and receiver; timing control of the switch matrix; receiving, collecting, and storing the waveform of the echo signal; executing the parameter commands of the upper computer; transmitting data to the upper computer; and receiving the signal of the GPS module to obtain the platform position information.

[0035] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms. Therefore, in any aspect, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention, and any reference signs in the claims should not be regarded as limiting the claims involved.

Claims

1. A radar system for detecting internal defects of concrete components in super high-rise buildings, characterized by: Including antenna, transmitter, receiver, main control module and display module; The antenna is used to transmit and receive electromagnetic waves; The transmitter is used to generate picosecond narrow pulses, including a driving circuit, an SRD pulse forming circuit and a single-cycle pulse forming circuit. The driving circuit accelerates and shapes the edge of a trigger signal to obtain a driving pulse signal. The SRD pulse forming circuit is used to receive the driving pulse signal and obtain a negative polarity narrow pulse. The single-cycle pulse forming circuit is used to receive a negative polarity narrow pulse and obtain a single-cycle narrow pulse. The receiver is provided with a sampling integration circuit, which includes a sampling pulse generating circuit and a sampling gate circuit. The sampling pulse generating circuit is used to obtain a sampling pulse, and the sampling gate circuit performs equivalent sampling on the sampled signal to reconstruct its corresponding baseband signal. The main control module is used to control the transmitter, receiver and display module; The display module is used for display.

2. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized in that: The antenna comprises a metal shielding cavity (1), a radiating antenna (2) and a radiating back plate (3); the front side of the metal shielding cavity (1) is open; the radiating antenna (2) is arranged on the front side of the metal shielding cavity (1) and connected to the metal shielding cavity (1); the radiating antenna (2) comprises an insulating dielectric plate (21) and an antenna radiating arm (22); the antenna radiating arm (22) is semi-elliptical and symmetrically arranged on the insulating dielectric plate (21); and the radiating back plate (3) is arranged on the back side of the insulating dielectric plate (21).

3. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 2 is characterized in that: The radiation back plate (3) is semi-elliptical and is arranged opposite to the antenna radiation arm (22).

4. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized in that: The driving circuit is provided with bipolar transistors Q1 and Q2, which sequentially shape the input trigger signal to generate a positive polarity pulse signal; The driving circuit is also provided with a transistor Q3, which is used for broadband linear power amplification, amplifying and shaping the pulse signals generated by Q1 and Q2 to generate a driving pulse signal.

5. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized by: The SRD pulse forming circuit is provided with step recovery diodes D1 and D2. When the driving pulse signal arrives, the minority carriers form a reverse current under the action of the reverse voltage. After the minority carriers are consumed, the reverse current drops rapidly to 0, and D1 generates a current step in a very short time, thereby forming a negative polarity narrow pulse at D2.

6. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized by: The single-cycle pulse forming circuit is provided with a first branch and a second branch. The first branch is the output port of the single-cycle pulse forming circuit. The second branch is provided with a winding inductor L3. The negative polarity narrow pulse is transmitted through L3 and arrives at the circuit output port after a short time delay, forming a signal that is equal in magnitude to the original signal and opposite in direction. The signals of the two propagation paths are superimposed at the output port to obtain a single-cycle narrow pulse signal.

7. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized by: The sampling pulse generating circuit is provided with a radio frequency triode switch circuit and a step recovery diode; The input balanced trigger signal is shaped by the transistor Q3 to generate a pair of balanced drive pulse signals. A step effect is generated when the step recovery diodes D1, D2 and D3 change from the on state to the off state. D1 shapes the leading edge of the previous balanced drive pulse signal, D2 shapes the trailing edge of the negative polarity drive pulse signal, and D3 shapes the trailing edge of the positive polarity drive pulse signal to generate a pair of balanced picosecond Gaussian narrow pulse signals.

8. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1 is characterized by: The sampling gate circuit is provided with a sampling diode, an integral holding circuit and a differential amplifier; The integral holding circuit is provided with capacitors C7, C8, C9 and resistors R15, R16. Under the combined effect of the bias voltage and the sampled Gaussian narrow pulse signal, the sampling diode changes from cut-off to conduction. The sampling integral capacitors C7, C8, C9 sample and integrate the pulse signal to be sampled. After multiple samplings, the signal is accumulated. Under the amplification and holding effect of the differential amplifier, a low-frequency baseband signal of the pulse signal to be sampled that is widened in the time domain is obtained.

9. The radar system for detecting internal defects of concrete components in super high-rise buildings according to claim 1, characterized in that: The main control module includes a programmable logic device FPGA and a digital signal processor DSP, the programmable logic device FPGA and the digital signal processor DSP are signal connected, the programmable logic device FPGA is signal connected to a transmitter and a receiver, and the digital signal processor DSP is signal connected to a display module.

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