Image classification method based on bayesian machine hardware of diffusion type memristor
By using diffused memristors to construct a cross array circuit, the circuit structure of Bayesian machine hardware is simplified, solving the problems of high computational cost and energy consumption in traditional Bayesian machine hardware, and achieving efficient image classification and recognition.
Patent Information
- Application Number
- CN202510092711.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-21
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2045-01-21
AI Technical Summary
Traditional Bayesian machine hardware suffers from repeated memory accesses, low energy efficiency, and high computational costs during implementation. Furthermore, the implementation of non-volatile memristor cross array circuits requires a large number of pseudo-random generators and gate circuits, which increases time and energy consumption.
A cross-array circuit is constructed using diffused memristors. By leveraging their physical randomness and parallel computing capabilities, the circuit structure is simplified, and efficient computation is achieved through voltage-probability modulation and nonlinear transformation.
It reduces computational costs, improves computational efficiency and accuracy, enables multi-class image recognition for complex tasks, and avoids the use of gate circuits and pseudo-random number generators.
Smart Images

Figure CN120067571B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to Bayesian machine hardware, to the field of probability computation, and specifically to an image classification method based on Bayesian machine hardware with diffused memristors. Background Technology
[0002] With the rapid development of artificial intelligence, traditional von Neumann computers have encountered problems such as memory walls, high time costs, and high energy costs. Probabilistic computation, on the other hand, not only has the potential to solve complex problems more efficiently than traditional computing paradigms, but also exhibits stronger robustness and resistance to interference. Bayesian machines are a probabilistic framework that allows for decision-making even with incomplete information, maximizing the integration of all available assumptions and prior knowledge.
[0003] While Bayesian machines exhibit advantages such as robustness to device defects and single-event perturbations, their hardware implementation suffers from issues like repeated memory accesses, low energy efficiency, and high computational costs. Furthermore, traditional Bayesian machine hardware implementations have not addressed the data storage-computation separation problem, making it difficult to improve the computational power of hardware Bayesian machines. Therefore, when deploying Bayesian machines on FPGAs and CMOS-based application-specific integrated circuits, computational power is often significantly reduced due to neglecting these non-ideal factors.
[0004] To address these limitations, researchers have proposed Bayesian machines based on non-volatile memristor cross-array circuits for probabilistic computation. The operating mode of the cross-array structure is naturally compatible with Bayesian rules, and its significant advantages in scalability and parallel computing can greatly reduce data movement during computation. However, implementing non-volatile memristor cross-array circuits requires the use of numerous pseudo-random generators and gate circuits, which incurs additional time costs and increases energy consumption. Summary of the Invention
[0005] To address the problems existing in the background art, this invention provides an image classification method based on Bayesian machine hardware using diffused memristors. This invention aims to leverage the physical randomness of diffused memristors and the parallel computing capabilities of cross arrays to achieve higher computational efficiency and power using a more streamlined circuit structure. Compared with traditional methods, it significantly simplifies the circuit structure and possesses the computational capability to perform complex tasks.
[0006] The technical solution adopted in this invention is:
[0007] The image classification method based on Bayesian machine hardware with diffused memristors of the present invention includes:
[0008] Step 1) Prepare several diffused memristors to construct a cross array circuit structure, and use each diffused memristor in the cross array circuit structure as a probability bit of Bayesian machine hardware to realize voltage-probability modulation.
[0009] Step 2) Obtain several reference images with preset category labels and construct an image dataset. Statistically analyze the binarized brightness of each pixel in each reference image in the image dataset to obtain the prior probability and conditional probability of the image dataset, which will be used for subsequent test set image classification.
[0010] Step 3) Based on the prior probability and conditional probability of each reference image under each preset category obtained in Step 2), the image to be classified is subjected to voltage-probability modulation and processed by nonlinear transformation method to obtain the modulation voltage to be classified. The modulation voltage to be classified is input into the cross array circuit structure, and the image is classified according to the number of times the cross array circuit structure is turned on.
[0011] In step 1), when fabricating the diffused memristor, a pattern is first created on one side of a silicon substrate using photolithography, preserving the positions of bit lines, etc. Then, at the patterned location, a titanium (Ti) metal layer and a platinum (Pt) metal layer are deposited sequentially using sputtering. The thickness of both the titanium (Ti) and platinum (Pt) metal layers ranges from 1 to 40 nm. Next, an aluminum oxide (Al2O3) dielectric layer with a thickness of 7 to 20 nm is fabricated on the platinum (Pt) metal using atomic layer deposition (ALD). Finally, a silver (Ag) metal layer and a gold (Au) metal layer are fabricated sequentially on the aluminum oxide (Al2O3) dielectric layer using thermal evaporation and lift-off processes. The thickness of both the silver (Ag) and gold (Au) metal layers ranges from 20 to 40 nm. The titanium (Ti) metal layer, platinum (Pt) metal layer, aluminum oxide (Al2O3) dielectric layer, and silver (Ag) metal layer are used together as the bottom electrode, and the gold (Au) metal layer is used as the top electrode, ultimately obtaining an Au / Ag / Al2O3 / Pt / Ti diffused memristor.
[0012] In step 1), the Au / Ag / Al2O3 / Pt / Ti diffused memristor is fabricated using an anodizing process. It exhibits fluctuating threshold switching characteristics within the switching voltage range. In the diffused memristor, when the compliance current is 1nA, applying an external voltage of 5-10V causes silver particles to move and form a conduction channel. The diffused memristor switches from an initial high-resistivity state to a low-resistivity state, with the current increasing by several orders of magnitude. After removing the external voltage, the diffused memristor quickly recovers to the initial high-resistivity state within a time less than a preset time threshold to continue the voltage-probability modulation process. Because nanoparticles remain on both sides of the electrodes of the diffused memristor, when the applied voltage is within the probability switching range again, the diffused memristor can easily switch to a low-resistivity state. During image classification, the modulation voltage obtained after voltage-probability modulation is within the probability switching range of the diffused memristor, which is as low as 0.07-0.14V.
[0013] In step 1), the cross-array circuit structure further includes I bit lines, N word lines, and I probability lines. The word lines are arranged horizontally in parallel intervals, and the bit lines and probability lines are arranged vertically in parallel intervals. Each probability line is located between two adjacent bit lines. Each word line intersects each bit line and probability line perpendicularly. A diffused memristor and a transistor are placed in the rectangular region formed between every two adjacent bit lines and every two adjacent word lines, thus forming an array unit. For each array unit, the bottom electrode of the diffused memristor is connected to the current... On the bit line shared with the previous array cell in the row, the top electrode of the diffused memristor is connected to the word line shared with the previous array cell in the current column. The transistor is connected between the probability line and the bit line to which the diffused memristor is connected. One end of each word line and bit line is connected to a pulse generator, and one end of each word line receives a pulse input voltage. The other end of each word line is connected to the diffused memristor in the last array cell of each row in sequence. The other end of each bit line serves as the output terminal, and both ends of each probability line are connected to the pulse receiving module.
[0014] In step 2), the number of preset categories is the same as the number of bit lines and probability lines in the cross array circuit structure, and each image has its own preset category; the number of rows of pixels in each image is the same as the number of word lines in the cross array circuit structure.
[0015] In step 2), each reference image has its own preset category label, that is, each pixel in each reference image has the same preset category label. The brightness of each pixel in each reference image is binarized to obtain the binarized brightness. For each reference image under each preset category, the prior probability and conditional probability of the binarized brightness of each pixel in each reference image are statistically obtained.
[0016] In step 3), the binarized brightness of each pixel in the image to be classified is first determined. Based on the prior probability and conditional probability of each reference image under each preset category obtained in step 2), the classification probability of each pixel belonging to each preset category is obtained. The initial switching voltage-probability curve of the diffused memristor is nonlinearly transformed into an updated switching voltage-probability curve, as follows:
[0017]
[0018] Where G() is the updated switching voltage-probability curve, i.e., the classification probability of the preset category; a and p are the first and second range limiting parameters in the nonlinear transformation process, respectively; V d The modulation voltage, after normalizing the probabilistic switching range of the diffused memristor, is then input to the corresponding word line of the memristor cross array.
[0019] The modulation voltage of each pixel in the image to be classified is obtained based on the updated switching voltage-probability curve. For each preset category, a preset number of classification recognitions are performed. For each classification recognition, the modulation voltage of each row of pixels in the image to be classified is first input into its respective word line in sequence. At the same time, the column selection pulse emitted by the pulse generator is input into the bit line corresponding to the current preset category, so that a voltage difference is formed between the word line and the bit line. The pulse receiving module saves the number of times the probability line connected to the same diffused memristor as the current bit line is turned on, until the preset number of classification recognitions is completed, and the total number of times the current probability line is turned on is obtained. Finally, the number of times the probability line under each preset category is obtained, and the preset category to which the probability line with the most turns on belongs is taken as the category of the current image. The final image classification is achieved based on the probability comparison of all bit lines.
[0020] During operation, when one bit line of the diffused memristor is working in a positive voltage mode, all other bit lines are subjected to a reverse voltage, so that the diffused memristor always maintains a probabilistic switching operation mode.
[0021] When the probability line is turned on, all diffused memristors connected to the current column of the current probability line are turned on. During operation, the final on state of the diffused memristors is as follows:
[0022]
[0023] Where, p m For the final turn-on state of the m-th diffused memristor, p m =0 means not enabled, p m =1 indicates that it is enabled; u() is the binary step function; Vmd The modulation voltage for the m-th diffused memristor is input; V o V is the boundary voltage of the probability switch range. S The default voltage is 'rand'; 'rand' is the default random term. In order to satisfy the probability switching characteristics of the probability bit, the 'rand' term is introduced to define the random state of the probability bit each time it is turned on.
[0024] The beneficial effects of this invention are:
[0025] 1. This invention introduces diffused memristors as probability bits. By leveraging the true physical randomness of the device, the cross-array circuit structure is optimized. Compared to implementing a Bayesian machine using a non-volatile memristor cross-array circuit, this invention avoids the use of a large number of gate circuits and pseudo-random number generators, thereby reducing computational costs. It has wide applicability, the ability to perform complex tasks, and can complete tasks such as multi-class image recognition.
[0026] 2. This invention avoids numerical underflow during the calculation process by using nonlinear transformation of the voltage-probability curve in probability calculation, thus significantly improving the accuracy and efficiency of Bayesian machines in the inference process; and realizes the inference process based on Bayes' formula through a cross array circuit structure, avoiding the use of circuit devices such as multipliers. Attached Figure Description
[0027] Figure 1 This is a schematic diagram of voltage-probability modulation of an input image in an embodiment of the present invention;
[0028] Figure 2 This is an optical diagram of a diffused memristor in an embodiment of the present invention;
[0029] Figure 3 This is a voltage-probability curve of the diffused memristor before and after nonlinear transformation in an embodiment of the present invention;
[0030] Figure 4 This is a schematic diagram of the diffused memristor cross array circuit structure in an embodiment of the present invention;
[0031] Figure 5 This is a comparison chart of the recognition accuracy before and after nonlinear transformation of the voltage-probability curve in an embodiment of the present invention. Detailed Implementation
[0032] To enable those skilled in the art to better understand the present invention and to make the above-mentioned objectives, features and advantages of the present invention clearer and easier to understand, the present invention will be further described in detail below with reference to embodiments.
[0033] The image classification method based on Bayesian machine hardware with diffused memristors of the present invention is characterized by comprising:
[0034] Step 1) Prepare several diffused memristors to construct a cross array circuit structure, and use each diffused memristor in the cross array circuit structure as a probability bit of Bayesian machine hardware to realize voltage-probability modulation. In fabricating a diffused memristor, a pattern is first created on one side of a silicon substrate using photolithography, preserving the positions of bit lines, etc. Then, at the patterned location, a titanium (Ti) and platinum (Pt) metal layer are deposited sequentially using sputtering, with thicknesses ranging from 1 to 40 nm. Next, an aluminum oxide (Al₂O₃) dielectric layer with a thickness of 7 to 20 nm is fabricated on the platinum Pt metal using atomic layer deposition (ALD). Finally, a silver (Ag) and gold (Au) metal layer are sequentially fabricated on the Al₂O₃ dielectric layer using thermal evaporation and lift-off processes, with thicknesses ranging from 20 to 40 nm. The titanium (Ti), platinum (Pt), Al₂O₃, and silver (Ag) metal layers are used together as the bottom electrode, and the gold (Au) metal layer is used as the top electrode, ultimately producing an Au / Ag / Al₂O₃ / Pt / Ti diffused memristor.
[0035] Au / Ag / Al2O3 / Pt / Ti diffused memristors are fabricated using an anodic oxidation process. They exhibit fluctuating threshold switching characteristics within the switching voltage range. In diffused memristors, when the compliance current is 1 nA, applying an external voltage of 5-10 V causes silver particles to move and form a conduction channel, switching the diffused memristor from an initial high-resistivity state to a low-resistivity state. The current increases by several orders of magnitude. After removing the external voltage, the diffused memristor quickly recovers to the initial high-resistivity state within a time less than a preset time threshold to continue the voltage-probability modulation process. Because nanoparticles remain on both sides of the electrodes of the diffused memristor, it can easily switch to a low-resistivity state when the applied voltage is within the probability switching range. During image classification, the modulation voltage obtained after voltage-probability modulation is within the probability switching range of the diffused memristor, which is as low as 0.07-0.14 V.
[0036] In probability calculations, the probability bit, which changes over time, remains either "0" or "1". A diffused memristor is used as the probability bit to achieve voltage-probability modulation to generate the input signal. The modulated signal is then input into a cross-array structure of memristors to perform the probability calculation. When the applied modulation pulse voltage is within the probability switching range of the diffused memristor, the memristor will randomly turn on. The switching voltage-probability curve is obtained based on statistical data of the device's on-time.
[0037] The probabilistic bit structure composed of diffused memristors exhibits characteristics similar to random Hopfield networks. Its behavior is similar to binary random neurons in neuromorphic computing systems, which corresponds to being on or off in the memristor.
[0038] The cross-array circuit structure also includes I bit lines, N word lines, and I probability lines. The word lines are arranged horizontally in parallel intervals, and the bit lines and probability lines are arranged vertically in parallel intervals. Each probability line is located between two adjacent bit lines. Each word line is arranged perpendicularly to each bit line and probability line. A diffused memristor and a transistor are placed in the rectangular area formed between each pair of adjacent bit lines and each pair of adjacent word lines, thus forming an array unit. For each array unit, the bottom electrode of the diffused memristor is connected to the bit line shared with the previous array unit in the current row, and the top electrode of the diffused memristor is connected to the word line shared with the previous array unit in the current column. The transistor is connected between the probability line and the bit line to which the diffused memristor is connected. One end of each word line and bit line is connected to a pulse generator, and one end of each word line receives a pulse input voltage. The other end of each word line is connected sequentially to the diffused memristor in the last array unit of each row. The other end of each bit line serves as the output terminal, and both ends of each probability line are connected to a pulse receiving module. Arranged according to the row and column single-transistor-one-memristor 1T1R (one-transistor-one-memristor) cell architecture.
[0039] Step 2) Obtain several reference images with preset category labels and construct an image dataset. Statistically calculate the prior and conditional probabilities of the binarized brightness of each pixel in each reference image in the image dataset for subsequent test set image classification. The number of preset categories is the same as the number of bit lines and probability lines in the cross-array circuit structure; each image has its own preset category. The number of rows of pixels in each image is the same as the number of word lines in the cross-array circuit structure. Each reference image has its own preset category label, meaning each pixel in each reference image has the same preset category label. After binarizing the brightness of each pixel in each reference image, obtain the binarized brightness. For each reference image under each preset category, statistically calculate the prior and conditional probabilities of the binarized brightness of each pixel in each reference image.
[0040] Step 3) Based on the prior and conditional probabilities of each reference image under each preset category obtained in Step 2), the image to be classified is voltage-probability modulated and processed using a nonlinear transformation method to obtain the modulation voltage to be classified. This modulation voltage is then input into a cross-array circuit structure, and the image is classified according to the number of times the cross-array circuit structure is turned on. First, the binarized brightness of each pixel in the image to be classified is calculated. Based on the prior and conditional probabilities of each reference image under each preset category obtained in Step 2), the classification probability of each pixel belonging to each preset category is obtained. The initial switching voltage-probability curve of the diffused memristor is nonlinearly transformed to obtain an updated switching voltage-probability curve, as follows:
[0041]
[0042] Where G() is the updated switching voltage-probability curve, i.e., the classification probability of the preset category; a and p are the first and second range limiting parameters in the nonlinear transformation process, respectively; V d The modulation voltage, after normalizing the probabilistic switching range of the diffused memristor, is then input to the corresponding word line of the memristor cross array.
[0043] The modulation voltage of each pixel in the image to be classified is obtained based on the updated switching voltage-probability curve. For each preset category, a preset number of classification recognitions are performed. For each classification recognition, the modulation voltage of each row of pixels in the image to be classified is first input into its respective word line in sequence. At the same time, the column selection pulse emitted by the pulse generator is input into the bit line corresponding to the current preset category, so that a voltage difference is formed between the word line and the bit line. The pulse receiving module saves the number of times the probability line connected to the same diffused memristor as the current bit line is turned on, until the preset number of classification recognitions is completed, and the total number of times the current probability line is turned on is obtained. Finally, the number of times the probability line under each preset category is obtained, and the preset category to which the probability line with the most turns on belongs is taken as the category of the current image. The final image classification is achieved based on the probability comparison of all bit lines.
[0044] By performing a nonlinear transformation on the switching voltage-probability curve of a diffused memristor to obtain a new switching voltage-probability curve, numerical underflow during the calculation process can be avoided, thereby improving both calculation accuracy and efficiency.
[0045] During operation, when one bit line of a diffused memristor is working in forward voltage mode, all other bit lines are subjected to reverse voltage, so that the diffused memristor always maintains a probabilistic switching operation mode.
[0046] When the probability line is on, all diffused memristors connected to the current column of the current probability line are turned on. During operation, the final on-state of the diffused memristors is as follows:
[0047]
[0048] Where, p m For the final turn-on state of the m-th diffused memristor, p m =0 means not enabled, p m =1 indicates that it is enabled; u() is the binary step function; V md The modulation voltage for the m-th diffused memristor is input; V o V is the boundary voltage of the probability switch range. S The default voltage is 'rand'; 'rand' is the default random term. In order to satisfy the probability switching characteristics of the probability bit, the 'rand' term is introduced to define the random state of the probability bit each time it is turned on.
[0049] The probabilistic computation framework of Bayesian machines perfectly aligns with the characteristics of cross-arrays based on diffused memristors. Based on the probability and likelihood coefficient of an event occurring at a previous time step, the posterior probability of the event occurring when the observed value is present can be estimated. In practical applications, each input feature value is usually considered conditionally independent; therefore, the Bayesian rule can be simplified to:
[0050] p(X=x|O1,O2,O3,…,O n )=p(X=x)×p(O1|X=x)×p(O2|X=x)…×p(O n |X=x)
[0051] Wherein, the probability of the event occurring at a previous time is the prior probability p(X=x), and the likelihood coefficient is p(O1,O2,O3,…,O2). n O1, O2, O3, ..., O n Let p(X=x|O1,O2,O3,…,O) be the observed value of the event, and let p(X=x|O1,O2,O3,…,O) be the observed value of the event. n Let be the posterior probability of event X = x given the above observations.
[0052] During the classification and recognition process, the other end of each bit line outputs the probability of the current image belonging to one of the preset categories, as follows:
[0053]
[0054] Where Q() is the posterior probability, i.e., the probability that the pixel values of the input image are P1, P2, ..., P3 respectively. NWhen x = q, the probability of the final classification result being q; x = q represents the final classification result being q, which in the image classification process represents the specific category to which the image is classified; P1, P2, ..., P n ... P N These are the pixel values of the current input image, which, after modulation, correspond to the input voltage differences between the 1st, 2nd, ..., nth, ..., Nth word lines and bit lines, respectively. These represent the switching states of the 1st, 2nd, ..., nth, ..., Nth diffused memristors under the pulse on the z-th word line.
[0055] Based on the probabilistic multiplication characteristic of diffused memristor cross-arrays, when the pulse generator sends n positive voltage pulses to each word line, the pulse receiving module at the end of the probability line can store the number of times each probability line is turned on. This process is equivalent to obtaining the final posterior probability through Bayes' theorem hardware calculation. Finally, the final number of turns on for each probability line is compared, and the category with the highest probability is taken as the classification result.
[0056] like Figure 2 As shown, the Au / Ag / Al2O3 / Pt / Ti diffused memristor prepared according to the present invention is prepared by first obtaining a silicon substrate with electrodes on both sides, and then patterning the silicon substrate using photolithography. Then, a 3nm titanium (Ti) metal layer and a 40nm platinum (Pt) metal layer are deposited sequentially using sputtering. Next, an aluminum oxide (Al2O3) dielectric layer with a thickness of 10nm is prepared on the platinum Pt metal using atomic layer deposition (ALD). Finally, a 40nm silver (Ag) metal layer and a 20nm gold (Au) metal layer are prepared sequentially on the aluminum oxide (Al2O3) dielectric layer using thermal evaporation and lift-off processes. The Au / Ag / Al2O3 / Pt / Ti diffused memristor is thus obtained.
[0057] This embodiment addresses the task of handwritten digit recognition, using the large handwritten digit database MNIST (Modified National Institute of Standards and Technology) collected and organized by the National Institute of Standards and Technology (NIST). The dataset consists of 60,000 training images, each composed of 28×28 binarized pixels, and is preprocessed by computer. In the Bayesian machine based on a diffused memristor cross-array circuit of this invention, the diffused memristor is used as the probability bit for probability calculation. First, the input image needs to be modulated using a voltage-probability curve. After normalizing the grayscale values of the image pixels, the input pulse voltage, i.e., the modulation voltage, is obtained. Figure 1As shown. Measurements were performed on an Au / Ag / Al₂O₃ / Pt / Ti diffused memristor at room temperature using a probe station equipped with an FS480 semiconductor parameter analyzer. The voltage-probability curve and the curve after nonlinear transformation of the diffused memristor are shown below. Figure 3 As shown, based on this probability-voltage curve, the prior probability and conditional probability corresponding to the gray values of different pixels in the image can be modulated into voltage; the corresponding probability of the curve after nonlinear transformation at low voltage is also improved, effectively avoiding zero underflow and improving computational efficiency.
[0058] The diffused memristor cross array circuit structure used in this invention is as follows: Figure 4 As shown, the circuit includes a 1T1R layer, word lines, bit lines, and probability lines. According to the sequential circuit logic, square wave pulses are input to the word lines and bit lines to create a voltage difference. Based on the random switching characteristics of the diffused memristor, each probability bit corresponds to a priori probability or conditional probability. When all diffused memristors on a bit line switch to a low-resistance state, the corresponding transistor is fully turned on, and the corresponding probability line of that bit line will be fully conductive. However, continuous random switching behavior can damage the diffused memristor, causing it to lose its probabilistic switching capability and become a regular resistor. To prevent this, when one bit line operates in forward voltage mode, all other bit lines are subjected to reverse voltage, ensuring that the diffused memristor always maintains its probabilistic switching operation mode.
[0059] like Figure 5 The figure shows a comparison of the accuracy of the Bayesian machine of this invention in classifying the large handwritten digit database MNIST before and after performing a nonlinear transformation on the voltage-probability curve. Based on the probability calculation method of this invention, the recognition rates are 66.3%, 76.7%, 80.6%, 83.2%, and 84.4% for diffused memristor cross array sizes of 5×5, 7×7, 9×9, 14×14, and 28×28, respectively. Compared with the Bayesian machine without a nonlinear transformation in the modulation process, the accuracy is improved by 1.1%, 0.4%, 0.6%, 0.5%, and 0.4%, respectively. Compared with traditional probability calculation methods, this invention has the computational power to handle complex tasks and has achieved the classification task of the large handwritten digit database MNIST, which proves the effectiveness of this invention.
[0060] Furthermore, for those skilled in the art, the steps in the embodiments described in this invention, whether all or part, can be implemented by programming instructions to corresponding hardware devices. The corresponding control program can be stored in various computer-readable media, such as, but not limited to, read-only memory, hard disks, or optical discs.
[0061] The above embodiments are implementations of the present invention, but the implementations of the present invention are not limited to the described embodiments. Any changes, modifications, substitutions, or combinations made without departing from the spirit and principle of the present invention, and any simplifications, should be considered equivalent substitutions and are included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined in the claims.
Claims
1. An image classification method based on Bayesian machine hardware with diffused memristors, characterized in that, include: Step 1) Prepare several diffused memristors to construct a cross array circuit structure, and use each diffused memristor in the cross array circuit structure as a probability bit of the Bayesian machine hardware. Step 2) Obtain several reference images with preset category labels and construct an image dataset. Statistically analyze the binarized brightness of each pixel in each reference image in the image dataset to obtain the prior probability and conditional probability of the image dataset. Step 3) Based on the prior probability and conditional probability of each reference image under each preset category obtained in Step 2), the image to be classified is subjected to voltage-probability modulation and processed by nonlinear transformation method to obtain the modulation voltage to be classified. The modulation voltage to be classified is input into the cross array circuit structure, and the image is classified according to the number of times the cross array circuit structure is turned on.
2. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 1, characterized in that: In step 1), when fabricating the diffused memristor, a pattern is first created on one side of a silicon substrate using photolithography. Then, at the patterned location, a titanium (Ti) metal layer and a platinum (Pt) metal layer are deposited sequentially using sputtering. The thickness of both the titanium (Ti) and platinum (Pt) metal layers ranges from 1 to 40 nm. Next, an aluminum oxide (Al2O3) dielectric layer with a thickness of 7 to 20 nm is fabricated on the platinum (Pt) metal using atomic layer deposition (ALD). Finally, a silver (Ag) metal layer and a gold (Au) metal layer are fabricated sequentially on the aluminum oxide (Al2O3) dielectric layer using thermal evaporation and lift-off processes. The thickness of both the silver (Ag) and gold (Au) metal layers ranges from 20 to 40 nm. The titanium (Ti) metal layer, the platinum (Pt) metal layer, the aluminum oxide (Al2O3) dielectric layer, and the silver (Ag) metal layer are used together as the bottom electrode, and the gold (Au) metal layer is used as the top electrode, thus finally obtaining the Au / Ag / Al2O3 / Pt / Ti diffused memristor.
3. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 1, characterized in that: In step 1), when the compliance current is 1nA, an external voltage of 5-10V is applied to the diffused memristor, causing it to switch from an initial high-resistivity state to a low-resistivity state. After the external voltage is removed, the diffused memristor recovers to the initial high-resistivity state within a time less than a preset time threshold to continue the voltage-probability modulation process. When performing image classification, the modulation voltage obtained after voltage-probability modulation is within the probability switching range of the diffused memristor, which is 0.07-0.14V.
4. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 1, characterized in that: In step 1), the cross-array circuit structure further includes I bit lines, N word lines, and I probability lines. The word lines are arranged horizontally in parallel intervals, and the bit lines and probability lines are arranged vertically in parallel intervals. Each probability line is located between two adjacent bit lines. Each word line intersects each bit line and probability line perpendicularly. A diffused memristor and a transistor are placed in the rectangular region formed between every two adjacent bit lines and every two adjacent word lines, thus forming an array unit. For each array unit, the bottom electrode of the diffused memristor is connected to the current... On the bit line shared with the previous array cell in the row, the top electrode of the diffused memristor is connected to the word line shared with the previous array cell in the current column. The transistor is connected between the probability line and the bit line to which the diffused memristor is connected. One end of each word line and bit line is connected to a pulse generator, and one end of each word line receives a pulse input voltage. The other end of each word line is connected to the diffused memristor in the last array cell of each row in sequence. The other end of each bit line serves as the output terminal, and both ends of each probability line are connected to the pulse receiving module.
5. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 4, characterized in that: In step 2), the number of preset categories is the same as the number of bit lines and probability lines in the cross array circuit structure, and each image has its own preset category; the number of rows of pixels in each image is the same as the number of word lines in the cross array circuit structure.
6. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 4, characterized in that: In step 2), each reference image has its own preset category label, that is, each pixel in each reference image has the same preset category label. The brightness of each pixel in each reference image is binarized to obtain the binarized brightness. For each reference image under each preset category, the prior probability and conditional probability of the binarized brightness of each pixel in each reference image are statistically obtained.
7. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 4, characterized in that: In step 3), the binarized brightness of each pixel in the image to be classified is first determined. Based on the prior probability and conditional probability of each reference image under each preset category obtained in step 2), the classification probability of each pixel belonging to each preset category is obtained. The initial switching voltage-probability curve of the diffused memristor is nonlinearly transformed into an updated switching voltage-probability curve, as follows: Where G() is the updated switching voltage-probability curve, i.e., the classification probability of the preset category; a and p are the first and second range limiting parameters in the nonlinear transformation process, respectively; V d The modulation voltage is the normalized modulation voltage for the probabilistic switching range of the diffused memristor. The modulation voltage of each pixel in the image to be classified is obtained based on the updated switching voltage-probability curve. For each preset category, a preset number of classification recognitions are performed. For each classification recognition, the modulation voltage of each row of pixels in the image to be classified is first input into its respective word line in sequence. At the same time, the column selection pulse emitted by the pulse generator is input into the bit line corresponding to the current preset category, so that a voltage difference is formed between the word line and the bit line. The pulse receiving module saves the number of times the probability line connected to the same diffused memristor as the current bit line is turned on, until the preset number of classification recognitions is completed, and the total number of times the current probability line is turned on is obtained. Finally, the number of times the probability line under each preset category is obtained, and the preset category to which the probability line with the most turns on belongs is taken as the category of the current image.
8. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 7, characterized in that: During operation, when one bit line of the diffused memristor is working in a positive voltage mode, all other bit lines are subjected to a reverse voltage, so that the diffused memristor always maintains a probabilistic switching working mode.
9. The image classification method based on Bayesian machine hardware with diffused memristors according to claim 7, characterized in that: When the probability line is turned on, all diffused memristors connected to the current column of the current probability line are turned on. During operation, the final on state of the diffused memristors is as follows: Where, p m For the final turn-on state of the m-th diffused memristor, p m =0 means not enabled, p m =1 indicates that it is enabled; u() is the binary step function; V md The modulation voltage for the m-th diffused memristor is input; V o V is the boundary voltage of the probability switch range. S is the preset scaling voltage; rand is the preset random item.
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