Bonding-wire-free full-gasket interconnection SiC power module packaging structure and preparation method

By adopting a bondless wire-free full-shield interconnection packaging structure in the SiC power module, using gaskets to replace traditional copper or aluminum wire bonding, and through double-sided heat dissipation design, traditional SiC power devices have solved the problems of high parasitic inductance and complex packaging structure processes and high cost, achieving higher power levels and reliability.

CN120072783AActive Publication Date: 2025-05-30新硅能微电子(苏州)有限公司

Patent Information

Application Number
CN202411759110.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-03
Publication Date
2025-05-30
Estimated Expiration
2044-12-03

AI Technical Summary

Technical Problem

Traditional silicon carbide (SiC) power devices have problems such as high parasitic inductance, large losses, complex structure and high cost.

Method used

A bondless wire-free full-shield interconnected SiC power module packaging structure is designed, and power pole gaskets and signal pole gaskets replace traditional copper or aluminum wire bonding. They are sintered and fixed between the lower substrate and the upper substrate to achieve double-sided heat dissipation.

Benefits of technology

The parasitic inductance inside the module is significantly reduced, the power level and reliability of the power module are improved, the better electrical characteristics are achieved, and the preparation cost of the packaging structure is reduced.

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Abstract

The invention discloses a bonding-wire-free full-gasket interconnection SiC power module packaging structure and a preparation method, the packaging structure comprises a lower substrate, an upper substrate, chips, power laminated terminals, driving signal terminals, power pole gaskets, signal pole gaskets and support gaskets, the plurality of driving signal terminals are sintered and fixed on the lower substrate corresponding to the chips, and the plurality of driving signal terminals are sintered and fixed on the lower substrate corresponding to the chips. The upper substrate is fixed on the power pole gasket, the signal pole gasket and the support gasket through secondary reflow soldering and sintering; the preparation method comprises the steps of welding the chip, positioning the terminals, the gaskets and the lower substrate, welding and fixing the terminals, the gaskets and the lower substrate, positioning the lower substrate and the upper substrate, and welding the lower substrate and the upper substrate. According to the scheme, a novel packaging technology which is suitable for the requirements of small size, high power density and the like, easy to dissipate heat and low in parasitic inductance is provided, better stability and reliability are achieved, the preparation cost of the packaging structure can be reduced, the process design is reasonable, and the yield is high.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices and their packaging, and particularly to a wire-bondless full spacer interconnect SiC power module packaging structure and a preparation method thereof. Background Art

[0002] The statements in this part merely provide background technical information related to the present application and do not necessarily constitute prior art.

[0003] Silicon carbide (SiC) power devices have advantages such as high voltage, high temperature, and high speed, which can enable power electronic equipment to develop towards higher power density, higher efficiency, and higher operating temperature. However, most silicon carbide (SiC) power devices still use the packaging structures and processes of Si-based devices, making it difficult to fully utilize the potential of silicon carbide (SiC) devices.

[0004] Generally, the interconnecting material between the chip source electrode and the substrate of a power device is aluminum wire or copper wire, and the interconnecting material between the chip gate or Kelvin electrode and the substrate is aluminum wire with a thickness of 6 - 10 miu. The bonding process is difficult and prone to breakage. Copper wire bonding requires a copper foil (DTS) to be attached to the chip surface, making the manufacturing more difficult. At the same time, this traditional wire bonding connection method results in dozens or hundreds of bonding points on the chip and the substrate. The detachment of a single bonding point directly affects the reliability of the module.

[0005] Chinese Patent CN 116613129 A (A Wire-Bondless New Packaging Structure and Packaging Method for Silicon Carbide Devices) discloses a wire-bondless new packaging structure and packaging method for silicon carbide devices, including a chip, a bottom copper bonding and sealing layer, high-temperature glass fiber, electrode copper posts, peripheral copper posts, a top copper foil, and epoxy resin. Although this patent has made beneficial improvements in not using wire bonds and obtaining low inductance and achieved positive effects, there are still obvious deficiencies in the packaging method and packaging process. For example, its preparation method is complex and requires positioning based on a special mold. The dot matrixes need to be formed by laser drilling, and its preparation process is complex. Laser drilling on the module requires relevant laser equipment, resulting in a high preparation cost.

[0006] Chinese Invention Patent CN 109661723 A (Semiconductor Package with Double-Sided Heat Dissipation Structure) provides a semiconductor package with a double-sided heat dissipation structure, and a metal part is provided to quickly conduct the high temperature generated from the semiconductor chip to the substrates respectively exposed to the upper surface and the lower surface of the package. The metal part is bonded to the substrate by ultrasonic welding and by an adhesive; although this patent has made beneficial improvements in heat dissipation performance and achieved positive effects, the driving signal of its gate still adopts the packaging method in the form of aluminum bonding wires, which has a larger parasitic inductance compared with the wireless bonding package.

[0007] In view of this, it is urgently necessary to design a wire-bondless full-gasket interconnection SiC power module packaging structure, a new packaging technology that is suitable for requirements such as small size and high power density, and is easy to dissipate heat and has low parasitic inductance. Summary of the Invention

[0008] The purpose of the present invention is to provide a wire-bondless full-gasket interconnection SiC power module packaging structure and a preparation method.

[0009] To achieve the above purpose, the technical solution adopted in the first aspect of the present invention is: to propose a wire-bondless full-gasket interconnection SiC power module packaging structure, the packaging structure includes a lower substrate, an upper substrate, a chip, a power laminated terminal, a driving signal terminal, a power pole gasket, a signal pole gasket, and a support gasket.

[0010] Etching grooves for forming a current flow path are formed on the lower substrate and the upper substrate by etching.

[0011] The upper surface of the lower substrate has a plurality of printing areas, and a printing layer is printed in each of the printing areas.

[0012] A plurality of the chips are sintered and fixed on each of the printing layers correspondingly.

[0013] The power laminated terminal includes a first power terminal, a second power terminal, and a third power terminal. The first power terminal and the second power terminal are laminated structures. The first power terminal and the second power terminal are sintered and fixed on the same side of the lower substrate and the upper substrate respectively, and the third power terminal is sintered and fixed on the other side of the lower substrate.

[0014] A plurality of the driving signal terminals are sintered and fixed on the lower substrate corresponding to each of the chips.

[0015] The power pole gasket is sintered between the source electrode of the chip and the etching groove on the lower surface of the upper substrate.

[0016] The signal pole gasket is sintered between the driving electrode of the chip and the etching groove on the lower surface of the upper substrate, and the signal pole gasket is electrically connected to the gate electrode and the Kelvin electrode on the chip.

[0017] The support gasket is a support structure for supporting the lower substrate and the upper substrate. The support gasket is located in an area outside the etching trench and the printing area, and the support gasket is sintered and fixed between the lower substrate and the upper substrate.

[0018] The upper substrate is sintered and fixed on the power pole gasket, the signal pole gasket, and the support gasket through secondary reflow soldering.

[0019] To achieve the above object, the technical solution adopted in the second aspect of the present invention is: to propose a preparation method for a wire-bonding-free all-gasket interconnected SiC power module packaging structure for the preparation of the all-gasket interconnected SiC power module packaging structure in the first aspect of the present invention. The preparation method includes: S100, welding the chip. A printing layer for sintering and welding is printed on the lower substrate. After placing the chip on the printing layer, the chip is sintered and fixed on the printing layer correspondingly.

[0020] S200, positioning each terminal, gasket and the lower substrate. The lower substrate with the chip fixed is placed in a first reflow soldering fixture. The first power terminal, the third power terminal, the drive signal terminal, the power pole gasket, the signal pole gasket, and the support gasket are placed at corresponding positions of the lower substrate and the chip correspondingly, and there is a first reflow solder between each terminal, gasket and the lower substrate and the chip. Among them, the first power terminal is placed forward.

[0021] S300, welding and fixing each terminal, gasket and the lower substrate. The first reflow soldering fixture with each terminal, gasket and the lower substrate positioned is subjected to first reflow soldering.

[0022] S400, positioning the lower substrate and the upper substrate. First, the lower substrate is placed in a second reflow soldering fixture, and a second reflow solder is applied to the support gasket of the lower substrate. Then, the upper substrate welded with the second power terminal placed reversely is placed on the second reflow soldering fixture correspondingly.

[0023] S500, welding the lower substrate and the upper substrate. The second reflow soldering fixture with the lower substrate and the upper substrate positioned is subjected to second reflow soldering, and the upper substrate is welded to the support gasket.

[0024] The relevant content of the present invention is explained as follows: 1. In the implementation of the above technical solution of the present invention, aiming at the problems of high parasitic inductance and large losses existing in traditional silicon carbide (SiC) power devices, as well as the complex process and high cost existing in conventional wire-bondless packaging structures, a wire-bondless full gasket interconnection SiC power module packaging structure and a preparation method thereof are innovatively designed; in the technical solution of the packaging structure, power pole gaskets and signal pole gaskets are used to replace the existing copper wire or aluminum wire bonding packaging method, which can greatly reduce the parasitic inductance inside the module, make the SiC power module have lower parasitic inductance, can carry a larger current rating, can increase the power rating of the power module, improve the reliability of the power module, achieve more excellent electrical characteristics. At the same time, sintering and fixing between the lower substrate and the upper substrate through gaskets are adopted, so that the packaging structure has the performance of double-sided heat dissipation, fully exerts the high-temperature characteristics of SiC power devices, and this fixing method makes the bonding strength between the lower substrate and each gasket, and between the upper substrate and each gasket high, and device delamination will not occur in their respective usage environments, thus having better stability and reliability. In the preparation method of this packaging structure, in order to achieve the purpose of saving preparation costs, making the module preparation process more reasonable, and making the prepared packaging structure more stable, process flows such as S100 welding the chip, S200 positioning each terminal, gasket and lower substrate, S300 welding and fixing each terminal, gasket and lower substrate, S400 positioning the lower substrate and the upper substrate, and S500 welding the lower substrate and the upper substrate are designed. These process flows are scientific and reasonable, the equipment cost used is low, the preparation cost of this packaging structure can be reduced, the process design is reasonable, and the yield rate is high. When welding each terminal, gasket and lower substrate, a one-time reflow soldering fixture is used for positioning and fixing, and when welding the lower substrate and the upper substrate, a two-time reflow soldering fixture is used for positioning and fixing to ensure the accurate position of each component without deviation, improve product quality. One-time reflow soldering is used for welding each terminal, gasket and lower substrate, and two-time reflow soldering is used for welding the lower substrate and the upper substrate to effectively ensure the stability of each terminal and gasket and avoid delamination of the packaging structure. The above solution of the present invention provides a new packaging technology that is easy to dissipate heat and has low parasitic inductance for requirements such as small size and high power density, and has better stability and reliability, can reduce the preparation cost of this packaging structure, the process design is reasonable, and the yield rate is high.

[0025] 2. In the technical solution of the first aspect above, both the lower substrate and the upper substrate adopt double-sided copper-clad ceramic substrates, and the power terminals and signal terminals are sintered on the copper layer of the lower substrate through solder, so as to provide high thermal conductivity, good chemical and mechanical properties for the SiC power module, and also provide low resistivity and excellent current-carrying capacity.

[0026] 3. In the technical solution of the first aspect described above, the first power terminal and the second power terminal are of the same h-shaped structure. The h-shaped structure has a first leg on one side and two second legs on the other side. In the encapsulated state, the first power terminal is placed forward, and the second power terminal is placed backward, so that the two second legs of the first power terminal and the second power terminal overlap, and the first legs of the first power terminal and the second power terminal are misaligned, thereby forming a stacked structure of the first power terminal and the second power terminal. This specially designed stacked structure further helps to reduce the parasitic inductance, is convenient for positioning and welding in the manufacturing process, and can also reduce the manufacturing cost.

[0027] 4. In the technical solution of the first aspect described above, the two second legs on the first power terminal and the second power terminal have welding areas on the same surface. After the first power terminal is sintered and fixed on the lower substrate, the welding area on the first power terminal faces upward. After the second power terminal is sintered and fixed on the lower substrate, the welding area on the second power terminal faces downward. The welding area on the first power terminal is welded in alignment with the welding area on the second power terminal. In this way, the bonding strength between the first power terminal and the second power terminal of the stacked structure is improved, ensuring that the stacked structure can effectively reduce the parasitic inductance.

[0028] 5. In the technical solution of the first aspect described above, the first power terminal, the second power terminal, and the third power terminal are a DC+ power terminal, a DC- power terminal, and an AC power terminal respectively. And holes for connecting the power supply and the load are provided at the outer ends of the first power terminal, the second power terminal, and the third power terminal, so as to enable the power module to better realize its function. Among them, the power terminal DC+ and the signal terminal are sintered on the double-sided copper-clad ceramic substrate (lower substrate) below, the power terminal DC- is sintered on the double-sided copper-clad ceramic substrate (upper substrate) above, and the power terminal DC+ and the power terminal DC- together form a stacked structure. The way of providing holes for connecting the power supply and the load at the outer ends of the first power terminal, the second power terminal, and the third power terminal makes the connection between the power module and the external power supply and load more convenient.

[0029] 6. In the technical solution of the first aspect described above, the signal pole gaskets include a gate gasket and a Kelvin pole gasket. The gate gasket is connected to the gate on the chip, and the Kelvin pole gasket is connected to the Kelvin pole on the chip. In this way, the purpose that the connections between the chip and each pin and terminal do not use bonding wires and only use gaskets is achieved, further reducing the parasitic inductance inside the module and further improving the power level of the power module.

[0030] 7. In the technical solution of the second aspect described above, in step S100 of welding the chip, the following steps are included: S110. Print the silver paste on the printing area of the lower substrate through a printing machine to form a printed layer; S120. Dry the silver paste in a vacuum oven at 120 - 130 °C for 15 - 20 minutes; S130. Attach the chip onto the silver paste surface of the printed layer through a chip mounter; S140. Sinter the chip at 240 - 260 °C and 15 - 20 Mpa for 4 - 6 minutes through a pressure silver sintering process.

[0031] Use the above process to sinter the chip better onto the lower substrate, making the packaging structure highly stable, further improving product quality, and avoiding delamination.

[0032] 8. In the technical solution of the second aspect above, in step S200 of positioning each terminal, gasket, and lower substrate, the first reflow solder uses Sn5Pb95. In step S400 of positioning the lower substrate and the upper substrate, the second reflow solder uses Sn96.5Ag3.0Cu0.5. The melting point of the first reflow solder is higher than that of the second reflow solder. In this way, it is ensured that during the second reflow soldering process, the solder of the first reflow soldering does not melt.

[0033] 9. In the technical solution of the second aspect above, in step S300 of welding and fixing each terminal, gasket, and lower substrate, a first reflow soldering process is used, and the process parameters include: the temperature range is 280 °C - 320 °C, and the time is 20 minutes - 25 minutes; In step S500 of welding the lower substrate and the upper substrate, a second reflow soldering process is used, and the process parameters include: the temperature range is 210 °C - 250 °C, and the time is 20 minutes - 25 minutes.

[0034] With this process, it is ensured that during the first reflow soldering process and the second reflow soldering process, the product quality is higher, the void ratio is reduced, and the welded packaging structure is more stable and firm, so as to further effectively ensure the stability of each terminal and gasket, and further avoid delamination of the packaging structure.

[0035] 10. In the technical solution of the second aspect above, in step S200 of positioning each terminal gasket and lower substrate, the first reflow soldering fixture used includes a first fixture bottom plate and a first fixture clamping plate. The first fixture bottom plate is provided with a first positioning groove for positioning the lower substrate, the first power terminal, and the third power terminal. After closing the first fixture clamping plate, a second positioning groove for positioning the drive signal terminal is formed between the first fixture bottom plate and the first fixture clamping plate; In step S400 of positioning the lower substrate and the upper substrate, the secondary reflow soldering fixture used includes a secondary fixture body. A third positioning groove for positioning the lower substrate, the first power terminal, and the third power terminal is formed on the secondary fixture body. Positioning posts for positioning the upper substrate are arranged at the four corners of the third positioning groove.

[0036] In this solution, the primary reflow soldering fixture and the secondary reflow soldering fixture are also redesigned accordingly, so that the packaging structure adopting the full spacer interconnection design can be efficiently produced in a preparation process with low cost and high yield. The structure of the fixture is ingenious and simple, with low cost, easy to implement, and easy to operate.

[0037] 11. In the present invention, unless otherwise clearly defined and limited, terms such as "installation", "connection", "connection", "fixation", etc. shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium. It can be the internal communication of two components or the interaction relationship between two components, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0038] 12. In the present invention, the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "axial direction", "bottom", "inner", "outer", etc. is based on the orientation or positional assembly relationship shown in the drawings. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to this application.

[0039] 13. In addition, terms such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of this application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0040] Due to the application of the above technical solutions, the present invention has the following advantages compared with the prior art: 1. The present invention innovatively designs a wire - bond - free full - spacer interconnection SiC power module packaging structure and its manufacturing method in view of the problems existing in traditional silicon carbide (SiC) power devices, such as high parasitic inductance, large losses, and the complex process and high cost of conventional wire - bond - free packaging structures. Compared with wire - bonded structures, in a wire - bond - free power module, the current path can be made shorter and straighter through optimized design. Since the parasitic inductance is proportional to the area of the current loop, the wire - bond - free form significantly reduces the area of the current loop and decreases the parasitic inductance. In addition, the wire - bond - free design is usually accompanied by an optimized multi - layer packaging (such as the use of two double - sided copper - clad ceramic substrates in the present invention), further reducing the distance of the conduction circuit path and lowering the parasitic inductance.

[0041] 2. In the technical solution of the packaging structure of the present invention, the use of power - pole spacers and signal - pole spacers to replace the existing copper - wire or aluminum - wire bonding packaging method can greatly reduce the parasitic inductance inside the module, enabling the SiC power module to have lower parasitic inductance, a larger current - carrying capacity, an increased power rating of the power module, improved reliability of the power module, and more excellent electrical characteristics. At the same time, the lower substrate and the upper substrate are sintered and fixed through spacers, endowing the packaging structure with the performance of double - sided heat dissipation, giving full play to the high - temperature characteristics of SiC power devices. Moreover, this fixing method results in a high bonding strength between the lower substrate and each spacer, and between the upper substrate and each spacer, preventing device delamination from occurring in their respective usage environments, thus having better stability and reliability.

[0042] 3. In the manufacturing method of the packaging structure of the present invention, in order to achieve the goals of saving manufacturing costs, making the module manufacturing process more reasonable, and making the manufactured packaging structure more stable, the process flows of S100 welding the chip, S200 positioning each terminal, spacer, and lower substrate, S300 welding and fixing each terminal, spacer, and lower substrate, S400 positioning the lower substrate and the upper substrate, and S500 welding the lower substrate and the upper substrate are designed. These process flows are scientific and reasonable, with low equipment costs, which can reduce the manufacturing cost of this packaging structure. The process design is reasonable and the yield is high. When welding each terminal, spacer, and lower substrate, a one - time reflow soldering fixture is used for positioning and fixing, and when welding the lower substrate and the upper substrate, a two - time reflow soldering fixture is used for positioning and fixing to ensure the accurate position of each component without deviation, improving product quality. The welding of each terminal, spacer, and lower substrate uses one - time reflow soldering, and the welding of the lower substrate and the upper substrate uses two - time reflow soldering to effectively ensure the stability of each terminal and spacer and avoid delamination of the packaging structure.

[0043] 4. In summary, the above solution of the present invention provides a new packaging technology that is suitable for requirements such as small size and high power density, is easy to dissipate heat, and has low parasitic inductance. In the full gasket interconnection packaging method, the current path can be made shorter and straighter through optimized design. Since the parasitic inductance is proportional to the area of the current loop, the form without bonding wires significantly reduces the area of the current loop and reduces the parasitic inductance. The parasitic inductance is 6.3 nH, while the parasitic inductance of traditional double-sided water-cooled modules is usually about a dozen or dozens of nH, indicating that the packaging method of this module can effectively reduce the parasitic inductance and has certain reference significance for future packaging. At the same time, through its double-sided water-cooled heat dissipation structure, when the heat transfer coefficient is 2000 W / (m²·K), the average junction temperature of the chip is 156.5 °C, and the maximum junction temperature of the chip is 162.9 °C. It can be seen that the temperature uniformity error is about 4%, which well controls the chip temperature uniformity characteristics. In addition, the full gasket interconnection packaging design usually comes with an optimized multi-layer packaging, which further reduces the distance of the conduction circuit path, reduces the parasitic inductance, and has better stability and reliability. It can reduce the preparation cost of this packaging structure, with reasonable process design and high yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is an exploded view of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 2 is a schematic structural layout diagram of the power stack terminal and the drive signal terminal in the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 3 is a schematic structural layout diagram of the power pole gasket, the signal pole gasket, and the support gasket in the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 4 is a circuit topology diagram of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 5 is a schematic flow chart of the preparation method of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 6 is a schematic structural diagram of the first reflow soldering fixture used in the preparation method of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 7 is a schematic diagram of the use of the first reflow soldering fixture in the preparation method of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 8 is a schematic structural diagram of the second reflow soldering fixture used in the preparation method of the packaging structure of the wire-bondless full gasket interconnection SiC power module according to an embodiment of the present invention; Figure 9 Schematic diagram of the use of the secondary reflow soldering fixture in the preparation method of the wire-bonding-free full gasket interconnection SiC power module packaging structure according to the embodiment of the present invention.

[0045] In the above drawings: 1. Chip; 2. Lower substrate; 21. Printed layer; 3. Upper substrate; 4. Power laminated terminal; 41. First power terminal; 42. Second power terminal; 43. Third power terminal; 401. First leg; 402. Second leg; 403. Welding area; 5. Drive signal terminal; 6. Power pole gasket; 7. Signal pole gasket; 71. Gate gasket; 72. Kelvin pole gasket; 8. Support gasket; 9. Silver paste; 10. Tin-lead alloy solder; 11. First reflow soldering fixture; 111. First fixture bottom plate; 1111. First positioning groove; 112. First fixture clamping plate; 1121. Second positioning groove; 12. Secondary reflow soldering fixture; 121. Secondary fixture body; 1211. Third positioning groove; 1212. Positioning post. Specific embodiments

[0046] In order to make the above objects, features and advantages of the present application more obvious and understandable, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description in order to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0047] The present invention aims to solve the problems of high parasitic inductance and large loss existing in traditional silicon carbide (SiC) power devices, as well as the problems of complex process and high cost existing in conventional wire-bonding-free packaging structures. Therefore, a wire-bonding-free full gasket interconnection SiC power module packaging structure and a preparation method are innovatively designed to seek to make the SiC power module have lower parasitic inductance, a larger current-carrying capacity, an increased power level of the power module, improved reliability of the power module, and reduced preparation cost of the packaging structure.

[0048] Example 1, as Figures 1 to 4As shown in the figure, Embodiment 1 of the present invention proposes a wire-bondless full-gasket interconnection SiC power module packaging structure, and the packaging structure includes a lower substrate 2, an upper substrate 3, a chip 1, a power laminated terminal 4, a drive signal terminal 5, a power pole gasket 6, a signal pole gasket 7, and a support gasket 8.

[0049] Etching grooves for forming a current flow path are formed on the lower substrate 2 and the upper substrate 3 by etching.

[0050] The upper surface of the lower substrate 2 has a plurality of printing areas, and a printing layer 21 is printed in each of the printing areas.

[0051] A plurality of the chips 1 are sintered and fixed on each of the printing layers 21 correspondingly.

[0052] As Figure 2 As shown in the figure, the power laminated terminal 4 includes a first power terminal 41, a second power terminal 42, and a third power terminal 43. The first power terminal 41 and the second power terminal 42 are laminated structures. The first power terminal 41 and the second power terminal 42 are sintered and fixed on the same side of the lower substrate 2 and the upper substrate 3 respectively, and the third power terminal 43 is sintered and fixed on the other side of the lower substrate 2.

[0053] A plurality of the drive signal terminals 5 are sintered and fixed on the lower substrate 2 corresponding to each of the chips 1.

[0054] The power pole gasket 6 is sintered between the source electrode of the chip 1 and the etching groove on the lower surface of the upper substrate 3.

[0055] The signal pole gasket 7 is sintered between the drive electrode of the chip 1 and the etching groove on the lower surface of the upper substrate 3. The signal pole gasket 7 is electrically connected to the gate electrode and the Kelvin electrode on the chip 1.

[0056] The support gasket 8 is a support structure for supporting the lower substrate 2 and the upper substrate 3. The support gasket 8 is located in an area outside the etching groove and the printing area, and the support gasket 8 is sintered and fixed between the lower substrate 2 and the upper substrate 3.

[0057] The upper substrate 3 is sintered and fixed on the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 by secondary reflow soldering.

[0058] Through the implementation of the embodiments of the present invention, in the technical solution of the encapsulation structure, the power pole gasket 6 and the signal pole gasket 7 are used to replace the existing copper wire or aluminum wire bonding encapsulation method, which can greatly reduce the parasitic inductance inside the module, make the SiC power module have lower parasitic inductance, can carry a larger current rating, can increase the power rating of the power module, improve the reliability of the power module, and achieve more excellent electrical characteristics. At the same time, the sintering and fixing between the lower substrate 2 and the upper substrate 3 through the gasket are adopted, so that the encapsulation structure has the performance of double-sided heat dissipation, fully exerts the high-temperature characteristics of the SiC power device, and this fixing method makes the bonding strength between the lower substrate 2 and each gasket, and between the upper substrate 3 and each gasket high, and the device delamination will not occur in their respective use environments, so as to have better stability and reliability.

[0059] In one way of the first embodiment of the present invention, both the lower substrate 2 and the upper substrate 3 adopt double-sided copper-clad ceramic substrates, and the power terminals and signal terminals are sintered on the copper layer of the lower substrate 2 through solder, so as to provide high thermal conductivity, good chemical and mechanical properties for the SiC power module, and also provide low resistivity and excellent current-carrying capacity.

[0060] In another way of the first embodiment of the present invention, as Figure 2 shown, the first power terminal 41 and the second power terminal 42 are of the same h-shaped structure. The h-shaped structure has a leg one 401 on one side and two leg twos 402 on the other side. In the encapsulation state, the first power terminal 41 is placed forward, and the second power terminal 42 is placed backward, so that the two leg twos 402 of the first power terminal 41 and the second power terminal 42 overlap, and the leg one 401 of the first power terminal 41 and the second power terminal 42 is misaligned, thereby forming a stacked structure of the first power terminal 41 and the second power terminal 42. Such a specially designed stacked structure further helps to reduce the parasitic inductance, is convenient for positioning and welding in the manufacturing process, and can also reduce the manufacturing cost.

[0061] In yet another way of the first embodiment of the present invention, as Figure 2 shown, the two leg twos 402 on the first power terminal 41 and the second power terminal 42 have welding areas 403 on the same surface. After the first power terminal 41 is sintered and fixed on the lower substrate 2, the welding area 403 on the first power terminal 41 faces upward, and after the second power terminal 42 is sintered and fixed on the lower substrate 2, the welding area 403 on the second power terminal 42 faces downward. The welding area 403 on the first power terminal 41 is welded in alignment with the welding area 403 on the second power terminal 42. In this way, the bonding strength between the first power terminal 41 and the second power terminal 42 of the stacked structure is improved, ensuring that the stacked structure can effectively reduce the parasitic inductance.

[0062] In one implementation of the first embodiment of the present invention, the first power terminal 41, the second power terminal 42, and the third power terminal 43 are a DC+ power terminal, a DC− power terminal, and an AC power terminal respectively. And holes for connecting a power supply and a load are provided at the outer ends of the first power terminal 41, the second power terminal 42, and the third power terminal 43, so as to enable the power module to better realize its functions. Among them, the power terminal DC+ and the signal terminal are sintered on the double-sided copper-clad ceramic substrate (lower substrate 2) below, the power terminal DC− is sintered on the double-sided copper-clad ceramic substrate (upper substrate 3) above, and the power terminal DC+ and the power terminal DC− together form a stacked structure. The way of providing holes for connecting a power supply and a load at the outer ends of the first power terminal 41, the second power terminal 42, and the third power terminal 43 makes the connection between the power module and an external power supply and load more convenient.

[0063] In another implementation of the first embodiment of the present invention, the signal pole gasket 7 includes a gate gasket 71 and a Kelvin pole gasket 72. The gate gasket 71 is connected to the gate on the chip 1, and the Kelvin pole gasket 72 is connected to the Kelvin pole on the chip 1, so as to achieve the purpose that the connections between the chip 1 and each pin and terminal do not use bonding wires and only use gaskets, further reducing the parasitic inductance inside the module and further improving the power rating of the power module.

[0064] In addition, the technical solution of the packaging structure of the present invention will be introduced by taking one detailed packaging structure embodiment as an example.

[0065] In this detailed packaging structure embodiment, a wire-bonding-free all-gasket interconnection SiC power module packaging structure is provided. The packaging structure includes a lower substrate 2, an upper substrate 3, a chip 1, a power stacked terminal 4, a drive signal terminal 5, a power pole gasket 6, a signal pole gasket 7, and a support gasket 8. The number of chips 1 is six. The parallel-connected SiC chips 1 increase the total current, enabling the packaging structure to integrate a larger power.

[0066] In this detailed packaging structure embodiment, etching grooves for forming a current flow path are formed on the lower substrate 2 and the upper substrate 3 by etching. Both the lower substrate 2 and the upper substrate 3 adopt double-sided copper-clad ceramic substrates. The upper surface of the lower substrate 2 has a plurality of printing areas, and printing layers 21 are printed in each of the printing areas. The plurality of chips 1 are correspondingly sintered and fixed on each of the printing layers 21.

[0067] In this embodiment of the detailed packaging structure, the power laminated terminal 4 includes a first power terminal 41, a second power terminal 42, and a third power terminal 43. The first power terminal 41 and the second power terminal 42 are laminated structures. The first power terminal 41 and the second power terminal 42 are sintered and fixed on the same side of the lower substrate 2 and the upper substrate 3 respectively, and the third power terminal 43 is sintered and fixed on the other side of the lower substrate 2. The first power terminal 41 and the second power terminal 42 are of the same h-shaped structure. The h-shaped structure has a first leg 401 on one side and two second legs 402 on the other side. In the packaged state, the first power terminal 41 is placed upright, and the second power terminal 42 is placed upside down, so that the two second legs 402 of the first power terminal 41 and the second power terminal 42 overlap, and the first legs 401 of the first power terminal 41 and the second power terminal 42 are misaligned, thereby forming the laminated structure of the first power terminal 41 and the second power terminal 42. The two second legs 402 on the first power terminal 41 and the second power terminal 42 have welding areas 403 on the same surface. After the first power terminal 41 is sintered and fixed on the lower substrate 2, the welding area 403 on the first power terminal 41 faces upward. After the second power terminal 42 is sintered and fixed on the lower substrate 2, the welding area 403 on the second power terminal 42 faces downward. The welding area 403 on the first power terminal 41 is welded in alignment with the welding area 403 on the second power terminal 42. Specifically, the first power terminal 41, the second power terminal 42, and the third power terminal 43 are a DC+ power terminal, a DC- power terminal, and an AC power terminal respectively, and holes for connecting the power supply and the load are provided at the outer ends of the first power terminal 41, the second power terminal 42, and the third power terminal 43; DC+ of the first power terminal 41 represents the current input end, DC- of the second power terminal 42 represents the current output end, and the AC power terminal represents the AC end. The diameter of the hole on each terminal is 5.2 mm for connecting the power supply and the load.

[0068] In this embodiment of the detailed packaging structure, the 12 driving signal terminals 5 are sintered and fixed on the lower substrate 2 corresponding to each of the chips 1, and are fixed on the lower substrate 2 by a customized fixture (a one-time reflow soldering fixture 11).

[0069] In this embodiment of the detailed packaging structure, the power pole gasket 6 is sintered between the source electrode of the chip 1 and the etched groove on the lower surface of the upper substrate 3. The signal pole gasket 7 is sintered between the driving pole of the chip 1 and the etched groove on the lower surface of the upper substrate 3. The signal pole gasket 7 includes a gate gasket 71 and a Kelvin pole gasket 72. The gate gasket 71 is connected to the gate on the chip 1, and the Kelvin pole gasket 72 is connected to the Kelvin pole on the chip 1.

[0070] In this embodiment of the detailed packaging structure, the support gasket 8 is a support structure for supporting the lower substrate 2 and the upper substrate 3. The support gasket 8 is located in an area outside the etching trench and the printing area, and the support gasket 8 is sintered and fixed between the lower substrate 2 and the upper substrate 3. The upper substrate 3 is sintered and fixed on the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 through secondary reflow soldering.

[0071] In this embodiment of the detailed packaging structure, the materials of the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 are not limited to copper, silver, molybdenum, or copper-molybdenum alloy, etc. Gold, silver, or other non-oxidizable metal materials are also plated on the surface of the gasket. By means of a plating process, a plating layer is formed on the outer surfaces of the power pole gasket 6, the signal pole gasket 7, and the support gasket 8, which can effectively prevent oxidation during the two vacuum reflow soldering processes.

[0072] As Figure 4 shown, the DC+ and DC- included in the power module circuit topology diagram in the embodiment of the present application represent DC ports, and AC represents the AC port output. This circuit has a total of 6 SiC chips. The parallel SiC chips increase the total current, enabling the packaging structure to integrate a greater power.

[0073] Embodiment 2, as Figure 5 shown, Embodiment 2 of the present invention proposes a preparation method for a wire-bonding-free all-gasket interconnected SiC power module packaging structure for the preparation of the all-gasket interconnected SiC power module packaging structure. The preparation method includes: S100. Weld the chip 1. Print a printing layer 21 for sintering and welding on the lower substrate 2. After placing the chip 1 on the printing layer 21, sinter and fix the chip 1 on the printing layer 21 correspondingly.

[0074] S200. Locate each terminal, gasket, and the lower substrate 2. Place the lower substrate 2 with the chip 1 fixed in the first reflow soldering fixture 11. Place the first power terminal 41, the third power terminal 43, the drive signal terminal 5, the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 correspondingly at the corresponding positions of the lower substrate 2 and the chip 1, and there is a first reflow solder between each terminal, gasket and the lower substrate 2 and the chip 1, where the first power terminal 41 is placed in the forward direction.

[0075] S300. Weld and fix each terminal, gasket, and the lower substrate 2. Perform first reflow soldering on the first reflow soldering fixture 11 with each terminal, gasket, and the lower substrate 2 located.

[0076] S400. Locate the lower substrate 2 and the upper substrate 3. First, place the lower substrate 2 in the second reflow soldering fixture 12. Apply a second reflow solder on the support gasket 8 of the lower substrate 2, and then place the upper substrate 3 with the second power terminal 42 placed in the reverse direction correspondingly on the second reflow soldering fixture 12.

[0077] S500. Solder the lower substrate 2 and the upper substrate 3, and perform secondary reflow soldering on the secondary reflow soldering fixture 12 with the lower substrate 2 and the upper substrate 3 positioned thereon, then solder the upper substrate 3 to the support gasket 8.

[0078] In the preparation method of this packaging structure, in order to achieve the purpose of saving preparation costs, making the module preparation process more reasonable, and making the prepared packaging structure more stable, the process flows of S100 soldering the chip 1, S200 positioning each terminal, gasket and the lower substrate 2, S300 soldering and fixing each terminal, gasket and the lower substrate 2, S400 positioning the lower substrate 2 and the upper substrate 3, and S500 soldering the lower substrate 2 and the upper substrate 3 are designed. These process flows are scientific and reasonable, the equipment cost used is low, the preparation cost of this packaging structure can be reduced, the process design is reasonable, and the yield rate is high. When soldering each terminal, gasket and the lower substrate 2, the primary reflow soldering fixture 11 is used for positioning and fixing, and when soldering the lower substrate 2 and the upper substrate 3, the secondary reflow soldering fixture 12 is used for positioning and fixing, ensuring the accurate position of each component without deviation, improving the product quality. For the soldering of each terminal, gasket and the lower substrate 2, primary reflow soldering is adopted, and for the soldering of the lower substrate 2 and the upper substrate 3, secondary reflow soldering is adopted to effectively ensure the stability of each terminal and gasket and avoid delamination of the packaging structure.

[0079] In one way of the second embodiment of the present invention, in step S100 of soldering the chip 1, the following steps are included: S110. Print the silver paste 9 on the printing area of the lower substrate 2 through a printer to form a printing layer 21. S120. Dry the silver paste 9 in a vacuum oven at 120 - 130 °C for 15 - 20 min. S130. Attach the chip 1 onto the surface of the silver paste 9 of the printing layer 21 through a chip mounter. S140. Sinter the chip 1 at 240 - 260 °C and 15 - 20 Mpa for 4 - 6 min through a pressure silver sintering process.

[0080] The chip 1 is sintered onto the lower substrate 2 better by the above process, making the structure of the packaging structure highly stable, further improving the product quality and avoiding delamination.

[0081] In another way of the second embodiment of the present invention, in step S200 of positioning each terminal, gasket and the lower substrate 2, the primary reflow solder is Sn5Pb95, and in step S400 of positioning the lower substrate 2 and the upper substrate 3, the secondary reflow solder is Sn96.5Ag3.0Cu0.5. The melting point of the primary reflow solder is higher than that of the secondary reflow solder. In this way, it is ensured that during the secondary reflow soldering process, the solder of the primary reflow soldering does not melt.

[0082] In another mode of the second embodiment of the present invention, in step S300 of welding and fixing each terminal, gasket and the lower substrate 2, a single reflow soldering process is adopted, and the process parameters include: the temperature range is 280°C to 320°C, and the time is 20 min to 25 min; In step S500 of welding the lower substrate 2 and the upper substrate 3, a double reflow soldering process is adopted, and the process parameters include: the temperature range is 210°C to 250°C, and the time is 20 min to 25 min.

[0083] With this process, it is ensured that the product quality is higher during the single reflow soldering process and the double reflow soldering process, the void ratio is reduced, and the welded package structure is more stable and firm, so as to further effectively ensure the stability of each terminal and gasket, and further avoid delamination of the package structure.

[0084] In one mode of the second embodiment of the present invention, in step S200 of positioning each terminal gasket and the lower substrate 2, as Figure 6 , Figure 7 shown, the single reflow soldering fixture 11 used includes a single fixture bottom plate 111 and a single fixture clamping plate 112. The single fixture bottom plate 111 is provided with a first positioning groove 1111 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. After closing the single fixture clamping plate 112, a second positioning groove 1121 for positioning the drive signal terminal 5 is formed between the single fixture bottom plate 111 and the single fixture clamping plate 112; In step S400 of positioning the lower substrate 2 and the upper substrate 3, as Figure 8 , Figure 9 shown, the double reflow soldering fixture 12 used includes a double fixture body 121. The double fixture body 121 is provided with a third positioning groove 1211 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. Positioning posts 1212 for positioning the upper substrate 3 are provided at the four corners of the third positioning groove 1211.

[0085] In this solution, as Figures 6 to 9 shown, the single reflow soldering fixture 11 and the double reflow soldering fixture 12 are also redesigned accordingly, so that the package structure adopting the full gasket interconnection design can be efficiently produced in a preparation process with low cost and high yield. The structure of the fixture is ingenious and simple, with low cost, easy to implement, and easy to operate.

[0086] In addition, the technical solutions of the process method of the present invention are introduced with more detailed Embodiment 3, Detailed Embodiment 4, and Embodiment 5.

[0087] Embodiment 3. A preparation method for a wire-bonding-free full-gasket interconnection SiC power module packaging structure is proposed in this embodiment 3, which is used for the preparation of a full-gasket interconnection SiC power module packaging structure. The preparation method includes: S100. Weld the chip 1. Print a printing layer 21 for sintering and welding on the lower substrate 2. After placing the chip 1 on the printing layer 21, sinter and fix the chip 1 on the printing layer 21 correspondingly. The steps of welding the chip 1 in S100 include: S110. Print silver paste 9 on the printing area of the lower substrate 2 through a printer to form the printing layer 21; S120. Dry the silver paste 9 in a vacuum oven at 130 °C for 15 min; S130. Attach the chip 1 on the surface of the silver paste 9 of the printing layer 21 through a chip mounter; S140. Sinter the chip 1 at 240 °C and 20 Mpa for 6 min through a pressure silver sintering process.

[0088] S200. Locate each terminal, gasket and lower substrate 2. Place the lower substrate 2 with the fixed chip 1 in the first reflow soldering fixture 11. Place the first power terminal 41, the third power terminal 43, the drive signal terminal 5, the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 at the corresponding positions of the lower substrate 2 and the chip 1 correspondingly. And there is a first reflow solder between each terminal, gasket and the lower substrate 2 and the chip 1. The first reflow solder uses Sn5Pb95, and the first power terminal 41 is placed forward; The used first reflow soldering fixture 11 includes a first fixture bottom plate 111 and a first fixture clamping plate 112. The first fixture bottom plate 111 is provided with a first positioning groove 1111 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. After closing the first fixture clamping plate 112, a second positioning groove 1121 for positioning the drive signal terminal 5 is formed between the first fixture bottom plate 111 and the first fixture clamping plate 112. The main function of the first reflow soldering fixture 11 used in this step is to fix the first power terminal 41 DC+, the third power terminal 43 AC, and the drive signal terminal 5. The connection material between them is a tin-lead alloy solder 10 with a high melting point, effectively ensuring the stability of terminal welding during the second vacuum reflow soldering.

[0089] S300. Weld and fix each terminal, gasket and lower substrate 2. Perform a first reflow soldering on the first reflow soldering fixture 11 with the located terminals, gaskets and lower substrate 2. Adopt the first reflow soldering process, and the process parameters include: the temperature is 280 °C and the time is 25 min.

[0090] S400. Position the lower substrate 2 and the upper substrate 3. First, place the lower substrate 2 in the secondary reflow soldering fixture 12. The secondary reflow solder is applied on the support pads 8 of the lower substrate 2. The secondary reflow solder used is Sn96.5Ag3.0Cu0.5. Then, place the upper substrate 3 with the second power terminals 42 placed in the reverse direction correspondingly on the secondary reflow soldering fixture 12. The secondary reflow soldering fixture 12 used includes a secondary fixture body 121. The secondary fixture body 121 is provided with third positioning grooves 1211 for positioning the lower substrate 2, the first power terminals 41, and the third power terminals 43. Positioning posts 1212 for positioning the upper substrate 3 are provided at the four corners of the third positioning grooves 1211. Through the secondary reflow soldering fixture 12 used in the secondary reflow soldering process, its main function is to fix the upper substrate 3 (double-sided copper-clad ceramic substrate) to the support pads 8, the power pole pads 6, and the signal pole pads 7. The connecting material between them is the tin-lead alloy solder 10 with a low melting point, which can avoid the melting phenomenon of the tin-lead alloy solder 10 during the first vacuum reflow soldering.

[0091] S500. Solder the lower substrate 2 and the upper substrate 3. Perform secondary reflow soldering on the secondary reflow soldering fixture 12 with the lower substrate 2 and the upper substrate 3 positioned, and solder the upper substrate 3 to the support pads 8. Adopt the secondary reflow soldering process, and the process parameters include: the temperature is 210 °C, and the time is 25 min.

[0092] Example 4. A preparation method for a wire-bonding-free all-pad interconnected SiC power module packaging structure is proposed in this Example 4 for the preparation of an all-pad interconnected SiC power module packaging structure. The preparation method includes: S100. Solder the chip 1. Print a printing layer 21 for sintering and soldering on the lower substrate 2. After placing the chip 1 on the printing layer 21, sinter and fix the chip 1 correspondingly on the printing layer 21. S100 for soldering the chip 1 includes the following steps: S110. Print the silver paste 9 on the printing area of the lower substrate 2 through a printer to form the printing layer 21; S120. Dry the silver paste 9 in a vacuum oven at 130 °C for 15 min; S130. Attach the chip 1 on the surface of the silver paste 9 of the printing layer 21 through a chip mounter; S140. Sinter the chip 1 at 260 °C and 15 Mpa for 4 min through a pressure silver sintering process.

[0093] S200. Position each terminal, spacer and the lower substrate 2. Place the lower substrate 2 with the chip 1 fixed therein in the first reflow soldering fixture 11. Place the first power terminal 41, the third power terminal 43, the drive signal terminal 5, the power pole spacer 6, the signal pole spacer 7, and the support spacer 8 at their corresponding positions on the lower substrate 2 and the chip 1. And there is the first reflow solder between each terminal, spacer and the lower substrate 2 and the chip 1. The first reflow solder is Sn5Pb95, and the first power terminal 41 is placed in the forward direction. The first reflow soldering fixture 11 used includes a first fixture bottom plate 111 and a first fixture clamping plate 112. The first fixture bottom plate 111 is provided with a first positioning groove 1111 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. After closing the first fixture clamping plate 112, a second positioning groove 1121 for positioning the drive signal terminal 5 is formed between the first fixture bottom plate 111 and the first fixture clamping plate 112. The main function of the first reflow soldering fixture 11 used in this step is to fix the first power terminal 41 DC+, the third power terminal 43 AC, and the drive signal terminal 5. The connection material between them is the tin-lead alloy solder 10 with a high melting point, effectively ensuring the stability of the terminal soldering during the second vacuum reflow soldering.

[0094] S300. Weld and fix each terminal, spacer and the lower substrate 2. Perform the first reflow soldering on the first reflow soldering fixture 11 with each terminal, spacer and the lower substrate 2 positioned therein. Adopt the first reflow soldering process, and the process parameters include: the temperature is 320 °C and the time is 20 min.

[0095] S400. Position the lower substrate 2 and the upper substrate 3. First, place the lower substrate 2 in the second reflow soldering fixture 12. The second reflow solder is applied on the support spacer 8 of the lower substrate 2. The second reflow solder is Sn96.5Ag3.0Cu0.5. Then, place the upper substrate 3 with the second power terminal 42 placed in the reverse direction welded thereon correspondingly on the second reflow soldering fixture 12. The second reflow soldering fixture 12 used includes a second fixture body 121. The second fixture body 121 is provided with a third positioning groove 1211 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. Positioning posts 1212 for positioning the upper substrate 3 are provided at the four corners of the third positioning groove 1211. Through the second reflow soldering fixture 12 used in the second reflow soldering process, its main function is to fix the upper substrate 3 (double-sided copper-clad ceramic substrate) to the support spacer 8, the power pole spacer 6, and the signal pole spacer 7. The connection material between them is the tin-lead alloy solder 10 with a low melting point, which can avoid the melting phenomenon of the tin-lead alloy solder 10 during the first vacuum reflow soldering.

[0096] S500. Weld the lower substrate 2 and the upper substrate 3, perform secondary reflow soldering on the secondary reflow soldering fixture 12 with the lower substrate 2 and the upper substrate 3 positioned, and weld the upper substrate 3 to the support gasket 8. The secondary reflow soldering process is adopted, and the process parameters include: the temperature range is 250 °C and the time is 20 min.

[0097] Example 5. A preparation method for a wire-bondless all-gasket interconnected SiC power module packaging structure proposed in this Example 5 is used for the preparation of an all-gasket interconnected SiC power module packaging structure. The preparation method includes: S100. Weld the chip 1. Print a printing layer 21 for sintering and welding on the lower substrate 2. After placing the chip 1 on the printing layer 21, sinter and fix the chip 1 on the printing layer 21 correspondingly. The steps of welding the chip 1 in S100 include: S110. Print the silver paste 9 on the printing area of the lower substrate 2 through a printer to form the printing layer 21; S120. Dry the silver paste 9 in a vacuum oven at 125 °C for 18 min; S130. Attach the chip 1 on the surface of the silver paste 9 of the printing layer 21 through a chip mounter; S140. Sinter the chip 1 at 250 °C and 18 Mpa for 5 min through a pressure silver sintering process.

[0098] S200. Position each terminal, gasket and the lower substrate 2. Place the lower substrate 2 with the chip 1 fixed in the first reflow soldering fixture 11. Place the first power terminal 41, the third power terminal 43, the drive signal terminal 5, the power pole gasket 6, the signal pole gasket 7, and the support gasket 8 at the corresponding positions of the lower substrate 2 and the chip 1 correspondingly, and there is a first reflow solder between each terminal, gasket and the lower substrate 2 and the chip 1. The first reflow solder adopts Sn5Pb95, and the first power terminal 41 is placed forward; the first reflow soldering fixture 11 used includes a first fixture bottom plate 111 and a first fixture clamping plate 112. The first fixture bottom plate 111 is provided with a first positioning groove 1111 for positioning the lower substrate 2, the first power terminal 41, and the third power terminal 43. After closing the first fixture clamping plate 112, a second positioning groove 1121 for positioning the drive signal terminal 5 is formed between the first fixture bottom plate 111 and the first fixture clamping plate 112. The main function of the first reflow soldering fixture 11 used in this step is to fix the first power terminal 41 DC+, the third power terminal 43 AC, and the drive signal terminal 5. The connection material between them is a high-melting-point tin-lead alloy solder 10, effectively ensuring the stability of terminal soldering during secondary vacuum reflow soldering.

[0099] S300. Weld and fix each terminal, gasket and the lower substrate 2. Perform first reflow soldering on the first reflow soldering fixture 11 with the terminals, gaskets and the lower substrate 2 positioned. Adopt the first reflow soldering process, and the process parameters include: the temperature is 300 °C and the time is 22 min.

[0100] S400. Position the lower substrate 2 and the upper substrate 3. First, place the lower substrate 2 in the second reflow soldering fixture 12. The second reflow solder is applied on the support gasket 8 of the lower substrate 2. The second reflow solder uses Sn96.5Ag3.0Cu0.5. Then, place the upper substrate 3 with the second power terminals 42 placed in the reverse direction welded thereon corresponding to the second reflow soldering fixture 12. The used second reflow soldering fixture 12 includes a second fixture body 121. The second fixture body 121 is provided with third positioning grooves 1211 for positioning the lower substrate 2, the first power terminals 41, and the third power terminals 43. Positioning posts 1212 for positioning the upper substrate 3 are provided at the four corners of the third positioning grooves 1211. Through the second reflow soldering fixture 12 used in the second reflow soldering process, its main function is to fix the upper substrate 3 (double-sided copper-clad ceramic substrate) to the support gasket 8, the power pole gasket 6, and the signal pole gasket 7. The connection material between them is the tin-lead alloy solder 10 with a low melting point, which can avoid the melting phenomenon of the tin-lead alloy solder 10 during the first vacuum reflow soldering.

[0101] S500. Weld the lower substrate 2 and the upper substrate 3. Perform second reflow soldering on the second reflow soldering fixture 12 with the lower substrate 2 and the upper substrate 3 positioned. Weld the upper substrate 3 to the support gasket 8. Adopt the second reflow soldering process, and the process parameters include: the temperature range is 230 °C and the time is 22 min.

[0102] Through the implementation of the above embodiments, the problems existing in traditional silicon carbide (SiC) power devices, such as high parasitic inductance and large losses, and the problems existing in conventional wire-bondless packaging structures, such as complex processes and high costs, are solved. The novel packaging structure formed by the packaging method involved in this application has no bonding wires. Instead of traditional copper bonding wires or aluminum bonding wires, gaskets (the materials of the gaskets are not limited to copper, silver, molybdenum, or copper-molybdenum alloys, etc.) are used for all-gasket interconnection packaging, obtaining extremely low inductance and the best thermal resistance, improving the power density of the device and reducing the power consumption, thus achieving the purpose of the present invention.

[0103] The above embodiments are only used to illustrate the technical concept and characteristics of the present invention. The purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly, and it cannot be used to limit the protection scope of the present invention. All equivalent changes or modifications made according to the spirit and essence of the present invention should be covered within the protection scope of the present invention.

Claims

1. A bonding wire-free full-gasket interconnection SiC power module packaging structure, characterized in that: The packaging structure comprises a lower substrate (2), an upper substrate (3), a chip (1), a power stack terminal (4), a drive signal terminal (5), a power electrode gasket (6), a signal electrode gasket (7), and a support gasket (8); The lower substrate (2) and the upper substrate (3) are provided with etching grooves for forming a current flow path by etching; The upper surface of the lower substrate (2) has a plurality of printing areas, each of which is printed with a printing layer (21); The plurality of chips (1) are correspondingly sintered and fixed on each of the printed layers (21); The power stacked terminal (4) comprises a first power terminal (41), a second power terminal (42), and a third power terminal (43); the first power terminal (41) and the second power terminal (42) are stacked structures; the first power terminal (41) and the second power terminal (42) are sintered and fixed on the same side of the lower substrate (2) and the upper substrate (3); and the third power terminal (43) is sintered and fixed on the other side of the lower substrate (2); The plurality of driving signal terminals (5) are sintered and fixed on the lower substrate (2) corresponding to the respective chips (1); The power electrode gasket (6) is sintered between the source electrode of the chip (1) and the etched groove on the lower surface of the upper substrate (3); The signal electrode gasket (7) is sintered between the driving electrode of the chip (1) and the etched groove on the lower surface of the upper substrate (3), and the signal electrode gasket (7) is electrically connected to the gate electrode and the Kelvin electrode on the chip (1); The support gasket (8) is a support structure for supporting the lower substrate (2) and the upper substrate (3); the support gasket (8) is located in an area outside the etching groove and the printing area; the support gasket (8) is sintered and fixed between the lower substrate (2) and the upper substrate (3); The upper substrate (3) is fixed on the power electrode gasket (6), the signal electrode gasket (7) and the support gasket (8) through secondary reflow sintering.

2. The SiC power module packaging structure with full pad interconnection without bonding wires according to claim 1, characterized in that: The lower substrate (2) and the upper substrate (3) are both double-sided copper-clad ceramic substrates, and the power terminals and the signal terminals are sintered on the copper layer of the lower substrate (2) by solder.

3. The SiC power module packaging structure with full pad interconnection without bonding wires according to claim 1, characterized in that: The first power terminal (41) and the second power terminal (42) are of the same H-shaped structure, wherein the H-shaped structure has a first leg (401) located on one side and two second legs (402) located on the other side. In the packaged state, the first power terminal (41) is placed forward and the second power terminal (42) is placed reversely, so that the two second legs (402) of the first power terminal (41) and the second power terminal (42) overlap, and the first legs (401) of the first power terminal (41) and the second power terminal (42) are staggered, thereby forming a stacked structure of the first power terminal (41) and the second power terminal (42).

4. The SiC power module packaging structure with full pad interconnection without bonding wires according to claim 1, characterized in that: The two legs (402) on the first power terminal (41) and the second power terminal (42) have welding areas (403) located on the same surface; after the first power terminal (41) is sintered and fixed on the lower substrate (2), the welding area (403) on the first power terminal (41) faces upwards; after the second power terminal (42) is sintered and fixed on the lower substrate (2), the welding area (403) on the second power terminal (42) faces downwards; the welding area (403) on the first power terminal (41) and the welding area (403) on the second power terminal (42) are aligningly welded.

5. The SiC power module packaging structure with full pad interconnection without bonding wires according to claim 1, characterized in that: The first power terminal (41), the second power terminal (42), and the third power terminal (43) are respectively a DC+ power terminal, a DC- power terminal, and an AC power terminal, and holes for connecting a power source and a load are provided at the outward ends of the first power terminal (41), the second power terminal (42), and the third power terminal (43).

6. The SiC power module packaging structure with full pad interconnection without bonding wires according to claim 1, characterized in that: The signal electrode gasket (7) comprises a gate gasket (71) and a Kelvin pole gasket (72); the gate gasket (71) is connected to the gate on the chip (1); and the Kelvin pole gasket (72) is connected to the Kelvin pole on the chip (1).

7. A method for preparing a SiC power module packaging structure with full pad interconnection without bonding wires, used for preparing the SiC power module packaging structure with full pad interconnection as claimed in any one of claims 1 to 6, characterized in that: The preparation method comprises: S100, welding the chip (1), printing a printing layer (21) for sintering welding on the lower substrate (2), placing the chip (1) on the printing layer (21), and then sintering and fixing the chip (1) on the printing layer (21); S200, positioning each terminal, gasket and lower substrate (2), placing the lower substrate (2) fixed with the chip (1) in a primary reflow soldering fixture (11), placing the first power terminal (41), the third power terminal (43), the drive signal terminal (5), the power electrode gasket (6), the signal electrode gasket (7), and the support gasket (8) at corresponding positions of the lower substrate (2) and the chip (1), and having primary reflow solder between each terminal, gasket, the lower substrate (2) and the chip (1), wherein the first power terminal (41) is placed in the forward direction; S300, welding and fixing each terminal, gasket and lower substrate (2), and performing a primary reflow soldering on a primary reflow soldering fixture (11) on which each terminal, gasket and lower substrate (2) are positioned; S400, positioning the lower substrate (2) and the upper substrate (3), first placing the lower substrate (2) in a secondary reflow soldering fixture (12), coating the supporting pad (8) of the lower substrate (2) with secondary reflow solder, and then placing the upper substrate (3) with the second power terminal (42) placed in reverse position soldered thereto on the secondary reflow soldering fixture (12); S500, welding the lower substrate (2) and the upper substrate (3), performing secondary reflow soldering on a secondary reflow soldering fixture (12) on which the lower substrate (2) and the upper substrate (3) are positioned, and welding the upper substrate (3) to the supporting pad (8).

8. The method for preparing the SiC power module packaging structure with full pad interconnection without bonding wires according to claim 7, characterized in that: In step S100, the chip welding (1) includes the following steps: S110, printing the silver paste (9) on the printing area of ​​the lower substrate (2) by a printing machine to form a printing layer (21); S120, drying the silver paste (9) in a vacuum oven at 120-130° C. for 15-20 min; S130, attaching the chip (1) to the surface of the silver paste (9) of the printed layer (21) by a chip mounter; S140, sintering the chip (1) at 240-260° C. and 15-20 MPa for 4-6 minutes using a silver pressure sintering process.

9. The method for preparing the SiC power module packaging structure with full pad interconnection without bonding wires according to claim 7, characterized in that: In step S200 of positioning each terminal, gasket and lower substrate (2), the primary reflow solder uses Sn5Pb95, and in step S400 of positioning the lower substrate (2) and the upper substrate (3), the secondary reflow solder uses Sn96.5Ag3.0Cu0.5, and the melting point of the primary reflow solder is higher than the melting point of the secondary reflow solder.

10. The method for preparing a SiC power module packaging structure with full pad interconnection without bonding wires according to claim 7, characterized in that: In step S300, the terminals, gaskets and lower substrate (2) are fixed by welding, and a single reflow process is adopted, and the process parameters include: a temperature range of 280° C. to 320° C. and a time of 20 min to 25 min; In step S500 of welding the lower substrate (2) and the upper substrate (3), a secondary reflow process is adopted, and the process parameters include: a temperature range of 210° C. to 250° C. and a time of 20 min to 25 min.

11. The method for preparing a SiC power module packaging structure with full pad interconnection without bonding wires according to claim 7, characterized in that: In step S200, in positioning each terminal pad and the lower substrate (2), the primary reflow soldering fixture (11) used comprises a primary fixture bottom plate (111) and a primary fixture clamping plate (112); the primary fixture bottom plate (111) is provided with a first positioning groove (1111) for positioning the lower substrate (2), the first power terminal (41), and the third power terminal (43); after the primary fixture clamping plate (112) is closed, a second positioning groove (1121) for positioning the drive signal terminal (5) is formed between the primary fixture bottom plate (111) and the primary fixture clamping plate (112); In step S400 for positioning the lower substrate (2) and the upper substrate (3), the secondary reflow soldering fixture (12) used includes a secondary fixture body (121), the secondary fixture body (121) is provided with a third positioning groove (1211) for positioning the lower substrate (2), the first power terminal (41), and the third power terminal (43), and positioning columns (1212) for positioning the upper substrate (3) are provided at the four corners of the third positioning groove (1211).

Citation Information

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