A device and method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter

Abstract

The present invention discloses a device and method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter, comprising a first capacitor, one end of the first capacitor being electrically connected to the drain of a first switching tube, and the other end of the first capacitor being electrically connected to the source of a second switching tube; the drain of the second switching tube 2 being electrically connected to the source of the first switching tube and electrically connected to one end of an inductor, the other end of the inductor being electrically connected to one end of a low-voltage side capacitor, and the other end of the low-voltage side capacitor being electrically connected to the source of the second switching tube. The present invention can reduce the demand for the capacitance value of the DC bus capacitor while ensuring harmonic suppression performance, thereby showing significant cost-effectiveness in higher power applications. In addition, in small and medium power application scenarios, the service life of the equipment can be further extended by using film capacitors instead of electrolytic capacitors.

Description

Technical Field

[0001] The present invention relates to the field of electricity, and in particular to a device and method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter. Background Art

[0002] Developing clean, renewable energy generation technologies, such as solar energy, is crucial for alleviating energy shortages and addressing environmental challenges. However, photovoltaic power generation is constrained by multiple factors, such as light intensity and temperature, and exhibits a strong degree of randomness. As the core of a photovoltaic grid-connected system, the grid-connected inverter must track the maximum power point of the photovoltaic characteristic curve in real time and ensure smooth grid connection. To accommodate the operating voltages of different photovoltaic cells, grid-connected inverters often adopt a two-stage structure. Although this increases component count, it decouples the AC and DC circuits, simplifying controller design and thus gaining widespread market acceptance.

[0003] During the inverter's grid-connected process, the instantaneous power generated by the grid-connected power contains double the power frequency harmonics, which causes the DC bus voltage to generate corresponding even harmonics. Excessive even voltage harmonics can severely affect the accuracy of maximum power point tracking (MPPT) on the DC side of the preceding stage, thereby reducing the actual utilization efficiency of solar energy. Furthermore, even harmonics in the DC bus voltage can also cause odd harmonics in the grid-connected current. If the harmonic amplitude is too large, it will affect the grid power quality and make it difficult to meet grid access standards. To address this issue in the downstream stage, some researchers have attempted to extract the harmonic components of the DC bus voltage and inject them into the modulation ratio to reduce the harmonics in the output current. However, this approach increases the complexity of the modulation algorithm. Other researchers have adopted proportional resonant control or repetitive control in their control strategies to suppress harmonics in the grid-connected current, but these theories are difficult to apply in practical digital control. On the upstream side, filtering algorithms can be used to extract the even harmonic components of the DC bus voltage and perform real-time duty cycle compensation to mitigate the impact of DC bus voltage ripple on MPPT tracking accuracy. Although the above method can alleviate the impact of the instantaneous power twice the power frequency harmonic to a certain extent, it does not fundamentally suppress the generation of the harmonic.

[0004] According to the DC bus capacitance calculation formula, to achieve the same filtering effect, lower-frequency harmonics require larger capacitor values. However, high-voltage, high-capacitance electrolytic capacitors are not only bulky and expensive, but also have a relatively limited lifespan. Therefore, simply increasing the capacitor value will not only reduce the inverter's power density, increasing product costs, but also shorten its lifespan. Summary of the Invention

[0005] In order to solve the above technical problems, the present invention proposes a device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter.

[0006] The purpose of the present invention is achieved through the following technical solutions:

[0007] A device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter includes a first capacitor C1, one end of the first capacitor C1 being electrically connected to the drain of a first switching transistor P1, and the other end of the first capacitor C1 being electrically connected to the source of a second switching transistor P2; the drain of the second switching transistor P2 being electrically connected to the source of the first switching transistor P1 and to one end of an inductor L, the other end of the inductor L being electrically connected to one end of a low-voltage side capacitor C2, and the other end of the low-voltage side capacitor C2 being electrically connected to the source of the second switching transistor P2.

[0008] As a further improvement, the two-stage grid-connected inverter includes a boost circuit, which is electrically connected in parallel to the inverter bus capacitor C0 and the single-phase inverter bridge, and the single-phase inverter bridge is electrically connected to the grid through an LCL filter.

[0009] As a further improvement, one end of the first capacitor C1 is electrically connected to one end of the relay S1, the other end of the relay S1 is electrically connected to one end of the inverter bus capacitor C0, and the other end of the inverter bus capacitor C0 is electrically connected to the other end of the first capacitor C1.

[0010] As a further improvement, the capacitance of the inverter bus capacitor C0 is 500uF, the capacitance of the first capacitor C1 and the low-voltage side capacitor C2 is 600uF, and the inductance of the inductor L is 120uH.

[0011] A method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter, using the above-mentioned device, includes the following steps:

[0012] Step 1: pre-charge the first capacitor C1 to satisfy |U bus -U in |≤2V, the control relay S1 is closed, where U bus is the voltage across the inverter bus capacitor C0, U in is the voltage across the first capacitor C1;

[0013] Step 2: Close the second switch tube P2, and the reference value of the voltage of the low-voltage side capacitor C2 is U s_ref The reference value is initially set to 0V and then gradually increased to 240V. s_ref Subtract the voltage U across the low-voltage side capacitor C2 s Get the error signal ΔU yc And serves as the input signal of the PI controller. The output signal of the PI controller is the duty cycle of the first switch tube P1. When the low-voltage side capacitor C2 is charged to 240V, the pre-charging process ends;

[0014] Get the average voltage U across the inverter bus capacitor C0 during the pre-charging process bus_avg ;

[0015] Step 3: Obtain the voltage U of the first capacitor C1 by sampling in , the voltage U of the low-voltage side capacitor C2 s and the input current I of the device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter in；

[0016] Step 4: According to the sampling number T, the average value U of the voltage Us on the low-voltage side capacitor C2 is obtained. S_avg ;

[0017] Step 5: U S_avg Subtracting 240V to get the error signal ΔU s , ΔU s As the input signal of the outer loop PI controller, the output signal of the outer loop PI controller is the reference value U of the voltage of the first capacitor C1. in_ref ;

[0018] Step 6: The voltage U of the first capacitor C1 in Subtract the reference value U of the voltage of the first capacitor C1 in_ref Calculate the error signal ΔU in , ΔU in As the input signal of the inner loop PI controller, the output signal of the PI controller is the reference current I of the first capacitor C1. c_ref ;

[0019] Step 7: I in Subtract the reference current I c_ref , and the controlled average current I is obtained m Reference value I m_ref ;

[0020] Step 8: According to I m_ref Derivation of the operating states of the first switch tube P1 and the second switch tube P2:

[0021] WhenU in ≥U in_ref When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the buck mode, the duty cycle D of the first switch tube P1 and the second switch tube P2 is S1 and D S2 satisfy:

[0022]

[0023] Where L represents the inductance value of the inductor L, and f represents the grid frequency;

[0024] WhenU in in_ref ​When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in boost mode, the duty cycle D of the first switch tube P1 and the second switch tube P2 is S1 and D S2 satisfy:

[0025]

[0026] The actions of the first switch tube P1 and the second switch tube P2 are controlled by a PWM signal.

[0027] Further improvements,

[0028] Among them, t represents the tth sampling, U bus (t) represents the voltage across the inverter bus capacitor C0 at the tth sampling time.

[0029] Further improvements,

[0030] Among them, U S (t) is the voltage across the low-voltage side capacitor C2 at the t-th sampling time.

[0031] For further improvement, the sampling number T=200.

[0032] The beneficial effects of the present invention are:

[0033] 1. This invention can reduce the required DC bus capacitor value while maintaining harmonic suppression performance, thereby demonstrating significant cost-effectiveness in higher-power applications. Furthermore, in low- and medium-power applications, film capacitors can be used instead of electrolytic capacitors, further extending the life of the equipment.

[0034] 2. The device proposed in the present invention can adapt to the inverter bus voltage and has the characteristic of being pluggable.

[0035] 3. The control strategy proposed in the present invention is simple and easy to implement digital control in engineering. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The present invention is further described with reference to the accompanying drawings, but the contents in the drawings do not constitute any limitation to the present invention.

[0037] Figure 1 This is a topology diagram of an inverter system including a bus voltage harmonic suppression device provided by an embodiment of the present invention.

[0038] Figure 2 This is a control block diagram of the bus voltage harmonic suppression device provided by an embodiment of the present invention.

[0039] Figure 3This is a bus voltage waveform diagram of a two-stage photovoltaic grid-connected inverter provided by an embodiment of the present invention.

[0040] Figure 4 This is a diagram of the output current waveform of the two-stage photovoltaic grid-connected inverter provided by an embodiment of the present invention.

[0041] Figure 5 This is the inverter bus voltage THD before the harmonic suppression device provided by the embodiment of the present invention is put into operation.

[0042] Figure 6 This is the inverter grid-connected current THD before the harmonic suppression device provided by the embodiment of the present invention is put into operation.

[0043] Figure 7 This is the inverter bus voltage THD after the harmonic suppression device provided by the embodiment of the present invention is operated.

[0044] Figure 8 This is the inverter grid-connected current THD after the harmonic suppression device provided by an embodiment of the present invention is running. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solutions and advantages of the invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and examples.

[0046] Example 1

[0047] The system topology of the two-stage photovoltaic grid-connected inverter and its bus voltage harmonic suppression device proposed by the present invention is shown in the figure below: Figure 1 As shown, the two-stage grid-connected inverter topology includes a photovoltaic array, a boost circuit including MOS tube Q1, a single-phase inverter bridge composed of IGBT tubes Q2-Q5, an LCL filter, and a power grid part. The topology of the bus voltage harmonic suppression device is composed of a bidirectional DCDC including MOS tubes P1 and P2, and the bidirectional DCDC is connected in parallel to the inverter bus capacitor C0. The connection between the inverter and the bus voltage harmonic suppression device is controlled by relay S1. In this embodiment, the key parameters are set as follows: C0 is 500uF, C1 is 50uF, C2 is 600uF, the inductor L is 120uH, the output power of the two-stage photovoltaic grid-connected operation is set to 10kW, and the reference value of the capacitor C2 voltage U S_ref Set to 240V, the inverter DC bus voltage is controlled at 360V.

[0048] Before running the control strategy, capacitor C1 needs to be precharged. Here, ε is taken as 2V based on debugging experience. When the voltage of the inverter bus capacitor C0 and the voltage of the capacitor C1 meet |U bus -U in After |≤2, the control relay S1 is closed.

[0049] After the controller S1 is closed, the MOS tube P2 is closed and the reference value of the capacitor C2 voltage is U s_ref The reference value is initially set to 0V and gradually increased to 240V in the subsequent time to prevent the instantaneous voltage overshoot of capacitor C2. s Get the error signal ΔU yc It serves as the input signal of the PI controller. The output signal of the PI controller is the duty cycle of the MOS tube P1. When the capacitor C2 is charged to 240V, the pre-charging process ends.

[0050] During the pre-charging process, according to the frequency f of the power grid g =50Hz, control frequency f k =20kHz, the sampling number T=200, then the average value of the bus voltage is:

[0051]

[0052] According to the above formula, the average value of the inverter bus voltage U bus_avg It is 360V.

[0053] The present invention provides a device and method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter. The control strategy is as follows: Figure 2 As shown, in this embodiment, the control strategy of the bus voltage harmonic suppression device includes the following steps:

[0054] S10, obtain the voltage U of the capacitor C1 of the harmonic suppression device through sampling in , the voltage U of capacitor C2 s and input current I in .

[0055] S20, according to the sampling number T=200, obtain the average value U of the voltage Us on the low-voltage side capacitor C2 S_avg for:

[0056]

[0057] S30, the average voltage U of the capacitor C2 obtained in step S20 S_avg Subtracting 240V to get the error signal ΔU s , which is used as the input signal of the outer loop PI controller. The output signal of the PI controller is the reference value U of the capacitor C1 voltage. in_ref .

[0058] Specifically, according to the U obtained in the pre-charge process bus_avg , the initial value of the integrator in the PI controller is set to 360.

[0059] S40, the voltage U of capacitor C1 inSubtract the reference value U of the C1 voltage obtained in step S30 in_ref Calculate the error signal ΔU in , which is used as the input signal of the inner loop P controller. The output signal of the P controller is the reference current I of capacitor C1. c_ref .

[0060] S50, inputting the harmonic suppression device input current I obtained in step S10 in Subtract the capacitor C1 reference current I obtained in step S40 c_ref , and the controlled average current I is obtained m Reference value I m_ref ;

[0061] S60: The average current reference value I obtained in step S50 m_ref Derive the operating status of the switches P1 and P2 when the harmonic suppression device is running;

[0062] Specifically, when U in ≥U in_ref When the bidirectional DCDC operates in buck mode, the duty cycle of the switch tubes P1 and P2 is D S1 and D S2 satisfy:

[0063]

[0064] WhenU in in_ref When the bidirectional DCDC operates in boost mode, the duty cycle of the switch tubes P1 and P2 is D S1 and D S2 satisfy:

[0065]

[0066] Finally, the PWM signal is generated to control the operation of the P1 and P2 switching tubes through the driving circuit.

[0067] In order to verify the technical effect of the present invention, a simulation test of the harmonic suppression device and its control strategy was carried out in a two-stage photovoltaic grid-connected system.

[0068] Figure 3 The waveform of bus voltage of two-stage photovoltaic inverter is shown in the operation process, with the time axis in seconds and the voltage axis in volts. Figure 4 The output current waveform of the inverter is presented when it is running. The time axis is also in seconds, but the current axis is marked in amperes.

[0069] When the time reaches 0.6 seconds, the capacitors C1 and C2 in the harmonic suppression device complete the pre-charging process, and then the switch S1 is closed.​ Figure 3 It can be observed that after 0.6 seconds, the harmonic content in the bus voltage waveform almost disappears. Figure 5 and Figure 6 Further analysis of the data shows that the total harmonic distortion (THD) of the bus voltage has dropped significantly from 11.38% to 1.07%. Figure 4 It shows that after 0.6 seconds, the output current of the inverter gradually presents a standard sine waveform. Figure 7 and Figure 8 From the data, we can see that the THD of the output current has also been greatly reduced from 18.84% to 0.84%.

[0070] If the PV grid-tied inverter is not connected to a harmonic suppression device during operation, then in order to achieve the same grid current THD level as when the device is connected, the capacitance of the C0 capacitor needs to be replaced with 21000uF. This means that the device achieves a significant increase in capacitance under this environment, specifically amplified by 18.26 times.

[0071] In summary, the present invention, through the bidirectional DCDC topology, can effectively suppress the harmonics of the bus voltage of the two-stage photovoltaic grid-connected inverter and improve the waveform quality of the grid-connected current while reducing the complexity of the control algorithm and the capacitance of the filter capacitor.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the essence and scope of the technical solutions of the present invention.

Claims

1. A method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter, characterized in that: A device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter is used. The device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter comprises a first capacitor (C1), one end of the first capacitor (C1) is electrically connected to the drain of a first switching tube (P1), and the other end of the first capacitor (C1) is electrically connected to the source of a second switching tube (P2); The drain of the second switching tube (P2) is electrically connected to the source of the first switching tube (P1) and is electrically connected to one end of the inductor (L); the other end of the inductor (L) is electrically connected to one end of the low-voltage side capacitor (C2); and the other end of the low-voltage side capacitor (C2) is electrically connected to the source of the second switching tube (P2); the two-stage grid-connected inverter includes a boost circuit, the boost circuit is electrically connected in parallel to the inverter bus capacitor (C0) and the single-phase inverter bridge, and the single-phase inverter bridge is electrically connected to the power grid through an LCL filter; one end of the first capacitor (C1) is electrically connected to one end of the relay (S1), the other end of the relay (S1) is electrically connected to one end of the inverter bus capacitor (C0), and the other end of the inverter bus capacitor (C0) is electrically connected to the other end of the first capacitor (C1); The method comprises the following steps: Step 1: Precharge the first capacitor (C1) to meet the requirement of |U bus -U in |≤2V, the control relay S1 is closed, where U bus is the voltage across the inverter bus capacitor (C0), U in is the voltage across the first capacitor (C1); Step 2: Close the second switch tube (P2), the reference value of the voltage of the low-voltage side capacitor (C2) is U s_ref The reference value is initially set to 0V and then gradually increased to 240V. s_ref Subtract the voltage U across the low-voltage side capacitor (C2) s Get the error signal ΔU yc and serves as an input signal of a PI controller, the output signal of the PI controller being the duty cycle of the first switch tube (P1), and when the low-voltage side capacitor (C2) is charged to 240V, the pre-charging process ends; Get the average voltage U across the inverter bus capacitor (C0) during the pre-charging process bus_avg ; Step 3: Obtain the voltage U of the first capacitor (C1) by sampling in , the voltage U of the low-voltage side capacitor (C2) s and the input current I of the device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter in ; Step 4: According to the sampling number T, the average value U of the voltage Us on the low-voltage side capacitor (C2) is obtained. S_avg ; Step 5: U S_avg Subtracting 240V to get the error signal ΔU s , ΔU s As the input signal of the outer loop PI controller, the output signal of the outer loop PI controller is the reference value U of the voltage of the first capacitor (C1) in_ref ; Step 6: The voltage U of the first capacitor (C1) in Subtract the reference value U of the voltage of the first capacitor (C1) in_ref Calculate the error signal ΔU in , ΔU in As the input signal of the inner loop PI controller, the output signal of the PI controller is the reference current I of the first capacitor (C1) c_ref ; Step 7: I in Subtract the reference current I c_ref , and the controlled average current I is obtained m Reference value I m_ref ; Step 8: According to I m_ref Derivation of the operating status of the first switch tube (P1) and the second switch tube (P2): When U in ≥U in_ref When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the buck mode, the duty cycle D of the first switch tube (P1) and the second switch tube (P2) is S1 and D S2 satisfy: Where L represents the inductance (L), and f represents the grid frequency; When U in in_ref When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in boost mode, the duty cycle D of the first switch tube (P1) and the second switch tube (P2) is S1 and D S2 satisfy:​ The actions of the first switch tube (P1) and the second switch tube (P2) are controlled by a PWM signal.

2. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: Among them, t represents the tth sampling, U bus (t) represents the voltage across the inverter bus capacitor C0 at the t-th sampling time.

3. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: Among them, U S (t) is the voltage across the low-voltage side capacitor (C2) at the t-th sampling time.

4. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, wherein: Number of samples T=200.

5. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: The capacitance of the inverter bus capacitor (C0) is 500uF, the capacitance of the first capacitor (C1) is 50uF, the capacitance of the low-voltage side capacitor (C2) is 600uF, and the inductance of the inductor (L) is 120uH.

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