Inverter fault ride-through method and device, control equipment, storage medium and product

By adopting a mode switching method in the inverter, using a virtual synchronous generator and current loop control to achieve fault crossing of the inverter when the power grid fails, the problems of complexity and low efficiency of inverter fault crossing control in the prior art are solved, and efficient grid state switching is achieved.

CN120073792AActive Publication Date: 2025-05-30SHANGHAI CHINT POWER SYST CO LTD
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Patent Information

Application Number
CN202510542631.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-28
Publication Date
2025-05-30
Estimated Expiration
2045-04-28

AI Technical Summary

Technical Problem

The fault-travel characteristics of the inverter in the event of grid failure are difficult to meet the standard requirements, especially when dynamic characteristics decrease and control complexity increases.

Method used

The mode switching method is adopted, and the virtual synchronous generator VSG control in the network mode is used when the power grid is normal. When the power grid fails, the current loop and phase locked loop control in the network mode are switched to the current loop and phase locked loop control in the network mode. When the fault recovery is restored, the recorded angle difference and reactive loop integrator value are used to assign the integrator in the VSG control.

Benefits of technology

The inverter fault crossing control process is simplified, the switching efficiency is improved, and smooth grid state switching is achieved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses an inverter fault ride-through method and device, control equipment, a storage medium and a product. The inverter fault ride-through method comprises the following steps: in a normal state, an inverter works in a network construction mode, VSG control is adopted, a reactive loop integrator value is recorded, phase-locked loop control is operated, and an angle difference is recorded; the inverter works in a network following mode in a fault state, and current loop control and phase-locked loop control are adopted; under the condition of fault recovery, the inverter works in a grid-following mode, current loop control and phase-locked loop control are adopted, and an integrator in VSG control is assigned according to the recorded angle difference, a reactive loop integrator value and each loop value in the grid-following mode; and after the power grid recovers for a period of time, the inverter is switched to a working state when the power grid is normal. By adopting different loop control and utilizing the recorded value of the phase-locked loop control to assign a value to the integrator in the VSG control in the fault recovery stage, the inverter fault ride-through control process is simplified, and the switching efficiency is improved.
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Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of electrical control, and in particular, to an inverter fault ride-through method, device, control device, storage medium, and product. Background Art

[0002] With the proposal of the goal of building a new power system, the proportion of new energy power generation will be further increased. New energy power generation equipment usually operates in a grid-connected control mode to pursue maximum power tracking. However, too high a proportion of new energy power generation will weaken the grid strength and lack voltage, frequency, inertia support, etc. In recent years, inverters (which can also be called power conversion systems (PCS) or grid-forming converters) mainly controlled by virtual synchronous generators (VSG) can improve the voltage, frequency, and inertia support capabilities of the power system and have been widely studied and applied. Compared with the grid-connected working mode, when the inverter operates in the grid-forming mode, although the stability is improved, the dynamic characteristics decline. When high or low voltage faults occur in the grid, current various standard requirements for the inverter fault ride-through characteristics often refer to grid-connected converters, making it much more difficult to meet the standard requirements.

[0003] To solve the above problems, a mode switching method can be adopted to complete fault ride-through. When the grid is normal, the grid-forming mode control is adopted, and when the grid fails, the grid-connected mode control is adopted. When the grid returns to normal, the grid-forming control mode is switched back. However, the current fault ride-through methods all adopt the method of sharing a common current loop in different stages. The current loop reference value switches frequently, which is relatively complex. Either a ramp switch is required, affecting the switching speed; or additional state following control is required, and the control implementation is complex. Summary of the Invention

[0004] The present application provides an inverter fault ride-through method, device, control device, storage medium, and product to simplify the inverter fault ride-through control and improve the switching efficiency of the inverter.

[0005] In a first aspect, an embodiment of the present application provides an inverter fault ride-through method, including:

[0006] In a normal grid state, the inverter operates in the grid-forming mode, adopts virtual synchronous generator (VSG) control, records the value of the reactive power loop integrator, and operates a phase-locked loop control to record the angle difference between the VSG self-synchronization angle and the phase-locked angle of the phase-locked loop;

[0007] In a grid fault state, the inverter operates in the grid-connected mode and adopts current loop control and phase-locked loop control;

[0008] In the case of power grid fault recovery, the inverter operates in the grid-following mode, adopts current loop control and phase-locked loop control, and assigns values to the integrators in the VSG control according to the recorded angle difference, the value of the reactive power loop integrator, and the values of each loop in the grid-following mode control;

[0009] After the power grid has been restored for a period of time, the inverter switches to the operating state when the power grid is normal.

[0010] In a second aspect, an inverter fault ride-through device provided by an embodiment of the present application includes:

[0011] A first control module, configured to, when the power grid is in a normal state, the inverter operates in the grid-forming mode, adopts virtual synchronous generator (VSG) control, records the value of the reactive power loop integrator, and operates the phase-locked loop control to record the angle difference between the VSG self-synchronization angle and the phase-locked angle of the phase-locked loop;

[0012] A second control module, configured to, when the power grid is in a fault state, the inverter operates in the grid-following mode, and adopts current loop control and phase-locked loop control;

[0013] A third control module, configured to, in the case of power grid fault recovery, the inverter operates in the grid-following mode, adopts current loop control and phase-locked loop control, and assigns values to the integrators in the VSG control according to the recorded angle difference, the value of the reactive power loop integrator, and the values of each loop in the grid-following mode control;

[0014] A switching module, configured to, after the power grid has been restored for a period of time, switch the inverter to the operating state when the power grid is normal.

[0015] In a third aspect, a control device provided by an embodiment of the present application includes:

[0016] One or more processors;

[0017] A storage device, configured to store one or more programs;

[0018] When the one or more programs are executed by the one or more processors, the one or more processors implement the inverter fault ride-through method as described in the first aspect.

[0019] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the inverter fault ride-through method as described in the first aspect is implemented.

[0020] In a fifth aspect, an embodiment of the present application further provides a computer program product, including a computer program and / or instructions, and when the computer program and / or instructions are executed by a processor, the inverter fault ride-through method as described in any of the above embodiments is implemented.

[0021] The embodiments of the present application provide an inverter fault ride-through method, device, control device, storage medium, and product. The inverter fault ride-through method includes: in the normal state of the power grid, the inverter operates in the grid-forming mode, adopts virtual synchronous generator (VSG) control, records the value of the reactive power loop integrator, and runs the phase-locked loop (PLL) control to record the angle difference between the VSG self-synchronization angle and the phase-locked angle of the PLL; in the fault state of the power grid, the inverter operates in the grid-following mode and adopts current loop control and PLL control; in the case of power grid fault recovery, the inverter operates in the grid-following mode, adopts current loop control and PLL control, and assigns values to the integrator in the VSG control according to the recorded angle difference, the value of the reactive power loop integrator, and the values of each loop controlled in the grid-following mode; after the power grid has recovered for a period of time, the inverter switches to the working state when the power grid is normal. The above technical solution simplifies the inverter fault ride-through control process and improves the switching efficiency by adopting different loop controls and using the recorded values of the PLL control to assign values to the integrator in the VSG control during the fault recovery stage. Description of the Drawings

[0022] In combination with the accompanying drawings and with reference to the following specific embodiments, the above and other features, advantages, and aspects of the various embodiments of the present disclosure will become more apparent. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic and that the elements and components are not necessarily drawn to scale.

[0023] Figure 1 It is a schematic diagram of the hardware topology of a three-phase photovoltaic inverter provided by an embodiment of the present application;

[0024] Figure 2 It is a schematic diagram of the operating state of the inverter during a voltage fault provided by an embodiment of the present application;

[0025] Figure 3 It is a flowchart of an inverter fault ride-through method provided by an embodiment of the present application;

[0026] Figure 4 It is a schematic diagram of the active power outer loop and the reactive power outer loop of the VSG control provided by an embodiment of the present application;

[0027] Figure 5 It is a schematic diagram of the virtual impedance link and the voltage and current inner loops of the VSG control provided by an embodiment of the present application;

[0028] Figure 6 It is a schematic diagram of the PLL control provided by an embodiment of the present application;

[0029] Figure 7 It is a schematic diagram of the current loop control provided by an embodiment of the present application;

[0030] Figure 8 Schematic diagram of an inverter fault ride-through process provided by an embodiment of the present application;

[0031] Figure 9 Schematic diagram of fault ride-through waveforms when the grid voltage suddenly drops to 0.2 p.u. provided by an embodiment of the present application;

[0032] Figure 10 Schematic diagram of fault ride-through waveforms when the grid voltage suddenly rises to 1.2 p.u. provided by an embodiment of the present application;

[0033] Figure 11 Schematic diagram of the structure of an inverter fault ride-through device provided by an embodiment of the present application;

[0034] Figure 12 Schematic diagram of the structure of a control device provided by an embodiment of the present application. Detailed implementation manners

[0035] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present application, rather than limiting the present application. In addition, it should be noted that for the convenience of description, only parts related to the present application rather than all structures are shown in the drawings.

[0036] Before discussing the exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe the steps as sequential processes, many of the steps can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operation is completed, but it can also have additional steps not included in the drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0037] It should be noted that the concepts such as "first" and "second" mentioned in the embodiments of the present application are only used to distinguish different devices, modules, units, or other objects, and are not used to limit the order of functions executed by these devices, modules, units, or other objects or their interdependent relationships.

[0038] In addition, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0039] Exemplarily, the hardware topology structure of a typical three-phase inverter grid connection is as Figure 1As shown in the figure, taking a voltage source inverter (VSI) as an example, this inverter uses an LC filter, where L is the filtering inductor and C is the filtering capacitor, and is connected to the power grid through the Point of Common Coupling (PCC). Among them, is the port voltage of the inverter or converter, is the power grid voltage, are respectively the equivalent resistance and inductive reactance of the power grid line impedance. When the power grid is normal, the inverter or converter operates in the grid-forming operation mode, mainly with VSG control.

[0040] When a voltage fault occurs in the power grid, the operating state of the inverter is as shown in Figure 2 (taking low voltage ride-through as an example), which can be divided into three stages: In the first stage, the inverter normally operates in the VSG control mode. When the port voltage of the inverter is lower than the low voltage ride-through threshold or higher than the high voltage ride-through threshold , it is considered that a power grid fault has occurred and enters the second stage; in the second stage, the inverter switches to the grid-following operation mode. When the port voltage of the inverter is higher than the low voltage ride-through threshold and lower than the high voltage ride-through threshold , it is considered that the power grid has recovered and enters the third stage; in the third stage, the inverter continues to operate in the grid-following mode. After a delay of a period of time , it switches back to the VSG control mode in the first stage.

[0041] Figure 3 FIG.

[0042] As shown in Figure 3 , this method specifically includes the following steps:

[0043] S110. In the normal state of the power grid, the inverter operates in the grid-forming mode, adopts virtual synchronous generator VSG control, records the value of the reactive power loop integrator, and operates the phase-locked loop control, and records the angle difference between the VSG self-synchronization angle and the phase-locked angle of the phase-locked loop.

[0044] In this embodiment, the normal state of the power grid can be understood as the state where no fault occurs in the power grid, corresponding to the first stage of the above-mentioned operating state of the inverter. In the first stage, the inverter uses VSG control to obtain a modulation wave of Pulse Width Modulation (PWM). VSG control can be understood as simulating the operating characteristics (such as damping and moment of inertia) of a synchronous generator by controlling the output current and voltage of the inverter. For the angular frequency of VSG control Integrating gives the self-synchronization angle of VSG , and the simplified expression is: ; where is the reference active power, is the actual value of active power, is the rated angular frequency, is the virtual inertia, is the damping coefficient, is the active-power frequency droop coefficient, is the differential operator.

[0045] In this embodiment, in the first stage, the current-loop control of the grid-following mode freezes, but the phase-locked loop (PLL) control can operate. The phase-locked loop (PLL) control is mainly used to achieve the synchronous control of the inverter for synchronous operation. By monitoring and adjusting the frequency and phase of the power system, the PLL makes the current and voltage of the inverter in phase with the power system, thereby improving the operating stability and efficiency of the inverter.

[0046] In the first stage, on the one hand, the value of the VSG reactive-power loop integrator can be recorded regularly, denoted as , and it will no longer be updated when entering the second stage. Among them, as shown in Figure 4 , is the difference between the no-load electromotive force and the rated no-load electromotive force, that is ; on the other hand, the difference between the VSG self-synchronization angle ( ) and the PLL phase-locked angle ( ), that is, the angle difference, can be recorded regularly, denoted as ; the recorded angle difference will no longer be updated after entering the second stage. ; the recorded angle difference will no longer be updated after entering the second stage.

[0047] S120. In the case of a power grid fault, the inverter operates in the grid-following mode and uses current-loop control and phase-locked loop control.

[0048] In this embodiment, when a power grid fault occurs, it enters the second stage, and the phase-locked loop control and current-loop control can operate for fault ride-through; in addition, in the second stage, the VSG control freezes, that is, no processing is done to the VSG control loop.

[0049] S130. In the case of grid fault recovery, the inverter operates in the grid - following mode, adopts current - loop control and phase - locked loop control, and assigns values to the integrators in the VSG control according to the recorded angle difference, the value of the reactive - loop integrator, and the values of each loop in the grid - following mode control.

[0050] In this embodiment, after the grid fault is recovered, the inverter enters the third stage, adopts the grid - following control mode, operates the phase - locked loop control and the current - loop control, and can perform PWM modulation by obtaining the modulation voltage according to the current reference value and the current - loop control. In addition, the values of each integrator in the VSG control can be assigned according to the following loop values: the change in the VSG angular frequency, the VSG self - synchronization angle, the value of the reactive - loop integrator, the integrators in the integral control of the direct - axis and quadrature - axis voltage loops, and the integrators in the integral control of the direct - axis and quadrature - axis current loops.

[0051] It can be understood that in the third stage, the control of the inverter is realized by the current - loop control and the phase - locked loop control. At this time, the purpose of simultaneously executing the VSG control is mainly to perform the integrator value assignment process, but the VSG control is not used as the control of the inverter.

[0052] S140. After the grid is restored for a period of time, the inverter switches to the working state when the grid is normal. In this embodiment, the duration of the third stage can be timed. When the duration exceeds the set threshold ( ), it can be switched back to the first stage to achieve smooth switching. Among them, can be set according to specific conditions, and this value is related to the selection of control parameters.

[0053] An inverter fault - ride - through method provided by an embodiment of the present application simplifies the inverter fault - ride - through control process and improves the switching efficiency by adopting different loop controls in different stages and using the recorded values of the phase - locked loop control to assign values to the integrators in the VSG control during the fault - recovery stage.

[0054] In one embodiment, the method further includes:

[0055] Determine the VSG control parameters in the normal state of the grid.

[0056] In this embodiment, for the first stage, VSG control is adopted. The VSG control parameters include: power outer - loop control parameters, virtual - impedance control parameters, and voltage - current inner - loop control parameters; among them, the power outer - loop control parameters include the VSG self - synchronization angle corresponding to the active - power outer - loop ( , which can be obtained by integrating the angular frequency of the VSG control), and the no - load electromotive force corresponding to the reactive - power outer - loop ( ); the virtual - impedance control parameters include the port - voltage reference value (including the d - axis and q - axis port - voltage reference values ); The inner-loop control parameters of voltage and current include the inner-loop reference value of current (including the inner-loop reference values of d-axis and q-axis currents ) and the inner-loop modulated voltage of current (including the inner-loop reference values of d-axis and q-axis currents ).

[0057] Figure 4 It is a schematic diagram of the outer loop of active power and the outer loop of reactive power for VSG control. As Figure 4 shown, the outer loop of active power includes an active-power-frequency droop link, a virtual inertia (J) link, and a damping (D) link; the outer loop of reactive power includes a reactive-power-voltage droop link and an integral link. The simplified expression of the corresponding no-load electromotive force is: ; where is the reactive power reference, is the actual value of reactive power, is the reactive-power-voltage droop coefficient, is the integral coefficient, is the rated no-load electromotive force of VSG, is the rated grid connection point voltage.

[0058] Figure 5 It is a schematic diagram of the virtual impedance link and the inner loop of voltage and current for VSG control. As Figure 5 shown, using the VSG self-synchronization angle to perform Park transformation on the inverter terminal voltage , the inverter current , to obtain the d-axis and q-axis voltages in the grid-forming mode, and the d-axis and q-axis currents . After the VSG no-load electromotive force passes through the virtual impedance, the d-axis and q-axis port voltage reference values are obtained, and the expression is:

[0059] ;

[0060] where is the VSG virtual resistance, is the VSG virtual inductive reactance. After passing through the voltage inner loop, the d-axis and q-axis inner-loop reference values of current are obtained, and the expression is:

[0061] ;

[0062] where is the proportional coefficient of the voltage-loop PI controller, is the integral coefficient of the voltage-current-loop PI controller. After passing through the current inner loop, the d-axis and q-axis modulated voltages are obtained, and the expression is:

[0063] ;

[0064] Among them, is the proportional coefficient of the current loop PI controller, is the integral coefficient of the current loop PI controller. The obtained modulation voltage is sent to the PWM link for modulation.

[0065] In one embodiment, the method further includes:

[0066] Determine the phase-locked loop control parameters under normal grid conditions.

[0067] In this embodiment, for the second stage, phase-locked loop control is adopted, and the phase-locked loop control parameters include the phase-locked angle ( ).

[0068] Determine the phase-locked loop control parameters under normal grid conditions, including:

[0069] Perform Clarke transformation on the port voltage ( ) in the three-phase stationary coordinate system to obtain the port voltage ( ) in the two-phase stationary coordinate system;

[0070] Perform Park transformation on the port voltage in the two-phase stationary coordinate system to obtain the voltages on the direct axis and quadrature axis in the grid-following mode ( );

[0071] Determine the phase-locked angle ( ) according to the voltages on the direct axis and quadrature axis in the grid-following mode.

[0072] Figure 6 is a schematic diagram of the phase-locked loop control. As Figure 6 shown, first perform Clarke transformation on the port voltage in the ABC three-phase stationary coordinate system to obtain coordinate system voltage (i.e., the port voltage in the two-phase stationary coordinate system) ; then use the phase-locked angle to perform Park transformation on to obtain the d-axis and q-axis voltages ; after phase-locked loop control, obtain the PLL output, that is, the phase-locked angle , and the expression is:

[0073] ;

[0074] Among them, is the output of the phase-locked loop PI controller, is the proportional coefficient of the phase-locked loop PI controller, is the integral coefficient of the phase-locked loop PI controller.

[0075] In one embodiment, the method further includes:

[0076] Determining the current loop control parameters under the power grid fault condition.

[0077] In this embodiment, for the second stage, current loop control is adopted. The current loop control parameters include the modulation voltages of the direct axis and the quadrature axis in the grid-following mode ( ).

[0078] Determining the current loop control parameters under the power grid fault condition includes: performing Park transformation on the port voltage ( ) and the inverter current ( ) in the three-phase stationary coordinate system to obtain the voltages ( ) and currents ( ) of the direct axis and the quadrature axis in the grid-following mode; determining the modulation voltages of the direct axis and the quadrature axis in the grid-following mode according to the current reference values of the direct axis and the quadrature axis ( ) and the voltages and currents of the direct axis and the quadrature axis in the grid-following mode ( ); wherein, the current reference values of the direct axis and the quadrature axis can be set according to the standard requirements during the actual fault.

[0079] Figure 7 FIG. is a schematic diagram of the current loop control. As Figure 7 shown, using the phase-locked angle to perform Park transformation on the three-phase inverter port voltage , the inverter current I L to obtain the d-axis and q-axis voltages and the d-axis and q-axis currents in the grid-following mode. The d-axis and q-axis current reference values can be set according to the standard requirements during the actual fault. For example, adopting the national standard, the amplitude of can be set as:

[0080] ;

[0081] wherein, is the per-unit value of the inverter port voltage.

[0082] The modulation voltages of the d-axis and q-axis are obtained through the current inner loop, and the expression is:

[0083] ;

[0084] The obtained modulation voltage is sent to the PWM link for modulation.

[0085] In one embodiment, the method further includes:

[0086] According to the reference value of the inner current loop ( ), the integrator values of the PI controls of the direct-axis and quadrature-axis current loops ( ), and the direct-axis and quadrature-axis currents ( ), determine the current loop control parameters in the case of grid fault recovery; the current loop control parameters include the modulation voltages of the direct-axis and quadrature-axis of the inner current loop.

[0087] In this embodiment, for the third stage, the grid-following control mode is adopted, and the phase-locked loop and the current loop are operated.

[0088] According to the reference value of the inner current loop ( ), the integrator values of the PI controls of the d-axis and q-axis current loops ( ), and the d-axis and q-axis currents ( ), the d-axis and q-axis modulation voltages ( ) of the VSG can be obtained and PWM modulation is performed. The calculation expressions for the d-axis and q-axis modulation voltages ( ) are:

[0089] .

[0090] In one embodiment, the assignment of the integrator in the VSG control according to the recorded angle difference, the integrator value of the reactive power loop, and the values of each loop controlled by the grid-following mode includes:

[0091] Assign the active power loop inertia integrator to the VSG angular frequency change amount ( );

[0092] Assign the angle integrator to the sum of the recorded angle difference ( ) and the phase-locked angle ( );

[0093] Assign the reactive power loop integrator to the recorded integrator value of the reactive power loop ( );

[0094] According to the self-synchronization angle ( ), the phase-locked angle ( ), and the direct-axis and quadrature-axis current reference values ( ), assign values to the integrators of the PI controls of the direct-axis and quadrature-axis voltage loops respectively;

[0095] According to the self-synchronization angle, the phase-locked angle, and the direct-axis and quadrature-axis modulation voltages ( ), assign values to the integrators of the PI controls of the direct-axis and quadrature-axis current loops respectively;

[0096] Among them, the direct-axis and quadrature-axis current reference values ( ) are determined according to the active power reference and the reactive power reference in the VSG control under normal grid conditions.

[0097] As Figure 4 and Figure 5 shown by the dashed box marked with ③. Assign values to the active loop inertia integrator, that is ; assign values to the angle integrator, that is ; assign values to the reactive loop integrator, that is ; where , are the timing record values in the first stage.

[0098] d, q-axis voltage loop PI control integrators are respectively assigned as , and its calculation method is:

[0099] ;

[0100] where the d, q-axis current reference values ( ) can be calculated from the active power reference , reactive power reference in the first stage VSG control, and the calculation expression is:

[0101] .

[0102] After the above processing, the expression of the VSG current loop current reference value is:

[0103] ;

[0104] d, q-axis current loop PI control integrators are respectively assigned as , , and its calculation method is:

[0105] .

[0106] As an example, the high and low voltage fault ride-through process of the inverter based on mode switching is as Figure 8 shown. The inverter normally operates in the grid-forming mode, operates in the grid-following mode during grid faults, and switches from the grid-following mode to the grid-forming mode after the grid fault is restored; specifically as follows:

[0107] In the first stage, the inverter operates normally, adopts VSG control, runs the PLL, backs up the VSG reactive loop integrator value , and the difference between the VSG self-synchronization angle and the PLL phase-locked angle ;

[0108] If , or , the inverter fails and enters the second stage;

[0109] In the second stage, grid-following control is adopted, and each control loop of the VSG is frozen. The current reference values of the direct axis and the quadrature axis ( ) can be set according to the standard requirements during the actual fault period;

[0110] If , the inverter resumes and enters the third stage;

[0111] In the third stage, grid-following control is adopted, and the current reference values of the direct axis and the quadrature axis ( ) can be set according to the operating state before the fault (the active power reference and the reactive power reference in the VSG control under normal grid conditions). Each integrator in the VSG control is continuously assigned values;

[0112] After the third stage lasts for a period of time (exceeding ), it switches to the normal state (the first stage).

[0113] On this basis, the fault ride-through control process of the inverter can be simplified, the switching efficiency can be improved, and smooth switching can be achieved.

[0114] Taking the high and low voltage fault ride-through of a grid-forming energy storage converter (PCS) as an example, the fault ride-through performance is verified. Keeping the active power P = 1 p.u. and the reactive power Q = 0 p.u. unchanged, when the grid voltage suddenly drops from the rated voltage (1 p.u.) to 0.2 p.u. and suddenly rises to 1.2 p.u., the waveforms of the fault ride-through are as shown in Figure 9 and Figure 10 . Selecting the duration of the third stage to be 500 ms. After the grid fails, the converter completes the ride-through in the grid-following mode; after 500 ms when the grid recovers, the converter switches back to the grid-forming VSG control, and the power and current fluctuations during the switching process are very small.

[0115] Figure 11 is a schematic structural diagram of an inverter fault ride-through device provided by an embodiment of the present application. The inverter fault ride-through device provided by this embodiment includes:

[0116] The first control module 210 is used to, when the grid is in the normal state, the inverter operates in the grid-forming mode, adopt the virtual synchronous generator (VSG) control, record the value of the reactive power loop integrator, and operate the phase-locked loop control to record the angle difference between the VSG self-synchronization angle and the phase-locked angle of the phase-locked loop;

[0117] The second control module 220 is used to, when the grid is in the fault state, the inverter operates in the grid-following mode, and adopt the current loop control and the phase-locked loop control;

[0118] The third control module 230 is used to, when the power grid fault is restored, operate the inverter in the grid-following mode, adopt current loop control and phase-locked loop control, and assign values to the integrator in the VSG control according to the recorded angle difference, the value of the reactive power loop integrator, and the values of each loop in the grid-following mode control;

[0119] The switching module 240 is used to, after a period of time when the power grid is restored, switch the inverter to the working state when the power grid is normal.

[0120] By adopting different loop controls and using the recorded values of the phase-locked loop control to assign values to the integrator in the VSG control during the fault recovery stage, the device simplifies the inverter fault ride-through control process and improves the switching efficiency.

[0121] Based on the above embodiments, the device further includes:

[0122] The first determination module is used to determine the VSG control parameters in the normal state of the power grid;

[0123] The VSG control parameters include: power outer loop control parameters, virtual impedance control parameters, and voltage and current inner loop control parameters;

[0124] The power outer loop control parameters include the VSG self-synchronization angle corresponding to the active power outer loop and the no-load electromotive force corresponding to the reactive power outer loop;

[0125] The virtual impedance control parameters include the port voltage reference value;

[0126] The voltage and current inner loop control parameters include the current inner loop reference value and the current inner loop modulation voltage.

[0127] Based on the above embodiments, the device further includes:

[0128] The second determination module is used to determine the phase-locked loop control parameters in the normal state of the power grid, and the phase-locked loop control parameters include the phase-locked angle;

[0129] Determining the phase-locked loop control parameters in the normal state of the power grid includes:

[0130] Performing a Clarke transform on the port voltage in the three-phase stationary coordinate system to obtain the port voltage in the two-phase stationary coordinate system;

[0131] Performing a Park transform on the port voltage in the two-phase stationary coordinate system to obtain the direct-axis and quadrature-axis voltages in the grid-following mode;

[0132] Determining the phase-locked angle according to the direct-axis and quadrature-axis voltages in the grid-following mode.

[0133] Based on the above embodiments, the device further includes:

[0134] A third determination module, configured to determine current loop control parameters under a power grid fault condition; the current loop control parameters include modulation voltages of the direct axis and the quadrature axis in the grid-connected mode;

[0135] The determination of the current loop control parameters under the power grid fault condition includes:

[0136] Performing Park transformation on the port voltage and the inverter current in the three-phase stationary coordinate system to obtain the voltages and currents of the direct axis and the quadrature axis in the grid-connected mode;

[0137] Determining the modulation voltages of the direct axis and the quadrature axis in the grid-connected mode according to the current reference values of the direct axis and the quadrature axis and the voltages and currents of the direct axis and the quadrature axis in the grid-connected mode;

[0138] Wherein, the current reference values of the direct axis and the quadrature axis are set according to the standard requirements during the actual fault period.

[0139] Based on the above embodiments, the device further includes:

[0140] A fourth determination module, configured to determine current loop control parameters in the case of power grid fault recovery according to the current inner loop reference value, the integrator values of the PI control of the direct axis and the quadrature axis current loops, and the direct axis and the quadrature axis currents; the current loop control parameters include modulation voltages of the direct axis and the quadrature axis of the current inner loop;

[0141] Wherein, the current reference values of the direct axis and the quadrature axis are determined according to the active power reference and the reactive power reference in the VSG control under the normal state of the power grid.

[0142] In an embodiment, the assignment of the integrator in the VSG control according to the recorded angle difference, the reactive power loop integrator value, and the respective loop values of the grid-connected mode control includes:

[0143] Assigning the active power loop inertia integrator to the VSG angular frequency change amount;

[0144] Assigning the angle integrator to the sum of the recorded angle difference and the phase-locked angle;

[0145] Assigning the reactive power loop integrator to the recorded reactive power loop integrator value;

[0146] Assigning values to the integrators of the PI control of the voltage loops of the direct axis and the quadrature axis respectively according to the self-synchronization angle, the phase-locked angle, and the current reference values of the direct axis and the quadrature axis;

[0147] Assigning values to the integrators of the PI control of the current loops of the direct axis and the quadrature axis respectively according to the self-synchronization angle, the phase-locked angle, and the modulation voltages of the direct axis and the quadrature axis;

[0148] Wherein, the current reference values of the direct axis and the quadrature axis ( ) are determined according to the active power reference and the reactive power reference in the VSG control under the normal state of the power grid.

[0149] The inverter fault ride-through device provided by the embodiment of the present application can be used to execute the inverter fault ride-through method provided by any of the above embodiments, and has corresponding functions and beneficial effects.

[0150] Figure 12 FIG. shows a schematic structural diagram of a control device 10 that can be used to implement the embodiments of the present application. As Figure 12 shown, the control device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc. Among them, the memory stores a computer program executable by the at least one processor. The processor 11 can execute various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the control device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. The input / output (I / O) interface 15 is also connected to the bus 14.

[0151] Multiple components in the control device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disc, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the control device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks, wireless networks.

[0152] The processor 11 can be various general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above.

[0153] In some embodiments, the methods of the above embodiments may be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed onto the control device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the methods described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the methods of any of the above embodiments by any other suitable means (e.g., by means of firmware).

[0154] The various embodiments of the systems and techniques described above in this document can be implemented in digital electronic circuitry, integrated circuit systems, field programmable gate arrays (FPGA), application specific integrated circuits (ASIC), application specific standard products (ASSP), systems on a chip (SOC), complex programmable logic devices (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special-purpose or general-purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0155] The computer programs for implementing the methods of this application can be written in any combination of one or more programming languages. These computer programs can be provided to the processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer programs are executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer programs can be executed entirely on the machine, partially on the machine, as a stand-alone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0156] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, the computer-readable storage medium can be a machine-readable signal medium. More specific examples of the machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0157] To provide for interaction with a user, the systems and techniques described herein can be implemented on a control device 10 having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the control device 10. Other kinds of devices can also be used to provide for interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0158] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0159] A computing system may include a client and a server. The client and the server are generally far from each other and usually interact via a communication network. The relationship between the client and the server is created by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, solving the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services.

[0160] An embodiment of the present application also provides a computer program product, including a computer program and / or instructions, which, when executed by a processor, implement the inverter fault ride-through method as described in any of the above embodiments.

[0161] It should be understood that various forms of the processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this application can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of this application can be achieved, and no limitation is imposed herein.

[0162] The above specific embodiments do not constitute a limitation on the protection scope of this application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. An inverter fault ride-through method, characterized in that: include: When the power grid is in normal condition, the inverter works in the grid-building mode, adopts the virtual synchronous generator VSG control, records the reactive loop integrator value, and runs the phase-locked loop control, recording the angle difference between the VSG self-synchronization angle and the phase-locked loop phase angle; In the case of a grid fault, the inverter operates in a grid-following mode, using current loop control and phase-locked loop control; When the grid fault is restored, the inverter works in the grid-following mode, adopts current loop control and phase-locked loop control, and assigns the integrator in the VSG control according to the recorded angle difference, reactive loop integrator value and each loop value of the grid-following mode control; After the power grid is restored for a period of time, the inverter switches to the working state when the power grid is normal.

2. The method according to claim 1, characterized in that: Also includes: Determine VSG control parameters under normal grid conditions; The VSG control parameters include: power outer loop control parameters, virtual impedance control parameters and voltage and current inner loop control parameters; The power outer loop control parameters include the VSG self-synchronization angle corresponding to the active outer loop and the no-load electromotive force corresponding to the reactive outer loop; The virtual impedance control parameter includes a port voltage reference value; The voltage and current inner loop control parameters include a current inner loop reference value and a current inner loop modulation voltage.

3. The method according to claim 1, characterized in that Also includes: Determine a phase-locked loop control parameter under a normal state of the power grid, wherein the phase-locked loop control parameter includes a phase-locked angle; The determining of the phase-locked loop control parameters under the normal state of the power grid includes: The port voltage in the three-phase stationary coordinate system is subjected to Clarke transformation to obtain the port voltage in the two-phase stationary coordinate system; Perform Park transformation on the port voltage in the two-phase stationary coordinate system to obtain the voltage of the direct axis and quadrature axis in the grid-following mode; The phase-locking angle is determined according to the voltages of the direct axis and the quadrature axis in the grid-following mode.

4. The method according to claim 1, characterized in that Also includes: Determine the current loop control parameters under the grid fault condition; The current loop control parameters include modulation voltages of the direct axis and quadrature axis in the grid-following mode; The determining of the current loop control parameters under the power grid fault state includes: Perform Park transformation on the port voltage and inverter current in the three-phase stationary coordinate system to obtain the voltage and current of the direct axis and quadrature axis in the grid-following mode; Determine the modulation voltages of the direct axis and the quadrature axis in the grid-following mode according to the current reference values ​​of the direct axis and the quadrature axis and the voltages and currents of the direct axis and the quadrature axis in the grid-following mode; Among them, the current reference values ​​of the direct axis and the quadrature axis are set according to the standard requirements during the actual fault period.

5. The method according to claim 1, characterized in that Also includes: Determine the current loop control parameters in the case of power grid fault recovery according to the current inner loop reference value, the integrator value of the PI control of the direct-axis and quadrature-axis current loops, and the direct-axis and quadrature-axis currents; the current loop control parameters include the modulation voltages of the direct-axis and quadrature-axis of the current inner loop; The direct-axis and quadrature-axis current reference values ​​are determined according to the active power reference and reactive power reference in the VSG control under the normal state of the power grid.

6. The method according to claim 1, characterized in that The step of assigning a value to the integrator in the VSG control according to the recorded angle difference, the reactive loop integrator value, and each loop value of the grid-following mode control includes: Assign the active loop inertia integrator to the VSG angular frequency change; Assign the angle integrator the sum of the recorded angle difference and the phase-locking angle; Assign the reactive loop integrator to the recorded reactive loop integrator value; Assign values ​​to the integrators of the PI control of the voltage loops of the direct axis and the quadrature axis respectively according to the self-synchronization angle, the phase-locking angle and the current reference values ​​of the direct axis and the quadrature axis; According to the self-synchronization angle, the phase-locking angle and the modulation voltage of the direct axis and the quadrature axis, the integrators of the PI control of the current loop of the direct axis and the quadrature axis are assigned values ​​respectively; The direct-axis and quadrature-axis current reference values ​​are determined according to the active power reference and reactive power reference in the VSG control under the normal state of the power grid.

7. An inverter fault ride-through device, characterized in that: include: The first control module is used for, when the power grid is in a normal state, the inverter operates in a grid-building mode, adopts virtual synchronous generator VSG control, records the reactive loop integrator value, and runs phase-locked loop control, and records the angle difference between the VSG self-synchronization angle and the phase-locked loop phase-locked angle; A second control module is used to operate the inverter in a grid-following mode under a grid fault condition, using current loop control and phase-locked loop control; The third control module is used for, when the power grid fault is restored, the inverter operates in the grid-following mode, adopts current loop control and phase-locked loop control, and assigns the integrator in the VSG control according to the recorded angle difference, reactive loop integrator value and each loop value of the grid-following mode control; The switching module is used to switch the inverter to the working state when the power grid is normal after the power grid is restored for a period of time.

8. A control device, characterized in that: include: at least one processor; a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the inverter fault ride-through method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the inverter fault ride-through method according to any one of claims 1 to 6 is implemented.

10. A computer program product comprising a computer program and / or instructions, characterized in that: When the computer program and / or the instructions are executed by the processor, the inverter fault ride-through method according to any one of claims 1 to 6 is implemented.

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