Passive lossless secondary three-level direct current conversion device

Abstract

The invention discloses a passive lossless secondary three-level direct current conversion device, and relates to the technical field of power electronics, the positive electrode of a power supply is sequentially connected in series with an inductor L1, a diode D2, an inductor L2, a switching tube S1, a switching tube S2, an inductor L3 and a diode D5 to be connected to the negative electrode of the power supply; the connection node of the source electrode of the switch tube S1 and the drain electrode of the switch tube S2 is connected to the connection node of the inductor L2 and the diode D2 through the capacitor C1, is connected to the connection node of the inductor L3 and the diode D5 through the capacitor C2, is connected to the connection node of the drain electrode of the switch tube S1 and the inductor L2 through the capacitor C3 and the diode D3, and is connected to the source electrode of the switch tube S2 through the capacitor C4 and the diode D4 in sequence. A connection node of the inductor L3; one end of the resistor R1 is connected to a connection node of the diode D3 and the capacitor C3, and the other end of the resistor R1 is connected to a connection node of the capacitor C4 and the diode D4; the energy loss in the switching process is reduced, and the conversion efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and more particularly to a passive lossless quadratic three-level DC conversion device. Background Art

[0002] Currently, new energy energy storage systems such as solar energy and wind energy need to meet the demand for high voltage during grid connection, which makes boost converters with high voltage gain become key components in new energy energy storage systems. In order to track the maximum power point, these converters must be able to adjust dynamically in real time. However, this process will result in large energy losses. Traditional Boost converters cannot fully meet the requirements due to limited actual voltage gain and large energy losses. Therefore, two-level and three-level Boost converters have been derived to improve voltage gain and reduce voltage stress.

[0003] However, although two-level and three-level Boost converters provide certain improvements, they still face some challenges. In two-level Boost converters, power devices need to withstand high voltage stress. While the three-level structure reduces the voltage stress, it introduces more components, resulting in increased circuit complexity, rising costs, and lower overall efficiency. In addition, with the increase in the power level of new energy power generation systems, higher requirements are put forward for the voltage gain of boost converters. Existing technologies such as "a single-switch Boost three-level converter based on a boost formula", "flying capacitor three-level boost circuit", and "a three-level boost converter and control method" have made improvements in reducing the number of circuit elements, reducing the voltage stress of the lower tube, or reducing the volume and cost, but the common problems are insufficient voltage gain, large voltage stress borne by power devices, and low overall efficiency.

[0004] Therefore, it is an urgent problem for those skilled in the art to develop a boost converter that can significantly improve voltage gain, effectively reduce the voltage stress of power devices, and reduce switching losses while ensuring high efficiency. Summary of the Invention

[0005] In view of this, the present invention provides a passive lossless quadratic three-level DC conversion device, which overcomes the above defects.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] A passive and lossless quadratic three-level DC conversion device, comprising: a power source, an inductor L1, an inductor L2, an inductor L3, a switch tube S1, a switch tube S2, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, and a resistor R1; the positive pole of the power source is sequentially connected in series with the inductor L1, the diode D2, the inductor L2, the switch tube S1, the switch tube S2, the inductor L3, and the diode D5, and one end of the diode D5 is connected to the negative pole of the power source; the connection nodes of the source pole of the switch tube S1 and the drain pole of the switch tube S2 are respectively connected to the connection node between the inductor L2 and the diode D2 through the capacitor C1, to the connection node between the inductor L3 and the diode D5 through the capacitor C2, and sequentially connected to the connection node between the drain pole of the switch tube S1, the inductor L2, and the negative pole of the diode D1 through the capacitor C3 and the diode D3, and sequentially connected to the connection node between the source pole of the switch tube S2, the inductor L3, and the diode D6 through the capacitor C4 and the diode D4; the positive pole of the diode D1 is connected to the connection node between the inductor L1 and the diode D2; the negative pole of the diode D6 is connected to the connection node between the negative pole of the power source and the diode D5; one end of the resistor R1 is connected to the connection node between the diode D3 and the capacitor C3, and the other end is connected to the connection node between the capacitor C4 and the diode D4.

[0008] Optionally, it further includes a soft-switching auxiliary sub-circuit, and the soft-switching auxiliary sub-circuit includes an inductor L4, an inductor L5, a capacitor C5, a capacitor C6, a diode D7, a diode D8, a diode D9, a diode D10, and a diode D11; the inductor L4 is connected in series between the switch tube S1 and the diode D3; the series-connected diode D7 and capacitor C5 are connected in parallel with the inductor L4; the positive pole of the diode D8 is connected to the connection node between the diode D7 and the capacitor C5, and the negative pole of the diode D8 is connected to the connection node between the diode D3 and the capacitor C3; the inductor L5 is connected in series between the switch tube S2 and the diode D4; the series-connected diode D9 and capacitor C6 are connected in parallel with the inductor L5; the negative pole of the diode D10 is connected to the connection node between the diode D9 and the capacitor C6, and the positive pole of the diode D10 is connected to the connection node between the diode D4 and the capacitor C4; the diode D11 is connected in series between the capacitor C5 and the capacitor C6.

[0009] Optionally, based on the duty cycle, control the zero-current switching of the switch tube S1 and / or the switch tube S2 to achieve switching between three levels of output.

[0010] Optionally, when the duty cycle is less than 0.5, in the first operating mode, the diode D1, the diode D5, the diode D10, and the switching transistor S1 are turned on, the capacitor C6 is completely discharged, and the current of the inductor L4 linearly increases from 0, so that the switching transistor S1 achieves zero-current turn-on.

[0011] Optionally, when the duty cycle is less than 0.5, in the third operating mode, the diodes D2, D4, D5, D7, and D8 are turned on; the currents of the inductors L1, L2, and L3 linearly decrease, and the inductor L4 charges the capacitor C5 until the current of the inductor L4 drops to 0, and based on the parasitic capacitance, the switching transistor S1 achieves zero-voltage turn-off.

[0012] Optionally, when the duty cycle is less than 0.5, in the fourth operating mode, the diodes D2, D6, D8, and the switching transistor S2 are turned on, the currents of the inductors L1 and L3 linearly increase, the current of the inductor L2 linearly decreases, the capacitor C5 is completely discharged, and the current of the inductor L5 linearly increases from 0, so that the switching transistor S2 achieves zero-current turn-on.

[0013] Optionally, when the duty cycle is less than 0.5, in the sixth operating mode, the diodes D2, D3, D5, D9, and D10 are turned on, the currents of the inductors L1, L2, and L3 linearly decrease, the inductor L5 charges the capacitor C6 until the current gradually decreases to 0, and based on the parasitic capacitance, the switching transistor S2 achieves zero-voltage turn-off.

[0014] Optionally, when the duty cycle is greater than 0.5, in the seventh operating mode, the diodes D1, D6, the switching transistors S1 and S2 are turned on, the currents of the inductors L1, L2, L3, and L5 linearly increase, and when the switching transistor S1 is about to be turned on, the current of the inductor L4 linearly increases from 0, so that the switching transistor S1 achieves zero-current turn-on.

[0015] Optionally, when the duty cycle is greater than 0.5, in the eighth operating mode, the diodes D1, D5, D9, D10, and the switching transistor S1 are turned on; the currents of the inductors L1 and L3 linearly decrease, the currents of the inductors L2 and L4 linearly increase, the inductor L5 charges the capacitor C6, and the current of the inductor L5 gradually decreases to 0, and based on the parasitic capacitance, the switching transistor S2 achieves zero-voltage turn-off.

[0016] Optionally, when the duty cycle is greater than 0.5, in the tenth operating mode, the diode D1, the diode D6, the switching transistor S1, and the switching transistor S2 are turned on, causing the currents of the inductor L1, the inductor L2, the inductor L3, and the inductor L4 to increase linearly. When the switching transistor S2 is about to be turned on, the current of the inductor L5 starts to increase linearly from 0, enabling the switching transistor S2 to achieve zero-current turn-on.

[0017] Optionally, when the duty cycle is greater than 0.5, when in the eleventh operating mode, the diode D2, the diode D6, the diode D7, the diode D8, and the switching transistor S2 are turned on, causing the currents of the inductor L1 and the inductor L2 to decrease linearly, the currents of the inductor L3 and the inductor L5 to increase linearly, the inductor L4 to charge the capacitor C5, and the current of the inductor L4 to gradually decrease to 0. Based on the parasitic capacitance, the switching transistor S1 achieves zero-voltage turn-off.

[0018] As can be seen from the above technical solutions, compared with the prior art, the present invention discloses a passive and lossless quadratic three-level DC conversion device, which has the following beneficial effects compared with the prior art:

[0019] Improve voltage gain: The quadratic structure can effectively improve the voltage gain, enabling a higher output voltage to be obtained even when the input voltage is low.

[0020] Reduce voltage stress: The introduction of the multi-level structure disperses the voltage stress on the power devices, reduces the maximum voltage borne by a single switching element, thereby reducing the risk of device damage due to overvoltage, and helps to select low-voltage withstand power devices with lower cost and better performance.

[0021] Reduce switching losses: The application of the soft-switching auxiliary circuit realizes zero-current switching (ZCS), greatly reducing the energy loss during the switching process, improving the conversion efficiency, and reducing electromagnetic interference (EMI) and noise at the same time.

[0022] Improve efficiency: Through the energy recovery path, it is ensured that the energy in the auxiliary circuit can be effectively utilized without generating additional losses, further improving the overall efficiency of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained according to the provided drawings without creative efforts.

[0024] Figure 1 Schematic diagram of the main structure of the passive and lossless quadratic three-level DC conversion device provided by the present invention;

[0025] Figure 2 Schematic diagram of the passive and lossless quadratic three-level DC conversion device including a soft-switching auxiliary sub-circuit provided by the present invention;

[0026] Figure 3 Schematic diagram of the working mode principle provided by the present invention. Specific embodiments

[0027] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0028] An embodiment of the present invention discloses a passive and lossless quadratic three-level DC conversion device, including: a power supply, an inductor L1, an inductor L2, an inductor L3, a switching transistor S1, a switching transistor S2, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, and a resistor R1; the positive pole of the power supply is sequentially connected in series with the inductor L1, the diode D2, the inductor L2, the switching transistor S1, the switching transistor S2, the inductor L3, and the diode D5, and one end of the diode D5 is connected to the negative pole of the power supply; the connection nodes of the source of the switching transistor S1 and the drain of the switching transistor S2 are respectively connected to the connection node between the inductor L2 and the diode D2 through the capacitor C1, the connection node between the inductor L3 and the diode D5 through the capacitor C2, and are sequentially connected to the drain of the switching transistor S1, the inductor L2, and the connection node between the negative poles of the diode D1 through the capacitor C3 and the diode D3, and are sequentially connected to the source of the switching transistor S2, the inductor L3, and the connection node between the diode D6 through the capacitor C4 and the diode D4; the positive pole of the diode D1 is connected to the connection node between the inductor L1 and the diode D2; the negative pole of the diode D6 is connected to the connection node between the negative pole of the power supply and the diode D5; one end of the resistor R1 is connected to the connection node between the diode D3 and the capacitor C3, and the other end is connected to the connection node between the capacitor C4 and the diode D4.

[0029] Further, as Figure 1The main circuit of a passive and lossless quadratic three-level DC conversion device is shown, including: switch tube S1, switch tube S2, inductor L1, inductor L2, inductor L3, capacitor C1, capacitor C2, capacitor C3, capacitor C4, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6; the positive pole of the input power supply is connected to one end of inductor L1, and the other end of inductor L1 is respectively connected to the positive poles of diode D1 and diode D2; the negative pole of diode D2 is connected to one end of inductor L2 and one end of capacitor C1; the other end of inductor L2 is respectively connected to the negative pole of diode D1, the positive pole of diode D3, and the drain of switch tube S1; the negative pole of diode D3 is connected to one end of capacitor C3 and one end of load R1; the other end of load R1 is connected to one end of capacitor C4 and the positive pole of diode D4; the other end of capacitor C4 is connected to the other end of capacitor C3 and the source of switch tube S1; the negative pole of diode D4 is connected to the source of switch tube S2, one end of inductor L3, and the positive pole of diode D6; the drain of switch tube S2 is connected to the source of switch tube S1, the other end of capacitor C1, and one end of capacitor C2; the other end of inductor L3 is connected to the other end of capacitor C2 and the positive pole of diode D5; the negative pole of diode D5 is connected to the negative pole of diode D6 and the negative pole of the power supply.

[0030] In an embodiment, it further includes a soft-switching auxiliary sub-circuit. The soft-switching auxiliary sub-circuit includes inductor L4, inductor L5, capacitor C5, capacitor C6, diode D7, diode D8, diode D9, diode D10, diode D11; inductor L4 is connected in series between switch tube S1 and diode D3; the series-connected diode D7 and capacitor C5 are connected in parallel with inductor L4; the positive pole of diode D8 is connected to the connection node between diode D7 and capacitor C5, and the negative pole of diode D8 is connected to the connection node between diode D3 and capacitor C3; inductor L5 is connected in series between switch tube S2 and diode D4; the series-connected diode D9 and capacitor C6 are connected in parallel with inductor L5; the negative pole of diode D10 is connected to the connection node between diode D9 and capacitor C6, and the positive pole of diode D10 is connected to the connection node between diode D4 and capacitor C4; diode D11 is connected in series between capacitor C5 and capacitor C6.

[0031] As Figure 2 shown, the passive and lossless quadratic three-level DC conversion device containing the soft-switching auxiliary sub-circuit, that is, in Figure 1On this basis, a soft-switching auxiliary sub-circuit is added; the soft-switching auxiliary sub-circuit includes: inductor L4, inductor L5, capacitor C5, capacitor C6, diode D7, diode D8, diode D9, diode D10, diode D11; inductor L4 is serially connected between the drain of the main-circuit switch tube S1 and the anode of diode D3; inductor L5 is serially connected between the source of the main-circuit switch tube S2 and the cathode of switch tube D4; the anode of diode D7 is connected to the drain of switch tube S1; the cathode of diode D7 is connected to the anode of diode D8 and one end of capacitor C5; the other end of capacitor C5 is connected to the cathode of diode D11 and the anode of diode D3; the cathode of diode D8 is connected to the cathode of diode D3; the cathode of diode D9 is connected to the source of switch tube S2; the anode of diode D9 is connected to the cathode of diode D10 and one end of capacitor C6; the other end of capacitor C6 is connected to the anode of diode D11 and the cathode of diode D4; the anode of diode D10 is connected to the anode of diode D4.

[0032] In one embodiment, based on the duty cycle, switch tube S1 and / or switch tube S2 are controlled for zero-current switching to achieve switching of the output among three levels.

[0033] Further, as Figure 3 shown, 12 working modes are disclosed in this embodiment, among which there are 6 working modes when the duty cycle d < 0.5; there are 6 working modes when the duty cycle d > 0.5.

[0034] In one embodiment, when the duty cycle is less than 0.5, in the first working mode, diode D1, diode D5, diode D10, and switch tube S1 are turned on, capacitor C6 is completely discharged, and the current of inductor L4 starts to linearly increase from 0, enabling switch tube S1 to achieve zero-current conduction.

[0035] Further, when in the first working mode, the schematic diagram is as shown in Figure 3 (a) below, diode D1, diode D5, diode D10, and switch tube S1 are turned on; the currents of inductors L1 and L2 linearly increase, with the current direction to the right, and the current of inductor L3 linearly decreases, with the current direction to the left. Since the current of inductor L4 starts to linearly increase from 0 and the current direction is to the right, switch tube S1 achieves ZCS and the conduction loss is zero. Capacitor C6 discharges and the voltage gradually decreases to zero.

[0036] In one embodiment, when the duty cycle is less than 0.5, when in the second working mode, the schematic diagram is as shown in Figure 3 (b) below, diode D1, diode D4, diode D5, and switch tube S1 are turned on. The currents of inductors L1, L2, and L4 linearly increase, with the current direction to the right, and the current of inductor L3 linearly decreases, with the current direction to the left.

[0037] In one embodiment, when the duty cycle is less than 0.5, in the third operating mode, diodes D2, D4, D5, D7, and D8 are turned on; the currents of inductors L1, L2, and L3 linearly decrease, and inductor L4 charges capacitor C5 until the current of inductor L4 drops to 0. Due to the existence of parasitic capacitance, when switch S1 is turned off, the voltage starts to rise from 0, enabling switch S1 to achieve zero-voltage turn-off.

[0038] Further, when in the third operating mode, the schematic diagram is as shown in Figure 3 (c) below. Diodes D2, D4, D5, D7, and D8 are turned on. The currents of inductors L1 and L2 linearly decrease, with the current direction to the right, and the current of inductor L3 linearly decreases, with the current direction to the left. Inductor L4 charges capacitor C5, and the current of inductor L4 gradually decreases to 0, while the voltage of capacitor C5 continuously increases.

[0039] In one embodiment, when the duty cycle is less than 0.5, in the fourth operating mode, diodes D2, D6, D8, and switch S2 are turned on, causing the currents of inductors L1 and L3 to linearly increase, the current of inductor L2 to linearly decrease, capacitor C5 to fully discharge, and the current of inductor L5 to linearly increase from 0, enabling switch S2 to achieve zero-current turn-on.

[0040] Further, when in the fourth operating mode, the schematic diagram is as shown in Figure 3 (d) below. Diodes D2, D6, D8, and switch S2 are turned on. The current of inductor L1 linearly increases, with the current direction to the right, the current of inductor L2 linearly decreases, with the current direction to the right, and the current of inductor L3 linearly increases, with the current direction to the left. The current of inductor L5 increases from 0, with the current direction to the left, enabling switch S2 to achieve ZCS and the conduction loss to be zero. Capacitor C5 discharges, and the voltage gradually decreases to 0.

[0041] In one embodiment, when the duty cycle is less than 0.5, when in the fifth operating mode, the schematic diagram is as shown in Figure 3 (e) below. Diodes D2, D3, D6, and switch S2 are turned on. The current of inductor L1 linearly increases, with the current direction to the right, the current of inductor L2 linearly decreases, with the current direction to the right, and the currents of inductors L3 and L5 linearly increase, with the current direction to the left.

[0042] In one embodiment, when the duty cycle is less than 0.5, in the sixth operating mode, diodes D2, D3, D5, D9, and D10 conduct, causing the currents of inductors L1, L2, and L3 to decrease linearly. Inductor L5 charges capacitor C6 until the current gradually decreases to 0. Due to the existence of parasitic capacitance, when switch S2 turns off, the voltage starts to rise from 0, enabling switch S2 to achieve zero-voltage turn-off.

[0043] Further, when in the sixth operating mode, the schematic diagram is as shown in Figure 3 (f). Diodes D2, D3, D5, D9, and D10 conduct. The currents of inductors L1 and L2 decrease linearly, with the current direction to the right. The current of inductor L3 decreases linearly, with the current direction to the left. Inductor L5 charges capacitor C6, and the current gradually decreases to 0, while the voltage of capacitor C6 continuously increases.

[0044] In one embodiment, when the duty cycle is greater than 0.5, in the seventh operating mode, diodes D1, D6, switch S1, and switch S2 conduct, causing the currents of inductors L1, L2, L3, and L5 to increase linearly. When switch S1 is about to conduct, the current of inductor L4 starts to increase linearly from 0, enabling switch S1 to achieve zero-current turn-on.

[0045] Further, when in the seventh operating mode, the schematic diagram is as shown in Figure 3 (g). Diodes D1, D6, switch S1, and switch S2 conduct. The currents of inductors L1 and L2 increase linearly, with the current direction to the right. The currents of inductors L3 and L5 increase linearly, with the current direction to the left. Switch S1 is about to conduct, and the current of inductor L4 starts to increase, enabling switch S1 to achieve ZCS with zero conduction loss.

[0046] In one embodiment, when the duty cycle is greater than 0.5, in the eighth operating mode, diodes D1, D5, D9, D10, and switch S1 conduct; causing the currents of inductors L1 and L3 to decrease linearly, the currents of inductors L2 and L4 to increase linearly, inductor L5 to charge capacitor C6, and the current of inductor L5 to gradually decrease to 0. Due to the existence of parasitic capacitance, when switch S2 turns off, the voltage starts to rise from 0, enabling switch S2 to achieve zero-voltage turn-off.

[0047] Further, when in the eighth operating mode, the schematic diagram is as shown in Figure 3As shown in Fig. (h), diode D1, diode D5, diode D9, diode D10, and switch S1 are turned on; the current of inductor L1 decreases linearly with the current direction to the right, the currents of inductors L2 and L4 increase with the current direction to the right, and the current of inductor L3 decreases with the current direction to the left. Inductor L5 charges capacitor C6, the current of inductor L5 gradually decreases to zero, and the voltage of capacitor C6 continuously increases.

[0048] In one embodiment, when the duty cycle is greater than 0.5, when in the ninth operating mode, the schematic diagram is as shown in Figure 3 Fig. (a). Diode D1, diode D5, diode D10, and switch S1 are turned on. The current of inductor L1 decreases linearly with the current direction to the right, the currents of inductors L2 and L4 increase with the current direction to the right, and the current of inductor L3 decreases with the current direction to the left. Capacitor C6 starts to discharge and the voltage gradually decreases to zero.

[0049] In one embodiment, when the duty cycle is greater than 0.5, in the tenth operating mode, diode D1, diode D6, switch S1, and switch S2 are turned on, causing the currents of inductors L1, L2, L3, and L4 to increase linearly. When switch S2 is about to turn on, the current of inductor L5 starts to increase linearly from 0, enabling switch S2 to achieve zero-current turn-on.

[0050] Furthermore, when in the tenth operating mode, the schematic diagram is as shown in Figure 3 Fig. (g). Diode D1, diode D6, switch S1, and switch S2 are turned on. The currents of inductors L1 and L2 increase linearly with the current direction to the right, and the currents of inductors L3 and L4 increase linearly with the current direction to the left. Switch S2 is about to turn on, and the current of inductor L5 starts to increase from 0, enabling switch S2 to achieve ZCS with zero turn-on loss.

[0051] In one embodiment, when the duty cycle is greater than 0.5, when in the eleventh operating mode, diode D2, diode D6, diode D7, diode D8, and switch S2 are turned on, causing the currents of inductors L1 and L2 to decrease linearly, the currents of inductors L3 and L5 to increase linearly, inductor L4 to charge capacitor C5, and the current of inductor L4 to gradually decrease to 0. Due to the existence of parasitic capacitance, when switch S1 turns off, the voltage starts to rise from 0, enabling switch S1 to achieve zero-voltage turn-off.

[0052] Further, when the duty cycle is greater than 0.5 and in the eleventh operating mode, the schematic diagram is as shown in Fig. 3(i). Diode D2, diode D6, diode D7, diode D8, and switch S2 are turned on. The currents of inductor L1 and inductor L2 continuously decrease, with the current direction to the right. The currents of inductor L3 and inductor L5 continuously increase, with the current direction to the left. Inductor L4 charges capacitor C5, and the current of inductor L4 gradually decreases to 0 while the voltage of capacitor C5 continuously increases.

[0053] In one embodiment, when the duty cycle is greater than 0.5 and in the twelfth operating mode, the schematic diagram is as Figure 3 shown in Fig. (d). Diode D2, diode D6, diode D8, and switch S2 are turned on. The currents of inductor L1 and inductor L2 continuously decrease, with the current direction to the right. The currents of inductor L3 and inductor L5 continuously increase, with the current direction to the left. Capacitor C5 discharges and its voltage gradually decreases to zero.

[0054] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple. For the relevant parts, refer to the description of the method part.

[0055] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. A passive lossless quadratic three-level DC converter, characterized in that: include: A power supply, an inductor L1, an inductor L2, an inductor L3, a switch tube S1, a switch tube S2, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, and a resistor R1; the positive electrode of the power supply is sequentially connected in series with the inductor L1, the diode D2, the inductor L2, the switch tube S1, the switch tube S2, the inductor L3, and the diode D5, and one end of the diode D5 is connected to the negative electrode of the power supply; the connection node of the source of the switch tube S1 and the drain of the switch tube S2 is respectively connected to the connection node between the inductor L2 and the diode D2 through the capacitor C1, and connected to the connection node between the inductor L3 and the resistor R1 through the capacitor C2. The connection node of the diode D5 is connected to the drain of the switch tube S1, the inductor L2, and the connection node between the cathode of the diode D1 through the capacitor C3 and the diode D3 in sequence, and is connected to the source of the switch tube S2, the connection node between the inductor L3 and the diode D6 through the capacitor C4 and the diode D4 in sequence; the anode of the diode D1 is connected to the connection node between the inductor L1 and the diode D2; the cathode of the diode D6 is connected to the connection node between the cathode of the power supply and the diode D5; one end of the resistor R1 is connected to the connection node between the diode D3 and the capacitor C3, and the other end is connected to the connection node between the capacitor C4 and the diode D4.

2. A passive lossless quadratic three-level DC converter according to claim 1, characterized in that: The invention also includes a soft switch auxiliary subcircuit, which includes an inductor L4, an inductor L5, a capacitor C5, a capacitor C6, a diode D7, a diode D8, a diode D9, a diode D10, and a diode D11; the inductor L4 is connected in series between the switch tube S1 and the diode D3; the diode D7 and the capacitor C5 connected in series are connected in parallel with the inductor L4; the positive electrode of the diode D8 is connected to the connection node between the diode D7 and the capacitor C5, and the negative electrode of the diode D8 is connected to the connection node between the diode D3 and the capacitor C3; the inductor L5 is connected in series between the switch tube S2 and the diode D4; the diode D9 and the capacitor C6 connected in series are connected in parallel with the inductor L5; the negative electrode of the diode D10 is connected to the connection node between the diode D9 and the capacitor C6, and the positive electrode of the diode D10 is connected to the connection node between the diode D4 and the capacitor C4; the diode D11 is connected in series between the capacitor C5 and the capacitor C6.

3. A passive lossless quadratic three-level DC converter according to claim 2, characterized in that: The switch tube S1 and / or the switch tube S2 are controlled to switch to zero current based on the duty cycle, so that the output switches between three levels.

4. A passive lossless quadratic three-level DC converter according to claim 3, characterized in that: When the duty cycle is less than 0.5, in the first working mode, the diode D1, the diode D5, the diode D10, and the switch tube S1 are turned on, the capacitor C6 is fully discharged, and the current of the inductor L4 increases linearly from 0, so that the switch tube S1 is turned on with zero current.

5. The passive lossless quadratic three-level DC converter according to claim 4, characterized in that: When the duty cycle is less than 0.5, in the third working mode, the diode D2, the diode D4, the diode D5, the diode D7, and the diode D8 are turned on; the currents of the inductor L1, the inductor L2, and the inductor L3 are linearly reduced, and the inductor L4 charges the capacitor C5 until the current of the inductor L4 drops to 0, so that the switch tube S1 is turned off at zero voltage based on the parasitic capacitance.

6. The passive lossless quadratic three-level DC converter according to claim 3, characterized in that: When the duty cycle is less than 0.5, in the fourth working mode, the diode D2, the diode D6, the diode D8, and the switch tube S2 are turned on, so that the currents of the inductor L1 and the inductor L3 increase linearly, the current of the inductor L2 decreases linearly, the capacitor C5 is completely discharged, and the current of the inductor L5 increases linearly from 0, so that the switch tube S2 is turned on at zero current.

7. The passive lossless quadratic three-level DC converter according to claim 6, characterized in that: When the duty cycle is less than 0.5, in the sixth working mode, the diode D2, the diode D3, the diode D5, the diode D9, and the diode D10 are turned on, so that the currents of the inductor L1, the inductor L2, and the inductor L3 are linearly reduced, and the inductor L5 charges the capacitor C6 until the current gradually decreases to 0, so that the switch tube S2 is turned off by zero voltage based on the parasitic capacitance.

8. The passive lossless quadratic three-level DC converter according to claim 3, characterized in that: When the duty cycle is greater than 0.5, in the seventh working mode, the diode D1, the diode D6, the switch tube S1, and the switch tube S2 are turned on, so that the currents of the inductor L1, the inductor L2, the inductor L3, and the inductor L5 increase linearly. When the switch tube S1 is about to be turned on, the current of the inductor L4 increases linearly from 0, so that the switch tube S1 is turned on with zero current.

9. The passive lossless quadratic three-level DC converter according to claim 8, characterized in that: When the duty cycle is greater than 0.5, in the eighth working mode, the diode D1, the diode D5, the diode D9, the diode D10, and the switch tube S1 are turned on; the currents of the inductor L1 and the inductor L3 are linearly reduced, and the currents of the inductor L2 and the inductor L4 are linearly increased, the inductor L5 charges the capacitor C6, and the current of the inductor L5 gradually decreases to 0, and the switch tube S2 is turned off at zero voltage based on the parasitic capacitance.

10. The passive lossless quadratic three-level DC converter according to claim 8, characterized in that: When the duty cycle is greater than 0.5, when in the eleventh working mode, the diode D2, the diode D6, the diode D7, the diode D8, and the switch tube S2 are turned on, so that the current of the inductor L1 and the inductor L2 decreases linearly, and the current of the inductor L3 and the inductor L5 increases linearly, the inductor L4 charges the capacitor C5, and the current of the inductor L4 gradually decreases to 0, and the switch tube S1 is turned off at zero voltage based on the parasitic capacitance.

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