Soft start circuit for reducing current backflow of synchronous rectification circuit

Abstract

The invention discloses a soft start circuit for reducing current backflow of a synchronous rectification circuit, and belongs to the field of DC / DC converters, the soft start circuit comprises an input end circuit and an output end circuit, and the input end circuit is connected with the output end circuit through a transformer T; the input end circuit comprises an MOS (Metal Oxide Semiconductor) tube MOS1, an MOS tube MOS2, a power supply VIN, an inductor Lin, a capacitor C1 and a capacitor C2; and the output end circuit comprises an MOS (Metal Oxide Semiconductor) tube MOS3, an MOS tube MOS4, an MOS tube MOS5, an MOS tube MOS6, an inductor Lo and a capacitor C3. According to the invention, the duty ratios of the driving signals of the input side switch tube and the output side synchronous rectifier tube are both slowly increased, so that the converter is prevented from being damaged due to overlarge backward current in the starting process, the reliability of the converter is improved, and the fluctuation of the output voltage in the starting process is reduced at the same time. The soft start for reducing the output voltage drop is realized. The implementation mode is simple and efficient, and the volume occupation of the converter is reduced.

Description

Technical Field

[0001] The present invention relates to the field of DC / DC converters, and specifically to a soft start circuit for reducing current reverse injection in a synchronous rectification circuit. Background Art

[0002] In the topology of a DC / DC converter, to improve efficiency and dynamic response speed, a synchronous rectification control method is usually adopted on the output side. At the same time, a relatively large-capacity filter capacitor is connected in parallel at the output end to obtain a lower output voltage ripple and a more stable output voltage dynamic process. The digital control method has the advantages of simple control circuit and high flexibility of control method, and can better meet the continuously changing functional requirements of the DC / DC converter, so it is applied more and more widely.

[0003] In the traditional synchronous rectification control method, on the premise of ignoring the dead time, the driving signal of the synchronous rectification MOS tube needs to be complementary to the driving signal of the input-side switching tube. Therefore, during the startup process, the duty cycle of the input-side driving signal increases slowly from the minimum duty cycle d min while the driving signal of the synchronous rectification tube decreases gradually from 1 - d min Although the synchronous rectification scheme can improve the overall efficiency, if a large-capacity capacitor is connected in parallel at the output end and there is still a certain voltage on the capacitor at the startup moment, current reverse injection will occur during the startup process, and current reverse injection is likely to cause damage to the DC / DC converter. At the same time, the output voltage will drop significantly, and the startup process is not smooth enough.

[0004] To improve the reliability of the converter, generally an ideal diode ORing circuit is connected in series at the output end, which usually consists of an ORing control chip and a MOS tube with a low on-resistance. Although this method can solve the problem of current reverse injection, the MOS tube will still cause certain losses, and it increases additional cost and volume, reducing the power density of the converter. Summary of the Invention

[0005] Aiming at the above problems existing in the prior art, the purpose of the present invention is to provide a soft start circuit for reducing current reverse injection in a synchronous rectification circuit to solve the problems mentioned in the above background art.

[0006] To achieve the above purpose, the present invention provides the following technical solutions:

[0007] A soft start circuit for reducing current reverse injection in a synchronous rectification circuit includes an input end circuit and an output end circuit, and the input end circuit is connected to the output end circuit through a transformer T;

[0008] The input end circuit includes a MOS tube MOS1, a MOS tube MOS2, a power supply VIN, an inductor Lin, a capacitor C1, and a capacitor C2;

[0009] The output terminal circuit includes MOS transistor MOS3, MOS transistor MOS4, MOS transistor MOS5, MOS transistor MOS6, inductor Lo, and capacitor C3.

[0010] As a further solution of the present invention: The positive pole of the power supply VIN of the input terminal circuit is connected to one end of the inductor Lin, the other end of the inductor Lin is connected to the drain of the MOS transistor MOS1, and the negative pole of the power supply VIN is grounded;

[0011] The source of the MOS transistor MOS1 is connected to one end of the input side of the transformer T;

[0012] One end of the capacitor C1 is connected to the drain of the MOS transistor MOS1, and the other end of the capacitor C1 is connected to the other end of the input side of the transformer T;

[0013] One end of the capacitor C2 is connected to the source of the MOS transistor MOS2, and the other end of the capacitor C2 is connected to the other end of the input side of the transformer T;

[0014] The drain of the MOS transistor MOS2 is connected to the source of the MOS transistor MOS1;

[0015] The source of the MOS transistor MOS2 is grounded;

[0016] The gate of the MOS transistor MOS1 is connected to the PWM1A signal terminal of the PWM peripheral module of the digital control chip;

[0017] The gate of the MOS transistor MOS2 is connected to the PWM2A signal terminal of the PWM peripheral module of the digital control chip.

[0018] As a further solution of the present invention: The PWM1A signal terminal and the PWM2A signal terminal of the PWM peripheral module of the digital control chip send drive signals to control the MOS transistor MOS1 and the MOS transistor MOS2.

[0019] As a further solution of the present invention: The source of the MOS transistor MOS3 in the output terminal circuit is connected to one end of the output side of the transformer T; the other end of the output side of the transformer T is connected to the source of the MOS transistor MOS5;

[0020] The drain of the MOS transistor MOS3 is connected to the drain of the MOS transistor MOS5;

[0021] The source of the MOS transistor MOS3 is connected to the drain of the MOS transistor MOS4;

[0022] The source of the MOS transistor MOS5 is connected to the drain of the MOS transistor MOS6;

[0023] The sources of the MOS transistor MOS4 and the MOS transistor MOS6 are grounded;

[0024] The drain of MOS transistor MOS3 is connected to one end of inductor Lo, the other end of inductor Lo is connected to one end of capacitor C3, and the other end of capacitor C3 is grounded;

[0025] The gate of MOS transistor MOS3 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip;

[0026] The gate of MOS transistor MOS4 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip;

[0027] The gate of MOS transistor MOS5 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip;

[0028] The gate of MOS transistor MOS6 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip.

[0029] As a further aspect of the present invention: The PWM1B signal terminal and the PWM2B signal terminal of the PWM peripheral module of the digital control chip send drive signals to control MOS transistor MOS3, MOS transistor MOS4, MOS transistor MOS5, and MOS transistor MOS6.

[0030] As a further aspect of the present invention: MOS transistor MOS1 and MOS transistor MOS2 are respectively input - side switching transistors.

[0031] As a further aspect of the present invention: Inductor Lin is an input filter inductor, and inductor Lo is an output filter inductor.

[0032] As a further aspect of the present invention: Capacitors C1 and C2 are input filter capacitors.

[0033] As a further aspect of the present invention: MOS transistor MOS3, MOS transistor MOS4, MOS transistor MOS5, and MOS transistor MOS6 are respectively output - side synchronous rectification MOS transistors.

[0034] As a further aspect of the present invention: Capacitor C3 is an output filter capacitor.

[0035] Compared with the prior art, the beneficial effects of the present invention are:

[0036] At the startup moment of the present invention, the duty cycles of the driving signals of the input-side switching transistor and the output-side synchronous rectifier transistor both increase slowly, preventing excessive backflow current from damaging the converter during startup, improving the reliability of the converter, and also reducing the fluctuation of the output voltage during startup. Using a digital control chip, the driving signals of the input-side switching transistor and the output-side rectifier transistor of the DC / DC converter are respectively controlled. At the startup moment of the converter, the input-side driving signal and the output-side driving signal increase slowly from the minimum duty cycle until the end of the startup process, and the two driving signals enter the complementary mode for the steady-state working process. During the startup process, a soft startup that reduces the backflow current and decreases the output voltage drop is realized. The present invention does not require additional circuits. Only by using digital control methods and controlling the duty cycle of the MOS transistor driving through a certain algorithm, the soft startup process is realized. The implementation method is simple and efficient, reducing the volume occupation of the converter. Description of the Drawings

[0037] Figure 1 It is a schematic diagram of the topology of a soft startup circuit for reducing current backflow in a synchronous rectification circuit disclosed in the embodiment.

[0038] Figure 2 It is a typical timing diagram of traditional synchronous rectification control.

[0039] Figure 3 It is a typical timing diagram of the synchronous rectification control of a soft startup circuit for reducing current backflow in a synchronous rectification circuit disclosed in the embodiment.

[0040] Figure 4 It is the startup waveform diagram of traditional synchronous rectification control.

[0041] Figure 5 It is the startup waveform diagram of a soft startup circuit for reducing current backflow in a synchronous rectification circuit disclosed in the embodiment. Detailed Embodiments

[0042] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention; obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0043] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "installed", "provided with", "connected", and "coupled" should be understood in a broad sense; for example, it can be a fixed connection, a detachable connection, or an integral connection, it can be a mechanical connection, an electrical connection, a direct connection, or an indirect connection through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0044] Please refer to Figure 1 , a soft start circuit for reducing current reverse injection in a synchronous rectification circuit, including an input terminal circuit and an output terminal circuit, and the input terminal circuit is connected to the output terminal circuit through a transformer T;

[0045] The input terminal circuit includes a MOS transistor MOS1, a MOS transistor MOS2, a power supply VIN, an inductor Lin, a capacitor C1, and a capacitor C2;

[0046] The output terminal circuit includes a MOS transistor MOS3, a MOS transistor MOS4, a MOS transistor MOS5, a MOS transistor MOS6, an inductor Lo, and a capacitor C3.

[0047] The positive electrode of the power supply VIN of the input terminal circuit is connected to one end of the inductor Lin, the other end of the inductor Lin is connected to the drain of the MOS transistor MOS1, and the negative electrode of the power supply VIN is grounded;

[0048] The source of the MOS transistor MOS1 is connected to one end of the input side of the transformer T;

[0049] One end of the capacitor C1 is connected to the drain of the MOS transistor MOS1, and the other end of the capacitor C1 is connected to the other end of the input side of the transformer T;

[0050] One end of the capacitor C2 is connected to the source of the MOS transistor MOS2, and the other end of the capacitor C2 is connected to the other end of the input side of the transformer T;

[0051] The drain of the MOS transistor MOS2 is connected to the source of the MOS transistor MOS1;

[0052] The source of the MOS transistor MOS2 is grounded;

[0053] The gate of the MOS transistor MOS1 is connected to the PWM1A signal terminal of the PWM peripheral module of the digital control chip;

[0054] The gate of the MOS transistor MOS2 is connected to the PWM2A signal terminal of the PWM peripheral module of the digital control chip;

[0055] The PWM1A signal terminal and the PWM2A signal terminal of the PWM peripheral module of the digital control chip send drive signals to control MOS transistor MOS1 and MOS transistor MOS2.

[0056] The source of MOS transistor MOS3 in the output terminal circuit is connected to one end of the output side of transformer T; the other end of the output side of transformer T is connected to the source of MOS transistor MOS5;

[0057] The drain of MOS transistor MOS3 is connected to the drain of MOS transistor MOS5;

[0058] The source of MOS transistor MOS3 is connected to the drain of MOS transistor MOS4;

[0059] The source of MOS transistor MOS5 is connected to the drain of MOS transistor MOS6;

[0060] The sources of MOS transistor MOS4 and MOS transistor MOS6 are grounded;

[0061] The drain of MOS transistor MOS3 is connected to one end of inductor Lo, the other end of inductor Lo is connected to one end of capacitor C3, and the other end of capacitor C3 is grounded;

[0062] The gate of MOS transistor MOS3 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip;

[0063] The gate of MOS transistor MOS4 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip;

[0064] The gate of MOS transistor MOS5 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip;

[0065] The gate of MOS transistor MOS6 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip;

[0066] The PWM1B signal terminal and the PWM2B signal terminal of the PWM peripheral module of the digital control chip send drive signals to control MOS transistor MOS3, MOS transistor MOS4, MOS transistor MOS5, and MOS transistor MOS6.

[0067] MOS transistor MOS1 and MOS transistor MOS2 are respectively input side switching transistors; MOS transistor MOS3, MOS transistor MOS4, MOS transistor MOS5, and MOS transistor MOS6 are respectively output side synchronous rectification MOS transistors.

[0068] The inductor Lin is the input filter inductor, the capacitors C1 and C2 are the input filter capacitors, the inductor Lo is the output filter inductor, and the capacitor C3 is the output filter capacitor. The four drive signals PWM1A, PWM1B, PWM2A, and PWM2B are respectively generated by the PWM peripheral module of the digital control chip and drive MOS1 - MOS6 respectively.

[0069] Figure 2 It is a typical timing diagram of the traditional synchronous rectification control method. PWM1A and PWM1B are complementary, and PWM2A and PWM2B are complementary. It can be seen that the duty cycles of PWM1A and PWM2A gradually increase, and the duty cycles of PWM1B and PWM2B gradually decrease. In this mode, at this time, the output - side MOS transistors MOS3 - MOS6 are in the on - state for a long time. If there is a certain voltage on the output capacitor, the current can easily flow back into the DC / DC converter at the startup moment.

[0070] Figure 3 It is a typical timing diagram of the synchronous rectification control method of the present invention. It can be seen that PWM1A and PWM1B are independently controlled. At the startup moment, they both send waves with the minimum duty cycle and gradually increase the duty cycle. When the output voltage reaches the steady - state output voltage, PWM1A and PWM1B enter the complementary mode. Similarly, PWM2A and PWM2B also send waves according to the above process.

[0071] Figure 4 It is the startup waveform of the traditional synchronous rectification control method. The steady - state output of the DC / DC converter is 36V, and the output terminal is connected to a 10000uF capacitor, and the capacitor is default to have a voltage of 30V. The waveforms are the output current Io, the output voltage Vo, the input - side duty - ratio value Duty_P, and the output - side duty - ratio value Duty_S in sequence. It can be seen that the input - side duty cycle gradually increases, the output - side duty cycle gradually decreases, and the two are always in the complementary mode. At the startup moment, the output current Io has a large reverse - flowing current, the output voltage Vo drops significantly, and then gradually rises to the steady - state output. At the same time, the large reverse - flowing current causes a large jump in the duty cycle.

[0072] Figure 5 It is the startup waveform of the synchronous rectification control method of the present invention. The steady - state output of the DC / DC converter is 36V, and the output terminal is connected to a 10000uF capacitor, and the capacitor is default to have a voltage of 30V. The waveforms are the output current Io, the output voltage Vo, the input - side duty - ratio value Duty_P, and the output - side duty - ratio value Duty_S in sequence. It can be seen that both the input - side and output - side duty cycles gradually increase, and the two reach the complementary mode at the steady state. At the startup moment, the reverse - flowing current of the output current Io is greatly reduced, the output voltage Vo does not drop significantly, the duty cycle does not have an obvious jitter, and the startup process is relatively smooth.

[0073] At the starting moment of the converter, the duty cycles of the driving signals of the input-side switching tube and the output-side synchronous rectifier tube both increase slowly, preventing excessive backflow current from damaging the converter during the starting process, improving the reliability of the converter, and also reducing the fluctuation of the output voltage during the starting process.

[0074] The present invention utilizes a digital control chip to separately control the driving signals of the input-side switching tube and the output-side rectifier tube of the DC / DC converter. At the starting moment of the converter, the input-side driving signal and the output-side driving signal respectively increase slowly from the minimum duty cycle until the end of the starting process, and the two driving signals enter the complementary mode for the steady-state working process. During the starting process, a soft start is realized to reduce the backflow current and the output voltage drop.

[0075] The present invention does not require additional circuits. Only by using a digital control method and controlling the duty cycle of the MOS tube driving through a certain algorithm, the soft start process can be realized. The implementation method is simple and efficient, reducing the volume occupation of the converter.

[0076] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention, and any reference signs in the claims should not be regarded as limiting the claimed rights.

[0077] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A soft start circuit for reducing current backflow in a synchronous rectification circuit, characterized in that: It includes an input circuit and an output circuit, wherein the input circuit is connected to a transformer T and the output circuit; The input circuit includes MOS tube MOS1, MOS tube MOS2, power supply VIN, inductor Lin, capacitor C1 and capacitor C2; The output end circuit includes a MOS tube MOS3, a MOS tube MOS4, a MOS tube MOS5, a MOS tube MOS6, an inductor Lo and a capacitor C3.

2. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 1, characterized in that: The positive electrode of the power supply VIN of the input circuit is connected to one end of the inductor Lin, the other end of the inductor Lin is connected to the drain of the MOS tube MOS1, and the negative electrode of the power supply VIN is grounded; The source of the MOS tube MOS1 is connected to one end of the input side of the transformer T; One end of the capacitor C1 is connected to the drain of the MOS tube MOS1, and the other end of the capacitor C1 is connected to the other end of the input side of the transformer T; One end of the capacitor C2 is connected to the source of the MOS tube MOS2, and the other end of the capacitor C2 is connected to the other end of the input side of the transformer T; The drain of the MOS tube MOS2 is connected to the source of the MOS tube MOS1; The source of MOS tube MOS2 is grounded; The gate of the MOS tube MOS1 is connected to the PWM1A signal terminal of the PWM peripheral module of the digital control chip; The gate of the MOS tube MOS2 is connected to the PWM2A signal terminal of the PWM peripheral module of the digital control chip.

3. A soft start circuit for reducing current backflow in a synchronous rectifier circuit according to claim 2, characterized in that: The PWM1A signal terminal and the PWM2A signal terminal of the PWM peripheral module of the digital control chip send out driving signals for controlling the MOS tube MOS1 and the MOS tube MOS2.

4. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 3, characterized in that: The source of the MOS transistor MOS3 in the output circuit is connected to one end of the output side of the transformer T; the other end of the output side of the transformer T is connected to the source of the MOS transistor MOS5; The drain of the MOS tube MOS3 is connected to the drain of the MOS tube MOS5; The source of the MOS tube MOS3 is connected to the drain of the MOS tube MOS4; The source of the MOS tube MOS5 is connected to the drain of the MOS tube MOS6; The source of the MOS tube MOS4 and the source of the MOS tube MOS6 are grounded; The drain of the MOS tube MOS3 is connected to one end of the inductor Lo, the other end of the inductor Lo is connected to one end of the capacitor C3, and the other end of the capacitor C3 is grounded; The gate of the MOS tube MOS3 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip; The gate of the MOS tube MOS4 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip; The gate of the MOS tube MOS5 is connected to the PWM1B signal terminal of the PWM peripheral module of the digital control chip; The gate of the MOS tube MOS6 is connected to the PWM2B signal terminal of the PWM peripheral module of the digital control chip.

5. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 4, characterized in that: The PWM1B signal terminal and the PWM2B signal terminal of the PWM peripheral module of the digital control chip send out driving signals for controlling the MOS tubes MOS3, MOS tubes MOS4, MOS tubes MOS5 and MOS tubes MOS6.

6. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 5, characterized in that: The MOS tube MOS1 and the MOS tube MOS2 are input side switch tubes respectively.

7. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 6, characterized in that: The inductor Lin is the input filter inductor, and the inductor Lo is the output filter inductor.

8. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 7, characterized in that: The capacitor C1 and the capacitor C2 are input filter capacitors.

9. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 8, characterized in that: The MOS tube MOS3, MOS tube MOS4, MOS tube MOS5 and MOS tube MOS6 are output-side synchronous rectification MOS tubes respectively.

10. A soft start circuit for reducing current backflow in a synchronous rectification circuit according to claim 9, characterized in that: The capacitor C3 is an output filter capacitor.

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