Control method of asymmetric half-bridge circuit, chip, power supply circuit and charger

Abstract

The invention discloses a control method of an asymmetric half-bridge circuit, a chip, a power supply circuit and a charger. The asymmetric half-bridge circuit comprises a resonance circuit, a transformer and an auxiliary winding. The auxiliary winding is coupled with a secondary winding of the transformer; a primary winding of the transformer is connected with a resonant circuit to form a resonant cavity, and the control method comprises the following steps: determining an initial detection moment, and collecting a resonant cavity current corresponding to the resonant cavity; determining a target sampling moment based on the initial detection moment and a resonant cavity current corresponding to the resonant cavity; and when the current moment is the target sampling moment, sampling voltage corresponding to the auxiliary winding is collected. According to the control method of the asymmetric half-bridge circuit, the target sampling time can be changed along with the change of the resonant cavity current, the sampling voltage error caused by the voltage fluctuation of the resonant capacitor can be avoided, and the primary side detection precision of the output voltage is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of power circuits, and in particular, to a control method, a chip, a power circuit, and a charger for an asymmetrical half-bridge circuit. Background Art

[0002] An asymmetrical half-bridge circuit is usually used in power supply designs with a wide range of outputs. Since the voltage gain range of the asymmetrical half-bridge circuit is limited, it is necessary for the control chip connected to the asymmetrical half-bridge circuit to accurately collect the output voltage and complete the primary side feedback control according to the output voltage.

[0003] In the prior art, a set of auxiliary windings coupled to the transformer is usually added to perform primary side detection of the output voltage. The same-name ends of the auxiliary windings are the same as those of the output windings. After the upper switch of the asymmetrical half-bridge circuit is turned off and the lower switch is turned on, and power starts to be transferred to the secondary side of the transformer, the control starts to collect the voltage through the auxiliary windings, and then obtains the output voltage. However, the transformer windings of the asymmetrical half-bridge circuit are connected to the resonant inductor and the resonant capacitor, and the disturbance component of the resonant capacitor voltage will be superimposed on the transformer windings. The output voltage collected through the auxiliary windings actually reflects the sum of the current output voltage and the disturbance component. Therefore, after the upper switch of the asymmetrical half-bridge circuit is turned off and the lower switch is turned on, it is necessary to continue to delay for a period of time before collecting the voltage of the auxiliary windings to avoid the time when the disturbance component appears. In the prior art, the delay time is usually a preset fixed value. Since the magnitudes of the disturbance components are different under light load and heavy load conditions, and the required delay times are also different, the output voltage collected under the condition of a fixed delay time will still contain a certain disturbance component, which will cause inaccurate sampling of the output voltage and further lead to abnormal primary side feedback control. Summary of the Invention

[0004] Embodiments of the present invention provide a control method, a chip, a power circuit, and a charger for an asymmetrical half-bridge circuit to solve the problem that the sampling of the output voltage in the asymmetrical half-bridge circuit is inaccurate and easily causes control anomalies.

[0005] Embodiments of the present invention provide a control method for an asymmetrical half-bridge circuit. The asymmetrical half-bridge circuit includes a resonant circuit, a transformer, and an auxiliary winding; the auxiliary winding is coupled to the primary winding of the transformer; the primary winding of the transformer is connected to the resonant circuit to form a resonant cavity. The control method includes: When the resonant state of the asymmetrical half-bridge circuit meets a preset sampling condition, determining a starting detection moment and collecting the resonant cavity current corresponding to the resonant cavity; Based on the starting detection moment and the resonant cavity current corresponding to the resonant cavity, determining a target sampling moment; When the current moment is the target sampling moment, collecting the sampling voltage corresponding to the auxiliary winding.

[0006] Preferably, the resonant circuit includes a first switching transistor, a second switching transistor, a resonant inductor, and a resonant capacitor. The first switching transistor and the second switching transistor are connected in series between the signal input terminal and the ground; the resonant inductor, the resonant capacitor, and the primary winding of the transformer are connected in series between the connection node between the first switching transistor and the second switching transistor and the ground to form the resonant cavity; The control method further includes: Controlling one of the first switching transistor and the second switching transistor to conduct in an interleaved manner and the other to turn off. When the first switching transistor turns off and the second switching transistor conducts, it is determined that the resonant state of the asymmetrical half-bridge circuit satisfies the preset sampling condition.

[0007] Preferably, determining the target sampling time based on the starting detection time and the resonant cavity current corresponding to the resonant cavity includes: Determining a target delay time according to the resonant cavity current corresponding to the resonant cavity; Determining the target sampling time based on the starting detection time and the target delay time.

[0008] Preferably, determining the target delay time according to the resonant cavity current corresponding to the resonant cavity includes: Obtaining the peak current corresponding to the resonant cavity based on the resonant cavity current corresponding to the resonant cavity; Determining the target delay time based on the peak current corresponding to the resonant cavity.

[0009] Preferably, the peak current corresponding to the resonant cavity is the resonant cavity current collected at the starting detection time.

[0010] Preferably, determining the target delay time based on the peak current corresponding to the resonant cavity includes: Determining the target delay time based on the peak current corresponding to the resonant cavity and a preset current-time mapping relationship, where the preset current-time mapping relationship is used to reflect the mapping relationship between the peak current and the delay time.

[0011] Preferably, the preset current-time mapping relationship includes a plurality of preset current intervals, and each preset current interval corresponds to a preset delay time; Determining the target delay time based on the peak current corresponding to the resonant cavity and the preset current-time mapping relationship includes: Determining the preset current interval where the peak current corresponding to the resonant cavity is located as the target current interval, and determining the preset delay time corresponding to the target current interval as the target delay time.

[0012] Preferably, determining the target sampling time based on the starting detection time and the resonant cavity current corresponding to the resonant cavity includes: Based on the resonant cavity current corresponding to the resonant cavity, determining the current change rate; Determining the sampling time when the current change rate is 0 as the target sampling time.

[0013] An embodiment of the present invention further provides a control chip, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The control chip is applied in an asymmetrical half-bridge circuit. When the processor executes the computer program, it implements the control method of the asymmetrical half-bridge circuit according to any one of the above.

[0014] An embodiment of the present invention further provides a power supply circuit, including a primary rectification and filtering circuit, a secondary rectification and filtering circuit, a current sampling unit, the asymmetrical half-bridge circuit according to any one of the above, and the above control chip; The input end of the primary rectification and filtering circuit is used to connect to the mains circuit. The output end of the primary rectification and filtering circuit is connected to the resonant circuit of the asymmetrical half-bridge circuit. The secondary winding of the transformer of the asymmetrical half-bridge circuit is connected to the input end of the secondary rectification and filtering circuit. The output end of the secondary rectification and filtering circuit is used to connect to an external load to supply power to the external load; The current sampling unit is connected to the resonant cavity of the asymmetrical half-bridge circuit and is also connected to the control chip, and is used to collect the resonant cavity current corresponding to the resonant cavity and output the resonant cavity current to the control chip; The control chip, connected to the auxiliary winding, is used to determine the target sampling time based on the resonant cavity current corresponding to the resonant cavity, and collect the sampling voltage corresponding to the auxiliary winding when the current moment is the target sampling time.

[0015] An embodiment of the present invention further provides a charger, including the above power supply circuit.

[0016] An embodiment of the present invention provides a control method, a chip, a power supply circuit, and a charger for an asymmetrical half-bridge circuit. The control method of the asymmetrical half-bridge circuit can adjust the sampling time for sampling the voltage of the auxiliary winding in real time based on the resonant cavity current, so that the target sampling time can change with the change of the resonant cavity current, so that the sampling voltage collected at the target sampling time is closer to k times the output voltage, which can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor, improve the primary detection accuracy of the output voltage, and make the primary feedback control more accurate. Description of the Drawings

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments of the present invention. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0018] Figure 1 is a schematic circuit diagram of an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 2 is a flowchart of a control method for an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 3 is a working waveform diagram of an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 4 is another working waveform diagram of an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 5 is another flowchart of a control method for an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 6 is another flowchart of a control method for an asymmetrical half-bridge circuit in an embodiment of the present invention; Figure 7 is another flowchart of a control method for an asymmetrical half-bridge circuit in an embodiment of the present invention.

[0019] In the figure: 1. Current sampling unit. Specific embodiments

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0021] It should be understood that the present invention can be implemented in different forms and should not be construed as limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout the same drawings.

[0022] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or part discussed below may be denoted as a second element, component, region, layer or part without departing from the teachings of the present invention.

[0023] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. are used herein for convenience in describing the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "below" other elements or features will be oriented "on" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientation) and the spatial descriptors used herein are to be interpreted accordingly.

[0024] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0025] To fully understand the present invention, detailed structures and steps will be set forth in the following description in order to explain the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may have other embodiments.

[0026] An embodiment of the present invention provides a control method for an asymmetrical half-bridge circuit, as Figure 1 shown. The asymmetrical half-bridge circuit may include a resonant circuit, a transformer T1, and an auxiliary winding Taux. The resonant circuit may include a resonant inductor L1 and a resonant capacitor Cr. The auxiliary winding Taux is coupled to the secondary winding Ts of the transformer T1. The primary winding Tp of the transformer T1 is connected to the resonant circuit to form a resonant cavity. Among them, the resonant circuit, the transformer T1, and the auxiliary winding Taux are used to connect a control chip U1. The control chip U1 can control the resonant cavity to generate resonance periodically. Based on the principle of electromagnetic induction, when in resonance, electrical energy can be transferred from the primary side of the transformer T1 to the secondary side of the transformer T1, and an output voltage is periodically formed on the secondary side of the transformer T1. During the process of electrical energy transfer to the secondary side, the control chip U1 can obtain a sampling voltage through the auxiliary winding Taux to perform primary side detection on the current output voltage. This control method of the asymmetrical half-bridge circuit is applied in the control chip U1 connected to the asymmetrical half-bridge circuit, as Figure 2 shown, including: S201: When the resonance state of the asymmetrical half-bridge circuit satisfies a preset sampling condition, determine the starting detection moment and collect the resonance cavity current corresponding to the resonance cavity; S202: Based on the starting detection moment and the resonance cavity current corresponding to the resonance cavity, determine the target sampling moment; S203: When the current moment is the target sampling moment, collect the sampling voltage corresponding to the auxiliary winding.

[0027] Among them, the starting detection moment To is the moment when the control chip U1 starts to obtain the resonance cavity current Ip in each voltage output cycle of the asymmetrical half-bridge circuit. Specifically, the moment when the asymmetrical half-bridge circuit starts to transfer energy to the secondary side of the transformer T1 and generate an output voltage can be used as the starting detection moment To.

[0028] As an example, in step S201, in a voltage output cycle of the asymmetrical half-bridge circuit, when the resonance state of the asymmetrical half-bridge circuit satisfies a preset sampling condition, for example, when the primary side energy storage of the asymmetrical half-bridge circuit is completed and it is ready to transfer energy to the secondary side of the transformer T1, the moment when the asymmetrical half-bridge circuit starts to transfer energy to the secondary side of the transformer T1 and generate an output voltage is used as the starting detection moment To, and starting from the starting detection moment To, the control chip U1 continuously obtains the resonance cavity current Ip corresponding to the resonance cavity.

[0029] Among them, in the asymmetrical half-bridge circuit as Figure 1 shown, the resonance cavity current Ip changes as Figure 3As shown, during the time period from t0 to t2, the resonant cavity current Ip flows through the resonant inductor L1, the primary winding Tp of the transformer T1, and the resonant capacitor Cr, denoted as Imagpos. At this time, the resonant cavity current Ip rises linearly, storing energy in the resonant cavity. During the time period from t3 to t5, the energy stored in the resonant cavity is released to the secondary side through the electromagnetic induction of the primary and secondary windings of the transformer T1 to form the output voltage Vo. At this time, the resonant cavity current Ip will actually oscillate between the resonant capacitor Cr and the magnetizing inductor LM on the primary winding Tp of the transformer T1. The voltage actually superimposed on the magnetizing inductor LM of the primary winding Tp of the transformer T1 is the average value of n times the output voltage Vo and the voltage of the resonant capacitor Cr. Here, n represents the ratio of the number of turns Np of the primary winding of the transformer T1 to the number of turns Ns of the secondary winding. Since the voltage across the resonant capacitor Cr is limited by the capacitance value and there will be fluctuations during oscillation, and the auxiliary winding Taux is actually coupled with the magnetizing inductor LM on the primary winding Tp of the transformer T1, therefore, as Figure 4 shown, it is necessary to delay the sampling until the target sampling time ts after the time t3. At the target sampling time ts, the voltage across the resonant capacitor Cr should change to be close to or even equal to the voltage across the magnetizing inductor LM of the primary winding Tp of the transformer T1, that is, the voltage across the resonant capacitor Cr should be n times the output voltage Vo. At this time, the voltage on the auxiliary winding Taux is sampled, and the obtained sampling voltage can accurately reflect the magnitude of the output voltage on the secondary side, which can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr and improve the primary side detection accuracy of the output voltage.

[0030] As an example, in step S202, the control chip U1 determines the target sampling time ts based on the resonant cavity current Ip obtained during the current voltage output cycle, so that the target sampling time ts changes with the change of the resonant cavity current Ip. It can be understood that when the asymmetrical half-bridge circuit is in the heavy load state, the resonant cavity current Ip in the current voltage output cycle is larger than that in the normal case, and the time for the resonant cavity current Ip to oscillate between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 is longer. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling time ts closer to n times the output voltage Vo, the target sampling time ts determined based on the resonant cavity current Ip should also be later; when the asymmetrical half-bridge circuit is in the light load state, the resonant cavity current Ip in the current voltage output cycle is smaller than that in the normal case, and the time for the resonant cavity current Ip to oscillate between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 is shorter. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling time ts closer to n times the output voltage Vo, the target sampling time ts determined based on the resonant cavity current Ip should also be earlier. Thus, determining the target sampling time ts based on the resonant cavity current Ip obtained during the current voltage output cycle can make the target sampling time ts change with the change of the resonant cavity current Ip, so that the sampling voltage collected at the target sampling time ts is closer to k times the output voltage Vo, where k = (Naux / Ns)*R3 / (R2 + R3), in the formula, Ns represents the number of turns of the secondary winding of the transformer T1, Naux represents the number of turns of the auxiliary winding, and R2 and R3 respectively represent the resistance values of the resistors R2 and R3 as shown in Figure 1 and can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr and improve the primary side detection accuracy of the output voltage.

[0031] As an example, in step S203, during the current voltage output cycle, when the current time is the target sampling time ts, the control chip U1 obtains the sampling voltage through the auxiliary winding Taux, and then determines the magnitude of the output voltage according to the sampling voltage and the turns ratio between the auxiliary winding Taux and the secondary winding Ts of the transformer T1, so as to further adjust the output of the asymmetrical half-bridge circuit and achieve accurate primary side feedback control.

[0032] In this example, the control method of the asymmetrical half-bridge circuit can adjust the sampling time for sampling the voltage of the auxiliary winding Taux in real time based on the resonant cavity current Ip, so that the target sampling time ts changes with the change of the resonant cavity current Ip, so that the sampling voltage collected at the target sampling time ts is closer to k times the output voltage Vo, can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr, improve the primary side detection accuracy of the output voltage, and make the primary side feedback control more accurate.

[0033] In one embodiment, the resonant circuit includes a first switching transistor Q1, a second switching transistor Q2, a resonant inductor L1, and a resonant capacitor Cr. The first switching transistor Q1 and the second switching transistor Q2 are connected in series between the signal input terminal and the ground; the resonant inductor L1, the resonant capacitor Cr, and the primary winding Tp of the transformer T1 are connected in series between the connection node between the first switching transistor Q1 and the second switching transistor Q2 and the ground to form a resonant cavity. The control method further includes: alternately controlling any one of the first switching transistor and the second switching transistor to conduct and the other to turn off. When the first switching transistor is turned off and the second switching transistor is on, it is determined that the resonant state of the asymmetric half-bridge circuit satisfies a preset sampling condition.

[0034] As an example, as Figure 1 shown, the resonant circuit includes a first switching transistor Q1, a second switching transistor Q2, a resonant inductor L1, and a resonant capacitor Cr. The first switching transistor Q1 and the second switching transistor Q2 are connected in series between the signal input terminal and the ground; the resonant inductor L1, the resonant capacitor Cr, and the primary winding Tp of the transformer T1 are connected in series between the connection node between the first switching transistor Q1 and the second switching transistor Q2 and the ground to form a resonant cavity. The control chip U1 is used to connect the control terminals of the first switching transistor Q1 and the second switching transistor Q2. By alternately controlling any one of the first switching transistor Q1 and the second switching transistor Q2 to conduct and the other to turn off, the flowing direction of the resonant cavity current Ip in the resonant cavity can be controlled, so that electric energy is first stored in the resonant cavity and then transferred to the secondary side of the transformer T1. For example, as Figure 3 shown, the control chip U1 can control the first switching transistor Q1 to conduct and the second switching transistor Q2 to turn off in the time period from t1 to t2, so that the resonant cavity current Ip flows through the resonant inductor L1, the primary winding Tp of the transformer T1, and the resonant capacitor Cr. At this time, the resonant cavity current Ip linearly rises, and the energy is stored in the resonant cavity; in the time period from t3 to t5, the control chip U1 controls the first switching transistor Q1 to turn off and the second switching transistor Q2 to conduct, so that the energy stored in the resonant cavity is released to the secondary side through the electromagnetic induction of the primary and secondary sides of the transformer T1 to form an output voltage Vo. In the control method of this asymmetric half-bridge circuit, when the first switching transistor Q1 is turned off and the second switching transistor Q2 is on, it can be determined that the resonant state of the asymmetric half-bridge circuit satisfies a preset sampling condition, and the moment when the first switching transistor Q1 is turned off and the second switching transistor Q2 is on is used as the starting detection moment To, that is Figure 3At time t3, before time t3, the resonator current Ip rises linearly. At time t3, the resonator current Ip corresponding to the resonator is collected. At this time, the resonator current Ip reaches the peak point. The resonator current Ip collected at time t3 can be marked as the peak current. After time t3, the resonator current Ip starts to oscillate between the resonant capacitor Cr and the exciting inductance on the primary winding Tp of the transformer T1. In this example, by only collecting the resonator current Ip at time t3 and after time t3, and adjusting the target sampling time ts based on the resonator current Ip at time t3 and after time t3, the maximum value of the resonator current Ip in the current voltage output cycle can be obtained, and the resonator current Ip in the voltage output stage can be monitored in real time to effectively adjust the target sampling time ts, while also saving the resources of the control chip U1.

[0035] In one embodiment, as Figure 5 shown, step S202, that is, determining the target sampling time based on the starting detection time and the resonator current corresponding to the resonator, includes: S501: Determine the target delay time according to the resonator current corresponding to the resonator; S502: Determine the target sampling time based on the starting detection time and the target delay time.

[0036] Among them, the target delay time td is the time for the control chip U1 to delay after turning off the first switching transistor Q1 and turning on the second switching transistor Q2, and waiting to collect the sampling voltage corresponding to the auxiliary winding Taux. Starting from the starting detection time To, after the target delay time td, it is the target sampling time ts.

[0037] As an example, in step S501, the control chip U1 can determine the length of the target delay time td according to the resonant cavity current Ip corresponding to the resonant cavity. It can be understood that when the asymmetrical half-bridge circuit is in a heavy load state, the resonant cavity current Ip in the current voltage output cycle is larger than that in the normal case. The time for the resonant cavity current Ip to oscillate between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 is longer. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling moment ts closer to n times the output voltage Vo, the target delay time td determined based on the resonant cavity current Ip should be longer; when the asymmetrical half-bridge circuit is in a light load state, the resonant cavity current Ip in the current voltage output cycle is smaller than that in the normal case. The time for the resonant cavity current Ip to oscillate between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 is shorter. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling moment ts closer to n times the output voltage Vo, the target delay time td determined based on the resonant cavity current Ip should be shorter. Thus, determining the target delay time td based on the resonant cavity current Ip obtained in the current voltage output cycle can make the length of the target delay time td change with the change of the resonant cavity current Ip, so that the sampling voltage collected at the target sampling moment ts is closer to k times the output voltage Vo, and the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr can be avoided, and the primary side detection accuracy of the output voltage can be improved.

[0038] As an example, in step S502, based on the starting detection moment To and the obtained target delay time td, the control chip U1 can record the moment after the target delay time td from the starting detection moment To as the target sampling moment ts, and obtain the sampling voltage corresponding to the auxiliary winding Taux at the target sampling moment ts.

[0039] In an embodiment, as Figure 6 shown, step S501, that is, determining the target delay time according to the resonant cavity current corresponding to the resonant cavity, includes: S601: Obtain the peak current corresponding to the resonant cavity based on the resonant cavity current corresponding to the resonant cavity; S602: Determine the target delay time based on the peak current corresponding to the resonant cavity.

[0040] As an example, in step S601, in the control method of the asymmetric half-bridge circuit, the starting detection moment To is the moment when the control chip U1 starts to acquire the resonant cavity current Ip in each voltage output cycle of the asymmetric half-bridge circuit. Specifically, the moment when the asymmetric half-bridge circuit starts to transfer energy to the secondary side of the transformer T1 and generates an output voltage can be used as the starting detection moment To. When the electric energy stored in the primary side of the transformer T1 is completed and the asymmetric half-bridge circuit starts to transfer energy to the secondary side of the transformer T1, at this time, the resonant cavity current Ip is at the peak value of the current in this voltage output cycle, and the control chip U1 can use the resonant cavity current Ip detected at the starting detection moment To as the peak current corresponding to the resonant cavity.

[0041] As an example, in step S602, the control chip U1 can determine the length of the target delay time td according to the acquired peak current corresponding to the resonant cavity. It can be understood that when the asymmetric half-bridge circuit is in a heavy load state, the peak current corresponding to the resonant cavity in the current voltage output cycle is larger than that in the normal case. After the moment t3, the oscillation time of the resonant cavity current Ip between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 will be longer. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling moment ts closer to n times the output voltage Vo, the determined target delay time td should be longer; when the asymmetric half-bridge circuit is in a light load state, the peak current corresponding to the resonant cavity in the current voltage output cycle is smaller than that in the normal case. After the moment t3, the oscillation time of the resonant cavity current Ip between the resonant capacitor Cr and the magnetizing inductance LM of the primary winding Tp of the transformer T1 will be shorter. To avoid the voltage fluctuation of the resonant capacitor Cr and make the voltage across the resonant capacitor Cr at the target sampling moment ts closer to n times the output voltage Vo, the determined target delay time td should be shorter.

[0042] Specifically, as Figure 1 shown, the working waveform of the asymmetric half-bridge circuit in a voltage output cycle is as Figure 3 shown. (1) Stage t0~t2 Before t0, the body diode of the first switching transistor Q1 gradually conducts, and the midpoint voltage VHB gradually rises from 0V to Vbus, providing conditions for the first switching transistor Q1 to achieve ZVS. At the moment t0, the control chip U1 outputs a high level to the first switching transistor Q1, causing the current to transfer from the body diode of the first switching transistor Q1 to the channel.

[0043] In the time period from t1 to t2, the resonant cavity current Ip flows through the resonant inductor L1, the magnetizing inductance LM of the primary winding Tp of the transformer T1, and the current of the resonant capacitor Cr is denoted as Imagpos, and linearly rises, storing energy in the resonant cavity. The current expression in this process is as follows. ; where Ip is the resonant cavity current Ip.

[0044] Define Ton = t2 - t1. At t = t2, define Ip(t2) = Imagpos, which is the peak current. Define the duty cycle D = ton / T, the output voltage is Vo, and the turns ratio of the primary and secondary sides of the transformer T1 is n. Then Vcr approximately satisfies the following relationship: ; By solving the differential equations by combining Equation 1 and Equation 2, the exact expression of Vcr can be obtained as follows: ; where is the resonant angular frequency of (L1 + LM) and Cr, is the resonant impedance of (L1 + LM) and Cr.

[0045] To simplify the analysis, it can be approximately considered that . Then Equation 4 is simplified to

[0046] (2) t2~t3 stage At t2, the control chip U1 outputs a low level to the first switching transistor Q1, and the peak current continues to flow through the body diode of the second switching transistor Q2. VHB drops from Vbus to 0, providing conditions for ZVS of the second switching transistor Q2. At t3, the control chip U1 outputs a high level to the second switching transistor Q2, and the current transfers from the body diode of the second switching transistor Q2 to the channel.

[0047] (3) t3~t5 stage During the time period of t3~t5, the energy stored in the resonant cavity is released to the secondary side. At this time, the freewheeling diode D1 connected to the secondary winding Ts of the output transformer T1 conducts. The voltage across the magnetizing inductance LM of the primary winding Tp of the transformer T1 is approximately clamped to nVo during this time period, as shown in Equation 6, where n represents the ratio of the number of turns Np of the primary side to the number of turns Ns of the secondary side of the transformer T1, Vo represents the output voltage, and the magnetizing current linearly decreases at a slope of nVo / LM as Figure 3 shown by the dashed line Imag; ; In the above formula , the resonant cavity current Ip changes according to the following formula.

[0048] ; By combining Equation 8 and Equation 2, a more accurate expression for the resonant cavity current Ip and the expression for the Vcr voltage can be obtained: ; Among them, .

[0049] For Equation 10, if the voltage on the auxiliary winding Taux is sampled at a certain moment, then the voltage on the auxiliary winding Taux at this time can accurately reflect the magnitude of the output voltage, achieving high-precision sampling.

[0050] At this time, the target sampling moment ts needs to satisfy the following equation, that is: ; Furthermore, it can be obtained that the target sampling moment ts needs to satisfy the following equation: ; Because , for the convenience of analysis, it is converted to the following equation: ; According to Equation 19, when the peak current is larger, the target sampling moment ts needs to be delayed more to satisfy .

[0051] In this example, by quantitatively obtaining the peak current corresponding to the resonant cavity, it is convenient to make a horizontal comparison of the oscillation time of the resonant cavity current Ip between the resonant capacitor Cr and the exciting inductance LM on the primary winding Tp of the transformer T1 in different voltage output cycles, so as to appropriately extend or shorten the target delay time td, making the length of the target delay time td change with the change of the resonant cavity current Ip, and improving the primary detection accuracy of the output voltage.

[0052] In an embodiment, the peak current corresponding to the resonant cavity is the resonant cavity current Ip collected at the starting detection moment To.

[0053] As an example, in the control method of this asymmetrical half-bridge circuit, the starting detection moment To can be the moment when the first switching tube Q1 is turned off and the second switching tube Q2 is turned on, that is, Figure 3 the t3 moment in. Before the t3 moment, the resonant cavity current Ip rises linearly. Until the first switching tube Q1 is turned off at the t2 moment, the resonant cavity current Ip reaches the peak point. When the second switching tube Q2 is turned on at the t3 moment, the resonant cavity current Ip is the same as that at the t2 moment. The control chip U1 can use the resonant cavity current Ip collected at the starting detection moment To as the peak current corresponding to the resonant cavity in the current voltage output cycle.

[0054] In one embodiment, step S602, that is, determining the target delay time based on the peak current corresponding to the resonant cavity, includes: determining the target delay time based on the peak current corresponding to the resonant cavity and a preset current-time mapping relationship, where the preset voltage-time mapping relationship is used to reflect the mapping relationship between the peak current and the delay time.

[0055] As an example, the preset current-time mapping relationship can be a preset linear / nonlinear calculation formula with the peak current as the independent variable and the target delay time td as the dependent variable. Substituting the peak current of the currently obtained voltage output cycle into this calculation formula can calculate the delay time corresponding to the peak current, and then determine this delay time as the target delay time td for voltage sampling; alternatively, the preset current-time mapping relationship can also be a preset current-time mapping relationship table corresponding to the peak current and the target delay time td. Looking up the table based on the peak current of the current voltage output cycle can obtain the corresponding delay time, and then determine this delay time as the target delay time td for voltage sampling.

[0056] In one embodiment, the preset current-time mapping relationship includes multiple preset current intervals, and each preset current interval corresponds to a preset delay time; determining the target delay time based on the peak current corresponding to the resonant cavity and the preset current-time mapping relationship includes: determining the preset current interval where the peak current corresponding to the resonant cavity is located as the target current interval, and determining the preset delay time corresponding to the target current interval as the target delay time.

[0057] As an example, the preset current-time mapping relationship includes multiple preset current intervals set in advance. The multiple preset current intervals can be multiple continuous intervals, such as 0~I1, I1~I2..., or multiple discontinuous intervals, such as 0~I1, I2~I3.... Each preset current interval corresponds to a preset delay time. When the peak current of the currently obtained voltage output cycle is within a certain preset current interval, the preset delay time corresponding to this preset current interval is used as the target delay time td.

[0058] In one embodiment, as Figure 7 shown, step S202, that is, determining the target sampling time based on the starting detection time and the resonant cavity current corresponding to the resonant cavity, includes: S701: Determining the current change rate based on the resonant cavity current corresponding to the resonant cavity; S702: Determining the sampling time when the current change rate is 0 as the target sampling time.

[0059] As an example, in step S701, based on the resonant cavity current Ip and the sampling time continuously acquired since the self-start detection time To, the control chip U1 can determine the current change rate corresponding to the resonant cavity current Ip.

[0060] As an example, in step S702, combining Equation 9 in the above example: , and Equation 18: . Take the derivative of Equation 9 to obtain and let , Equation 18 can be solved. Therefore, when the derivative of Equation 9 is 0, Equation 18 holds. The fact that Equation 18 holds indicates that the moment when the derivative of Equation 9 is 0 is when the voltage across the resonant capacitor Cr is n times the output voltage Vo. Equation 9 is the expression of the resonant cavity current Ip, and the derivative of Equation 9 being 0 is equivalent to the current change rate corresponding to the resonant cavity current Ip being 0. Therefore, the moment when the current change rate corresponding to the resonant cavity current Ip is 0 is exactly the moment when the voltage across the resonant capacitor Cr is n times the output voltage Vo at the target sampling time ts. Determine the sampling time when the current change rate is 0 as the target sampling time ts. The control chip U1 detects the sampling voltage on the auxiliary winding Taux according to the target sampling time ts, and can accurately obtain the output voltage of the current voltage output cycle, eliminating errors.

[0061] An embodiment of the present invention further provides a control chip U1, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The control chip U1 is characterized in that it is applied in an asymmetrical half-bridge circuit, and when the processor executes the computer program, it implements the control method of any one of the above asymmetrical half-bridge circuits.

[0062] An embodiment of the present invention further provides a power supply circuit, including a primary rectification and filtering circuit, a secondary rectification and filtering circuit, a current sampling unit 1, any one of the above asymmetrical half-bridge circuits, and the above control chip U1; the input end of the primary rectification and filtering circuit is used to connect to the mains circuit, the output end of the primary rectification and filtering circuit is connected to the resonant circuit of the asymmetrical half-bridge circuit, the secondary winding Ts of the transformer T1 of the asymmetrical half-bridge circuit is connected to the input end of the secondary rectification and filtering circuit, and the output end of the secondary rectification and filtering circuit is used to connect to an external load to supply power to the external load; the current sampling unit 1 is connected to the resonant cavity of the asymmetrical half-bridge circuit and is also connected to the control chip, and is used to collect the resonant cavity current Ip corresponding to the resonant cavity and output the resonant cavity current Ip to the control chip U1; the control chip U1 is connected to the auxiliary winding Taux, and is used to determine the target sampling time ts based on the resonant cavity current Ip corresponding to the resonant cavity, and collect the sampling voltage corresponding to the auxiliary winding Taux when the current moment is the target sampling time ts.

[0063] As an example, the power supply circuit includes a primary rectification and filtering circuit, a secondary rectification and filtering circuit, a current sampling unit 1, the asymmetrical half-bridge circuit of any one of the above, and the control chip U1; the input end of the primary rectification and filtering circuit is used to connect to the mains circuit, the output end of the primary rectification and filtering circuit is connected to the resonant circuit of the asymmetrical half-bridge circuit, the secondary winding Ts of the transformer T1 of the asymmetrical half-bridge circuit is connected to the input end of the secondary rectification and filtering circuit, and the output end of the secondary rectification and filtering circuit is used to connect to an external load to supply power to the external load. The control chip U1 is connected to the resonant cavity of the asymmetrical half-bridge circuit through the current sampling unit 1 and is also connected to the auxiliary winding Taux, and is used to obtain the resonant cavity current Ip corresponding to the resonant cavity, and obtain the target sampling time ts based on the resonant cavity current Ip; when the current moment is the target sampling time ts, sample the sampling voltage corresponding to the auxiliary winding Taux, and calculate the current output voltage based on the sampling voltage to complete the primary side feedback control.

[0064] In this example, by adjusting the sampling time for sampling the voltage of the auxiliary winding Taux in real time based on the resonant cavity current Ip, the target sampling time ts can change with the change of the resonant cavity current Ip, so that the sampling voltage collected at the target sampling time ts is closer to k times the output voltage Vo, which can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr, improve the primary side detection accuracy of the output voltage, and make the primary side feedback control more accurate.

[0065] The embodiment of the present invention also provides a charger, including the above-mentioned power supply circuit.

[0066] As an example, the charger includes the above-mentioned power supply circuit. In this example, by adjusting the sampling time for sampling the voltage of the auxiliary winding Taux in real time based on the resonant cavity current Ip, the target sampling time ts can change with the change of the resonant cavity current Ip, so that the sampling voltage collected at the target sampling time ts is closer to k times the output voltage Vo, which can avoid the sampling voltage error caused by the voltage fluctuation of the resonant capacitor Cr, improve the primary side detection accuracy of the output voltage, and make the primary side feedback control more accurate.

[0067] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A control method for an asymmetric half-bridge circuit, characterized in that: The asymmetric half-bridge circuit comprises a resonant circuit, a transformer and an auxiliary winding; the auxiliary winding is coupled to the primary winding of the transformer; The primary winding of the transformer is connected to the resonant circuit to form a resonant cavity, and the control method includes: When the resonant state of the asymmetric half-bridge circuit meets a preset sampling condition, determining a start detection time, and collecting a resonant cavity current corresponding to the resonant cavity; Determining a target sampling time based on the starting detection time and a resonant cavity current corresponding to the resonant cavity; When the current moment is the target sampling moment, a sampling voltage corresponding to the auxiliary winding is collected.

2. The control method of the asymmetric half-bridge circuit according to claim 1, characterized in that: The resonant circuit includes a first switch tube, a second switch tube, a resonant inductor and a resonant capacitor, wherein the first switch tube and the second switch tube are connected in series between the signal input terminal and the ground; the resonant inductor, the resonant capacitor and the primary winding of the transformer are arranged in series between the connection node between the first switch tube and the second switch tube and the ground to form the resonant cavity; The control method further comprises: The first switch tube and the second switch tube are alternately controlled to be turned on and the other one is turned off. When the first switch tube is turned off and the second switch tube is turned on, it is determined that the resonant state of the asymmetric half-bridge circuit meets the preset sampling condition.

3. The control method of the asymmetric half-bridge circuit according to claim 1, characterized in that: The determining of the target sampling time based on the starting detection time and the resonant cavity current corresponding to the resonant cavity includes: Determining a target delay time according to a resonant cavity current corresponding to the resonant cavity; Based on the start detection time and the target delay time, a target sampling time is determined.

4. The control method of the asymmetric half-bridge circuit according to claim 3, characterized in that: The step of determining a target delay time according to a resonant cavity current corresponding to the resonant cavity includes: Based on the resonant cavity current corresponding to the resonant cavity, obtaining the peak current corresponding to the resonant cavity; A target delay time is determined based on a peak current corresponding to the resonant cavity.

5. The control method of the asymmetric half-bridge circuit according to claim 4, characterized in that: The peak current corresponding to the resonant cavity is the resonant cavity current collected at the start detection moment.

6. The control method of the asymmetric half-bridge circuit according to claim 4, characterized in that: The determining of the target delay time based on the peak current corresponding to the resonant cavity includes: The target delay time is determined based on the peak current corresponding to the resonant cavity and a preset current-time mapping relationship, wherein the preset current-time mapping relationship is used to reflect the mapping relationship between the peak current and the delay time.

7. The control method of the asymmetric half-bridge circuit according to claim 6, characterized in that: The preset current-time mapping relationship includes a plurality of preset current intervals, each of the preset current intervals corresponding to a preset delay time; The determining of the target delay time based on the peak current corresponding to the resonant cavity and the preset current-time mapping relationship includes: The preset current interval in which the peak current corresponding to the resonant cavity is located is determined as the target current interval, and the preset delay time corresponding to the target current interval is determined as the target delay time.

8. The control method of the asymmetric half-bridge circuit according to claim 1, characterized in that: The determining of the target sampling time based on the starting detection time and the resonant cavity current corresponding to the resonant cavity includes: determining a current change rate based on a resonant cavity current corresponding to the resonant cavity; The sampling time when the current change rate is 0 is determined as the target sampling time.

9. A control chip, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: The control chip is applied in an asymmetric half-bridge circuit, and the processor implements the control method of the asymmetric half-bridge circuit according to any one of claims 1 to 8 when executing the computer program.

10. A power supply circuit, characterized in that: It comprises a primary side rectification and filtering circuit, a secondary side rectification and filtering circuit, a current sampling unit, the asymmetric half-bridge circuit according to any one of claims 1 to 8, and the control chip according to claim 9; The input end of the primary rectifier and filter circuit is used to connect to the mains circuit, the output end of the primary rectifier and filter circuit is connected to the resonant circuit of the asymmetric half-bridge circuit, the secondary winding of the transformer of the asymmetric half-bridge circuit is connected to the input end of the secondary rectifier and filter circuit, and the output end of the secondary rectifier and filter circuit is used to connect to an external load to supply power to the external load; The current sampling unit is connected to the resonant cavity of the asymmetric half-bridge circuit and is also connected to the control chip, and is used to collect the resonant cavity current corresponding to the resonant cavity and output the resonant cavity current to the control chip; The control chip is connected to the auxiliary winding, and is used to determine the target sampling time based on the resonant cavity current corresponding to the resonant cavity, and to collect the sampling voltage corresponding to the auxiliary winding when the current time is the target sampling time.

11. A charger, characterized in that: The invention comprises the power supply circuit as claimed in claim 10.

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