Adaptive full-wave rectifier circuit and leakage protection device

Abstract

The present invention relates to the technical field of analog integrated circuits, and specifically discloses an adaptive full-wave rectifier circuit and a leakage protection device, including: a waveform preprocessing unit, a phase detection unit, a positive-phase waveform transmission unit, a negative-phase waveform transmission unit, and a phase conversion unit; the waveform preprocessing unit is used to perform amplitude amplification processing on the AC input voltage waveform after superimposing a common-mode level, where the AC input voltage waveform at least includes a small-signal AC voltage waveform; the phase detection unit is used to perform positive-phase detection and negative-phase detection on the preprocessed voltage waveform; the positive-phase waveform transmission unit is used to transmit the positive-phase waveform through the positive-phase transmission channel; the negative-phase waveform transmission unit is used to transmit the negative-phase waveform through the negative-phase transmission channel; the phase conversion unit is used to perform phase conversion on the negative-phase waveform and output it together with the positive-phase waveform. The adaptive full-wave rectifier circuit provided by the present invention can automatically and accurately perform full-wave rectification on the waveform of the small-signal AC voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuits, and in particular to an adaptive full-wave rectifier circuit and a leakage protection device. Background Art

[0002] An AC voltage waveform refers to a voltage signal whose magnitude and direction change periodically with time. Full-wave rectification is a circuit for rectifying an AC voltage waveform. In a full-wave rectifier circuit, within half a cycle, current flows through one rectifying device (such as a crystal diode), and in the other half cycle, current flows through a second rectifying device, and the connection of the two rectifying devices enables the current flowing through them to flow through the load in the same direction.

[0003] A full-wave rectifier circuit is usually composed of two rectifiers combined, one responsible for the positive direction and the other for the negative direction. The most typical full-wave rectifier circuit on the market is a rectifier bridge composed of four diodes, and can also be built with MOS transistors, generally used for the rectification of power supplies. The schematic diagram of the full-wave rectifier circuit in the prior art is as Figure 1 shown. When the voltage waveform Vac is a positive-phase voltage, diodes D2 and D4 in the rectifier circuit are turned on, and the waveform on the load at the rectifier output end is a positive-phase voltage waveform; when the voltage waveform Vac is a negative-phase voltage, diodes D1 and D3 in the rectifier circuit are turned on, and the waveform on the load at the rectifier output end is an inverted waveform of the negative-phase voltage, that is, the negative-phase waveform of Vac is converted into a positive-phase waveform of the same magnitude. Therefore, this circuit can convert the AC voltage waveform Vac into a voltage waveform in the same direction, achieving the effect of full-wave rectification. Although this full-wave rectifier circuit has a simple structure, it has two defects: the first is that there is a forward conduction threshold voltage Vbe in diodes D1 - D4 in this circuit. When Vac is less than Vbe, its rectifier diodes D1 - D4 will not conduct and cannot play the role of full-wave rectification; the second is that this circuit cannot couple and transfer a small-signal AC voltage waveform to a suitable common-mode level for amplitude amplification processing. Therefore, this full-wave rectifier circuit is only applicable to the full-wave rectification of AC voltage waveforms with larger amplitudes and cannot perform full-wave rectification on the waveform of a small-signal AC voltage Vac.

[0004] Therefore, how to provide a circuit that can automatically and accurately perform full-wave rectification on the waveform of a small-signal AC voltage has become a technical problem that needs to be urgently solved by those skilled in the art. Summary of the Invention

[0005] The present invention provides an adaptive full-wave rectifier circuit and a leakage protection device, which solve the problem in the related art that full-wave rectification of the waveform of a small-signal AC voltage cannot be achieved.

[0006] As a first aspect of the present invention, an adaptive full-wave rectifier circuit is provided, which includes: a waveform preprocessing unit, a phase detection unit, a positive-phase waveform transmission unit, a negative-phase waveform transmission unit, and a phase conversion unit. The phase detection unit, the positive-phase waveform transmission unit, and the negative-phase waveform transmission unit are all electrically connected to the waveform preprocessing unit, and the positive-phase waveform transmission unit and the negative-phase waveform transmission unit are also both electrically connected to the phase conversion unit;

[0007] The waveform preprocessing unit is configured to perform amplitude amplification processing on the AC input voltage waveform after superimposing a common-mode level to obtain a preprocessed voltage waveform, where the AC input voltage waveform at least includes a small-signal AC voltage waveform;

[0008] The phase detection unit is configured to perform positive-phase detection and negative-phase detection on the preprocessed voltage waveform to obtain a positive-phase waveform and a negative-phase waveform;

[0009] The positive-phase waveform transmission unit is configured to transmit the positive-phase waveform through a positive-phase transmission channel;

[0010] The negative-phase waveform transmission unit is configured to transmit the negative-phase waveform through a negative-phase transmission channel;

[0011] The phase conversion unit is configured to perform phase conversion on the negative-phase waveform and output it together with the positive-phase waveform to obtain a full-wave rectified output voltage waveform;

[0012] Wherein, the phase detection unit includes: a voltage comparison sub-unit and a buffer sub-unit. The input end of the voltage comparison sub-unit is connected to the output end of the waveform preprocessing unit, the output end of the voltage comparison sub-unit is connected to the input end of the buffer sub-unit, and the output end of the buffer sub-unit is the output end of the phase detection unit;

[0013] The voltage comparison sub-unit is configured to compare the preprocessed voltage waveform with a preset common-mode level to implement positive-phase detection and negative-phase detection of a preset processed voltage waveform;

[0014] The buffer sub-unit is configured to perform enhancement processing on the results after positive-phase detection and the results after negative-phase detection to obtain a positive-phase waveform and a negative-phase waveform.

[0015] Further, the waveform preprocessing unit includes a first-stage superimposed amplification sub-unit and a second-stage superimposed amplification sub-unit. The input end of the first-stage superimposed amplification sub-unit is the input end of the waveform preprocessing unit, the output end of the first-stage superimposed amplification sub-unit is connected to the input end of the second-stage superimposed amplification sub-unit, and the output end of the second-stage superimposed amplification sub-unit is the output end of the waveform preprocessing unit;

[0016] The first - stage superposition and amplification subunit is used to superpose the AC input voltage waveform to a preset common - mode level for the first time and perform amplification processing according to a first preset amplification ratio to obtain an intermediate - processed waveform;

[0017] The second - stage superposition and amplification subunit is used to superpose the intermediate - processed waveform to the preset common - mode level for the second time and amplify the amplitude of the intermediate - processed waveform according to a second preset amplification ratio to obtain a pre - processed voltage waveform.

[0018] Further, the first - stage superposition and amplification subunit includes: a first capacitor, a first resistor, a second resistor, and a first amplifier. One end of the first capacitor is the input end of the first - stage superposition and amplification subunit, the other end of the first capacitor is connected to one end of the first resistor, the other end of the first resistor is connected to the inverting input end of the first amplifier, the non - inverting input end of the first amplifier is used to input the preset common - mode level, the output end of the first amplifier is the output end of the first - stage superposition and amplification subunit, one end of the second resistor is connected to the inverting input end of the first amplifier, and the other end of the second resistor is connected to the output end of the first amplifier;

[0019] The second - stage superposition and amplification subunit includes: a second capacitor, a third resistor, a fourth resistor, and a second amplifier. One end of the second capacitor is connected to the output end of the first - stage superposition and amplification subunit, the other end of the second capacitor is connected to the signal ground, one end of the third resistor is connected to one end of the second capacitor, the other end of the third resistor is connected to the inverting input end of the second amplifier, the non - inverting input end of the second amplifier is used to input the preset common - mode level, the output end of the second amplifier is the output end of the second - stage superposition and amplification subunit, one end of the fourth resistor is connected to the inverting input end of the second amplifier, and the other end of the fourth resistor is connected to the output end of the second amplifier;

[0020] The first preset amplification ratio is the resistance ratio of the second resistor to the first resistor, and the second preset amplification ratio is the resistance ratio of the fourth resistor to the third resistor.

[0021] Further, the voltage - comparison subunit includes a voltage comparator. The non - inverting input end of the voltage comparator is the input end of the phase - detection unit, the inverting input end of the voltage comparator is used to input the preset common - mode level, and the output end of the voltage comparator is the output end of the voltage - comparison subunit;

[0022] The buffer subunit includes a first inverter and a second inverter. The input end of the first inverter is the input end of the buffer subunit, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is the output end of the buffer subunit.

[0023] Further, the positive-phase waveform transmission unit includes: a first transmission gate unit and a second transmission gate unit. The input end of the first transmission gate unit is used to connect to a preset common-mode level. After the control ends of the first transmission gate unit and the second transmission gate unit are connected, they serve as the input end of the positive-phase waveform transmission unit and are connected to the output end of the phase detection unit. After the output ends of the first transmission gate unit and the second transmission gate unit are connected, they serve as the output end of the positive-phase waveform transmission unit;

[0024] The negative-phase waveform transmission unit includes: a third transmission gate unit and a fourth transmission gate unit. After the input end of the third transmission gate unit is connected to the input end of the second transmission gate unit, they are connected to the output end of the waveform preprocessing unit. After the control ends of the third transmission gate unit and the fourth transmission gate unit are connected, they serve as the input end of the negative-phase waveform transmission unit and are connected to the output end of the phase detection unit. After the output ends of the third transmission gate unit and the fourth transmission gate unit are connected, they serve as the output end of the negative-phase waveform transmission unit.

[0025] Further, each of the first transmission gate unit, the second transmission gate unit, the third transmission gate unit, and the fourth transmission gate unit includes: a first PMOS transistor and a first NMOS transistor connected. The gate terminals of the first PMOS transistor and the first NMOS transistor both form the control end of the transmission gate unit. After the source terminals of the first PMOS transistor and the first NMOS transistor are connected, they form the input end of the transmission gate unit. After the drain terminals of the first PMOS transistor and the first NMOS transistor are connected, they form the output end of the transmission gate unit.

[0026] Further, the phase conversion unit includes: a third amplifier, a fourth amplifier, an equal-ratio current mirror structure, a fifth resistor, and a sixth resistor. The non-inverting input end of the third amplifier is connected to the output end of the positive-phase waveform transmission unit. The inverting input end of the third amplifier is connected to one end of the fifth resistor. The output end of the third amplifier is connected to the control end of the equal-ratio current mirror structure. The first end of the equal-ratio current mirror structure is connected to the power supply. The second end of the equal-ratio current mirror structure is respectively connected to one end of the fifth resistor and one end of the sixth resistor. The non-inverting input end of the fourth amplifier is connected to the output end of the negative-phase waveform transmission unit. The inverting input end of the fourth amplifier is connected to the other end of the fifth resistor. The other end of the sixth resistor is connected to the signal ground. One end of the sixth resistor is the output end of the phase conversion unit;

[0027] When the positive-phase waveform transmission unit outputs a positive-phase waveform at its output end or the negative-phase waveform transmission unit outputs a negative-phase waveform at its output end, the current direction of the fifth resistor is from one end of the fifth resistor to the other end of the fifth resistor, and both the current direction and the current magnitude in the equal-ratio current mirror structure are the same as those of the fifth resistor, so that the voltage waveform formed by the sixth resistor is a positive-phase waveform.

[0028] Further, it further includes: a common-mode level acquisition unit, and the common-mode level acquisition unit is used to obtain a common-mode level after voltage division and filtering according to a power supply.

[0029] As another aspect of the present invention, there is provided a leakage protection device, which includes the adaptive full-wave rectification circuit described above.

[0030] The adaptive full-wave rectification circuit provided by the present invention, for the preprocessing of the AC input voltage waveform, can not only automatically convert the AC input voltage waveform into a voltage waveform with an amplified amplitude on the common-mode level, but also convert the negative-phase voltage waveform into a positive-phase voltage waveform of the same magnitude at the same time. Therefore, the adaptive full-wave rectification circuit of the present invention can be applicable to both small-signal AC input voltage waveforms and large-signal AC input voltage waveforms. Moreover, the adaptive full-wave rectification circuit provided by the present invention can very accurately perform full-wave rectification and amplification output on the small-signal AC voltage waveform. When performing full-wave rectification and amplification output on the large-signal AC voltage waveform, in addition to achieving accurate amplification output, compared with the existing rectifier bridge method, a smoother rectification output result can be obtained because there is no diode voltage drop. Description of the Drawings

[0031] The drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. They are used together with the following specific implementation manners to explain the present invention, but do not constitute a limitation to the present invention.

[0032] Figure 1 It is the schematic diagram of the full-wave rectification circuit in the prior art.

[0033] Figure 2 The structural block diagram of the adaptive full-wave rectification circuit provided by the present invention.

[0034] Figure 3 It is the schematic circuit diagram of an implementation manner of the adaptive full-wave rectification circuit provided by the present invention.

[0035] Figure 4 It is the circuit schematic diagram of the transmission gate unit provided by the present invention.

[0036] Figure 5 It is the schematic circuit diagram of another implementation manner of the adaptive full-wave rectification circuit provided by the present invention.

[0037] Figure 6 The circuit waveform diagram of the adaptive full-wave rectification circuit provided by the present invention. Detailed implementation manners

[0038] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments may be combined with each other. The present invention will be described in detail below with reference to the drawings and in combination with the embodiments.

[0039] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0040] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances for the embodiments of the present invention described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not necessarily limited to those clearly listed steps or units, but may include other steps or units not clearly listed or inherent to these process, method, product or device.

[0041] In this embodiment, an adaptive full-wave rectification circuit is provided. Figure 2 is a structural block diagram of the adaptive full-wave rectification circuit provided by the embodiment of the present invention, as Figure 2 shown, including: a waveform preprocessing unit 100, a phase detection unit 200, a positive-phase waveform transmission unit 300, a negative-phase waveform transmission unit 400, and a phase conversion unit 500. The phase detection unit 200, the positive-phase waveform transmission unit 300, and the negative-phase waveform transmission unit 400 are all electrically connected to the waveform preprocessing unit 100, and the positive-phase waveform transmission unit 300 and the negative-phase waveform transmission unit 400 are also both electrically connected to the phase conversion unit 500;

[0042] The waveform preprocessing unit 100 is configured to perform amplitude amplification processing on the AC input voltage waveform after superimposing a common-mode level to obtain a preprocessed voltage waveform, where the AC input voltage waveform at least includes a small-signal AC voltage waveform;

[0043] The phase detection unit 200 is configured to perform positive phase detection and negative phase detection on the preprocessed voltage waveform to obtain a positive phase waveform and a negative phase waveform;

[0044] The positive phase waveform transmission unit 300 is configured to transmit the positive phase waveform through a positive phase transmission channel;

[0045] The negative phase waveform transmission unit 400 is configured to transmit the negative phase waveform through a negative phase transmission channel;

[0046] The phase conversion unit 500 is configured to perform phase conversion on the negative phase waveform and output it together with the positive phase waveform to obtain a full-wave rectified output voltage waveform.

[0047] In an embodiment of the present invention, the waveform preprocessing unit 100 superimposes the AC input voltage waveform onto a common-mode level and performs amplitude amplification processing to obtain a preprocessed voltage waveform. For this preprocessed voltage waveform, the phase detection unit 200 performs positive phase detection to obtain a positive phase waveform and negative phase detection to obtain a negative phase waveform. The positive phase waveform transmission unit 300 can form a positive phase transmission channel to transmit the positive phase waveform, the negative phase waveform transmission unit 400 can form a negative phase transmission channel to transmit the negative phase waveform, and the phase conversion unit 500 can perform phase conversion on the negative phase waveform output by the negative phase waveform transmission unit 400 to become a positive phase waveform and output it together with the positive phase waveform output by the positive phase waveform transmission unit to obtain a full-wave rectified output voltage waveform.

[0048] It should be noted that the AC input voltage waveform in the embodiment of the present invention can specifically be a small-signal AC voltage waveform or a large-signal AC voltage waveform. It should be understood that the difference in the processing of the small-signal AC voltage waveform and the large-signal AC voltage waveform lies in the amplification ratio during amplitude amplification processing.

[0049] It should be understood that a small-signal AC voltage waveform generally refers to an AC voltage waveform whose amplitude does not cause a significant deviation in the operating point of a device or circuit, where the amplitude is usually in the order of millivolts (mV) or microvolts (μV), which is much smaller than the DC bias voltage (such as V in a transistor). be ).

[0050] Therefore, the adaptive full-wave rectifier circuit provided by the present invention can, for the preprocessing of the AC input voltage waveform, not only automatically convert the AC input voltage waveform into a voltage waveform with an amplified amplitude on the common-mode level, but also simultaneously convert the negative-phase voltage waveform into a positive-phase voltage waveform of the same magnitude. As a result, the adaptive full-wave rectifier circuit of the present invention can be applied to both small-signal AC input voltage waveforms and large-signal AC input voltage waveforms. Moreover, the adaptive full-wave rectifier circuit provided by the present invention can very accurately perform full-wave rectification and amplification output on small-signal AC voltage waveforms. When performing full-wave rectification and amplification output on large-signal AC voltage waveforms, in addition to achieving accurate amplification output, compared with the existing rectifier bridge method, a smoother rectification output result can be obtained due to the absence of diode voltage drops.

[0051] As a specific embodiment, as Figure 3 shown, the waveform preprocessing unit 100 includes a first-stage superposition amplification subunit 110 and a second-stage superposition amplification subunit 120. The input end of the first-stage superposition amplification subunit 110 is the input end Vac of the waveform preprocessing unit. The output end of the first-stage superposition amplification subunit 110 is connected to the input end of the second-stage superposition amplification subunit 120. The output end of the second-stage superposition amplification subunit 120 is the output end of the waveform preprocessing unit 100.

[0052] The first-stage superposition amplification subunit 110 is configured to first superpose the AC input voltage waveform onto a preset common-mode level and perform amplification processing according to a first preset amplification ratio to obtain an intermediate processed waveform.

[0053] The second-stage superposition amplification subunit 120 is configured to secondarily superpose the intermediate processed waveform onto the preset common-mode level and perform amplification processing on the amplitude of the intermediate processed waveform according to a second preset amplification ratio to obtain a preprocessed voltage waveform.

[0054] Specifically, the first-stage superposition amplification subunit 110 includes: a first capacitor C1, a first resistor R1, a second resistor R2, and a first amplifier AMP1. One end of the first capacitor C1 is the input end of the first-stage superposition amplification subunit 110. The other end of the first capacitor C1 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the inverting input end of the first amplifier AMP1. The non-inverting input end of the first amplifier AMP1 is used to input the preset common-mode level. The output end of the first amplifier AMP1 is the output end of the first-stage superposition amplification subunit 110. One end of the second resistor R2 is connected to the inverting input end of the first amplifier AMP1. The other end of the second resistor R2 is connected to the output end of the first amplifier AMP1.

[0055] The second-stage superposition amplification subunit 120 includes: a second capacitor C2, a third resistor R3, a fourth resistor R4, and a second amplifier AMP2. One end of the second capacitor C2 is connected to the output end of the first-stage superposition amplification subunit 110, and the other end of the second capacitor C2 is connected to the signal ground. One end of the third resistor R3 is connected to one end of the second capacitor C2, and the other end of the third resistor R3 is connected to the inverting input end of the second amplifier AMP2. The non-inverting input end of the second amplifier AMP2 is used to input a preset common-mode level. The output end of the second amplifier AMP2 is the output end of the second-stage superposition amplification subunit 120. One end of the fourth resistor R4 is connected to the inverting input end of the second amplifier AMP2, and the other end of the fourth resistor R4 is connected to the output end of the second amplifier AMP2;

[0056] The first preset amplification ratio m is the resistance ratio of the second resistor R2 to the first resistor R1, and the second preset amplification ratio n is the resistance ratio of the fourth resistor R4 to the third resistor R3.

[0057] In the embodiment of the present invention, the inverting input end of the first amplifier AMP1 in the waveform preprocessing unit 100 is coupled to the common connection end of the first resistor R1 and the second resistor R2, and its non-inverting input end is connected to the common-mode voltage Vcm; one end of the first capacitor C1 can be specifically connected to the small-signal AC voltage waveform input end, and the other end is connected to one end of the first resistor R1; one end of the second capacitor C2 is connected to the output end of the first amplifier AMP1, and the other end is connected to the ground wire; one end of the third resistor R3 is connected to the output end of the first amplifier AMP1, and the other end is connected to the inverting input end of the second amplifier AMP2; one end of the fourth resistor R4 is coupled to the common connection end of the inverting input end of the second amplifier AMP2 and the third resistor R3, and the other end is connected to the output end of the second amplifier AMP2; the non-inverting input end of the second amplifier AMP2 is connected to the common-mode voltage Vcm.

[0058] In the embodiment of the present invention, the first amplifier AMP1, the first resistor R1, and the second resistor R2 constitute a first-stage inverting proportional operation circuit, and its voltage amplification factor is ; the second amplifier AMP2, the third resistor R3, and the fourth resistor R4 constitute a second-stage inverting proportional operation circuit, and its voltage amplification factor is ; therefore, the amplification factor of the AC voltage signal output by the waveform preprocessing unit is .

[0059] It should be noted that the second capacitor C2 is connected to the output end of the first-stage inverting proportional operation circuit, and its purpose is to eliminate the internal self-excitation oscillation of the op-amp system.

[0060] As a specific implementation manner of the phase detection unit, as Figure 3 shown, the phase detection unit 200 includes: a voltage comparison sub-unit 210 and a buffer sub-unit 220. The input end of the voltage comparison sub-unit 210 is connected to the output end of the waveform preprocessing unit 100, the output end of the voltage comparison sub-unit 210 is connected to the input end of the buffer sub-unit 220, and the output end of the buffer sub-unit 220 is the output end of the phase detection unit 200;

[0061] The voltage comparison sub-unit 210 is configured to compare the preprocessed voltage waveform with a preset common-mode level to implement positive phase detection and negative phase detection of the preset processed voltage waveform;

[0062] The buffer sub-unit 220 is configured to perform enhancement processing on the results after positive phase detection and the results after negative phase detection to obtain a positive phase waveform and a negative phase waveform.

[0063] Specifically, as Figure 3 shown, the voltage comparison sub-unit 210 includes a voltage comparator COMP. The non-inverting input terminal of the voltage comparator COMP is the input terminal of the phase detection unit 200, the inverting input terminal of the voltage comparator COMP is used to input a preset common-mode level, and the output terminal of the voltage comparator COMP is the output terminal of the voltage comparison sub-unit 210;

[0064] The buffer sub-unit 220 includes a first inverter INV1 and a second inverter INV2. The input terminal of the first inverter INV1 is the input terminal of the buffer sub-unit 220, the output terminal of the first inverter INV1 is connected to the input terminal of the second inverter INV2, and the output terminal of the second inverter INV2 is the output terminal of the buffer sub-unit 220.

[0065] It should be understood that the non-inverting input terminal of the voltage comparator COMP in the phase detection unit is connected to the output terminal of the second amplifier AMP2, and its inverting input terminal is connected to the common-mode voltage Vcm; the input terminal of the first inverter INV1 is connected to the output terminal of the voltage comparator COMP, and its output terminal is connected to the input terminal of the second inverter INV2. The first inverter INV1 and the second inverter INV2 together form a digital buffer, aiming to enhance the driving ability of the output signal.

[0066] In the embodiment of the present invention, as Figure 3As shown, the positive-phase waveform transmission unit 300 includes: a first transmission gate unit TG1 and a second transmission gate unit TG2. The input end of the first transmission gate unit TG1 is used to connect to a preset common-mode level. The control ends of the first transmission gate unit TG1 and the second transmission gate unit TG2 are connected and used as the input end of the positive-phase waveform transmission unit 300 to connect to the output end of the phase detection unit 200. The output ends of the first transmission gate unit TG1 and the second transmission gate unit TG2 are connected and used as the output end of the positive-phase waveform transmission unit 300;

[0067] The negative-phase waveform transmission unit 400 includes: a third transmission gate unit TG3 and a fourth transmission gate unit TG4. The input end of the third transmission gate unit TG3 is connected to the input end of the second transmission gate unit TG2 and then connected to the output end of the waveform preprocessing unit 100. The control ends of the third transmission gate unit TG3 and the fourth transmission gate unit TG4 are connected and used as the input end of the negative-phase waveform transmission unit 400 to connect to the output end of the phase detection unit 200. The output ends of the third transmission gate unit TG3 and the fourth transmission gate unit TG4 are connected and used as the output end of the negative-phase waveform transmission unit 400.

[0068] Further specifically, as Figure 4 shown, the first transmission gate unit TG1, the second transmission gate unit TG2, the third transmission gate unit TG3, and the fourth transmission gate unit TG4 all include: a first PMOS transistor and a first NMOS transistor connected. The gate terminals of the first PMOS transistor and the first NMOS transistor are both formed as the control end of the transmission gate unit. The source terminals of the first PMOS transistor and the first NMOS transistor are connected and formed as the input end of the transmission gate unit. The drain terminals of the first PMOS transistor and the first NMOS transistor are connected and formed as the output end of the transmission gate unit.

[0069] It should be understood that, as Figure 3 shown, the input end of the first transmission gate unit TG1 in the positive-phase waveform transmission unit 300 is connected to the common-mode voltage Vcm, and its output end is connected to the non-inverting input end of the third amplifier AMP3; the input end of the second transmission gate unit TG2 is connected to the output end of the second amplifier AMP2, and its output end is connected to the non-inverting input end of the third amplifier AMP3; the input end of the third transmission gate unit TG3 in the negative-phase waveform transmission unit 400 is connected to the output end of the second amplifier AMP2, and its output end is connected to the non-inverting input end of the fourth amplifier AMP4; the input end of the fourth transmission gate unit TG4 is connected to the common-mode voltage Vcm, and its output end is connected to the non-inverting input end of the fourth amplifier AMP4.

[0070] Among them, the specific structure of the transmission gate unit in the embodiments of the present invention is as follows Figure 4 As shown, inside each of the first transmission gate unit TG1 to the fourth transmission gate unit TG4, an NMOS transistor and a PMOS transistor can be respectively connected at their source and drain ends to form the structure.

[0071] In the embodiments of the present invention, as Figure 3 shown, the phase conversion unit 500 includes: a third amplifier AMP3, a fourth amplifier AMP4, a current mirror structure with equal proportions, a fifth resistor R5, and a sixth resistor R6. The non-inverting input terminal of the third amplifier AMP3 is connected to the output terminal of the positive-phase waveform transmission unit 300. The inverting input terminal of the third amplifier AMP3 is connected to one end of the fifth resistor R5. The output terminal of the third amplifier AMP3 is connected to the control terminal of the current mirror structure with equal proportions. The first terminal of the current mirror structure with equal proportions is connected to the power supply Vcc. The second terminal of the current mirror structure with equal proportions is respectively connected to one end of the fifth resistor R5 and one end of the sixth resistor R6. The non-inverting input terminal of the fourth amplifier AMP4 is connected to the output terminal of the negative-phase waveform transmission unit 400. The inverting input terminal of the fourth amplifier AMP4 is connected to the other end of the fifth resistor R5. The other end of the sixth resistor R6 is connected to the signal ground. One end of the sixth resistor R6 is the output terminal of the phase conversion unit 500;

[0072] When the positive-phase waveform transmission unit 300 outputs a positive-phase waveform or the negative-phase waveform transmission unit 400 outputs a negative-phase waveform, the current direction of the fifth resistor R5 is from one end of the fifth resistor R5 to the other end of the fifth resistor R5. The current direction and magnitude in the current mirror structure with equal proportions are the same as those of the fifth resistor R5, so that the voltage waveform formed by the sixth resistor R6 is a positive-phase waveform.

[0073] It should be noted that the current mirror structure with equal proportions in the embodiments of the present invention can specifically be composed of two P-type MOS transistors. It should be understood that two PNP transistors can also be used to implement it. Specifically, the embodiments of the present invention do not make any limitations and can be selected according to needs.

[0074] In an embodiment of the present invention, an equal - ratio current mirror structure composed of two P - type MOS transistors (i.e., the first transistor PM1 and the second transistor PM2) is taken as an example for illustration. The control terminal of the first transistor PM1 in the phase conversion unit 500 is connected to the output terminal of the third amplifier AMP3. The power supply terminal of the first transistor PM1 is connected to the power supply Vcc. The output terminal of the first transistor PM1 is connected to the upper end of the fifth resistor R5. The control terminal of the second transistor PM2 is connected to the output terminal of the third amplifier AMP3. The power supply terminal of the second transistor PM2 is connected to the power supply Vcc. The output terminal of the second transistor PM2 is connected to the upper end of the sixth resistor R6, and the lower end of the sixth resistor R6 is connected to the signal ground.

[0075] In an embodiment of the present invention, the inverting input terminal of the third amplifier AMP3 in the phase conversion unit 500 is connected to the upper end of the fifth resistor R5. The inverting input terminal of the fourth amplifier AMP4 is connected to its own output terminal and is simultaneously coupled to the lower end of the fifth resistor R5.

[0076] It should be noted that when the AC voltage waveform is a positive - phase waveform, the voltage value of the voltage waveform is greater than the Vcm voltage value at this time. The phase detection unit 200 will control the second transmission gate unit TG2 and the fourth transmission gate unit TG4 to conduct. The voltage difference across the fifth resistor R5 is the positive - phase waveform voltage minus the Vcm voltage. When the AC voltage waveform is a negative - phase waveform, the voltage value of the voltage waveform is less than the Vcm voltage value at this time. The phase detection unit 200 will control the first transmission gate unit TG1 and the third transmission gate unit TG3 to conduct. The voltage difference across the fifth resistor R5 is the Vcm voltage minus the negative - phase waveform voltage. In both cases, the current flowing through the fifth resistor R5 is in the same direction from top to bottom. At the same time, the fifth resistor R5 and the first transistor PM1 are in a series relationship. Therefore, the current direction of the first transistor PM1 is from the power supply Vcc through the drain - source of the first transistor PM1 and then to the fifth resistor R5. Also, since the second transistor PM2 and the first transistor PM1 are in an equal - ratio mirror current source relationship, that is, the current magnitude and direction of the second transistor PM2 and the first transistor PM1 are exactly the same. Therefore, the current flowing out of the second transistor PM2 forms the final voltage waveform Vout through the sixth resistor R6, which is all positive - phase waveforms.

[0077] In an embodiment of the present invention, the resistance values of the fifth resistor R5 and the sixth resistor R6 in the phase conversion unit 500 are in a proportional relationship, and the proportionality coefficient is k.

[0078] Based on this, the fifth resistor R5 in the phase conversion unit converts the input positive and negative phase voltage waveforms into corresponding current waveforms, and the sixth resistor R6 converts the current waveform into a voltage waveform. At the same time, the phase conversion unit further amplifies the amplitudes of the input positive and negative phase voltage waveforms to .

[0079] Therefore, the final amplification multiple of the amplitude of the AC input voltage waveform is , so the required amplification multiple of the rectified waveform can be set by adjusting the values of m, n, and k.

[0080] It should be noted that in order to obtain the common-mode level, as Figure 5 shown, the embodiment of the present invention further includes: a common-mode level acquisition unit 600, and the common-mode level acquisition unit 600 is used to obtain the common-mode level after voltage division and filtering according to the power supply.

[0081] Specifically, the common-mode level acquisition unit 600 includes a seventh resistor R7, an eighth resistor R8, and a third capacitor C3. The seventh resistor R7, the eighth resistor R8, and the third capacitor C3 perform voltage division and filtering on the power supply Vcc. Since R7 = R8 = R, the voltage of the middle tap line between R7 and R8 is , and this tap line is connected to the common-mode voltage Vcm terminal, that is: .

[0082] In summary, for the adaptive full-wave rectifier circuit provided by the embodiment of the present invention, even if the AC input voltage waveform is a small-signal AC voltage, only the output terminal of the small-signal AC voltage needs to be connected to the signal input port of the first capacitor C1, and then the AC voltage waveform Vac will be automatically filtered and amplified and input into the phase detection unit for logical judgment. Then, the corresponding positive and negative phase waveform transmission unit channels are opened, the positive phase waveform is input into the input terminal of the high-side amplifier, the negative phase waveform is input into the input terminal of the low-side amplifier, and finally the negative phase waveform is converted into a positive phase waveform of the same size through the phase conversion unit, achieving the effect of full-wave rectification. And the final voltage amplification multiple of this waveform is Gv = m * n * k. Therefore, the adaptive full-wave rectifier circuit provided by the present invention can not only very accurately perform full-wave rectification and amplification output on the small-signal AC voltage waveform, but also has the characteristics of stable performance, simple structure, and strong operability.

[0083] Next, a detailed description will be given in conjunction with Figure 5 the specific application schematic diagram of the adaptive full-wave rectifier circuit shown.

[0084] The adaptive full-wave rectifier circuit of the embodiment of the present invention is applied in a small-signal AC voltage full-wave rectification device, and its purpose is to perform full-wave rectification and amplification output on the AC voltage signal Vac.

[0085] In this embodiment, the voltage of Vcc is divided and filtered by resistors R7, R8 and capacitor C3. Since R7 = R8 = R, the voltage of the tap line between R7 and R8 is , and this tap line is connected to the common-mode voltage Vcm terminal, that is: .

[0086] In this embodiment, since the amplitude of the AC voltage Vac signal is small, it is necessary to amplify the waveform amplitude, then judge the positive and negative phases of the waveform, and finally perform phase conversion. The waveform diagram is as Figure 6 shown, where Vac is the waveform of the input AC voltage signal, Vac1 is the waveform of the amplified voltage signal, and Vout is the waveform of the voltage signal after full-wave rectification.

[0087] First, connect the output terminal of the small-signal AC voltage Vac to the signal input port of the first capacitor C1, couple and input Vac to the input terminal of the amplifier. The waveform preprocessing unit in the adaptive full-wave rectification circuit will automatically convert the small-signal AC voltage Vac into a voltage waveform Vac1 with an amplified amplitude on the common-mode level, and its phase remains unchanged. The amplification factor of the amplified voltage waveform Vac1 is .

[0088] The amplified AC voltage waveform Vac1 is input into the phase detection unit for logical comparison and judgment, and then corresponding channel control signals are sent out; when Vac1 is greater than Vcm, it is determined as a positive-phase waveform, and the phase detection unit will control the second transmission gate unit TG2 and the fourth transmission gate unit TG4 to conduct; when Vac1 is less than Vcm, it is determined as a negative-phase waveform, and the phase detection unit will control the first transmission gate unit TG1 and the third transmission gate unit TG3 to conduct.

[0089] The third amplifier AMP3 in the phase conversion unit and the first transistor PM1 together form a voltage follower, following the voltage at the non-inverting input end of the third amplifier AMP3 to the upper end of the fifth resistor R5; the inverting input end of the fourth amplifier AMP4 is connected to its own output end, also forming a voltage follower, following the voltage at the non-inverting input end of the fourth amplifier AMP4 to the lower end of the fifth resistor R5.

[0090] Therefore, when the AC voltage waveform is a positive-phase waveform, the phase detection unit will control the second transmission gate unit TG2 and the fourth transmission gate unit TG4 to conduct. At this time, the voltage difference across the fifth resistor R5 is the positive-phase waveform voltage minus the Vcm voltage, and the current flowing through the fifth resistor R5 is from top to bottom; when the AC voltage waveform is a negative-phase waveform, the phase detection unit will control the first transmission gate unit TG1 and the third transmission gate unit TG3 to conduct. At this time, the voltage difference across the fifth resistor R5 is the Vcm voltage minus the negative-phase waveform voltage. Therefore, the current in the fifth resistor R5 is still in the same direction from top to bottom.

[0091] Since the fifth resistor R5 is in series with the first transistor PM1, the magnitude and direction of the current in the first transistor PM1 are the same as those in the fifth resistor R5. At the same time, since the second transistor PM2 and the first transistor PM1 are in an equal-proportion mirror current source relationship, that is, the magnitude and direction of the current in the second transistor PM2 are exactly the same as those in the first transistor PM1. Therefore, the current flowing out of the second transistor PM2 forms the final voltage waveform Vout through the sixth resistor R6, which is all positive-phase waveforms. Thus, this circuit perfectly realizes the function of full-wave rectifying and amplifying the output of the small-signal voltage waveform Vac.

[0092] In summary, for the adaptive full-wave rectifying circuit provided by the present invention, first, the input small-signal AC voltage Vac waveform is filtered and amplified to obtain an AC voltage waveform Vac1 with a larger voltage amplitude and the same phase. Then Vac1 is input into the phase detection unit for comparison and judgment processing, and then the corresponding positive and negative phase waveform output unit channels are opened. The positive-phase waveform is input into the input terminal of the high-side amplifier AMP3, and the negative-phase waveform is input into the input terminal of the low-side amplifier AMP4. Finally, the negative-phase waveform is converted into the positive-phase waveform Vout through the phase conversion unit to achieve the effect of full-wave rectification, and the final voltage amplification factor of this waveform is , so the adaptive full-wave rectifying circuit provided by the present invention can not only very accurately perform full-wave rectifying and amplifying output on weak voltage waveforms, but also has the characteristics of stable performance, simple structure, and strong operability.

[0093] As another embodiment of the present invention, a leakage protection device is provided, which includes the adaptive full-wave rectifying circuit described above.

[0094] It should be understood that in the leakage protection device, since the leakage signal of the leakage protector collected is an AC small signal, it can be subjected to full-wave rectifying processing through the adaptive full-wave rectifying circuit.

[0095] The leakage protection device provided by the present invention, due to the adaptive full-wave rectifier circuit sampled above, can realize the full-wave rectification and amplification output of the leakage signal, so as to obtain an accurate leakage signal, and further enable the leakage protection device to accurately implement the leakage protection function.

[0096] It can be understood that the above embodiments are merely exemplary embodiments adopted to illustrate the principle of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also regarded as the protection scope of the present invention.

Claims

1. An adaptive full-wave rectifier circuit, characterized in that, Comprising: A waveform preprocessing unit, a phase detection unit, a positive-phase waveform transmission unit, a negative-phase waveform transmission unit, and a phase conversion unit. The phase detection unit, the positive-phase waveform transmission unit, and the negative-phase waveform transmission unit are all electrically connected to the waveform preprocessing unit, and the positive-phase waveform transmission unit and the negative-phase waveform transmission unit are also both electrically connected to the phase conversion unit; The waveform preprocessing unit is used to perform amplitude amplification processing on the AC input voltage waveform after superimposing the common-mode level to obtain a preprocessed voltage waveform, where the AC input voltage waveform at least includes a small-signal AC voltage waveform; The phase detection unit is used to perform positive-phase detection and negative-phase detection on the preprocessed voltage waveform to obtain a positive-phase waveform and a negative-phase waveform; The positive-phase waveform transmission unit is used to transmit the positive-phase waveform through a positive-phase transmission channel; The negative-phase waveform transmission unit is used to transmit the negative-phase waveform through a negative-phase transmission channel; The phase conversion unit is used to perform phase conversion on the negative-phase waveform and output it together with the positive-phase waveform to obtain a full-wave rectified output voltage waveform; Wherein, the phase detection unit includes: a voltage comparison sub-unit and a buffer sub-unit. The input end of the voltage comparison sub-unit is connected to the output end of the waveform preprocessing unit, the output end of the voltage comparison sub-unit is connected to the input end of the buffer sub-unit, and the output end of the buffer sub-unit is the output end of the phase detection unit; The voltage comparison sub-unit is used to compare the preprocessed voltage waveform with a preset common-mode level to achieve positive-phase detection and negative-phase detection of a preset processed voltage waveform; The buffer sub-unit is used to perform enhancement processing on the results after positive-phase detection and the results after negative-phase detection to obtain a positive-phase waveform and a negative-phase waveform; The positive-phase waveform transmission unit includes: a first transmission gate unit and a second transmission gate unit. The input end of the first transmission gate unit is used to connect to a preset common-mode level. The control ends of the first transmission gate unit and the second transmission gate unit are connected and used as the input end of the positive-phase waveform transmission unit to connect to the output end of the phase detection unit. The output ends of the first transmission gate unit and the second transmission gate unit are connected and used as the output end of the positive-phase waveform transmission unit; The negative-phase waveform transmission unit includes: a third transmission gate unit and a fourth transmission gate unit. The input end of the third transmission gate unit is connected to the input end of the second transmission gate unit and then connected to the output end of the waveform preprocessing unit. The control ends of the third transmission gate unit and the fourth transmission gate unit are connected and used as the input end of the negative-phase waveform transmission unit to connect to the output end of the phase detection unit. The output ends of the third transmission gate unit and the fourth transmission gate unit are connected and used as the output end of the negative-phase waveform transmission unit; The input end of the fourth transmission gate unit is connected to the common-mode voltage; The phase conversion unit includes: a third amplifier, a fourth amplifier, a current mirror structure with equal ratio, a fifth resistor, and a sixth resistor. The non-inverting input terminal of the third amplifier is connected to the output terminal of the positive-phase waveform transmission unit. The inverting input terminal of the third amplifier is connected to one end of the fifth resistor. The output terminal of the third amplifier is connected to the control terminal of the current mirror structure with equal ratio. The first terminal of the current mirror structure with equal ratio is connected to the power supply. The second terminal of the current mirror structure with equal ratio is respectively connected to one end of the fifth resistor and one end of the sixth resistor. The non-inverting input terminal of the fourth amplifier is connected to the output terminal of the negative-phase waveform transmission unit. The inverting input terminal of the fourth amplifier is connected to the other end of the fifth resistor. The other end of the sixth resistor is connected to the signal ground. One end of the sixth resistor is the output terminal of the phase conversion unit; When the positive-phase waveform transmission unit outputs a positive-phase waveform or the negative-phase waveform transmission unit outputs a negative-phase waveform, the current direction of the fifth resistor is from one end of the fifth resistor to the other end of the fifth resistor. The current direction and magnitude in the current mirror structure with equal ratio are the same as those of the fifth resistor, so that the voltage waveform formed by the sixth resistor is a positive-phase waveform.

2. The adaptive full-wave rectifier circuit according to claim 1, wherein The waveform preprocessing unit includes a first-stage superposition amplification sub-unit and a second-stage superposition amplification sub-unit. The input terminal of the first-stage superposition amplification sub-unit is the input terminal of the waveform preprocessing unit. The output terminal of the first-stage superposition amplification sub-unit is connected to the input terminal of the second-stage superposition amplification sub-unit. The output terminal of the second-stage superposition amplification sub-unit is the output terminal of the waveform preprocessing unit; The first-stage superposition amplification sub-unit is used to first superpose the AC input voltage waveform to a preset common-mode level and perform amplification processing according to a first preset amplification ratio to obtain an intermediate processed waveform; The second-stage superposition amplification sub-unit is used to secondarily superpose the intermediate processed waveform to a preset common-mode level and amplify the amplitude of the intermediate processed waveform according to a second preset amplification ratio to obtain a preprocessed voltage waveform.

3. The adaptive full-wave rectifier circuit according to claim 2, wherein The first-stage superposition amplification sub-unit includes: a first capacitor, a first resistor, a second resistor, and a first amplifier. One end of the first capacitor is the input terminal of the first-stage superposition amplification sub-unit. The other end of the first capacitor is connected to one end of the first resistor. The other end of the first resistor is connected to the inverting input terminal of the first amplifier. The non-inverting input terminal of the first amplifier is used to input a preset common-mode level. The output terminal of the first amplifier is the output terminal of the first-stage superposition amplification sub-unit. One end of the second resistor is connected to the inverting input terminal of the first amplifier. The other end of the second resistor is connected to the output terminal of the first amplifier; The second - stage superposition amplification subunit includes: a second capacitor, a third resistor, a fourth resistor, and a second amplifier. One end of the second capacitor is connected to the output end of the first - stage superposition amplification subunit, the other end of the second capacitor is connected to the signal ground, one end of the third resistor is connected to one end of the second capacitor, the other end of the third resistor is connected to the inverting input terminal of the second amplifier, the non - inverting input terminal of the second amplifier is used for inputting a preset common - mode level, the output end of the second amplifier is the output end of the second - stage superposition amplification subunit, one end of the fourth resistor is connected to the inverting input terminal of the second amplifier, and the other end of the fourth resistor is connected to the output end of the second amplifier; The first preset amplification ratio is the resistance ratio of the second resistor to the first resistor, and the second preset amplification ratio is the resistance ratio of the fourth resistor to the third resistor.

4. The adaptive full-wave rectifier circuit according to claim 1, wherein The voltage comparison subunit includes a voltage comparator. The non - inverting input terminal of the voltage comparator is the input terminal of the phase - detection unit, the inverting input terminal of the voltage comparator is used for inputting a preset common - mode level, and the output end of the voltage comparator is the output end of the voltage comparison subunit; The buffer subunit includes a first inverter and a second inverter. The input terminal of the first inverter is the input terminal of the buffer subunit, the output end of the first inverter is connected to the input terminal of the second inverter, and the output end of the second inverter is the output end of the buffer subunit.

5. The adaptive full-wave rectifier circuit according to claim 1, wherein The first transmission - gate unit, the second transmission - gate unit, the third transmission - gate unit, and the fourth transmission - gate unit all include: a first PMOS transistor and a first NMOS transistor are connected. The gate terminals of the first PMOS transistor and the first NMOS transistor both form the control terminal of the transmission - gate unit. The source terminals of the first PMOS transistor and the first NMOS transistor are connected to form the input terminal of the transmission - gate unit, and the drain terminals of the first PMOS transistor and the first NMOS transistor are connected to form the output terminal of the transmission - gate unit.

6. The adaptive full-wave rectifier circuit according to claim 1, characterized in that, It further includes: A common - mode level acquisition unit, which is used to obtain a common - mode level after voltage division and filtering according to the power supply.

7. A leakage protection device, characterized in that, An adaptive full - wave rectification circuit according to any one of claims 1 to 6 is included.

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