Method, system, equipment and medium for suppressing current harmonics in flexible DC converter stations

Abstract

The present invention discloses a method, system, device and medium for suppressing current harmonics in a flexible direct current converter station. The method of the present invention comprises: performing a difference between the phase angle output of a phase-locked loop and the phase angle output of a discrete time integrator to obtain a difference signal, pre-limiting and filtering the difference signal, then obtaining the maximum value of the difference signal after filtering through an extreme value algorithm, and limiting the difference signal using the extreme value; performing fast Fourier transform analysis on the difference signal after limiting and the phase angle output of the phase-locked loop, respectively, to obtain the harmonic amplitude and phase of the difference signal after limiting and the harmonic frequency of the phase angle output of the phase-locked loop and generate a corresponding harmonic suppression signal, injecting the harmonic suppression signal into the phase angle output of the phase-locked loop to suppress the harmonics of the phase-locked loop. The present invention can effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, reduce the interference of harmonics on the flexible direct current transmission system, and improve the power quality and the stability of the transmission system.

Description

Technical Field

[0001] The present invention belongs to the technical field of flexible direct current transmission harmonic suppression, and specifically provides a method, system, device and medium for suppressing current harmonics in a flexible direct current converter station based on phase-locked loop harmonic suppression. Background Art

[0002] Due to its excellent flexibility and low transmission losses, flexible direct current (HVDC) transmission technology has been widely used in large-scale renewable energy access and long-distance power transmission. As the core equipment of flexible direct current transmission systems, the stability of modular multilevel converters (MMCs) affects the stability and reliability of the entire transmission system. However, the harmonic currents generated by widely used nonlinear loads and abnormal operation of certain power generation equipment can distort the grid-side current waveform, thereby introducing harmonics into the power grid. The high-frequency components of grid-side harmonics can affect the control systems of flexible direct current converter stations, increasing equipment losses and reducing power quality. In severe cases, this can deteriorate the dynamic performance of the flexible direct current converter stations, affecting the safe and stable operation of the transmission system.

[0003] Existing current harmonic suppression methods for flexible DC converter stations still have many limitations in practical applications. For example, traditional filters are large in size and high in cost, and cannot dynamically adjust filtering characteristics to adapt to changes in harmonics, resulting in poor harmonic suppression effect. Harmonic suppression methods with improved control strategies have relatively complex control link designs and poor real-time performance in practical applications, which will reduce the dynamic performance of the system and affect the stability of the transmission system. The use of improved topology structures will not only increase the structural complexity and cost of the flexible DC converter station, but will only reduce the output current harmonic content to a certain extent.

[0004] Therefore, developing an efficient and economical harmonic suppression method is of great significance to ensure the safe operation of flexible DC converter stations. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to overcome the defects of the above-mentioned prior art and provide a method, system, device and storage medium for suppressing current harmonics in a flexible DC converter station, so as to effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, reduce the interference of harmonics on the flexible DC transmission system, and improve the power quality and stability of the transmission system.

[0006] To achieve the above objectives, the present invention adopts the following technical solutions.

[0007] In a first aspect, the present invention provides a method for suppressing current harmonics in a flexible DC converter station, comprising:

[0008] Subtracting the phase angle output by the phase-locked loop from the phase angle output by the discrete-time integrator to obtain a difference signal, pre-limiting and filtering the difference signal, obtaining the maximum value of the filtered difference signal through an extreme value algorithm, and limiting the difference signal using the extreme value;

[0009] Perform fast Fourier transform analysis to obtain the amplitude and phase of the harmonics; perform fast Fourier transform analysis on the phase-locked loop output phase angle to obtain the frequency of the harmonics; generate a corresponding harmonic suppression signal based on the obtained frequency, amplitude and phase of the harmonics, and inject the harmonic suppression signal into the phase-locked loop output phase angle to suppress the phase-locked loop harmonics, thereby achieving suppression of current harmonics in the flexible DC converter station.

[0010] Furthermore, the expression of the harmonic suppression signal is as follows:

[0011] ,

[0012] Where, S com is the harmonic suppression signal, A mp is the harmonic amplitude of the difference signal after limiting, is the phase of the difference signal after limiting, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle.

[0013] Furthermore, the method for suppressing current harmonics in a flexible DC converter station further includes: performing fast Fourier transform analysis on the common connection point voltage containing voltage harmonics, and detecting the harmonic frequency of the common connection point harmonic voltage other than the power frequency.

[0014] Furthermore, the voltage at the common connection point is a superposition of the power frequency voltage and the harmonic voltage. The phase angle of the power frequency voltage output on the grid side tracked by the phase-locked loop and the phase angle of the harmonic voltage output on the grid side are superimposed to form a phase angle output by the phase-locked loop with harmonic frequencies.

[0015] Furthermore, the relationship between the harmonic frequency of the common connection point harmonic voltage and the harmonic frequency of the phase-locked loop output phase angle is as follows:

[0016] ,

[0017] Where, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle, f Har is the harmonic frequency of the common connection point harmonic voltage.

[0018] Furthermore, when filtering the difference signal, a Butterworth filter is used for low-pass filtering.

[0019] Furthermore, the maximum value includes a maximum value and a minimum value, the maximum value is set as the upper limit of the clipping, and the minimum value is set as the lower limit of the clipping.

[0020] In a second aspect, the present invention provides a current harmonic suppression system for a flexible DC converter station, comprising:

[0021] The difference signal limiting unit is configured to obtain a difference signal by subtracting the phase angle output by the phase-locked loop and the phase angle output by the discrete time integrator, pre-limiting and filtering the difference signal, and obtaining the maximum value of the filtered difference signal through the maximum value algorithm, and limiting the difference signal by the maximum value;

[0022] Harmonic suppression unit: Performs fast Fourier transform analysis on the difference signal after limiting to obtain the amplitude and phase of the harmonics; performs fast Fourier transform analysis on the phase-locked loop output phase angle to obtain the frequency of the harmonics; generates a corresponding harmonic suppression signal based on the obtained frequency, amplitude and phase of the harmonics, and injects the harmonic suppression signal into the phase-locked loop output phase angle to suppress the phase-locked loop harmonics.

[0023] In a third aspect, the present invention provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method for suppressing current harmonics in a flexible DC converter station when executing the computer program.

[0024] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the method for suppressing current harmonics in a flexible DC converter station.

[0025] The beneficial effects of the present invention are as follows: the present invention proposes a method for extracting the frequency, amplitude and phase of harmonic signals of a flexible DC converter station by flexibly setting the maximum value algorithm and fast Fourier transform analysis, and generates corresponding harmonic suppression signals based on the extracted harmonics to suppress the current harmonics of the flexible DC converter station. The present invention achieves flexible suppression of harmonics of different frequencies through algorithm programs and low-cost computer equipment, overcoming the problems of high cost and poor adaptability of traditional methods to suppress harmonics of different frequencies, significantly improving the economy and adaptability of harmonic management, enabling the transmission system to quickly adapt to changes in harmonic characteristics under different operating conditions, ensuring the effectiveness of harmonic suppression, without adding large-volume external equipment, and reducing costs. At the same time, the present invention can effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, and reduce the interference of harmonics on the flexible DC transmission system; due to the coupling relationship between the electrical quantities inside the flexible DC converter station, the harmonic suppression of the present invention reduces the impact of harmonics on the voltage fluctuation of the capacitor of the converter submodule, effectively prolongs the life of the capacitor of the submodule, improves the operating reliability of the converter station, and improves the stability and reliability of the transmission system. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 Schematic diagram of a method for suppressing current harmonics in a flexible DC converter station according to the present invention;

[0027] Figure 2 This is a flow chart of the maximum value algorithm unit of the present invention;

[0028] Figure 3 This is a waveform diagram of the phase angle output of the phase-locked loop before and after harmonic suppression of the present invention;

[0029] Figure 4 This is a fast Fourier transform analysis diagram of the phase current before harmonic suppression in the present invention;

[0030] Figure 5 This is a fast Fourier transform analysis diagram of the phase current after harmonic suppression of the present invention;

[0031] Figure 6 This is a waveform diagram of the difference signal of the present invention;

[0032] Figure 7 This is a waveform diagram of the harmonic suppression signal of the present invention;

[0033] Figure 8 This is a waveform diagram of the submodule capacitor voltage before and after harmonic suppression of the present invention;

[0034] Figure 9 A schematic diagram of the logical structure of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to make the technical solution of the present invention clearer, the present invention is described in detail below with reference to the accompanying drawings and specific implementation methods.

[0036] Example 1

[0037] The present embodiment provides a method for suppressing current harmonics in a flexible DC converter station, which performs a difference between the phase angle output by a phase-locked loop and the phase angle output by a discrete-time integrator to obtain a difference signal, performs pre-limiting and filtering on the difference signal, and then obtains the maximum value of the filtered difference signal through an extreme value algorithm, and uses the extreme value to limit the difference signal; performs a fast Fourier transform analysis on the difference signal after limiting to obtain the amplitude and phase of the harmonics; performs a fast Fourier transform analysis on the phase angle output by the phase-locked loop to obtain the frequency of the harmonics; generates a corresponding harmonic suppression signal based on the frequency, amplitude and phase of the obtained harmonics, and injects the harmonic suppression signal into the phase angle output by the phase-locked loop to suppress the harmonics of the phase-locked loop, thereby achieving the suppression of current harmonics in the flexible DC converter station, as shown in the schematic diagram. Figure 1 shown.

[0038] The specific steps of the above-mentioned method for suppressing current harmonics in the flexible DC converter station are as follows:

[0039] Step 1: Perform Fast Fourier Transform (FFT) analysis on the PCC voltage containing voltage harmonics to detect the harmonic frequencies of the PCC voltage in addition to the power frequency. f Har In the phase-locked loop, since the Park transformation transforms the stationary coordinate system into a rotating coordinate system with an angular velocity of 100π (rad / s), the PCC point frequency is f Har The harmonic voltage will generate a frequency of f Har_PLL Harmonics. Harmonic frequencies of the common connection point harmonic voltage f Har Harmonic frequency with phase angle of PLL output f Har_PLL The relationship is shown in the following formula:

[0040] .

[0041] Step 2: The voltage at the PCC point is the superposition of the power frequency voltage and the harmonic voltage. The phase angle of the power frequency voltage output on the grid side tracked by the phase-locked loop and the phase angle of the harmonic voltage output on the grid side are superimposed to form the phase angle of the phase-locked loop output. The phase-locked loop tracks the voltage at the PCC point and obtains the phase angle with harmonic frequency. f Har_PLL The phase-locked loop output phase angle θ ; Set the phase-locked loop output phase angle θ The phase angle of the discrete time integrator output θ i Difference signal is formed by difference S sub .

[0042] Step 3: Difference signal S sub Perform pre-limiting to obtain the difference limiting signal S sub-lim , set the upper limit of pre-limit Up lim1 and lower limit Low lim1 ; Considering that the amplitude of the sinusoidal part of the phase-locked loop output harmonic is small, the difference signal in step 2 S sub With 2π steps, the upper limit can be set Up lim1 = 0.5, lower limit Low lim1 = - 0.1, to initially filter out the difference signal S sub The step value in .

[0043] Step 4: Limit the difference signal in step 3 S sub-lim The Butterworth filter is used to perform low-pass filtering to obtain the filtered signal S fil .

[0044] Step 5: Filter the signal S fil Input the maximum value algorithm unit, which is encapsulated by code writing. The flowchart of the maximum value algorithm unit is as follows Figure 2 shown; signal S fil After input, record and output the signal S fil The historical maximum N max and historical minimum N min .

[0045] Step 6: The maximum value obtained in step 5 N max & N min Set as the upper limit of the limit Up lim2 and lower limit Low lim2 , and use this to limit the difference signal in step 2 to obtain the final limited signal S lim .

[0046] Step 7: For the signal in step 6 S lim Perform FFT analysis to obtain the signal S lim Harmonic amplitude A mp and phase .

[0047] Step 8: The harmonic frequency of the phase-locked loop output phase angle obtained in step 1 f Har_PLL and the harmonic amplitude obtained in step 7 A mp and phase , generating harmonic suppression signals S com , its expression is shown as follows:

[0048]

[0049] Step 9: Convert the harmonic suppression signal generated in step 8 to S com Injection phase-locked loop output phase angle θ , suppressing the phase-locked loop harmonics, thereby achieving current harmonic suppression at the output of the flexible DC converter station.

[0050] In order to verify the method for suppressing current harmonics in a flexible DC converter station described in this embodiment, the following data is used for verification. The main circuit parameters of the flexible DC converter station MMC are shown in Table 1.

[0051] Table 1MMC main circuit parameters

[0052]

[0053] When there are harmonics on the grid side, the phase-locked loop tracks the voltage at the PCC point, and the phase angle of the output is affected by the grid side harmonics. θ Carrying harmonics of a certain frequency. Perform FFT analysis on the PCC point voltage containing voltage harmonics to detect harmonic frequencies other than the power frequency. f Har In the phase-locked loop, since the Park transformation transforms the stationary coordinate system into a rotating coordinate system with an angular velocity of 100π (rad / s), the PCC point frequency is f Har The harmonic voltage will generate a frequency of f Har_PLL Harmonics. To detect the grid-side harmonic frequency f Har =170Hz, harmonic amplitude U Har =53.125kV as an example, the phase angle of the phase-locked loop output θ Will have a frequency of f Har_PLL =120Hz harmonics. When the grid side is not suppressed under the above harmonic pollution, the phase angle of the phase-locked loop output is θ like Figure 3 As shown in (a) of the figure. Affected by the phase angle harmonics of the phase-locked loop output, the FFT analysis of the phase current before harmonic control is as follows: Figure 4 As shown in the figure, the total harmonic distortion (THD) of the phase current is 9.36%. Obviously, the phase current output by the flexible DC converter station at this time contains a large amount of harmonics, which is not conducive to the stability of the system.

[0054] To extract the phase angle of the PLL output θ The frequency of f Har_PLL =120Hz harmonic, use the phase-locked loop to output the phase angle θ The phase angle of the discrete-time integrator output θ i Difference signal S subSince the phase-locked loop tracks the voltage output phase angle of the PCC point θ It is not real-time tracking, there is a certain delay. Therefore, the phase-locked loop output phase angle θ The phase angle with the discrete-time integrator output θ i The difference signal obtained by subtraction S sub There are partial steps. Difference signal S sub Waveform diagram Figure 6 shown.

[0055] For the difference signal S sub Perform pre-limiting, the upper limit of pre-limiting Up lim1 =0.5, lower limit Low lim1 =-0.1, the difference after pre-limiting is limited to the signal S sub-lim The Butterworth filter is used to perform low-pass filtering to obtain the filtered signal S fil The filtered signal S fil Input the maximum value algorithm unit and output the historical maximum value N max =0.2716 and historical minimum N min =-0.03299.

[0056] The maximum value of the filtered signal output by the maximum value algorithm unit N max =0.2716 and minimum N min =- 0.03299 are set as the upper limit of the limit Up lim2 and lower limit Low lim2 . This is used to compare the difference signal S sub Perform limiting to obtain the final limited signal S lim .

[0057] At 0-1s, no harmonic suppression is performed on the output phase current of the flexible DC converter station; at 1s, the harmonic suppression switch is turned on and the signal S lim Perform FFT analysis to obtain the harmonic frequency in the phase angle of the phase-locked loop output f Har_PLL =120Hz and harmonic amplitude A mp =0.1439 and phase =-1.2566, generating harmonic suppression signal; the waveform of the suppression signal is as follows Figure 7 The suppression signal is injected into the phase-locked loop output phase angle θ , suppress the phase-locked loop harmonics, and the phase-locked loop output phase angle after the harmonic suppression is started θ like Figure 3 As shown in (b), based on Figure 3 (a) and Figure 3 Comparison of the two figures in (b) shows that the phase-locked loop output phase angle θ The harmonics are suppressed.

[0058] The FFT analysis of the phase current output by the flexible DC converter station after harmonic suppression is performed, and the results are as follows: Figure 5 As shown. Figure 5 It can be seen that the THD of the phase current after harmonic suppression is 1.70%. Figure 4 and Figure 5 As a result, it can be seen that after adopting the method of the present invention, the output current harmonics of the flexible DC converter station are significantly suppressed and the power quality is significantly improved.

[0059] The capacitor voltage fluctuations of the modular multilevel converter submodule before and after harmonic suppression are as follows: Figure 8 As shown in the figure, after harmonic suppression is started at 1s, the submodule capacitor voltage fluctuation becomes smoother, reducing the impact of harmonics on the converter submodule capacitor voltage fluctuation, effectively extending the submodule capacitor life, improving the operational reliability of the converter station, and enhancing the stability and reliability of the system.

[0060] In summary, the above-mentioned method for suppressing current harmonics in the flexible DC converter station is based on phase-locked loop harmonic suppression, which can effectively reduce the harmonic content in the output current of the converter station, improve the quality of the current waveform, and reduce the interference of harmonics on the flexible DC transmission system. The method described in the present invention overcomes the problems of high cost and poor adaptability of traditional methods to harmonic suppression of different frequencies, significantly improves the economy and adaptability of harmonic management, and enables the transmission system to quickly adapt to changes in harmonic characteristics under different operating conditions, ensuring the effectiveness of harmonic suppression without adding large-volume external equipment, thereby reducing costs. At the same time, the method proposed in the present invention reduces the impact of harmonics on the voltage fluctuations of the capacitors of the converter submodules, effectively extends the life of the submodule capacitors, improves the operating reliability of the converter station, and improves the stability and reliability of the transmission system. The method described in the present invention can significantly improve the power quality of the flexible DC transmission system, reduce the harmonic content of the output current, and is of great significance for improving the stability of the transmission system.

[0061] Example 2

[0062] This embodiment provides a current harmonic suppression system for a flexible DC converter station, which is composed of a difference signal limiting unit and a harmonic suppression unit.

[0063] The difference signal limiting unit: obtains a difference signal by subtracting the phase angle output by the phase-locked loop and the phase angle output by the discrete time integrator, pre-limits and filters the difference signal, and then obtains the maximum value of the filtered difference signal through the maximum value algorithm, and limits the difference signal by the maximum value.

[0064] The harmonic suppression unit performs a fast Fourier transform analysis on the difference signal after limiting to obtain the amplitude and phase of the harmonics; performs a fast Fourier transform analysis on the phase-locked loop output phase angle to obtain the frequency of the harmonics; generates a corresponding harmonic suppression signal based on the obtained frequency, amplitude and phase of the harmonics, and injects the harmonic suppression signal into the phase-locked loop output phase angle to suppress the phase-locked loop harmonics.

[0065] It should be noted that each unit in the above-mentioned flexible DC converter station current harmonic suppression system can be implemented in whole or in part through software, hardware, and a combination thereof. The above-mentioned units can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above-mentioned units. For the specific definition of a flexible DC converter station current harmonic suppression system, please refer to the definition of a flexible DC converter station current harmonic suppression method (i.e., Example 1) above. The two have the same functions and effects and will not be repeated here.

[0066] Example 3

[0067] This embodiment provides a computer device, comprising: at least one processor; and a memory communicatively connected to the at least one processor. The memory stores a computer program executable by the at least one processor, wherein the computer program, when executed by the at least one processor, causes the electronic device to perform the method according to Embodiment 1 of the present invention.

[0068] Example 4

[0069] This embodiment provides a non-transitory computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor of a computer, is used to cause the computer to perform the method according to embodiment 1 of the present invention.

[0070] refer to Figure 9, a block diagram of an electronic device 400 that can serve as a server or client of the present invention will now be described, which is an example of a hardware device that can be applied to various aspects of the present invention. The electronic device is intended to represent various forms of digital electronic computer devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0071] like Figure 9 As shown, electronic device 400 includes a computing unit 401, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 402 or a computer program loaded from a storage unit 408 into a random access memory (RAM) 403. Various programs and data required for the operation of electronic device 400 may also be stored in RAM 403. Computing unit 401, ROM 402, and RAM 403 are connected to each other via a bus 404. An input / output (I / O) interface 405 is also connected to bus 404.

[0072] Multiple components within electronic device 400 are connected to I / O interface 405, including an input unit 406, an output unit 407, a storage unit 408, and a communication unit 409. Input unit 406 can be any type of device capable of inputting information into electronic device 400. Input unit 406 can receive input numeric or character information and generate key input signals related to user settings and / or function control of the electronic device. Output unit 407 can be any type of device capable of presenting information and may include, but is not limited to, a display, a speaker, a video / audio output terminal, a vibrator, and / or a printer. Storage unit 408 may include, but is not limited to, a magnetic disk or an optical disk. Communication unit 409 allows electronic device 400 to exchange information / data with other devices via computer networks such as the Internet and / or various telecommunication networks and may include, but is not limited to, a modem, a network card, an infrared communication device, a wireless communication transceiver and / or a chipset, such as a Bluetooth™ device, a WiFi device, a WiMax device, a cellular communication device, and / or the like.

[0073] The computing unit 401 can be any general-purpose and / or specialized processing component with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 401 performs the various methods and processes described above. For example, in some embodiments, the aforementioned method for suppressing current harmonics in a flexible DC converter station can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 400 via the ROM 402 and / or the communication unit 409. In some embodiments, the computing unit 401 can be configured to execute the aforementioned method for suppressing current harmonics in a flexible DC converter station via any other suitable means (e.g., via firmware).

[0074] The program code for implementing the method of the present invention can be written in any combination of one or more programming languages. Such program code can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the processor or controller, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0075] In the context of the present invention, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or apparatus. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fibers, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0076] As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and / or device (e.g., a magnetic disk, an optical disk, a memory, a programmable logic device (PLD)) for providing machine instructions and / or data to a programmable processor, including machine-readable media that receive machine instructions as machine-readable signals. The term "machine-readable signal" refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0077] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0078] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0079] Computer systems may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The client and server relationship arises through computer programs running on the respective computers and having a client-server relationship to each other.

[0080] It is obvious that those skilled in the art can easily make various modifications to the above-described embodiments and apply the general principles described herein to other embodiments without requiring creative effort. Therefore, the present invention is not limited to the above-described embodiments, and improvements and modifications made by those skilled in the art based on the disclosure of the present invention should fall within the scope of protection of the present invention.

Claims

1. A method for suppressing current harmonics in a flexible DC converter station, characterized in that: include: Subtracting the phase angle output by the phase-locked loop from the phase angle output by the discrete-time integrator to obtain a difference signal, pre-limiting and filtering the difference signal, obtaining the maximum value of the filtered difference signal through an extreme value algorithm, and limiting the difference signal using the extreme value; The difference signal after limiting is subjected to fast Fourier transform analysis to obtain the amplitude and phase of the harmonics; the phase angle of the phase-locked loop is subjected to fast Fourier transform analysis to obtain the frequency of the harmonics; based on the obtained frequency, amplitude and phase of the harmonics, a corresponding harmonic suppression signal is generated using a sine function, and the harmonic suppression signal is injected into the phase angle of the phase-locked loop to suppress the phase-locked loop harmonics.

2. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The expression of the harmonic suppression signal is as follows: ， Where, S com is the harmonic suppression signal, A mp is the harmonic amplitude of the difference signal after limiting, is the phase of the difference signal after limiting, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle.

3. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The method further includes: performing fast Fourier transform analysis on the common connection point voltage containing voltage harmonics, and detecting the harmonic frequency of the common connection point harmonic voltage except the power frequency.

4. The method for suppressing current harmonics in a flexible DC converter station according to claim 3, characterized in that: The voltage at the common connection point is the superposition of the power frequency voltage and the harmonic voltage. The phase angle of the power frequency voltage output by the phase-locked loop tracking the grid side and the phase angle of the harmonic voltage output by the phase-locked loop tracking the grid side are superimposed to form the phase angle of the phase-locked loop output with harmonic frequency.

5. The method for suppressing current harmonics in a flexible DC converter station according to claim 4, characterized in that: The relationship between the harmonic frequency of the common connection point harmonic voltage and the harmonic frequency of the phase-locked loop output phase angle is as follows: ， Where, f Har_PLL is the harmonic frequency of the phase-locked loop output phase angle, f Har is the harmonic frequency of the common connection point harmonic voltage.

6. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: When filtering the difference signal, a Butterworth filter is used for low-pass filtering.

7. The method for suppressing current harmonics in a flexible DC converter station according to claim 1, characterized in that: The maximum value includes a maximum value and a minimum value, the maximum value is set as the upper limit of the limit, and the minimum value is set as the lower limit of the limit.

8. A current harmonic suppression system for a flexible DC converter station, characterized in that: include: The difference signal limiting unit is configured to obtain a difference signal by subtracting the phase angle output by the phase-locked loop and the phase angle output by the discrete time integrator, pre-limiting and filtering the difference signal, and obtaining the maximum value of the filtered difference signal through the maximum value algorithm, and limiting the difference signal by the maximum value; Harmonic suppression unit: Performs fast Fourier transform analysis on the difference signal after limiting to obtain the amplitude and phase of the harmonics; performs fast Fourier transform analysis on the phase-locked loop output phase angle to obtain the frequency of the harmonics; based on the obtained frequency, amplitude and phase of the harmonics, a sine function is used to generate a corresponding harmonic suppression signal, which is injected into the phase-locked loop output phase angle to suppress the phase-locked loop harmonics.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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