Preparation method of blind hole drawing detection module of HDI circuit board

Abstract

The invention belongs to the field of PCBs (printed circuit boards), and discloses a preparation method of a blind hole drawing detection module of an HDI (high density interconnect) circuit board, which comprises the following steps: firstly, when a blind hole needs to be formed in the process of manufacturing the circuit board, forming a detection blind hole while manufacturing a conventional blind hole, then electroplating to fill copper in the detection blind hole, conducting an inner circuit layer and an outer circuit layer to form a detection unit, and then repeatedly constructing the detection unit when the blind hole needs to be formed every time; and the subsequent circuit layer is subjected to position avoiding on the outer side of the detection unit, after four or more circuit layers are prepared, a window is formed in the outer side of the detection unit, and shielding is removed to enable the detection unit to be exposed. According to the invention, the drawing test can be carried out on the detection blind holes of any layer of the finished circuit board, so that the binding force of the blind holes of each layer can be tested and verified, the tested detection blind holes are only subjected to the drawing force in the vertical direction, the interference of the transverse force does not exist, and the test result is more accurate.

Description

Technical Field

[0001] The present invention relates to the technical field of PCBs, and particularly to a preparation method for an inner-layer blind via pull-out detection module of an HDI circuit board. Background Art

[0002] The manufacture of HDI circuit boards involves a series of complex methods, such as laser drilling to form blind vias and precise electroplating to build conductive layers inside the vias. Slight deviation in the control of method parameters for each step may affect the quality of blind vias. For example, during drilling, the hole wall may be rough, and during electroplating, the coating thickness may be uneven or the bonding may be loose. Detecting the bonding force between the copper filling inside the blind via and the inner-layer circuit can effectively evaluate the quality of the blind vias formed by these methods, thereby feedback the problems existing in the methods and facilitating the improvement and optimization of production.

[0003] Chinese Utility Model Patent ZL201721339805.4 discloses a reliability test module for blind via copper filling of an HDI circuit board. The HDI circuit board of this module includes a substrate with an inner copper layer, a dielectric layer covering the inner copper layer is provided on the substrate, several blind via units are provided in the dielectric layer of the test area, each blind via unit contains a plurality of test blind vias arranged in a matrix, a copper filling layer is electroplated in the test blind vias, and the bottom of the copper filling layer is connected to the inner copper layer; a surface copper layer covering the blind via units is also provided in the test area. During the test, by using the solderability of the surface copper and the via copper, and pulling the surface copper layer with an external force, the copper inside the via and the surface copper are pulled out together, which can quickly verify the reliability of blind via electroplating and detect the copper filling effect inside the via.

[0004] However, the design scheme of the above patent can only detect the surface blind vias of multi-layer HDI circuit boards, but cannot detect the inner-layer blind vias of multi-layer HDI circuit boards. In addition, its inspection method is to tear by hand. When tearing horizontally, the horizontal force will affect the detection of the blind via bonding force. That is to say, the unqualified blind vias detected by this module may not be truly unqualified. It is possible that due to excessive horizontal force, the blind vias are not pulled up, and the most accurate blind via inspection method should make the blind vias only receive vertical force. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to propose a preparation method for a blind via pull-out detection module of an HDI circuit board that can perform pull-out detection on both inner and outer layer blind vias in view of the above technical status.

[0006] The technical solution adopted by the present invention to solve the above technical problems is as follows: A preparation method for a blind via pull-out detection module of an HDI circuit board, characterized by comprising the following steps: S1, fabricate the circuit board layer by layer until it is necessary to fabricate blind vias; S2. While fabricating the regular blind vias, fabricate a detection blind via dedicated to inspecting the bonding strength of the blind vias. Then, electroplate the entire circuit board to fill the vias with copper while fabricating the next circuit layer, and the detection blind via conducts the inner circuit layer to the outer circuit layer. A detection blind via, the copper in its via, the inner copper on the bottom surface, and the surface copper formed outside the via mouth jointly construct a detection unit. S3. Continue to fabricate the circuit board layer by layer. Whenever blind vias need to be fabricated, repeat step S2, and the subsequent fabricated circuit layers are always placed outside the previously constructed detection units. S4. After completing the fabrication of four or more circuit layers, open windows outside the detection units to expose the detection units by removing the obstruction.

[0007] Specifically, when performing step S4, the windows are opened by laser lid removal to expose the surface copper of each detection unit. Other parts of the detection unit except the surface copper may not be exposed.

[0008] To avoid interference between detection units, preferably, when repeatedly performing step S2, the detection units are arranged alternately on the circuit board.

[0009] To make the detection more comprehensive, the present invention improves the position layout of the detection units. Specifically, the fabricated circuit board has n layers of circuit layers. When n is odd, n the layers of circuit layers are sequentially denoted as the 1st - level circuit layer, the 2nd - level circuit layer to the (( n +1) / 2) - th level circuit layer from the inside to the outside; when n is even, n the layers of circuit layers are sequentially denoted as the 1st - level circuit layer to the n / 2 - th level circuit layer from the inside to the outside; when performing step S2, at least one of the detection units is provided on each different - level circuit layer.

[0010] Specifically, step S2 includes the following sub - steps: S2.1. Drilling: Drill the ordinary blind vias and detection blind vias (20) for conducting the x 1 - th level circuit layer and the y 1 - th level circuit layer, where 1 ≤ x 1 ≤ y 1 ≤ n and x 1 , y 1 are both integers, and this detection blind via is denoted as x 1 - y1 Level 1 detection blind hole, x 1 - y 1 The level 1 detection blind hole is drilled in the non-product area of the circuit board and is located x 1 outside the level 1 circuit layer; x 1 - y 1 The bottom surface of the level 1 detection blind hole is inner copper (33), which is x 1 a part of the level 1 circuit layer; S2.2, fabricate y 1 the level 1 circuit layer: Prepare the level 1 circuit layer on the outside of the circuit board obtained after drilling, y 1 - x 1 - y 1 Hole copper (31) is formed in the level 1 detection blind hole, and the hole copper (31) combines with the inner copper (33), and the hole copper (31) extends to x 1 - y 1 On the outside of the orifice of the level 1 detection blind hole, surface copper (32) is formed, x 1 - y 1 The surface copper (32) of the level 1 detection blind hole is y 1 a part of the level 1 circuit layer, thus completing the construction of the detection unit.

[0011] Specifically, the step S3 includes the following sub-steps: S3.1, drilling: Continue to fabricate the circuit board and drill ordinary blind holes and detection blind holes (20) for connecting the level 1 circuit layer and x 2 the level 1 circuit layer, 1 ≤ y 2 ≤ x 2 ≤ y 2 ≤ n and y 1 < y 2 and x 1 、 y 1 are all integers, and this detection blind hole is denoted as x 2 - y 2Level 0 detection blind hole, x 2 - y 2 Level 0 detection blind holes are drilled in the non-product area of the circuit board and are located x 2 outside the Level 0 circuit layer 12, x 2 - y 2 The inner copper (33) of the Level 0 detection blind hole is x 2 a part of the Level 0 circuit layer 12; S3.2, fabricating y 2 Level 0 circuit layer: fabricate on the outer side of the circuit board obtained after drilling y 2 Level 0 circuit layer, x 2 - y 2 Form hole copper (31) inside the Level 0 detection blind hole, the hole copper (31) combines with the inner copper (33), and the hole copper (31) extends to x 2 - y 2 Form surface copper (32) outside the orifice of the Level 0 detection blind hole, x 2 - y 2 The surface copper (32) of the Level 0 detection blind hole is y 2 a part of the Level 0 circuit layer, x 2 - y 2 The circuit of the Level 0 circuit layer is at x 1 - y 1 avoidance position outside the Level 0 detection blind hole, so that x 1 - y 1 only the outside of the Level 0 detection blind hole is covered by the insulating layer (5) and not covered by the circuit.

[0012] The detection blind hole needs to be exposed at the finished product stage. However, since methods such as copper removal that erode the pads are required during the manufacturing process, the detection blind hole cannot be exposed during the manufacturing process. The solution disclosed in the present invention not only gives the specific preparation method of the blind hole pull-out detection module, but also can ensure that the detection blind hole can be protected during the circuit board manufacturing process.

[0013] In addition to directly using the insulating layer as protection, preferably, the step S3.1 further includes: before continuing to fabricate the circuit board, firstx 1 - y 1 Cover the outer side of the blind holes for level - 1 detection with protective tape, and tear off the protective tape after performing the step S4.

[0014] Preferably, the step S3.1 further includes: before continuing to manufacture the circuit board, first x 1 - y 1 Cover the outer side of the blind holes for level - 2 detection with hydrocolloid, and dissolve and remove the hydrocolloid after performing the step S4.

[0015] Specifically, the prepared circuit board has a total of six circuit layers, which successively include two layers of level - 1 circuit layers, two layers of level - 2 circuit layers, and two layers of level - 3 circuit layers from the inside to the outside. At least one detection unit is provided between the level - 1 circuit layer and the level - 2 circuit layer, and between the level - 2 circuit layer and the level - 3 circuit layer.

[0016] Specifically, the prepared circuit board has a total of eight circuit layers, which successively include two layers of level - 1 circuit layers, two layers of level - 2 circuit layers, two layers of level - 3 circuit layers, and two layers of level - 4 circuit layers from the inside to the outside. At least one detection unit is provided between the level - 1 circuit layer and the level - 2 circuit layer, between the level - 2 circuit layer and the level - 3 circuit layer, and between the level - 3 circuit layer and the level - 4 circuit layer.

[0017] Compared with the prior art, the advantage of the present invention is that each detection unit of the detection module prepared by the present invention is exposed. Therefore, the blind holes of any layer of the finished circuit board can be subjected to a pull - out test to ensure that the bonding strength of the blind holes of each layer can be tested and verified, and the test is comprehensive. Moreover, the present invention also has an advantage in the force direction during the test. These tested blind holes only receive the pull - out force in the vertical direction and are not interfered by the lateral force, so the test results are more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the structure and pull - out test of the blind - hole detection module of a 6 - layer HDI circuit board in the prior art; Figure 2 It is a schematic diagram of the structure and pull - out test of the blind - hole pull - out detection module of Embodiment 1 of the present invention; Figures 3 - 4 It is a schematic flowchart of the preparation method of Embodiment 1 of the present invention, where (a) is drilling, (b) is electroplating, (c) is drilling, (d) is laminating, (e) is exposure, (f) is development, (g) is electroplating, (h) is stripping, and (i) is window opening; Figure 5 It is a schematic diagram of the structure and pull - out test of the blind - hole detection module of an 8 - layer HDI circuit board in the prior art; Figure 6Schematic diagram of the blind hole pulling detection module structure and pulling test for Embodiment 2 of the present invention; Figures 7 - 9 Schematic flow diagram of the preparation method for Embodiment 2 of the present invention, where (a) is for laminating the insulating layer, (b) is for drilling holes, (c) is for laminating the film, (d) is for exposure, (e) is for development, (f) is for electroplating, (g) is for film removal, and (h) is for window opening; Figure 10 Schematic diagram of the structure and pulling test of the blind hole detection module for a 4-layer HDI circuit board in the prior art; Figure 11 Schematic diagram of the blind hole pulling detection module structure and pulling test for Embodiment 3 of the present invention. Detailed implementation manners

[0019] The present invention will be further described in detail below in conjunction with the embodiments with reference to the drawings. Embodiment 1

[0020] As Figures 2 - 4 shown, it is the preferred Embodiment 1 of the preparation method of a blind hole pulling detection module for an HDI circuit board of the present invention. The blind hole pulling detection module is arranged in the non-product area of the HDI circuit board with four or more circuit layers. For the convenience of description, the number of circuit layers of the HDI circuit board in this embodiment is denoted as n When n is odd, n the circuit layers are sequentially denoted as the 1st-level circuit layer 11, the 2nd-level circuit layer 12 to n the +1 / 2-level circuit layer from the inside to the outside; when n is even, n the circuit layers are sequentially denoted as the 1st-level circuit layer 11 to n the / 2-level circuit layer from the inside to the outside.

[0021] In this embodiment, an HDI circuit board with six circuit layers is used to illustrate the blind hole pulling detection module in detail. The HDI circuit board sequentially has the 1st-level circuit layer 11, the 2nd-level circuit layer 12, and the 3rd-level circuit layer 13 from the inside to the outside. The blind hole pulling detection module includes a detection unit 2 for detecting the blind hole bonding force. In this embodiment, there are 6 such detection units 2, and the number of detection units 2 can be appropriately increased according to the actual application situation.

[0022] Each detection unit 2 includes a detection blind hole 20 that conducts different circuit layers. The detection blind hole 20 that conducts the 1st-level circuit layer 11 and the 2nd-level circuit layer 12 is denoted as the 1-2-level detection blind hole 22, and the detection blind hole 20 that conducts the 2nd-level circuit layer 12 and the 3rd-level circuit layer 13 is denoted as the 2-3-level detection blind hole 23. The 1st-level circuit layer 11 is the innermost circuit layer, and two 1st-level circuit layers 11 are adjacent. In this embodiment, the two 1st-level circuit layers 11 are conducted through vias, so the 1-1-level detection blind hole is not provided.

[0023] In the existing conventional detection module, such as Figure 1 As shown, the operator can only directly perform a pulling test on the 2-3 level detection blind holes 23, that is, the outermost detection blind holes 20, through the copper wire 7 and the solder balls 8, and cannot directly detect the 1-2 level detection blind holes 22 located inside. This embodiment proposes an improved solution, in which the above six detection units 2 are arranged between different levels of circuit layers, and at least one detection unit 2 is arranged between each different level of circuit layers. Specifically, the HDI circuit board can be divided into an upper half and a lower half, and each part has a 1st level circuit layer 11, a 2nd level circuit layer 12, and a 3rd level circuit layer 13. Between the 1st level circuit layer 11 and the 2nd level circuit layer 12, and between the 2nd level circuit layer 12 and the 3rd level circuit layer 13 in the upper half, at least one detection unit 2 is arranged respectively, and the lower half is the same as the upper half.

[0024] As Figure 2 Shown, the detection blind hole 20 is filled with via copper 31, and the via copper 31 extends outside the orifice of the detection blind hole 20 to form surface copper 32. The bottom surface of the detection blind hole 20 is inner copper 33. The via copper 31 is combined with the inner copper 33. The surface copper 32 is a part of the relatively outer circuit layer among the different circuit layers conducted by the detection blind hole 20, and the inner copper 33 is a part of the relatively inner circuit layer among the circuit layers conducted by the detection blind hole 20. The surface copper 32 of each detection unit 2 is exposed. Taking the 1-2 level detection blind hole 22 as an example, its surface copper 32 is a part of the 2nd level circuit layer 12, and its inner copper 33 is a part of the 1st level circuit layer 11.

[0025] A window 4 is opened on the outside of the detection unit 2, so that the surface copper 32 of the detection unit 2 is exposed. Therefore, the operator can directly perform a pulling test on these detection units 2. At the same time, in order to avoid interference between the detection units 2, preferably, the detection units 2 are arranged staggeredly on the HDI circuit board.

[0026] Compared with the prior art, the surface copper 32 of each detection unit 2 of the detection module in this embodiment is exposed. Therefore, a pulling test can be performed on the detection blind holes 20 of any layer of the circuit board finished product to ensure that the blind hole bonding force of each layer can be tested and verified, and the test is comprehensive. Moreover, the detection module in this embodiment also has an advantage in the force direction during the test. These detected detection blind holes 20 only receive a pulling force in the vertical direction and there is no interference from lateral forces, and the test results are more accurate.

[0027] The preparation method of the blind hole pulling detection module in this embodiment includes the following steps: S1, fabricate the circuit board layer by layer according to the conventional process of the prior art, which will not be elaborated here, until the blind holes need to be fabricated.

[0028] S2. While fabricating a conventional blind via, fabricate a detection blind via 20 dedicated to inspecting the bonding strength of the blind via. Then, electroplate the entire circuit board to fill the detection blind via 20 with copper while fabricating the next circuit layer. The detection blind via 20 conducts the inner circuit layer and the outer circuit layer. A detection unit 2 is jointly constructed by a detection blind via 20, the via copper 31 inside the via, the inner copper 33 on the bottom surface, and the surface copper 32 formed outside the via opening. Specifically, it includes the following sub-steps: S2.1, Drilling: As shown in Figure 3 (a), drill a common blind via and a detection blind via 20 for conducting the 1st - level circuit layer 11 and the 2nd - level circuit layer 12. This detection blind via is denoted as the 1 - 2 - level detection blind via 22. The 1 - 2 - level detection blind via is drilled in the non - product area of the HDI circuit board and is located outside the 1st - level circuit layer 11. The bottom surface of the 1 - 2 - level detection blind via 22 is the inner copper 33, which is a part of the 1st - level circuit layer 11; S2.2, Fabricating the 2nd - level circuit layer: As shown in Figure 3 (b), fabricate the 2nd - level circuit layer 12 on the outer side of the circuit board obtained after drilling. The via copper 31 is formed inside the 1 - 2 - level detection blind via 22. The via copper 31 combines with the inner copper 33, and the via copper 31 extends outside the via opening of the 1 - 2 - level detection blind via 22 to form the surface copper 32. The surface copper 32 of the 1 - 2 - level detection blind via 22 is a part of the 2nd - level circuit layer.

[0029] S3. Continue to fabricate the circuit board layer by layer in a conventional process. Whenever a blind via needs to be fabricated, repeat step S2. The subsequent fabricated circuit layers are always located outside the previously constructed detection unit and avoid it. Specifically, it includes the following sub - steps: S3.1, Drilling: As shown in Figure 3 (c), continue to fabricate the circuit board and drill a common blind via and a detection blind via 20 for conducting the 2nd - level circuit layer 12 and the 3rd - level circuit layer 13. This detection blind via is denoted as the 2 - 3 - level detection blind via 23. The 2 - 3 - level detection blind via 23 is drilled in the non - product area of the HDI circuit board and is located outside the 2nd - level circuit layer 12. The inner copper 33 of the 2 - 3 - level detection blind via 23 is a part of the 2nd - level circuit layer 12; S3.2, Fabricating the 3rd - level circuit layer: Fabricate the 3rd - level circuit layer 13 on the outer side of the circuit board obtained after drilling. Specifically, it is necessary to deposit copper, apply a dry film 6 ( Figure 3 (d)), expose the non - circuit area ( Figure 3 (e)), remove the unexposed dry film 61 ( Figure 4 (f)), electroplate ( Figure 4 (g)), and remove the film ( Figure 4(h), copper removal; during electroplating, hole copper 31 is formed in the 2-3 level detection blind hole 23. The hole copper 31 combines with the inner copper 33, and the hole copper 31 extends outside the orifice of the 2-3 level detection blind hole 23 to form surface copper 32. The surface copper 32 of the 2-3 level detection blind hole 23 is part of the 3rd level circuit layer 13. The circuit of the 2-3 level circuit layer 13 is displaced outside the 1-2 level detection blind hole 22, so that only the insulation layer 5 covers the outside of the 1-2 level detection blind hole 22 without being covered by the circuit.

[0030] S4. After completing the preparation of the circuit layers with four or more layers, as Figure 4 shown in (i), a window is opened outside the detection unit 2 by laser lid removal to remove the obstruction and expose the detection unit 2.

[0031] The detection blind hole 20 needs to be exposed at the finished product stage. However, since methods such as copper removal that erode the pads are required during the manufacturing process, the detection blind hole 20 cannot be exposed during the manufacturing process. The solution disclosed in the present invention not only provides a specific preparation method for the blind hole drawing detection module, but also can ensure that the detection blind hole 20 is protected during the manufacturing process of the circuit board.

[0032] In addition to directly using the insulation layer 5 as protection, preferably, step S3.1 further includes: before continuing to manufacture the circuit board, first sticking a protective tape outside the 1-2 level detection blind hole 22, and tearing off the protective tape after performing step S4.

[0033] Alternatively, before continuing to manufacture the circuit board, first cover the outside of the 1-2 level detection blind hole 22 with a water-soluble gel, and dissolve and remove the water-soluble gel after performing step S4. Embodiment 2

[0034] The difference between this embodiment and Embodiment 1 is that the HDI circuit board in this embodiment has eight circuit layers. As Figures 6 - 9 shown, it sequentially includes 1 layer of 1st level circuit layer 11, 2nd level circuit layer 12 and 3rd level circuit layer 13, 2 layers each of 3rd level circuit layer 13 and 4th level circuit layer 14 from the inside to the outside, and a total of 8 detection units 2.

[0035] In this embodiment, these 8 detection units 2 are arranged between different levels of circuit layers, and at least one detection unit 2 is arranged in each different level of circuit layer. Specifically, the HDI circuit board can be divided into an upper half and a lower half, and each part has 1 layer of 1st level circuit layer 11, 2nd level circuit layer 12, 3rd level circuit layer 13 and 4th level circuit layer 14 respectively. At least one detection unit 2 is arranged between the 1st level circuit layer 11 and the 2nd level circuit layer 12, between the 2nd level circuit layer 12 and the 3rd level circuit layer 13, and between the 3rd level circuit layer 13 and the 4th level circuit layer 14 in the upper half, and the lower half is the same as the upper half.

[0036] The detection blind holes 20 that conduct the first-level circuit layer 11 and the second-level circuit layer 12 are denoted as 1-2 level detection blind holes 22. The detection blind holes 20 that conduct the second-level circuit layer 12 and the third-level circuit layer 13 are denoted as 2-3 level detection blind holes 23. The detection blind holes 20 that conduct the third-level circuit layer 13 and the fourth-level circuit layer 14 are denoted as 3-4 level detection blind holes 24. In the existing conventional detection module, as Figure 5 shown, the operator can only directly perform a pulling test on the 3-4 level detection blind holes 24, that is, the outermost detection blind holes 20, and cannot directly detect the 1-2 level detection blind holes 22 and 2-3 level detection blind holes 23 located inside.

[0037] The preparation method of the blind hole pulling detection module in this embodiment includes the following steps: S1 to S3.2 are the same as those in Embodiment 1; S3.3, drilling: Continue to layer by layer fabricate the circuit layer of the circuit board until the blind holes need to be fabricated. As Figure 7 (a) shown, press the insulating layer 5 on the outside of the third-level circuit layer 13, and then refer to Figure 7 (b), drill ordinary blind holes and 3-4 level detection blind holes 24 for detecting the blind hole bonding force through drilling in the insulating layer 5. The 3-4 level detection blind holes are drilled in the non-product area of the HDI circuit board and are arranged outside the third-level circuit layer 13. The inner copper 33 of the 3-4 level detection blind holes 24 is a part of the third-level circuit layer 13; S3.4, fabricate the fourth-level circuit layer 14: Fabricate the fourth-level circuit layer 14 on the outside of the circuit board obtained after drilling. Specifically, it is necessary to perform electroless copper plating, stick the dry film 6 ( Figure 7 (c)), expose the non-circuit area ( Figure 8 (d)), remove the unexposed dry film and retain the exposed dry film 61 ( Figure 8 (e)), electroplate ( Figure 8 (f)), remove the film ( Figure 9 (g)), remove the copper; during the electroplating process, hole copper 31 is formed inside the 3-4 level detection blind holes 24. The hole copper 31 is combined with the inner copper 33, and the hole copper 31 extends outside the orifice of the 3-4 level detection blind holes 24 to form surface copper 32. The surface copper 32 of the 3-4 level detection blind holes 24 is a part of the fourth-level circuit layer 14. The circuit of the fourth-level circuit layer 14 is avoided at the outside of the 1-2 level detection blind holes 22 and 2-3 level detection blind holes 23, so that only the insulating layer 5 covers the outside of these detection blind holes 20 and is not covered by the circuit; S4 is the same as that in Embodiment 1. As Figure 9 (h) shown, open a window outside the detection unit 2 through laser lid removal to remove the occlusion and expose the detection unit 2.

[0038] On this basis, an HDI circuit board with more circuit layers can also be prepared. Just keep repeating S2 (for example, S3.1 and S3.2 in Embodiment 1 are a repetition of S2, and S3.3 - S3.4 in this embodiment are another repetition of S2 on the basis of the six-layer circuit board in Embodiment 1) and avoid the detection unit 2 constructed in the previous steps until all circuit layers are processed. The detection blind holes 20 are not limited to conducting the circuit layers of adjacent levels, but can also conduct across levels. For example, a 2-4 level blind hole that conducts the 2nd level circuit layer and the 4th level circuit layer 14 is constructed, or a 1-4 level blind hole that conducts the 1st level circuit layer and the 4th level circuit layer 14 is constructed, etc. In addition, the detection blind holes 20 can also conduct the blind holes of the same level. For example, a 1-1 level blind hole that conducts two adjacent 1st level circuit layers is constructed. The last case will be introduced in detail in Embodiment 3. Embodiment 3

[0039] As shown in this embodiment Figure 11 differing from Embodiment 1, the HDI circuit board in this embodiment has four circuit layers, including two layers of 1st level circuit layers 11 and two layers of 2nd level circuit layers 12 in sequence from the inside out. A total of 4 detection units 2 are constructed through steps S1 - S4. Specifically, the two 1st level circuit layers 11 in the innermost layer of the HDI circuit board are adjacent, and 2 1-1 level detection blind holes 21 that conduct these two are arranged therebetween. The upper half and the lower half of the circuit board each have 1 1-2 level detection blind hole 22 that conducts the 1st level circuit layer 11 and the 2nd level circuit layer 12.

[0040] In the existing conventional detection module, as Figure 10 shown, the operator can only directly perform a pull-out test on the 1-2 level detection blind holes 22, that is, the outermost detection blind holes 20, and cannot directly detect the 1-1 level detection blind holes located inside. The surface copper 32 of the detection unit 2 in this embodiment is exposed, so the operator can directly perform a pull-out test on these detection units 2.

Claims

1. A method for preparing a blind hole pulling detection module for an HDI circuit board, characterized in that: The following steps are involved: S1, making circuit boards layer by layer until blind vias are needed; S2, while making a conventional blind hole, make a detection blind hole (20) dedicated to checking the bonding strength of the blind hole, then electroplate the entire circuit board so that the copper inside the detection blind hole (20) is filled while making the next circuit layer, the detection blind hole (20) connects the inner circuit layer with the outer circuit layer, and a detection blind hole (20) and its hole copper (31), the inner copper (33) on the bottom surface and the surface copper (32) formed outside the hole mouth together constitute a detection unit (2); S3, continue to make the circuit board layer by layer, and repeat step S2 whenever a blind hole needs to be made, and the circuit layer made subsequently is always avoided outside the detection unit built in the previous order; S4, after the preparation of four or more circuit layers is completed, a window is opened on the outside of the detection unit (2), and the obstruction is removed to expose the detection unit (2).

2. The preparation method according to claim 1, characterized in that: When performing step S4, the window is opened by laser uncovering, so that the surface copper (32) of each detection unit (2) is exposed.

3. The preparation method according to claim 2, characterized in that: When the step S2 is repeatedly performed, the detection units (2) are arranged alternately on the circuit board.

4. The preparation method according to claim 1, characterized in that: The prepared circuit board has n Layer line layer, when n When it is singular, n The circuit layers are sequentially recorded from the inside to the outside as the first circuit layer (11), the second circuit layer (12) to ( n +1) / 2 level circuit layer; when n When it is plural, n The circuit layers are recorded from the inside to the outside as the first circuit layer (11) to n / 2 level circuit layer; when performing step S2, at least one detection unit (2) is set for each different level circuit layer.

5. The preparation method according to claim 4, characterized in that: The step S2 comprises the following sub-steps: S2.1, drilling: drilling for conduction x Level 1 circuit layer and y Ordinary blind holes and detection blind holes in the 1st level circuit layer (20), 1≤ x 1≤ y 1≤ n and x 1. y 1 are all integers, and the detected blind hole is recorded as x 1- y Level 1 detection of blind holes, x 1- y Level 1 inspection blind holes are drilled in non-product areas of the circuit board and are located x Outside the 1st level circuit layer, x 1- y The bottom surface of the blind hole in level 1 inspection is inner copper (33). x Part of the Level 1 wiring layer; S2.2, Production y Level 1 circuit layer: the outer surface of the circuit board after drilling y Level 1 circuit layer, x 1- y Level 1 detection: a hole copper (31) is formed in the blind hole, the hole copper (31) is combined with the inner copper (33), and the hole copper (31) extends to x 1- y The first level detection blind hole has a surface copper (32) formed outside the hole opening. x 1- y Level 1 inspection of blind hole surface copper (32) is y Part of the level 1 circuit layer, thus completing the construction of the detection unit.

6. The preparation method according to claim 5, characterized in that: The step S3 comprises the following sub-steps: S3.1, Drilling: Continue making the circuit board and drilling holes for conduction x Level 2 circuit layer and y Ordinary blind holes and detection blind holes in the 2nd level circuit layer (20), 1≤ x 2≤ y 2≤ n and y 1< y 2 and x 1. y 1 are all integers, and the detected blind hole is recorded as x 2- y 2-level detection of blind holes, x 2- y Level 2 inspection blind holes are drilled in non-product areas of the circuit board and are located in x Outside the 2nd level circuit layer 12, x 2- y Level 2 inspection of the inner copper of the blind hole (33) is x A portion of the level 2 circuit layer 12; S3.2, Production y Level 2 circuit layer: preparation of the outer side of the circuit board after drilling y Level 2 circuit layer, x 2- y The second level detection forms a hole copper (31) in the blind hole, the hole copper (31) is combined with the inner copper (33), and the hole copper (31) extends to x 2- y The second level detection blind hole has a surface copper (32) formed outside the hole opening. x 2- y Level 2 inspection of blind hole surface copper (32) is y Part of the Level 2 wiring layer, x 2- y The circuits of the Level 2 circuit layer are x 1- y Level 1 detection of blind hole outside the avoidance position, so x 1- y The outer side of the blind hole in the first level detection is only covered by the insulating layer (5) but not by the circuit.

7. The preparation method according to claim 6, characterized in that: The step S3.1 also includes: before continuing to make the circuit board, first x 1- y A protective tape is attached to the outer side of the blind hole in the first level inspection, and the protective tape is torn off after performing the step S4.

8. The preparation method according to claim 6, characterized in that: The step S3.1 also includes: before continuing to make the circuit board, first x 1- y The outer side of the first-level detection blind hole is covered with hydrosol, and the hydrosol is dissolved and removed after performing the step S4.

9. The preparation method according to any one of claims 6 to 8, characterized in that The prepared circuit board has a total of six layers of circuits, including, from the inside to the outside, two layers each of a first-level circuit layer (11), a second-level circuit layer (12) and a third-level circuit layer (13), and at least one detection unit (2) is provided between the first-level circuit layer (11) and the second-level circuit layer (12), and between the second-level circuit layer (12) and the third-level circuit layer (13).

10. The preparation method according to any one of claims 6 to 8, characterized in that: The prepared circuit board has eight layers of circuits in total, including, from the inside to the outside, two layers each of a first-level circuit layer (11), a second-level circuit layer (12), a third-level circuit layer (13) and a fourth-level circuit layer, and at least one detection unit (2) is provided between the first-level circuit layer (11) and the second-level circuit layer (12), between the second-level circuit layer (12) and the third-level circuit layer (13), and between the third-level circuit layer (13) and the fourth-level circuit layer.

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