High-voltage-resistant HEMT device and driving method thereof

Abstract

The invention discloses a high-voltage-resistant HEMT device and a driving method thereof, and relates to the technical field of microelectronics. The high-voltage-resistant HEMT device comprises a plurality of main body material layers; the source electrode and the drain electrode are stacked with the multi-layer main body material layer; in the first direction, the source electrode and the drain electrode are located on the two sides of the multiple main body material layers respectively; or, the source electrode and the drain electrode are located on the same side of the multiple main body material layers, and the source electrode and the drain electrode are located on different table surfaces respectively; the first grid electrode and the source electrode are located on the same side of the multiple main body material layers; the first grid electrode and the source electrode are arranged adjacently; the second grid electrode and the first grid electrode are located on the same side of the multiple main body material layers, and the first grid electrode is located between the second grid electrode and the source electrode; the second grid electrode is embedded into the multi-layer main body material layer from the surface of the multi-layer main body material layer, and the second grid electrode is used for controlling a vertical conducting channel in the first direction; the first direction is perpendicular to the plurality of host material layers. According to the invention, the voltage withstanding performance and the current density of the HEMT device can be improved.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics technology, and particularly relates to a high-voltage-resistant HEMT device and a driving method thereof. Background Art

[0002] HEMT devices belong to planar devices, that is, the source and drain are on the same plane, so the breakdown voltage capability of the material cannot be fully utilized. When a higher device breakdown voltage is required, only the physical distance between the source and the drain can be increased, which will increase the chip area. On the one hand, it increases the cost, and on the other hand, it also reduces the yield of chip manufacturing. And limited by the substrate and buffer layer materials, it is not easy to increase the breakdown voltage of the device to a particularly high level. The advantage of vertical devices is that the source and drain can be respectively arranged on two sides of the bulk material, and the voltage between the source and drain is borne by the bulk material, so the breakdown voltage of the device can be increased. At the same time, the integration degree can also be increased to obtain a chip with a larger current density.

[0003] Existing GaN-based vertical devices are generally divided into two types, one is a planar gate and the other is a vertical gate. Among them, the planar gate controls the current through a gate parallel to the chip surface. The source and gate of the device are in the same plane, the source and drain of the device are in different planes or on both sides of the device material layer, and a current blocking layer covering a partial area is arranged between the source and drain of the device. At this time, the current flow path is generally from the drain through the bulk material vertically through the area not covered by the current blocking layer to the area covered by the gate on the chip surface where the source and gate are located, and then moves a certain distance parallel to the planar gate on the chip surface to reach the source; the advantage of the planar gate is that the gate manufacturing process is relatively mature and simple, but when manufacturing in the structure of HEMT device type, a current blocking layer needs to be formed in the material under the two-dimensional carrier gas channel in the area not covered by the gate, that is, the area not controlled by the gate, by means of implantation or the like, or a current blocking layer growth is inserted during the epitaxial growth of the device, and then part of the current blocking layer material is removed by etching, and then secondary epitaxy is carried out to continue the growth of the subsequent material layer, so as to realize that the current path includes vertically passing through the area not covered by the current blocking layer and flowing horizontally to the source after reaching the area covered by the gate on the chip surface. Whether the current blocking layer is realized by ion implantation or by the secondary epitaxy process, the related process is difficult and will affect the material quality of the device. At the same time, because there is no inversion channel layer as the protection for the gate, it is easy to cause gate degradation and form a large leakage in a long-term high-electric-field environment.

[0004] The vertical gate is obtained by etching holes perpendicular to the surface of the chip device on different material layers, and then filling the inner wall of the holes with an insulating layer and then filling with metal. The channel region controlled by the gate is the bulk material layer. By applying a gate voltage, an inversion layer is generated on the sidewalls of the material layer in the gate-covered area to form a conductive channel. The advantage of this structure is that higher integration can be achieved, but the disadvantage is that the high-frequency response ability of the two-dimensional electron gas channel of the HEMT device is lost. And because the threshold voltage needs to be considered, the thickness of the gate insulating layer cannot be too thick, which also leads to reliability problems such as breakdown in the gate region at the bottom in the vertical direction after being affected by the drain electric field for a long time. There are many structures in existing Si-based and SiC-based power devices to enhance the breakdown protection of the vertical gate, but the related structures need to form a protection area at the bottom of the vertical gate by means of complex combined ion implantation, and the processing difficulty is relatively large and not suitable for the HEMT device structure composed of materials such as GaN.

[0005] Therefore, there is an urgent need to provide a high-voltage-resistant HEMT device to improve the voltage-resistant characteristics of the HEMT device. Summary of the Invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a high-voltage-resistant HEMT device and its driving method. The technical problems to be solved by the present invention are realized through the following technical solutions:

[0007] In the first aspect, the present invention provides a high-voltage-resistant HEMT device, including:

[0008] A multi-layer bulk material layer;

[0009] A source electrode and a drain electrode, both the source electrode and the drain electrode are stacked with the multi-layer bulk material layer; along the first direction, the source electrode and the drain electrode are respectively located on both sides of the multi-layer bulk material layer; or, along the first direction, the source electrode and the drain electrode are located on the same side of the multi-layer bulk material layer, and the source electrode and the drain electrode are respectively located on different mesa surfaces;

[0010] A first gate, the first gate is located on the same side of the multi-layer bulk material layer as the source electrode, and is stacked with the multi-layer bulk material layer; the first gate and the source electrode are adjacent to each other;

[0011] A second gate, the second gate is located on the same side of the multi-layer bulk material layer as the first gate, the second gate is adjacent to the first gate, and the first gate is located between the second gate and the source electrode; the second gate is embedded from the surface of the multi-layer bulk material layer into the interior of the multi-layer bulk material layer and extends along the first direction, and the second gate is used to control the vertical conductive channel along the first direction; the first direction is perpendicular to the multi-layer bulk material layer.

[0012] In the second aspect, the present invention also provides a driving method for a high-voltage-resistant HEMT device, including:

[0013] A first voltage is applied to the second gate. The applied first voltage is greater than a first threshold value, turning on the vertical conductive channel, and the current conduction ability of the vertical conductive channel can be adjusted by adjusting the magnitude of the first voltage. The first gate is controlled by an external drive signal. A second voltage is applied to the first gate. When the applied second voltage reaches a second threshold value, the horizontal two-dimensional carrier gas channel under the first gate is controlled to be turned on or off by the first gate, that is, after the vertical conductive channel is turned on by the second gate, the conduction and cutoff of the high-voltage-resistant HEMT device are controlled by the external drive signal applied to the first gate.

[0014] When a positive voltage, a zero bias voltage, or a negative voltage is applied to the second gate, the applied positive voltage, zero bias voltage, or negative voltage is less than the first threshold value, and the condition for turning on the vertical channel is not satisfied. The first gate controls the conduction or cutoff of the two-dimensional carrier gas conductive channel under the action of the external drive signal, but the high-voltage-resistant HEMT device as a whole is still in the off state.

[0015] Advantages of the present invention:

[0016] A high-voltage-resistant HEMT device and its driving method provided by the present invention. The first gate is stacked on the surface of the multi-layer main body material layer. The second gate is embedded into the multi-layer main body material layer from the surface of the multi-layer main body material layer and extends in a direction perpendicular to the multi-layer main body material layer. There is a two-dimensional carrier gas channel under the HEMT device covered by the first gate, and there is no two-dimensional carrier gas channel under the HEMT device covered by the second gate. When a sufficient voltage is applied to the second gate, a vertical conductive channel is formed under the HEMT device covered by the second gate. At this time, an electrical connection path is formed between the two-dimensional carrier gas channel and the vertical conductive channel. The on-resistance of the vertical conductive channel in the direction perpendicular to the multi-layer main body material layer can also be adjusted by adjusting the voltage applied to the second gate. In this way, by applying a working voltage to the second gate before the device operates, a vertical conduction channel of the device is established in advance, and at the same time, the current can be led into the HEMT device through the second gate in the vertical direction of the device, achieving the purpose of improving the voltage resistance of the device by using the multi-layer main body material layer. Then, by applying a control signal to the first gate to control the conduction or cutoff between the source and drain of the HEMT device, the excellent high-frequency response ability and low on-resistance when controlling the conduction and cutoff of the two-dimensional carrier gas through the first gate can be retained. At the same time, through the inversion channel layer connected to the source, the voltage resistance acting on the first gate of the device is mainly borne by the drift region, obtaining the operating frequency of the HEMT device and increasing the current density of the HEMT device while ensuring the voltage resistance performance of the device.

[0017] The following will further elaborate on the present invention in conjunction with the drawings and embodiments. Description of the Drawings

[0018] Figure 1It is a schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0019] Figure 2 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0020] Figure 3 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0021] Figure 4 It is a top view of a high-voltage HEMT device provided by an embodiment of the present invention;

[0022] Figure 5 It is a schematic diagram of a first gate provided by an embodiment of the present invention;

[0023] Figure 6 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0024] Figure 7 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0025] Figure 8 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0026] Figure 9 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0027] Figure 10 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0028] Figure 11 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0029] Figure 12 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0030] Figure 13 It is another top view of a high-voltage HEMT device provided by an embodiment of the present invention;

[0031] Figure 14 It is another top view of a high-voltage HEMT device provided by an embodiment of the present invention;

[0032] Figure 15 It is another schematic diagram of a high-voltage HEMT device provided by an embodiment of the present invention;

[0033] Figure 16It is another top view of the high-voltage HEMT device provided by the embodiments of the present invention. Detailed implementation manners

[0034] The present invention will be further described in detail below in conjunction with specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0035] Please refer to Figure 1 and Figure 2 , Figure 1 which is a schematic diagram of a high-voltage HEMT device provided by the embodiments of the present invention. Figure 2 which is another schematic diagram of a high-voltage HEMT device provided by the embodiments of the present invention. A high-voltage HEMT device provided by the present invention includes:

[0036] A multi-layer main body material layer 10;

[0037] A source electrode 20 and a drain electrode 30, both the source electrode 20 and the drain electrode 30 are stacked with the multi-layer main body material layer 10; along the first direction D1, the source electrode 20 and the drain electrode 30 are respectively located on both sides of the multi-layer main body material layer 10; or, along the first direction D1, the source electrode 20 and the drain electrode 30 are located on the same side of the multi-layer main body material layer 10, and the source electrode 20 and the drain electrode 30 are respectively located on different mesa 70;

[0038] A first gate electrode 40, the first gate electrode 40 is located on the same side of the multi-layer main body material layer 10 as the source electrode 20, and is stacked with the multi-layer main body material layer 10; the first gate electrode 40 and the source electrode 20 are adjacent and can be arranged at intervals.

[0039] A second gate electrode 50, the second gate electrode 50 is located on the same side of the multi-layer main body material layer 10 as the first gate electrode 40, the second gate electrode 50 is adjacent to the first gate electrode 40 and can be arranged at intervals, and the first gate electrode 40 is located between the second gate electrode 50 and the source electrode 20; the second gate electrode 50 is embedded from the surface of the multi-layer main body material layer 10 into the interior of the multi-layer main body material layer 10 and extends along the first direction D1, and the second gate electrode 50 is used to control the vertical conduction channel along the first direction D1; the first direction D1 is perpendicular to the multi-layer main body material layer 10.

[0040] Specifically, please continue to refer to Figure 1 and Figure 2 , a high-voltage HEMT device provided in this embodiment includes a multi-layer main body material layer 10, a source electrode 20, a drain electrode 30, a first gate electrode 40, and a second gate electrode 50. Among them, both the source electrode 20 and the drain electrode 30 are stacked with the multi-layer main body material layer 10. Along the first direction D1, that is, along the direction perpendicular to the multi-layer main body material layer, the source electrode 20 and the drain electrode 30 are respectively located on both sides of the multi-layer main body material layer 10. Please refer to Figure 1, or, along the first direction D1, the source electrode 20 and the drain electrode 30 are located on the same side of the multi-layer body material layer 10, and the source electrode 20 and the drain electrode 30 are respectively located on different mesa 70, please refer to Figure 2 ; both the first gate 40 and the second gate 50 are located on the same side of the multi-layer body material layer 10, and the first gate 40 and the second gate 50 are on the same side as the source electrode 20. The first gate 40 is adjacent to the source electrode 20 and can be arranged at intervals. The second gate 50 is adjacent to the first gate 40 and can be arranged at intervals. The first gate 40 is located between the second gate 50 and the source electrode 20; the first gate 40 is only stacked on the surface of the multi-layer body material layer 10, and the second gate 50 is embedded from the surface of the multi-layer body material layer 10 into the interior of the multi-layer body material layer 10 and extends in a direction perpendicular to the multi-layer body material layer 10; optionally, the first gate 40 can be a p-type GaN gate, or a metal gate or a metal groove gate, and the second gate 50 can be a metal; it can be understood that there is a two-dimensional electron gas channel under the HEMT device covered by the first gate 40, and there is no two-dimensional electron gas channel under the HEMT device covered by the second gate 50. When a sufficient voltage is applied to the second gate 50, a vertical conductive channel is formed under the HEMT device covered by the second gate 50. At this time, the two-dimensional electron gas channel and the vertical conductive channel form an electrical connection path; thus, by applying a working voltage to the second gate 50 before the device works to establish a vertical conduction channel of the device in advance, and then controlling the conduction or cut-off between the source electrode 20 and the drain electrode 30 of the HEMT device by applying a control signal to the first gate 40, the excellent high-frequency response ability when controlling the conduction and cut-off of the two-dimensional electron gas through the first gate 40 can be retained, and at the same time, the current can be led into the interior of the HEMT device through the second gate 50 in the vertical direction of the device, so as to achieve the purpose of improving the breakdown voltage of the device by using the multi-layer body material layer 10, and obtain the working frequency of the HEMT device while ensuring the breakdown voltage performance of the device.

[0041] It should be noted that the first gate 40 for controlling the conduction and closing of the two-dimensional electron gas channel can be a normally open gate, that is, the two-dimensional electron gas channel always remains in the conduction state when there is no gate voltage on the first gate 40, and the two-dimensional electron gas channel can only be turned off when a voltage is applied to the gate, or it can be a normally closed gate, that is, the two-dimensional electron gas channel always remains in the off state when there is no gate voltage on the first gate 40, and the two-dimensional electron gas channel can only be turned on when a voltage is applied to the gate.

[0042] The two-dimensional carrier gas can be a two-dimensional electron gas or a two-dimensional hole gas. To turn off the two-dimensional electron gas channel in the channel under the normally-on gate, a negative voltage needs to be applied to the gate. To turn on the two-dimensional electron gas channel in the channel under the normally-off gate, a positive voltage needs to be applied to the gate. To turn off the two-dimensional hole gas channel in the channel under the normally-on gate, a positive voltage needs to be applied to the gate. To turn on the two-dimensional hole gas channel in the channel under the normally-off gate, a negative voltage needs to be applied to the gate. When the two-dimensional carrier gas used is a two-dimensional electron gas, the material of the inversion channel layer 12 in the multi-layer main material structure is generally p-type doped GaN material. When the two-dimensional carrier gas used is a two-dimensional hole gas, the material of the inversion channel layer 12 in the multi-layer main material structure is generally n-type doped GaN material.

[0043] It can be understood that the material of the above-mentioned barrier layer 14 is generally AlGaN material, or it can also be other GaN-based materials. The above-mentioned polarization channel layer 13 is generally GaN material, or it can also be other GaN-based materials. When the bandgap width of the barrier layer 14 material is greater than that of the polarization channel layer 13 material, it is formed on one side of the polarization channel layer 13 close to the barrier layer 14. When the bandgap width of the barrier layer 14 material is less than that of the polarization channel layer 13 material, a two-dimensional hole gas is formed on one side of the polarization channel layer 13 close to the barrier layer 14.

[0044] Among them, GaN-based materials mainly include GaN, BN, and AlxGayIn1-x-yN (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1) alloy materials.

[0045] It should be noted that Figure 1 The shown embodiment only schematically shows the positional relationship of the multi-layer main material layer 10, the first gate 40, and the second gate 50, and the source electrode 20 and the drain electrode 30 are located on different sides of the multi-layer main material layer 10, which does not represent their actual sizes; Figure 2 The shown embodiment only schematically shows the positional relationship of the multi-layer main material layer 10, the first gate 40, and the second gate 50, and the source electrode 20 and the drain electrode 30 are located on the same side of the multi-layer main material layer 10 but on different platforms, which does not represent their actual sizes.

[0046] In an optional embodiment of the present invention, the multi-layer main material layer 10 includes a drift layer 11, an inversion channel layer 12, a polarization channel layer 13, and a barrier layer 14 stacked in sequence; the drain electrode 30 is located on the side of the drift layer 11 away from the inversion channel layer 12, and the source electrode 20 is located on the side of the barrier layer 14 away from the polarization channel layer 13; wherein, a two-dimensional carrier gas conductive channel is formed between the polarization channel layer 13 and the barrier layer 14, and the first gate 40 is used to control the two-dimensional carrier gas conductive channel.

[0047] Specifically, please refer to Figure 1, in this embodiment, the multi-layer main material layer 10 includes a stacked drift layer 11, an inversion channel layer 12, a polarization channel layer 13, and a barrier layer 14. Among them, the drift layer 11 is an n-type drift layer 11; as Figure 1 shown, a cap layer 15 is provided above the barrier layer 14. The source electrode 20, the first gate electrode 40, and the second gate electrode 50 are all provided above the cap layer 15 and are stacked with the cap layer 15. The drain electrode 30 is located below the drift layer 11.

[0048] In an alternative embodiment of the present invention, please refer to Figure 3 and Figure 4 , Figure 3 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. Figure 4 is a top view of the high-voltage HEMT device provided by the embodiment of the present invention. An n+ electrode contact layer 16 is provided below the n-type drift layer 11, and a drain electrode 30 is provided below the n+ electrode contact layer 16. The n+ electrode contact layer 16 and the drain electrode 30 are stacked; a layer of n-type heavily doped metal contact layer is provided between the drift layer 11 and the drain electrode 30, and its main function is to reduce the contact resistance between the metal and the semiconductor. The drift layer 11 is usually an n-type lightly doped material layer or an unintentionally doped material layer, and its main function is to bear the voltage of the drain electrode 30 in the off state of the device; as Figure 4 shown, the first gate electrode 40 surrounds the second gate electrode 50, and the source electrode 20 surrounds the first gate electrode 40. Figure 4 Only the shape of the electrode is schematically shown as a polygon. The shape of the electrode can also be circular or elliptical. The shape of the electrode is not limited here and can be determined according to actual needs.

[0049] It should be noted that the multi-layer main material layer 10 can be a stack of the cap layer 15, the barrier layer 14, the polarization channel layer 13, and the drift layer 11, or can be a stack of the cap layer 15, the barrier layer 14, the polarization channel layer 13, the inversion channel layer 12, and the drift layer 11. The film layers included in the multi-layer main material layer 10 are not limited here and can be determined according to actual needs.

[0050] It should be noted that, please continue to refer to Figure 4, the HEMT device may be composed of a cell package structure where the first gate 40 surrounds the second gate 50 and the source 20 surrounds the first gate 40. Electrical isolation can also be achieved between the cell packages through an insulating mesa. The concept of the cell package is consistent with existing power devices such as IGBTs and vertical power Si MOSFETs, and will not be described separately here. It should be noted that in this embodiment, the multi-layer main material layer 10 includes at least one two-dimensional carrier gas channel. When including one two-dimensional carrier gas channel, the multi-layer main material layer 10 includes a layer of polarization channel layer 13 and a layer of barrier layer 14 stacked together to form a two-dimensional carrier gas channel. When including multiple two-dimensional carrier gas channels, the multi-layer main material layer 10 includes multiple channel layers 13 and multiple barrier layers 14 stacked alternately, that is, one layer of polarization channel layer 13 and one layer of barrier layer 14 form a two-dimensional carrier gas channel, and multiple two-dimensional carrier gas channels can be formed. When including multiple two-dimensional carrier gas channels, the first gate 40 can control multiple two-dimensional carrier gas channels.

[0051] In an alternative embodiment of the present invention, please refer to Figure 5 , Figure 5 is a schematic diagram of the first gate provided by the embodiment of the present invention. The first gate can be any one of a pGaN gate, a metal gate, a metal groove gate 1, a metal groove gate 2, or a pGaN groove gate. For its specific structure, please refer to Figure 5 .

[0052] In an alternative embodiment of the present invention, the multi-layer main material layer 10 is grown layer by layer in sequence by epitaxy in the same epitaxial process.

[0053] Specifically, in this embodiment, the multi-layer main material layer 10 is grown layer by layer in sequence by epitaxy in the same epitaxial process. In this way, the process can be saved and the manufacturing process can be simplified.

[0054] In an alternative embodiment of the present invention, please refer to Figure 6 , Figure 6 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. The second gate 50 includes a first branch 51 and a second branch 52. The first branch 51 is stacked with the multi-layer main material layer 10, and the second branch 52 extends from the surface of the multi-layer main material layer 10 to the drift layer 11. An insulating layer 60 is provided on the contact surface between the second branch 52 and the multi-layer main material layer 10.

[0055] Specifically, please continue to refer to Figure 1 and Figure 3 and in combination with Figure 6, in this embodiment, the second gate 50 includes two parts, namely a first branch 51 and a second branch 52. The first branch 51 is disposed above the cap layer 15, and the second branch 52 extends from the upper surface of the cap layer 15 to the drift layer 11. It can be understood that insulating layers 60 are provided on the contact surfaces of the side surface of the second branch 52 with the cap layer 15, the barrier layer 14, the polarization channel layer 13, the inversion channel layer 12, and the drift layer 11.

[0056] In this embodiment, please continue to refer to Figure 6 , the first gate 40 controls the two-dimensional carrier gas channel formed between the barrier layer 14 and the polarization channel layer 13, and the second gate 50 controls the channel in the vertical direction passing through the barrier layer 14, the polarization channel layer 13 or the barrier layer 14, the polarization channel layer 13, the inversion channel layer 12 until the drift layer 11. When a positive voltage is applied to the second gate 50, electrons will accumulate on the side wall of the second branch 52. Further, when the voltage applied to the second gate 50 is large enough, electron accumulation begins to form on the side of the second gate 50 close to the polarization channel layer 13 and the inversion channel layer 12 in the polarization channel layer 13 material and the inversion channel layer, and finally a conducting channel is formed, as Figure 6 shown. The horizontal arrow indicates the two-dimensional carrier gas channel formed under the HEMT device covered by the first gate 40, and the vertical arrow indicates that when a sufficient voltage is applied to the second gate 50, a vertical-direction conducting channel is formed under the HEMT device covered by the second gate 50. At this time, the two-dimensional carrier gas formed between the barrier layer 14 and the polarization channel layer 13 forms an electrical connection path with the drift layer 11 through the channel formed by the second gate 50. One side of the drift layer 11 far from the polarization channel layer 13 and / or the inversion channel layer 12 is connected to the drain 30 of the HEMT device. Whether there is a conducting channel between the source 20 and the drain 30 of the HEMT device is controlled by the state of the first gate 40. When the first gate 40 opens the two-dimensional carrier gas channel, the source 20 and the drain 30 of the HEMT device are conducted through the two-dimensional carrier gas communication and the conducting channel formed by the second gate 50, and the voltage drop from the drain 30 to the source 20 is mainly distributed in the part where the second gate 50 penetrates into the drift layer 11 or the part where the inversion channel layer 12 and the second gate 50 penetrate into the drift layer 11.

[0057] In this embodiment, a working voltage is applied to the second gate 50 before the device operates to establish a conductive channel in the vertical direction of the HEMT device in advance. Then, the conduction or cutoff between the source 20 and the drain 30 of the HEMT device is controlled by the first gate 40 and the control signal applied thereto. This can not only retain the excellent high-frequency response ability when controlling the two-dimensional carrier gas to conduct and cutoff through the first gate 40, improve the operating frequency of the device while ensuring the performance of the HEMT device, but also lead the current into the device through the second gate 50 in the vertical direction of the device, so as to achieve the purpose of improving the breakdown voltage of the HEMT device by using the materials of the multi-layer main material layer 10. Since the voltage applied to the second gate 50 can be not limited by the driving voltage, a suitable voltage can be applied according to requirements to reduce the on-resistance of the vertical channel, so that the HEMT device structure proposed by the present invention will not increase the overall on-resistance. Further, the insulating layer 60 provided outside the second branch 52 of the second gate 50 can also use a relatively thick insulating material. The thickness of the insulating layer 60 is not limited here, and it can preferably withstand the voltage of the drain 30 during the off period of the HEMT device. When the HEMT device is not operating, no voltage needs to be applied to the second gate 50, so that no large electric field stress is generated between the second gate 50 and the first gate 40 due to the voltage difference, avoiding reliability problems such as dynamic resistance drift or current collapse formed by the influence of the drain 30 voltage on the first gate 40 of the conventional HEMT device. Further, a field plate can be added on the first gate 40 and / or the source 20 to further weaken the influence of the voltage applied to the device by the second gate 50 on the first gate 40. The field plates of the first gate 40 and the source 20 are relatively common structures in the manufacture of HEMT devices and will not be described separately here.

[0058] In an alternative embodiment of the present invention, please refer to Figure 7 , Figure 7 FIG. is another schematic diagram of the high-breakdown-voltage HEMT device provided by the embodiment of the present invention, further including: at least one diffusion layer 17, the diffusion layer 17 is located in the drift layer 11, the diffusion layer 17 is located on the side of the second branch 52 away from the first branch 51, and the diffusion layer 17 is in contact with the insulating layer 60 outside the second branch 52.

[0059] Specifically, please continue to refer to Figure 7, in this embodiment, in order to further enhance the performance of the HEMT device, a diffusion layer 17 is further provided in the HEMT device layer structure. The diffusion layer 17 is an n-type heavily doped diffusion layer 17, which is located in the drift layer 11 and under the polarization channel layer 13 or the polarization channel layer 13 and the inversion channel layer 12. The insulating layer 60 outside the second branch 52 of the second gate 50 is in contact with the n-type heavily doped diffusion layer 17. It can be understood that there will be no inversion channel layer 12 under the diffusion layer 17. The carriers entering the drift layer 11 through the channel generated by the second gate 50 will be further evenly distributed in the diffusion layer 17, which is more conducive to the average distribution of the current of the HEMT device.

[0060] It should be noted that Figure 7 The illustrated embodiment only schematically shows the diagram of setting a diffusion layer 17, and does not represent its actual size.

[0061] In an alternative embodiment of the present invention, please refer to Figure 8 , Figure 8 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. The second gate 50 includes a first branch 51 and a second branch 52. The first branch 51 is located above the multi-layer main material layer 10, and an insulating layer is provided between the first branch and the multi-layer main material layer. The second branch 52 extends from the surface of the multi-layer main material layer 10 to the inversion channel layer 12, and an insulating layer 60 is provided on the contact surface between the second branch 52 and the multi-layer main material layer 10.

[0062] In an alternative embodiment of the present invention, an n-type region 19 is provided between the drift layer and the second branch. Along the first direction D1, a partial region of the n-type region 19 penetrates the inversion channel layer. One side of the n-type region 19 is in contact with the insulating layer outside the second branch, and the other side of the n-type region 19 is in contact with the drift layer.

[0063] Specifically, please continue to refer to Figure 8, in this embodiment, the second branch 52 of the second gate 50 extends to the inversion channel layer 12, and ions are implanted between the insulating layer 60 outside the bottom of the second branch 52 and the diffusion layer 17, that is, an n-type region 19 is formed between the two; it can be understood that, in order to better disperse the electric field applied by the drain 30 of the HEMT device at the bottom of the second gate 50, the bottom of the second gate 50 is designed within the inversion channel layer 12. By implanting ions into the bottom of the channel after etching the vertical channel during the fabrication of the second gate 50, the inversion channel layer 12 at the bottom of the channel is modified into an n-type region 19 (the inversion channel layer 12 becomes an N-type region 19). This n-type region 19 is in direct contact with the drift layer 11. At this time, after fabricating the insulating layer 60 and the gate metal of the second gate 50, a JFET structure in which the inversion channel layer surrounds the n-type material is formed at the bottom of the second gate 50. The inversion channel layer well wraps the front edge of the bottom of the second gate 50. At the same time, when the HEMT device is turned off, the voltage of the drain 30 acts on the n-type material surrounded by the inversion channel layer, forming a reverse pn junction with the inversion channel layer, further protecting the bottom of the second gate 50.

[0064] In this embodiment, after etching the holes for forming the second gate 50 in the multi-layer main material layer 10, n-type GaN material is epitaxially grown again, and then part of the n-type GaN material is etched away, and the n-type GaN material at the bottom of the holes is retained. Then, an insulating layer and a metal are deposited in the hole region at this time to form the second gate. At this time, the n-type region at the bottom of the second gate is the retained n-type GaN material at the bottom of the holes.

[0065] In an alternative embodiment of the present invention, please refer to Figure 9 and Figure 10 , Figure 9 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention, Figure 10 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. The diffusion layer 17 includes multiple layers. All the diffusion layers 17 are located in the drift layer, and adjacent diffusion layers 17 are arranged at intervals; among the multiple diffusion layers 17, the diffusion layer 17 adjacent to the second branch is in contact with the insulating layer outside the second branch; or, among the multiple diffusion layers 17, an n-type region 19 is provided between the diffusion layer 17 adjacent to the second branch and the second branch.

[0066] Specifically, please continue to refer to Figure 9 and Figure 10, in this embodiment, the diffusion layer 17 can be a single-layer material or a stack of multiple parallel n-type heavily doped material layers. The current can be more evenly diffused through the multiple parallel n-type heavily doped material layers, reducing the on-resistance of the device. When the n-type heavily doped diffusion layer 17 is a stack of multiple parallel n-type heavily doped material layers, the bottom of the second gate 50 needs to reach the diffusion layer 17 closest to the inversion channel layer 12 or the drift layer 11 above this diffusion layer 17, or the bottom of the second gate 50 converts the material of the inversion channel layer 12 covered by the bottom of the second gate 50 into an n-type material by the above ion implantation method within the inversion channel layer 12, and this n-type material is connected to the diffusion layer 17 closest to the inversion channel layer 12 or the drift layer 11 above this diffusion layer 17.

[0067] It should be noted that Figure 9 and Figure 10 The illustrated embodiment only schematically shows the setting of three diffusion layers 17, and there can also be other numbers of diffusion layers 17, which are not limited in the present invention.

[0068] In an alternative embodiment of the present invention, please refer to Figure 11 , Figure 11 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. The inversion channel layer 12 includes multiple layers, and adjacent inversion channel layers 12 are arranged at intervals; the second branch 52 extends through the multiple inversion channel layers 12 to the drift layer 11; or, the second branch 52 extends through at least part of the inversion channel layer 12 to the inversion channel layer 12 adjacent to the drift layer 11.

[0069] Specifically, please continue to refer to Figure 11 , in this embodiment, the inversion channel layer 12 can be a single-layer material or a stack of multiple parallel inversion channel layers. The leakage current of the device is further reduced, the breakdown voltage capability of the device is improved, and the reliability of the device is enhanced through the stacking of multiple inversion channel layers; when the inversion channel layer 12 is a stacked structure of multiple parallel inversion channel layers, the bottom of the second gate 50 needs to penetrate the last inversion channel layer 12 closest to the diffusion layer 17 and extend into the diffusion layer 17 or the drift layer 11, or the bottom of the second gate 50 converts the material of the inversion channel layer 12 covered by the bottom of the second gate 50 into an n-type material by the above ion implantation method within the last inversion channel layer 12 closest to the diffusion layer 17.

[0070] In an alternative embodiment of the present invention, please refer to Figure 1 , the source electrode 20 is connected to the two-dimensional carrier gas channel and is also connected to the inversion channel layer 12.

[0071] Specifically, please continue to refer to Figure 1, in this embodiment, the source 20 electrode metal forms an ohmic contact not only with the two-dimensional carrier gas channel but also with the inversion channel layer 12. The source 20 electrode forms an ohmic contact with the two-dimensional carrier gas channel to reduce the source 20 contact resistance, and forms an ohmic contact with the inversion channel layer 12 to provide a bias voltage from the source 20 to the inversion channel layer 12, avoiding the potential floating of the inversion channel layer 12, which is more conducive to the conduction of the channel in the vertical direction and shielding the influence of the drain 30 voltage on the first gate 40. Among them, one way is to expose the material of the inversion channel layer 12 through mesa etching, and the source 20 metal forms an ohmic contact with both the two-dimensional carrier gas and the inversion channel layer 12 in a way that spans the mesa.

[0072] In an alternative embodiment of the present invention, the drift layer 11 is an n-type drift layer, and the n-type doping concentration in the n-type drift layer 11 remains unchanged.

[0073] In an alternative embodiment of the present invention, the drift layer 11 is an n-type drift layer, and the n-type doping concentration in the n-type drift layer 11 is gradually or continuously graded, that is, in the direction from the source 20 to the drain 30, the n-type doping concentration of the n-type drift layer 11 can be gradually increasing or decreasing.

[0074] In an alternative embodiment of the present invention, the inversion channel layer 12, the diffusion layer 17, and the drift layer 11 include a periodic stack of semiconductor materials with multiple different bandgaps; the inversion channel layer 12, the diffusion layer 17, and the drift layer 11 include at least one semiconductor material.

[0075] Specifically, in this embodiment, the inversion channel layer 12, the n-type heavily doped diffusion layer 17, and the drift layer 11 can be a single semiconductor material or a periodic stack of semiconductor materials with multiple different bandgaps. For example, it can be a GaN material, or two or more of GaN, AlGaN, InGaN, InAlGaN, etc. overlapping with each other. The periodic stack of semiconductor materials with different bandgaps introduces multiple carrier barriers in the direction of the voltage-bearing of the multi-layer main body material layer 10 of the entire HEMT device, which is beneficial to further improving the breakdown voltage and reducing the leakage current. Especially when the insulating layer 60 of the second gate 50 deteriorates, it can help reduce the leakage current and thus extend the service life of the device.

[0076] In an alternative embodiment of the present invention, please refer to Figure 12 , Figure 12 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention, and in combination with Figure 1 shown, along the first direction D1, the source 20 and the drain 30 are arranged on both sides of the multi-layer main body material, and the drain 30 is a surface state structure.

[0077] Specifically, please continue to refer toFigure 12 and Figure 1 In this embodiment, along the direction perpendicular to the multi-layer main material, the source electrode 20 and the drain electrode 30 are located on both sides of the multi-layer main material layer 10. The drain electrode 30 is disposed on one side of the drift layer 11 and has a planar structure.

[0078] It should be noted that Figure 12 The illustrated embodiment only schematically shows a schematic diagram of the positions of the first gate, the second gate, and the source when the source and the drain are located on different sides.

[0079] In an alternative embodiment of the present invention, please refer to Figure 13 and Figure 14 and in combination with Figure 2 as shown, Figure 13 is another top view of the high-voltage HEMT device provided by the embodiment of the present invention. Figure 14 is another top view of the high-voltage HEMT device provided by the embodiment of the present invention. Along the first direction D1, the source electrode 20 and the drain electrode 30 are disposed on the same side of the multi-layer main material. The drain electrode 30 is adjacent to the source electrode 20 and is arranged at intervals. The drain electrode 30 extends from the surface of the multi-layer main material layer 10 to contact the n-type region 19.

[0080] Specifically, please continue to refer to Figure 13 and Figure 14 and in combination with Figure 2 In this embodiment, the source electrode 20 and the first gate 40 are on the same side but on different mesa 70s. The mesa 70 between the source electrode 20 and the drain electrode 30 is isolated by an insulating medium. The electric field distribution between the drain electrode 30 and the first gate 40 will be shared by the source electrode 20 and the second gate 50. Further, in the structure with the inversion channel layer 12, it will be further shared by the inversion channel layer 12 in direct contact with the source electrode 20. Therefore, a good protection for the first gate 40 can be formed to ensure the long-term reliability and stability of the first gate 40.

[0081] It should be noted that Figure 14 The short arrow in represents that the current flows along the current channel in the first direction controlled by the first gate, that is, the two-dimensional carrier gas channel, and the long arrow represents the current channel along the second gate, that is, the second direction, and then the current channel flow between the drain through the diffusion layer in a direction parallel to the first direction.

[0082] In an alternative embodiment of the present invention, please refer to Figure 15 and Figure 16 , Figure 15 is another schematic diagram of the high-voltage HEMT device provided by the embodiment of the present invention. Figure 16 is another top view of the high-voltage HEMT device provided by the embodiment of the present invention. Figure 15Another embodiment is shown in which the source 20 and the drain 30 are disposed on the same side of the multi-layer body material along the first direction D1. Figure 16 FIG. is a corresponding top view thereof.

[0083] In an alternative embodiment of the present invention, taking GaN material as an example, the manufacturing method of the high breakdown voltage HEMT device proposed in the present application is as follows: a relatively thick drift layer 11 is grown on a substrate, and the growth of several n-type heavily doped diffusion layers 17 is inserted during the growth of the drift layer 11, and then an inversion channel layer 12 is grown above the drift layer 11 and then a polarization channel layer 13 is grown, or the polarization channel layer 13 is directly grown. A barrier layer 14 is grown above the polarization channel layer 13, and then a cap layer 15 is grown. If a pGaN gate is used, a p-type GaN layer needs to be continuously grown. Deep holes are etched in the material layer until they pass through all the inversion channel layers 12 or stop in the inversion channel layer 12 farthest from the polarization channel layer 13. If it stops in the inversion channel layer 12 farthest from the polarization channel layer 13, the surface of the material layer outside the deep holes needs to be masked by a mask, and Si elements are implanted into the bottom of the deep holes by ion implantation and annealed to modify the inversion channel layer 12 in the bottom area of the deep holes into an n-type. Then an insulating material is filled in the deep holes.

[0084] For the case where the source 20 and the drain 30 are located on both sides of the device body material, the mesa is etched until the inversion channel layer is exposed, and source 20 metal is fabricated in the exposed inversion channel layer region and the surface region of the device material layer adjacent to the mesa to form an ohmic contact. The first gate 40 is fabricated, including pGaN etching or recess etching and gate metal deposition. The metal of the second gate 50 needs to be filled on the insulating material in the deep holes. A hole space can be reserved during the filling of the insulating material, or a hole can be etched inside the insulating material after the holes are completely filled. The metal of the second gate 50 can be filled separately, or deposited simultaneously with the metal of the first gate 40. If the substrate at this time is a GaN homogeneous substrate, the drain 30 can be fabricated by depositing metal on the side of the device material layer away from the source 20 and the first gate 40 after thinning the back surface of the substrate. If the substrate at this time is a heterogeneous substrate such as an Si or sapphire substrate, etc., the drain 30 can be fabricated by depositing metal on the side of the device material layer away from the source 20 and the first gate 40 after removing the substrate or etching the substrate material on the back surface of the substrate until the drift layer 11 material is exposed.

[0085] For the case where the source 20 and the drain 30 are on the same side of the device body material but on different mesa surfaces, the manufacturing methods of the source 20, the first gate 40, and the second gate 50 are basically the same. Etch the mesa on the side of the source 20 away from the first gate 40 until the diffusion layer 17 farthest from the polarization channel layer 13 is exposed. Deposit an insulating material to protect the mesa on the side close to the source 20. Etch the insulating material on the surface of the exposed diffusion layer 17 material farthest from the polarization channel layer 13 to obtain a window for metal deposition. Deposit the drain 30 metal and form an ohmic contact with the n-type diffusion to complete the fabrication of the drain 30.

[0086] Based on the same inventive concept, the present invention also provides a driving method for a high-voltage HEMT device, which is used to drive the high-voltage HEMT device provided in the above embodiments of the present invention. For the embodiments of the high-voltage HEMT device, please refer to the above, and the repeated parts will not be elaborated again; the driving method includes:

[0087] Apply a first positive voltage to the second gate 50. The applied first positive voltage is greater than the first threshold to turn on the vertical conduction channel, and the current conduction ability of the vertical conduction channel can be adjusted by adjusting the magnitude of the first positive voltage; the first gate 40 is controlled by an external driving signal. Apply a second voltage to the first gate 40. When the applied second voltage reaches the second threshold, the horizontal two-dimensional electron gas channel under the first gate 40 is controlled by the first gate 40 to be turned on or off, that is, after the vertical conduction channel is turned on by the second gate 50, the conduction and turning off of the high-voltage HEMT device are controlled by the external driving signal applied to the first gate 40;

[0088] When a positive voltage, zero bias, or negative voltage is applied to the second gate 50, the applied positive voltage, zero bias, or negative voltage is less than the first threshold, and the condition for turning on the vertical channel is not met. The first gate 40 controls the conduction or turning off of the two-dimensional electron gas conduction channel under the action of the external driving signal, but the high-voltage HEMT device as a whole is still in the off state.

[0089] Specifically, in this embodiment, a driving method for a high breakdown voltage HEMT device is provided. There is a two-dimensional electron gas channel under the HEMT device covered by the first gate 40, and there is no two-dimensional electron gas channel under the HEMT device covered by the second gate 50. When a sufficient voltage is applied to the second gate 50, a conducting channel is formed under the HEMT device covered by the second gate 50. At this time, the two-dimensional electron gas channel and the conducting channel form an electrical connection path. In this way, by applying a working voltage to the second gate 50 before the device operates to establish a vertical conducting channel of the device in advance, and then controlling the conduction or cutoff between the source 20 and the drain 30 of the HEMT device by applying a control signal to the first gate 40, the excellent high-frequency response ability when controlling the conduction and cutoff of the two-dimensional electron gas through the first gate 40 can be retained, the operating frequency of the HEMT device can be increased while ensuring the performance of the HEMT device, and at the same time, the current can be led into the HEMT device through the second gate 50 in the vertical direction of the device, so as to achieve the purpose of improving the breakdown voltage of the device by using the multi-layer main material layer 10.

[0090] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant is intended to cover non-exclusive inclusion, so that an article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of another identical element in the article or device including the element. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The orientation or positional relationship indicated by "up", "down", "left", "right", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

[0091] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0092] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A high withstand voltage HEMT device, It is characterized in that include: Multiple body material layers; A source electrode and a drain electrode, wherein the source electrode and the drain electrode are stacked with the multi-layer main material layer; Along the first direction, the source electrode and the drain electrode are respectively located on both sides of the multi-layer main material layer; or, along the first direction, the source electrode and the drain electrode are located on the same side of the multi-layer main material layer, and the source electrode and the drain electrode are respectively located on different mesas; A first gate electrode, wherein the first gate electrode and the source electrode are located on the same side of the multi-layer main material layer and are stacked with the multi-layer main material layer; the first gate electrode and the source electrode are adjacently arranged; a second gate, wherein the second gate and the first gate are located on the same side of the multi-layer main material layer, the second gate is disposed adjacent to the first gate, and the first gate is located between the second gate and the source electrode; the second gate is embedded from the surface of the multi-layer main material layer into the interior of the multi-layer main material layer and extends along the first direction, and the second gate is used to control a vertical conductive channel along the first direction; The first direction is perpendicular to the multiple layers of host material.

2. The high withstand voltage HEMT device according to claim 1, It is characterized in that The multilayer main material layer includes a drift layer, an inversion channel layer, a polarization channel layer, and a barrier layer stacked in sequence; the drain is located on the side of the drift layer away from the inversion channel layer, and the source is located on the side of the barrier layer away from the polarization channel layer; wherein a two-dimensional carrier gas conduction channel is formed between the polarization channel layer and the barrier layer, and the first gate is used to control the two-dimensional carrier gas conduction channel.

3. The high withstand voltage HEMT device according to claim 2, It is characterized in that The multi-layer main material layer is grown layer by layer in sequence by epitaxy in the same epitaxial process.

4. The high withstand voltage HEMT device according to claim 2, It is characterized in that The second gate includes a first branch and a second branch, the first branch is stacked with the multi-layer main material layer, the second branch extends from the surface of the multi-layer main material layer to the drift layer, and an insulating layer is provided on the contact surface between the second branch and the multi-layer main material layer.

5. The high withstand voltage HEMT device according to claim 4, It is characterized in that Also includes: At least one diffusion layer is located in the drift layer, and the diffusion layer is located on a side of the second branch facing away from the first branch.

6. The high withstand voltage HEMT device according to claim 2, It is characterized in that The second gate includes a first branch and a second branch, the first branch is located above the multi-layer main material layer, and an insulating layer is arranged between the first branch and the multi-layer main material layer, the second branch extends from the surface of the multi-layer main material layer to the inversion channel layer, and an insulating layer is arranged on the contact surface between the second branch and the multi-layer main material layer.

7. The high withstand voltage HEMT device according to claim 6, It is characterized in that An n-type region is provided between the drift layer and the second branch. Along the first direction, a partial region of the n-type region penetrates through the inversion channel layer. One side of the n-type region is in contact with the insulating layer outside the second branch, and the other side of the n-type region is in contact with the drift layer.

8. The high-voltage HEMT device according to claim 5 or 7, wherein, the diffusion layer includes multiple layers, all of the diffusion layers are located in the drift layer, and the adjacent diffusion layers are arranged at intervals; among the multiple diffusion layers, the diffusion layer adjacent to the second branch is in contact with the insulating layer outside the second branch; or, among the multiple diffusion layers, an n-type layer is provided between the diffusion layer adjacent to the second branch and the second branch.

9. The high-voltage HEMT device according to claim 4, wherein, the inversion channel layer includes multiple layers, and the adjacent inversion channel layers are arranged at intervals; the second branch penetrates through the multiple inversion channel layers and extends to the drift layer; or, the second branch penetrates through at least part of the inversion channel layers and extends to the inversion channel layer adjacent to the drift layer.

10. The high-voltage HEMT device according to claim 2, wherein, the source electrode is connected to the two-dimensional carrier gas channel and is also connected to the inversion channel layer.

11. The high-voltage HEMT device according to claim 1, wherein, along the first direction, the source electrode and the drain electrode are arranged on two sides of the multi-layer main body material, and the drain electrode is a planar structure.

12. The high-voltage HEMT device according to claim 1, wherein, along the first direction, the source electrode and the drain electrode are arranged on the same side of the multi-layer main body material, and the drain electrode is arranged on the diffusion layer exposed after the multi-layer main body material layer is etched and is in contact with the diffusion layer.

13. A driving method for a high-voltage HEMT device, used to drive the high-voltage HEMT device according to any one of claims 1 to 12, wherein, it includes: applying a first voltage to the second gate, the applied first voltage being greater than a first threshold value to turn on the vertical conduction channel, and the current conduction ability of the vertical conduction channel can be adjusted by adjusting the magnitude of the first voltage; the first gate is controlled by an external driving signal, a second voltage is applied to the first gate, and when the applied second voltage reaches a second threshold value, the horizontal two-dimensional carrier gas channel under the first gate is controlled to be turned on or off by the first gate, that is, after the vertical conduction channel is turned on by the second gate, the on and off of the high-voltage HEMT device are controlled by the external driving signal applied to the first gate; when a positive voltage, zero bias voltage or negative voltage is applied to the second gate, the applied positive voltage, zero bias voltage or negative voltage is less than the first threshold value, the condition for turning on the vertical channel is not satisfied, and the first gate controls the on and off of the two-dimensional carrier gas conduction channel under the action of the external driving signal, but the high-voltage HEMT device as a whole is still in the off state.

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