Semiconductor device

Abstract

The semiconductor device includes a first die pad, a first semiconductor element, a sealing resin, and a reinforcing material. The first semiconductor element is bonded to the first die pad. The sealing resin covers the first semiconductor element. The reinforcing material is bonded to the first die pad. The linear expansion coefficient of the reinforcing material is smaller than that of the sealing resin. As an example, the reinforcing material is covered by the sealing resin. In addition, the reinforcing material is located on the same side as the first semiconductor element in a first direction with the first die pad as a reference.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device. Background Art

[0002] In Patent Document 1, an example of a semiconductor device including a first semiconductor element and a first lead electrically connected to the first semiconductor element is disclosed. The first semiconductor element is a switching element such as a MOSFET. The first lead includes a first pad to which the first semiconductor element is conductively bonded and a first terminal connected to the first pad. By applying a DC voltage to the first terminal and driving the first semiconductor element, DC power can be converted into AC power.

[0003] The semiconductor device disclosed in Patent Document 1 further includes a sealing resin covering the first pad and the first semiconductor element. Heat generated from the first semiconductor element is conducted to the first pad. As a result, a relatively large thermal strain with respect to the sealing resin is generated in the first pad, and thus thermal stress is generated at the boundary between the first pad and the sealing resin. This thermal stress is transmitted to the boundary between the first semiconductor element and the sealing resin. If this thermal stress becomes large, peeling may occur at the boundary between the first semiconductor element and the sealing resin, and cracks may occur in the passivation film of the first semiconductor element. Therefore, countermeasures for reducing this thermal stress are desired.

[0004] Prior Art Documents

[0005] Patent Document

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2018-14490 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] One problem of the present disclosure is to provide a semiconductor device improved compared to the prior art. In particular, in view of the above situation, one problem of the present disclosure is to provide a semiconductor device capable of reducing thermal stress generated at the boundary between a semiconductor element and a sealing resin.

[0009] Means for Solving the Problems

[0010] The semiconductor device provided by the first aspect of the present disclosure includes: a first chip pad; a first semiconductor element bonded to the first chip pad; a sealing resin covering the first semiconductor element; and a reinforcing material bonded to the first chip pad, the coefficient of linear expansion of the reinforcing material being smaller than the coefficient of linear expansion of the sealing resin.

[0011] Advantages of the Invention

[0012] According to the above structure, it is possible to reduce thermal stress generated at the boundary between a semiconductor element and a sealing resin in a semiconductor device.

[0013] Other features and advantages of the present disclosure will become more apparent from the following detailed description based on the accompanying drawings. Description of the Drawings

[0014] Figure 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure.

[0015] Figure 2 is Figure 1 a top view of the semiconductor device shown, through the encapsulating resin.

[0016] Figure 3 is Figure 2 a corresponding top view, further through the first conduction member and the second conduction member.

[0017] Figure 4 is Figure 1 a bottom view of the semiconductor device shown.

[0018] Figure 5 is Figure 1 a front view of the semiconductor device shown.

[0019] Figure 6 is Figure 1 a right side view of the semiconductor device shown.

[0020] Figure 7 is a cross-sectional view along line VII-VII of Figure 3 .

[0021] Figure 8 is a cross-sectional view along line VIII-VIII of Figure 3 .

[0022] Figure 9 is a cross-sectional view along line IX-IX of Figure 3 .

[0023] Figure 10 is Figure 7 a partial enlarged view showing the first semiconductor element and its vicinity.

[0024] Figure 11 is Figure 7 a partial enlarged view showing the second semiconductor element and its vicinity.

[0025] Figure 12 is Figure 8 a partial enlarged view of

[0026] Figure 13 is Figure 9 a partial enlarged view of

[0027] Figure 14 is Figure 3 a partially enlarged view of

[0028] Figure 15 is a top view of a semiconductor device according to a second embodiment of the present disclosure, through a first conduction component, a second conduction component, and a sealing resin.

[0029] Figure 16 is Figure 15 a partially enlarged view of

[0030] Figure 17 is a top view of a semiconductor device according to a third embodiment of the present disclosure, through a first conduction component, a second conduction component, and a sealing resin.

[0031] Figure 18 is Figure 17 a partially enlarged view of

[0032] Figure 19 is a top view of a semiconductor device according to a fourth embodiment of the present disclosure, through a first conduction component, a second conduction component, and a sealing resin.

[0033] Figure 20 is Figure 19 a partially enlarged view of

[0034] Figure 21 is a top view of a semiconductor device according to a fifth embodiment of the present disclosure and through a sealing resin.

[0035] Figure 22 is a cross-sectional view taken along line XXII-XXII of Figure 21

[0036] Figure 23 is Figure 21 a partially enlarged view of

[0037] Figure 24 is a cross-sectional view taken along line XXIV-XXIV of Figure 23 Detailed Embodiments

[0038] A method for implementing the present disclosure will be described based on the accompanying drawings.

[0039] First Embodiment:

[0040] Based on Figures 1 to 14, a semiconductor device A10 of the first embodiment of the present disclosure will be described. The semiconductor device A10 includes a first chip pad 101, a second chip pad 102, a first lead 11, a second lead 12, a third lead 13, two fourth leads 14, two fifth leads 15, a plurality of semiconductor elements 20, a first conduction member 31, a second conduction member 32, a sealing resin 50, and two reinforcing materials 60. The semiconductor device A10 further includes two first wires 41, two second wires 42, two first relay wires 43, and two second relay wires 44. Here, for ease of understanding, Figure 2 and Figure 3 through the sealing resin 50. For ease of understanding, Figure 3 through the first conduction member 31 and the second conduction member 32. In Figure 3 , illustrations of the first conductive bonding layer 34, the second conductive bonding layer 35, the third conductive bonding layer 36, and the fourth conductive bonding layer 37 are omitted. In Figure 2 and Figure 3 , the sealing resin 50 that passes through is represented by a phantom line (double-dot dash line). In Figure 3 , the first conduction member 31 and the second conduction member 32 that pass through are represented by a phantom line. Further, in Figure 3 , the IX-IX line is represented by a single-dot dash line.

[0041] In the description of the semiconductor device A10, for convenience, the normal direction of the first main surface 101A of the first chip pad 101 to be described later is referred to as the "first direction z". One direction orthogonal to the first direction z is referred to as the "second direction x". The direction orthogonal to the first direction z and the second direction x is referred to as the "third direction y".

[0042] The semiconductor device A10 converts the DC power supply voltage applied to the first lead 11 and the third lead 13 into AC power using a plurality of semiconductor elements 20. The converted AC power is input from the second lead 12 to a power supply object such as a motor. The semiconductor device A10 is used in a power conversion circuit such as an inverter.

[0043] Regarding the first chip pad 101 and the second chip pad 102, as Figure 3 and Figure 7 shown, the first chip pad 101 and the second chip pad 102 are separated from each other in the third direction y. The first chip pad 101 and the second chip pad 102 are obtained from the same lead frame together with the first lead 11, the second lead 12, the third lead 13, the two fourth leads 14, and the two fifth leads 15. The lead frame contains copper (Cu) or a copper alloy.

[0044] As Figure 7 and Figure 8As shown, the first chip pad 101 has a first main surface 101A and a first back surface 101B facing opposite sides of each other in the first direction z. The second chip pad 102 has a second main surface 102A and a second back surface 102B facing opposite sides of each other in the first direction z. The second main surface 102A faces the same side as the first main surface 101A in the first direction z. The first back surface 101B and the second back surface 102B are exposed from the encapsulating resin 50. As Figure 3 shown, the size of the first chip pad 101 in the second direction x is larger than the size of the first chip pad 101 in the third direction y. The size of the second chip pad 102 in the second direction x is larger than the size of the second chip pad 102 in the third direction y.

[0045] As Figure 3 and Figure 12 shown, a first seat portion 101C is provided on the first chip pad 101. The first seat portion 101C is recessed from the first main surface 101A. Thus, in the first chip pad 101, a step is formed between the first main surface 101A and the first seat portion 101C.

[0046] As Figures 7 to 9 shown, the encapsulating resin 50 covers a plurality of semiconductor elements 20, the first conduction member 31, and the second conduction member 32. Also, the encapsulating resin 50 covers a part of each of the two chip pads 10, the first lead 11, the second lead 12, the third lead 13, two fourth leads 14, and two fifth leads 15. The encapsulating resin 50 has electrical insulation properties. The encapsulating resin 50 is made of a material including, for example, a black epoxy resin. As Figure 4 shown, the size of the encapsulating resin 50 in the third direction y is larger than the size of the encapsulating resin 50 in the second direction x. The encapsulating resin 50 has a top surface 51, a bottom surface 52, two first side surfaces 53, a second side surface 54, a third side surface 55, a plurality of recesses 56, and a groove portion 57.

[0047] As Figure 7 and Figure 8 shown, the top surface 51 faces the same side as the first main surface 101A of the first chip pad 101 in the first direction z. As Figures 7 to 9 shown, the bottom surface 52 faces the opposite side of the top surface 51 in the first direction z. As Figure 4 shown, the first back surface 101B of the first chip pad 101 and the second back surface 102B of the second chip pad 102 are exposed from the bottom surface 52.

[0048] As Figure 2 、 Figure 4 and Figure 5As shown, the two first side surfaces 53 are separated from each other in the third direction y. The two first side surfaces 53 face the third direction y and extend along the second direction x. The two first side surfaces 53 are connected to the top surface 51 and the bottom surface 52.

[0049] As Figure 2 , Figure 4 and Figure 6 shown, the second side surface 54 and the third side surface 55 are separated from each other in the second direction x. The second side surface 54 and the third side surface 55 face opposite sides of each other in the second direction x and extend in the third direction y. The second side surface 54 and the third side surface 55 are connected to the top surface 51 and the bottom surface 52. As Figure 5 shown, the first lead 11, the second lead 12, the third lead 13, the two fourth leads 14, and the two fifth leads 15 protrude outward from the third side surface 55.

[0050] As Figure 1 and Figure 4 shown, a plurality of recesses 56 are recessed from the third side surface 55 in the second direction x and penetrate the encapsulating resin 50 in the first direction z. In the third direction y, the plurality of recesses 56 are respectively provided between the third lead 13 and a second detection terminal 15B described later, between the first lead 11 and the third lead 13, between the first lead 11 and the second lead 12, and between the second lead 12 and a first detection terminal 15A described later.

[0051] As Figure 4 and Figure 5 shown, the groove portion 57 is recessed from the bottom surface 52 in the first direction z and extends along the second direction x. Both sides of the groove portion 57 in the second direction x are connected to the second side surface 54 and the third side surface 55. When observed in the first direction z, the groove portion 57 demarcates the first back surface 101B of the first chip pad 101 and the second back surface 102B of the second chip pad 102.

[0052] As Figure 3 , Figure 7 and Figure 8As shown, a plurality of semiconductor elements 20 are respectively joined to the first chip pad 101 and the second chip pad 102. In the semiconductor device A10, the plurality of semiconductor elements 20 include two first semiconductor elements 201 and two second semiconductor elements 202. The two first semiconductor elements 201 are joined to the first main surface 101A of the first chip pad 101 and are arranged along the second direction x. The two second semiconductor elements 202 are joined to the second main surface 102A of the second chip pad 102 and are arranged along the second direction x. The plurality of semiconductor elements 20 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). In addition, the plurality of semiconductor elements 20 may also be switching elements such as IGBTs (Insulated Gate Bipolar Transistors), diodes. In the description of the semiconductor device A10, the plurality of semiconductor elements 20 are taken as n-channel type and vertical structure MOSFETs. The plurality of semiconductor elements 20 include a compound semiconductor substrate. The composition of this compound semiconductor substrate includes silicon carbide (SiC). As Figure 3 , Figure 10 and Figure 11 shown, the plurality of semiconductor elements 20 respectively have a first electrode 21, a second electrode 22, a third electrode 23, and two fourth electrodes 24.

[0053] As Figure 10 and Figure 11 shown, the first electrode 21 is located on the opposite side of the side facing either the first main surface 101A or the second main surface 102A in the first direction z. A current corresponding to the power converted by the semiconductor element 20 flows through the first electrode 21. That is, the first electrode 21 corresponds to the source electrode of the semiconductor element 20.

[0054] As Figure 10 and Figure 11 shown, the second electrode 22 faces either the first main surface 101A or the second main surface 102A. A current corresponding to the power before being converted by the semiconductor element 20 flows through the second electrode 22. That is, the second electrode 22 corresponds to the drain electrode of the semiconductor element 20.

[0055] As Figure 10 and Figure 11 shown, the third electrode 23 is located on the same side as the first electrode 21 in the first direction z. A gate voltage for driving the semiconductor element 20 is applied to the third electrode 23. When observed in the first direction z, the area of the third electrode 23 is smaller than the area of the first electrode 21.

[0056] As Figure 3As shown, the two fourth electrodes 24 are located on the same side as the first electrode 21 in the first direction z. The two fourth electrodes 24 are located on opposite sides of each other with the third electrode 23 as a reference in the second direction x. Voltages equal to the voltage applied to the first electrode 21 are applied to the two fourth electrodes 24 respectively.

[0057] As Figure 10 and Figure 11 As shown, the conductive bonding layers 29 are respectively located between the first main surface 101A of the first chip pad 101 and the two first semiconductor elements 201, and between the second main surface 102A of the second chip pad 102 and the two second semiconductor elements 202. The conductive bonding layer 29 is solder, for example. In addition, the conductive bonding layer 29 may also be sintered metal. The conductive bonding layer 29 conducts and bonds the second electrodes 22 of the first main surface 101A and the two first semiconductor elements 201 respectively. Thus, the second electrodes 22 of the two first semiconductor elements 201 are electrically connected to the first chip pad 101. Furthermore, the conductive bonding layer 29 conducts and bonds the second main surface 102A and the second electrodes 22 of the two second semiconductor elements 202 respectively. Thus, the second electrodes 22 of the two second semiconductor elements 202 are electrically connected to the second chip pad 102.

[0058] As Figure 2 and Figure 3 As shown, the first lead 11 is located on the side opposite to the second side surface 54 of the encapsulating resin 50 with the two chip pads 10 as a reference in the second direction x. The first lead 11 is separated from the two chip pads 10. The first lead 11 is electrically connected to the first electrodes 21 of the two first semiconductor elements 201. The first lead 11 is the N terminal (negative electrode) to which the DC power supply voltage that is the object of power conversion is applied.

[0059] As Figure 3 and Figure 9 As shown, the first lead 11 has a mounting portion 111 and a covering portion 112. The mounting portion 111 protrudes outward from the third side surface 55 of the encapsulating resin 50. The mounting portion 111 extends in the second direction x. The covering portion 112 is connected to the mounting portion 111. The covering portion 112 is covered by the encapsulating resin 50.

[0060] As Figure 3 and Figure 13 As shown, a second seat portion 113 is provided on the covering portion 112 of the first lead 11. The second seat portion 113 is recessed in the first direction z from the side where the first intermediate portion 313 of the first conduction member 31 to be described later is located in the first direction z.

[0061] As Figure 3As shown, the second lead 12 is connected to the first chip pad 101. Therefore, the second lead 12 is electrically connected to the second electrodes 22 of the two first semiconductor elements 201 via the first chip pad 101. The AC power converted by the plurality of semiconductor elements 20 is output from the second lead 12. The second lead 12 is located on the side opposite to the third lead 13 with respect to the first lead 11 and is beside the first lead 11. The second lead 12 has a mounting portion 121 and a covering portion 122. The mounting portion 121 protrudes outward from the third side surface 55 of the encapsulating resin 50. The mounting portion 121 extends in the second direction x. The covering portion 122 connects the mounting portion 121 and the first chip pad 101. The covering portion 122 is covered by the encapsulating resin 50. The covering portion 122 is bent in the first direction z toward the side approaching the first main surface 101A of the first chip pad 101.

[0062] As Figure 3 shown, the third lead 13 is connected to the second chip pad 102. Therefore, the third lead 13 is electrically connected to the second electrodes 22 of the two second semiconductor elements 202 via the second chip pad 102. The third lead 13 is a P terminal (positive electrode) to which the DC power supply voltage to be converted into power is applied. The third lead 13 is located on the side opposite to the second lead 12 with respect to the first lead 11 and is beside the first lead 11. The third lead 13 has a mounting portion 131 and a covering portion 132. The mounting portion 131 protrudes outward from the third side surface 55 of the encapsulating resin 50. The mounting portion 131 extends in the second direction x. The covering portion 132 connects the mounting portion 131 and the second chip pad 102. The covering portion 132 is covered by the encapsulating resin 50. The covering portion 132 is bent in the first direction z toward the side approaching the second main surface 102A of the second chip pad 102.

[0063] As Figure 2 and Figure 3 shown, the two fourth leads 14 are located on the side opposite to the second side surface 54 of the encapsulating resin 50 with respect to the two chip pads 10 in the second direction x. As Figure 3 shown, the two fourth leads 14 extend in the second direction x. The two fourth leads 14 sandwich the first lead 11, the second lead 12, the third lead 13, and the two fifth leads 15 in the third direction y. The two fourth leads 14 include a first gate terminal 14A and a second gate terminal 14B.

[0064] As Figure 3 shown, the two fourth leads 14 each have a mounting portion 141 and a covering portion 142. The mounting portion 141 protrudes outward from the third side surface 55 of the encapsulating resin 50. The mounting portion 141 extends in the second direction x. The covering portion 142 is connected to the mounting portion 141. The covering portion 142 is covered by the encapsulating resin 50.

[0065] As Figure 3 shown, the first gate terminal 14A is located closer to the first chip pad 101 than the second chip pad 102. The first gate terminal 14A is electrically connected to the third electrodes 23 of the two first semiconductor elements 201 respectively. A gate voltage for driving the two first semiconductor elements 201 is applied to the first gate terminal 14A.

[0066] As Figure 3 shown, the second gate terminal 14B is located closer to the second chip pad 102 than the first chip pad 101. The second gate terminal 14B is electrically connected to the third electrodes 23 of the two second semiconductor elements 202 respectively. A gate voltage for driving the two second semiconductor elements 202 is applied to the second gate terminal 14B.

[0067] As Figure 2 and Figure 3 shown, the two fifth leads 15 are located on the side opposite to the second side 54 of the encapsulation resin 50 with respect to the two chip pads 10 in the second direction x. As Figure 3 shown, the two fifth leads 15 extend in the second direction x. The two fifth leads 15 sandwich the first lead 11, the second lead 12, and the third lead 13 in the third direction y. The two fifth leads 15 include a first detection terminal 15A and a second detection terminal 15B.

[0068] As Figure 3 shown, the two fifth leads 15 each have a mounting portion 151 and a covering portion 152. The mounting portion 151 protrudes outward from the third side 55 of the encapsulation resin 50. The mounting portion 151 extends in the second direction x. The covering portion 152 is connected to the mounting portion 151. The covering portion 152 is covered by the encapsulation resin 50.

[0069] As Figure 2 and Figure 3 shown, the first detection terminal 15A is located between the second lead 12 and the first gate terminal 14A. The first detection terminal 15A is electrically connected to the two fourth electrodes 24 of the two first semiconductor elements 201 respectively. A voltage equal to the voltage applied to the first electrodes 21 of the two first semiconductor elements 201 is applied to the first detection terminal 15A.

[0070] As Figure 2 and Figure 3 shown, the second detection terminal 15B is located between the third lead 13 and the second gate terminal 14B. The second detection terminal 15B is electrically connected to the two fourth electrodes 24 of the two second semiconductor elements 202 respectively. A voltage equal to the voltage applied to the first electrodes 21 of the two second semiconductor elements 202 is applied to the second detection terminal 15B.

[0071] As Figure 5 shown, the heights h of the mounting portions 111 of the first lead 11, the mounting portions 121 of the second lead 12, and the mounting portions 131 of the third lead 13 are all equal. As Figure 6 shown, when viewed from the third direction y, any one of the mounting portions 141 of the two fourth leads 14 overlaps with the mounting portion 111 of the first lead 11, the mounting portion 121 of the second lead 12, and the mounting portion 131 of the third lead 13, respectively.

[0072] As Figure 3 and Figure 9 shown, the first conduction member 31 is conductively bonded to the first electrodes 21 of the two first semiconductor elements 201 and the second seat portion 113 of the first lead 11. Thus, the first lead 11 is electrically connected to the first electrodes 21 of the two first semiconductor elements 201 respectively. The first conduction member 31 contains copper or a copper alloy. The first conduction member 31 is a metal clip. The first conduction member 31 has two first joint portions 311, a second joint portion 312, and a first intermediate portion 313.

[0073] As Figure 3 and Figure 10 shown, the two first joint portions 311 are respectively conductively bonded to the first electrodes 21 of the two first semiconductor elements 201. The two first joint portions 311 are respectively two strands separated from each other in the second direction x. As Figure 3 shown, the two first joint portions 311 are separated from each other in the second direction x.

[0074] As Figure 3 and Figure 13 shown, the second joint portion 312 is conductively bonded to the second seat portion 113 of the first lead 11. The second joint portion 312 extends in the third direction y. At least a part of the second joint portion 312 is received in the second seat portion 113.

[0075] As Figures 7 to 10 shown, the semiconductor device A10 further includes a first conductive bonding layer 34. The first conductive bonding layer 34 conductively bonds the first electrodes 21 of the two first semiconductor elements 201 to the two first joint portions 311. The first conductive bonding layer 34 is, for example, solder. In addition, the first conductive bonding layer 34 may also be sintered metal.

[0076] As Figure 9 and Figure 13 shown, the semiconductor device A10 further includes a second conductive bonding layer 35. The second conductive bonding layer 35 conductively bonds the second seat portion 113 of the first lead 11 to the second joint portion 312. The second conductive bonding layer 35 is, for example, solder. In addition, the second conductive bonding layer 35 may also be sintered metal.

[0077] AsFigure 3 and Figure 8 As shown, the second conduction member 32 is conductively joined to the first electrodes 21 of the two second semiconductor elements 202 and the first seat portion 101C of the first chip pad 101. Thus, the first electrodes 21 of the two second semiconductor elements 202 are electrically connected to the first chip pad 101 and the second electrodes 22 of the two first semiconductor elements 201, respectively. The second conduction member 32 contains copper or a copper alloy. The second conduction member 32 is a metal clip. The second conduction member 32 has two third joint portions 321, a fourth joint portion 322, and a second intermediate portion 323.

[0078] As Figure 3 and Figure 11 shown, the two third joint portions 321 are respectively conductively joined to the first electrodes 21 of the two second semiconductor elements 202. The two third joint portions 321 are respectively two strands separated from each other in the second direction x. As Figure 3 shown, the two third joint portions 321 are separated from each other in the second direction x.

[0079] As Figure 3 and Figure 12 shown, the fourth joint portion 322 is conductively joined to the first seat portion 101C of the first chip pad 101. The fourth joint portion 322 extends in the second direction x. At least a part of the fourth joint portion 322 is received in the first seat portion 101C.

[0080] As Figure 3 shown, the second intermediate portion 323 connects the two third joint portions 321 and the fourth joint portion 322. The second intermediate portion 323 straddles between the first chip pad 101 and the second chip pad 102.

[0081] As Figure 7 , Figure 8 and Figure 11 shown, the semiconductor device A10 further includes a third conductive joint layer 36. The third conductive joint layer 36 conductively joins the first electrodes 21 of the two second semiconductor elements 202 and the two third joint portions 321. The third conductive joint layer 36 is, for example, solder. In addition, the third conductive joint layer 36 may also be sintered metal.

[0082] As Figure 8 and Figure 12 shown, the semiconductor device A10 further includes a fourth conductive joint layer 37. The fourth conductive joint layer 37 conductively joins the first seat portion 101C of the first chip pad 101 and the fourth joint portion 322. The fourth conductive joint layer 37 is, for example, solder. In addition, the fourth conductive joint layer 37 may also be sintered metal.

[0083] As Figure 3As shown, one of the two first wires 41 is conductively bonded to the third electrode 23 of the first semiconductor element 201 located at the position closest to the first gate terminal 14A among the two first semiconductor elements 201 and the covering portion 142 of the first gate terminal 14A. As Figure 3 shown, the other first wire 41 among the two first wires 41 is conductively bonded to the third electrode 23 of the second semiconductor element 202 located at the position closest to the second gate terminal 14B among the two second semiconductor elements 202 and the covering portion 142 of the second gate terminal 14B.

[0084] As Figure 3 shown, one of the two first relay wires 43 is conductively bonded to the third electrode 23 of one first semiconductor element 201 and the third electrode 23 of the other first semiconductor element 201. As Figure 3 shown, the other first relay wire 43 among the two first relay wires 43 is conductively bonded to the third electrode 23 of one second semiconductor element 202 and the third electrode 23 of the other second semiconductor element 202. Through the two first wires 41 and the two first relay wires 43, the first gate terminal 14A is electrically connected to the third electrodes 23 of the two first semiconductor elements 201 respectively. Also, the second gate terminal 14B is electrically connected to the third electrodes 23 of the two second semiconductor elements 202 respectively.

[0085] As Figure 3 shown, one of the two second wires 42 is conductively bonded to either one of the two fourth electrodes 24 of the first semiconductor element 201 located at the position closest to the first detection terminal 15A among the two first semiconductor elements 201 and the covering portion 152 of the first detection terminal 15A. As Figure 3 shown, the other second wire 42 among the two second wires 42 is conductively bonded to either one of the two fourth electrodes 24 of the second semiconductor element 202 located at the position closest to the second detection terminal 15B among the two second semiconductor elements 202 and the covering portion 152 of the second detection terminal 15B.

[0086] As Figure 3 shown, one of the two second relay wires 44 is conductively bonded to either one of the two fourth electrodes 24 of one first semiconductor element 201 and either one of the two fourth electrodes 24 of the other first semiconductor element 201. As Figure 3As shown, one of the two second relay wires 44 is conductively bonded to any one of the two fourth electrodes 24 of one second semiconductor element 202 and any one of the two fourth electrodes 24 of the other second semiconductor element 202. Through the two second wires 42 and the two second relay wires 44, the first detection terminal 15A is electrically connected to the two fourth electrodes 24 of each of the two first semiconductor elements 201. Also, the second detection terminal 15B is electrically connected to the two fourth electrodes 24 of each of the two second semiconductor elements 202.

[0087] As Figure 3 , Figure 7 and Figure 8 As shown, the two reinforcing materials 60 are respectively bonded to the first main surface 101A of the first chip pad 101 and the second main surface 102A of the second chip pad 102. The two reinforcing materials 60 are covered with the encapsulation resin 50. The coefficient of linear expansion of each of the two reinforcing materials 60 is smaller than that of the encapsulation resin 50. Preferably, the coefficient of linear expansion of each of the two reinforcing materials 60 is of the same degree as that of each of the plurality of semiconductor elements 20. The structures of the two reinforcing materials 60 in the semiconductor device A10 are the same as each other. Therefore, in the description of the semiconductor device A10, only the reinforcing material 60 bonded to the first main surface 101A among the two reinforcing materials 60 will be described.

[0088] As Figure 7 and Figure 8 As shown, since the reinforcing material 60 is bonded to the first main surface 101A of the first chip pad 101, the reinforcing material 60 is located on the same side as the two first semiconductor elements 201 with respect to the first chip pad 101 in the first direction z. As Figure 3 As shown, the reinforcing material 60 includes two first reinforcing materials 601. The two first reinforcing materials 601 are located on opposite sides of each other with respect to the two first semiconductor elements 201 in the third direction y. The two first reinforcing materials 601 extend respectively along the second direction x.

[0089] As Figure 14 As shown, when observed in the first direction z, the two first semiconductor elements 201 respectively have two first edges 20A. The two first edges 20A are separated from each other in the third direction y. The two first edges 20A extend respectively along the second direction x. The dimension L1 of each of the two first reinforcing materials 601 in the second direction x is larger than the dimension of each of the two first edges 20A. When observed in the first direction z, two first imaginary lines VL1 that respectively pass through both ends of any one of the two first edges 20A and extend along the third direction y intersect with the two first reinforcing materials 601 respectively.

[0090] As Figure 10As shown, the dimension T of the reinforcing material 60 in the first direction z is greater than the dimension t1 of each of the two first semiconductor elements 201 in the first direction z. Furthermore, as Figure 11 shown, the dimension T is greater than the dimension t2 of each of the two second semiconductor elements 202 in the first direction z.

[0091] As Figure 10 and Figure 11 shown, the reinforcing material 60 has an insulating layer 61 and a first metal layer 62. The first metal layer 62 is laminated on the insulating layer 61. A part of the encapsulating resin 50 is sandwiched between the insulating layer 61 and the first conduction member 31 in the first direction z. The thermal conductivity of the insulating layer 61 is higher than that of the encapsulating resin 50. As an example of the insulating layer 61, ceramics containing any one of alumina (Al 3 O 3 ) and aluminum nitride (AlN), or carbon fiber reinforced plastic (CFRP; Carbon Fiber Reinforced Plastics) can be cited. The first metal layer 62 contains, for example, copper or silver (Ag). The first metal layer 62 can be formed by forming a metal thin film on the insulating layer 61 by sputtering. The first metal layer 62 is joined to the first main surface 101A of the first chip pad 101 via a first bonding layer 63. The first bonding layer 63 is solder, for example.

[0092] In addition, the reinforcing material 60 may be made of metal. As an example of the metal, any one of iron (Fe), iron-nickel (Ni) alloy, and stainless steel (SUS) can be cited. In this case, the reinforcing material 60 is joined to the first main surface 101A of the first chip pad 101 via the first bonding layer 63.

[0093] Next, the operation and effect of the semiconductor device A10 will be described.

[0094] The semiconductor device A10 includes a first chip pad 101, a first semiconductor element 201 joined to the first chip pad 101, an encapsulating resin 50 covering the first semiconductor element 201, and a reinforcing material 60 joined to the first chip pad 101. The coefficient of linear expansion of the reinforcing material 60 is smaller than that of the encapsulating resin 50. By adopting this structure, when the first chip pad 101 thermally expands as the first semiconductor element 201 generates heat, the thermal expansion is restricted by the reinforcing material 60. Therefore, the thermal strain generated in the first chip pad 101 is reduced. As a result, the thermal stress generated at the boundary between the first chip pad 101 and the encapsulating resin 50 is reduced, and thus the thermal stress generated at the boundary between the first semiconductor element 201 and the encapsulating resin 50 is also reduced. Therefore, according to this structure, in the semiconductor device A10, the thermal stress generated at the boundary between the first semiconductor element 201 and the encapsulating resin 50 can be reduced.

[0095] The reinforcing material 60 is located on the same side as the first semiconductor element 201 with respect to the first chip pad 101 in the first direction z. By adopting this structure, an increase in the size of the semiconductor device A10 accompanied by the arrangement of the reinforcing material 60 can be suppressed.

[0096] The reinforcing material 60 includes a first reinforcing material 601 extending in the second direction x. The size L1 of the first reinforcing material 601 in the second direction x is larger than the size of the first edge 20A of the first semiconductor element 201. Here, the size of the first chip pad 101 in the second direction x is larger than the size of the first chip pad 101 in the third direction y. Therefore, the thermal strain generated in the first chip pad 101 is larger in the second direction x than in the third direction y. Therefore, by adopting this structure, the thermal strain in the second direction x generated in the first chip pad 101 can be reduced, and thus the thermal stress generated at the boundary between the first semiconductor element 201 and the encapsulating resin 50 can be effectively reduced.

[0097] Moreover, when observed in the first direction z, two first imaginary lines VL1 that respectively pass through both ends of the first edge 20A of the first semiconductor element 201 and extend in the third direction y intersect the first reinforcing material 601. By adopting this structure, the thermal stress generated at the bonding boundary between the first chip pad 101 and the first semiconductor element 201 can be reduced.

[0098] The size T of the reinforcing material 60 in the first direction z is larger than the size t1 of the first semiconductor element 201 in the first direction z. By adopting this structure, compared with the thermal stress at the bonding boundary between the first chip pad 101 and the first semiconductor element 201, the thermal stress at the bonding boundary between the first chip pad 101 and the reinforcing material 60 is more likely to concentrate. Thereby, the thermal stress at the bonding boundary between the first chip pad 101 and the first semiconductor element 201 can be effectively reduced.

[0099] A first seat portion 101C recessed from the first main surface 101A is provided in the first chip pad 101. A part of the second conduction member 32 is received in the first seat portion 101C. By adopting this structure, when the second conduction member 32 is conductively bonded to the second semiconductor element 202 and the first chip pad 101, the rotation of the second conduction member 32 about the first direction z is restricted by the first seat portion 101C. Thereby, the positional deviation of the second conduction member 32 with respect to the second semiconductor element 202 can be suppressed.

[0100] The second seat portion 113 that is recessed in the first direction z from the side where the first intermediate portion 313 of the first conduction member 31 is located is provided on the first lead 11. A part of the second joint portion 312 of the first conduction member 31 is received in the second seat portion 113. By adopting this structure, when the first conduction member 31 is conductively joined to the first semiconductor element 201 and the first lead 11, the rotation of the first conduction member 31 about the first direction z is restricted by the second seat portion 113. Thereby, the positional deviation of the first conduction member 31 with respect to the first semiconductor element 201 and the pillow member 33 can be suppressed.

[0101] The second lead 12 is connected to the first chip pad 101. The third lead 13 is connected to the second chip pad 102. By adopting this structure, the size expansion of the semiconductor device A10 can be suppressed, and the first chip pad 101 and the second chip pad 102 can be used as conductive paths of the semiconductor device A10.

[0102] The first back surface 101B of the first chip pad 101 and the second back surface 102B of the second chip pad 102 are exposed from the encapsulating resin 50. By adopting this structure, the heat dissipation performance of the semiconductor device A10 can be improved.

[0103] The encapsulating resin 50 has a plurality of recesses 56 that are recessed in the second direction x from the third side surface 55. By adopting this structure, the creepage distance of the encapsulating resin 50 between two adjacent leads among the first lead 11, the second lead 12, and the third lead 13 is ensured to be longer. Thereby, the breakdown voltage of the semiconductor device A10 can be improved.

[0104] The encapsulating resin 50 has a groove portion 57 that is recessed from the bottom surface 52. When observed in the first direction z, the groove portion 57 demarcates the first back surface 101B of the first chip pad 101 and the second back surface 102B of the second chip pad 102. By adopting this structure, the creepage distance of the encapsulating resin 50 between the first chip pad 101 and the second chip pad 102 can be ensured to be longer. Thereby, the breakdown voltage of the semiconductor device A10 can be further improved. Furthermore, the thermal strain of the encapsulating resin 50 in the third direction y is dispersed. Thereby, the concentration of thermal strain on the two first side surfaces 53 of the encapsulating resin 50 can be alleviated.

[0105] Second Embodiment:

[0106] Based on Figure 15 and Figure 16 , the semiconductor device A20 of the second embodiment of the present disclosure will be described. In this figure, the same or similar elements of the above semiconductor device A10 are denoted by the same reference numerals, and repeated descriptions are omitted. Here, for the sake of easy understanding, Figure 15Through the first conduction member 31, the second conduction member 32, and the encapsulating resin 50. In Figure 15 The first conduction member 31, the second conduction member 32, and the encapsulating resin 50 that pass through are represented by phantom lines.

[0107] In the semiconductor device A20, the structures of the two reinforcing materials 60 are different from those of the semiconductor device A10. The structures of the two reinforcing materials 60 in the semiconductor device A20 are the same as each other. Therefore, in the description of the semiconductor device A20, only the reinforcing material 60 that is joined to the first main surface 101A of the first chip pad 101 among the two reinforcing materials 60 will be described.

[0108] As Figure 15 shown, the reinforcing material 60 includes two second reinforcing materials 602 instead of two first reinforcing materials 601. The two second reinforcing materials 602 are located on opposite sides of each other with respect to the two first semiconductor elements 201 as a reference in the second direction x. The two first reinforcing materials 601 extend along the third direction y respectively.

[0109] As Figure 16 shown, when viewed in the first direction z, the two first semiconductor elements 201 each have two second edges 20B. The two second edges 20B are separated from each other in the second direction x. The two second edges 20B extend along the third direction y respectively. The dimension L2 of each of the two second reinforcing materials 602 in the third direction y is larger than the dimension of each of the two second edges 20B. When viewed in the first direction z, two second phantom lines VL2 that respectively pass through both ends of any one of the two second edges 20B and extend in the second direction x intersect the two second reinforcing materials 602 respectively.

[0110] Next, the operation and effect of the semiconductor device A20 will be described.

[0111] The semiconductor device A20 includes a first chip pad 101, a first semiconductor element 201 joined to the first chip pad 101, an encapsulating resin 50 covering the first semiconductor element 201, and a reinforcing material 60 joined to the first chip pad 101. The coefficient of linear expansion of the reinforcing material 60 is smaller than the coefficient of linear expansion of the encapsulating resin 50. Therefore, according to this structure, in the semiconductor device A20, it is also possible to reduce the thermal stress generated at the boundary between the first semiconductor element 201 and the encapsulating resin 50. Furthermore, in the semiconductor device A20, there is a structure common to the semiconductor device A10, and thus it exhibits the same operation and effect as the semiconductor device A10.

[0112] In the semiconductor device A20, the reinforcing material 60 includes a second reinforcing material 602 extending in the third direction y. The dimension L2 of the second reinforcing material 602 in the third direction y is greater than the dimension of the second edge 20B of the first semiconductor element 201. Here, the dimension of the encapsulation resin 50 in the third direction y is greater than the dimension of the encapsulation resin 50 in the second direction x. Therefore, due to the thermal stress generated at the boundary between the first chip pad 101 and the encapsulation resin 50, a greater thermal strain in the third direction y than in the second direction x is generated in the encapsulation resin 50. Therefore, by adopting this structure, the thermal strain in the third direction y generated at the first chip pad 101 can be reduced, and thus the thermal strain generated in the encapsulation resin 50 can be effectively reduced.

[0113] Third Embodiment:

[0114] Based on Figure 17 and Figure 18 , the semiconductor device A30 of the third embodiment of the present disclosure will be described. In this figure, the same reference numerals are assigned to the same or similar elements as those in the semiconductor device A10 and the semiconductor device A20 described above, and the repeated description is omitted. Here, for the sake of easy understanding, Figure 17 through the first conduction member 31, the second conduction member 32, and the encapsulation resin 50. In Figure 17 , the first conduction member 31, the second conduction member 32, and the encapsulation resin 50 that are passed through are represented by phantom lines.

[0115] In the semiconductor device A30, the structure of the two reinforcing materials 60 is different from that of the semiconductor device A10. The structures of the two reinforcing materials 60 in the semiconductor device A30 are the same as each other. Therefore, in the description of the semiconductor device A30, only the reinforcing material 60 that is joined to the first main surface 101A of the first chip pad 101 among the two reinforcing materials 60 will be described.

[0116] As Figure 17 and Figure 18 shown, the reinforcing material 60 does not include two first reinforcing materials 601 and two second reinforcing materials 602, but is a single component. When observed in the first direction z, the reinforcing material 60 surrounds the two first semiconductor elements 201.

[0117] Next, the operation and effect of the semiconductor device A30 will be described.

[0118] The semiconductor device A30 includes a first chip pad 101, a first semiconductor element 201 bonded to the first chip pad 101, a sealing resin 50 covering the first semiconductor element 201, and a reinforcing material 60 bonded to the first chip pad 101. The coefficient of linear expansion of the reinforcing material 60 is smaller than that of the sealing resin 50. Therefore, according to this structure, in the semiconductor device A30, it is also possible to reduce the thermal stress generated at the boundary between the first semiconductor element 201 and the sealing resin 50. Furthermore, in the semiconductor device A30, a structure common to the semiconductor device A10 is provided, thereby achieving the same effect as the semiconductor device A10.

[0119] In the semiconductor device A30, when observed in the first direction z, the reinforcing material 60 surrounds the first semiconductor element 201. By adopting this structure, it is possible to reduce the thermal strain in each of the second direction x and the third direction y generated in the first chip pad 101. Thereby, it is possible to suppress the deviation of the distribution of the thermal strain in the first chip pad 101. Furthermore, since the reduction of the thermal strain generated in the first chip pad 101 occurs around the first semiconductor element 201, it is possible to more effectively reduce the thermal stress generated at the bonding boundary between the first chip pad 101 and the first semiconductor element 201.

[0120] Fourth Embodiment:

[0121] Based on Figure 19 and Figure 20 , the semiconductor device A40 of the fourth embodiment of the present disclosure will be described. In this figure, the same reference numerals are assigned to the same or similar elements as those in the above-mentioned semiconductor device A10 and semiconductor device A20, and the repeated description is omitted. Here, for the sake of easy understanding, Figure 19 through the first conduction member 31, the second conduction member 32, and the sealing resin 50. In Figure 19 , the first conduction member 31, the second conduction member 32, and the sealing resin 50 that are passed through are represented by phantom lines.

[0122] In the semiconductor device A40, the structures of the two reinforcing materials 60 are different from those of the semiconductor device A10. The structures of the two reinforcing materials 60 in the semiconductor device A40 are the same as each other. Therefore, in the description of the semiconductor device A40, only the reinforcing material 60 that is bonded to the first main surface 101A of the first chip pad 101 among the two reinforcing materials 60 will be described.

[0123] As Figure 19 shown, the reinforcing material 60 includes two first reinforcing materials 601 and two second reinforcing materials 602. The two second reinforcing materials 602 are separated from both of the two second reinforcing materials 602.

[0124] AsFigure 20 As shown, the dimension L1 of each of the two first reinforcing materials 601 in the second direction x is greater than the dimension of each of the two first edges 20A of the first semiconductor element 201. When observing in the first direction z, two first imaginary lines VL1 that respectively pass through both ends of any one of the two first edges 20A and extend in the third direction y intersect the two first reinforcing materials 601 respectively.

[0125] As Figure 20 shown, the dimension L2 of each of the two second reinforcing materials 602 in the third direction y is greater than the dimension of each of the two second edges 20B of the first semiconductor element 201. When observing in the first direction z, two second imaginary lines VL2 that respectively pass through both ends of any one of the two second edges 20B and extend in the second direction x intersect the two second reinforcing materials 602 respectively.

[0126] Next, the operation and effect of the semiconductor device A40 will be described.

[0127] The semiconductor device A40 includes a first chip pad 101, a first semiconductor element 201 bonded to the first chip pad 101, a sealing resin 50 covering the first semiconductor element 201, and a reinforcing material 60 bonded to the first chip pad 101. The coefficient of linear expansion of the reinforcing material 60 is smaller than that of the sealing resin 50. Therefore, according to this structure, in the semiconductor device A40, it is also possible to reduce the thermal stress generated at the boundary between the first semiconductor element 201 and the sealing resin 50. Furthermore, in the semiconductor device A40, it has a structure common to the semiconductor device A10, thus achieving the same operation and effect as the semiconductor device A10.

[0128] In the semiconductor device A40, the reinforcing material 60 includes a first reinforcing material 601 extending in the second direction x and a second reinforcing material 602 extending in the third direction y. The dimension L1 of the first reinforcing material 601 in the second direction x is greater than the dimension of the first edge 20A of the first semiconductor element 201. The dimension L2 of the second reinforcing material 602 in the third direction y is greater than the dimension of the second edge 20B of the first semiconductor element 201. By adopting this structure, it is possible to reduce the thermal strain in each of the second direction x and the third direction y generated in the first chip pad 101. Thereby, it is possible to suppress the deviation of the distribution of the thermal strain in the first chip pad 101. And, the first reinforcing material 601 and the second reinforcing material 602 are separated from each other. Therefore, in the semiconductor device A40, compared with the case of the semiconductor device A30, the degree of freedom in the arrangement of the reinforcing material 60 with respect to the first chip pad 101 is increased.

[0129] Fifth Embodiment:

[0130] Based on Figures 21 to 24, the semiconductor device A50 of the fifth embodiment of the present disclosure will be described. In this figure, the same reference numerals are assigned to the same or similar elements as those of the semiconductor device A10 described above, and redundant descriptions are omitted. Here, for the sake of easy understanding, Figure 21 Through the encapsulation resin 50. In Figure 21 , the penetrated encapsulation resin 50 is represented by a phantom line.

[0131] In the semiconductor device A50, the reinforcing material 60 that is joined to the first chip pad 101 among the two reinforcing materials 60 and the structure of the first conduction member 31 are different from those of the semiconductor device A10.

[0132] As Figure 24 shown, the reinforcing material 60 has a second metal layer 64. The second metal layer 64 is located on the side opposite to the first metal layer 62 with respect to the insulating layer 61. The second metal layer 64 is laminated on the insulating layer 61. The second metal layer 64 contains, for example, copper or silver. The second metal layer 64 can be formed by forming a metal thin film on the insulating layer 61 by sputtering. In addition, the reinforcing material 60 can be obtained from a DBC (Direct Bonded Copper) substrate.

[0133] As Figure 21 and Figure 22 shown, the first intermediate portion 313 of the first conduction member 31 includes a first portion 313A and a second portion 313B. The first portion 313A and the second portion 313B are separated from each other. The first portion 313A is connected to the two first joint portions 311 of the first conduction member 31. The second portion 313B is connected to the second joint portion 312 of the first conduction member 31.

[0134] As Figure 23 and Figure 24 shown, the first conduction member 31 has a bent portion 314. The bent portion 314 connects the first portion 313A and the second portion 313B. The bent portion 314 protrudes from the first portion 313A and the second portion 313B toward the second metal layer 64 of the reinforcing material 60. The second metal layer 64 is joined to the bent portion 314 via a second joining layer 65. The second joining layer 65 is, for example, solder.

[0135] Next, the operation and effect of the semiconductor device A50 will be described.

[0136] The semiconductor device A50 includes a first chip pad 101, a first semiconductor element 201 bonded to the first chip pad 101, a sealing resin 50 covering the first semiconductor element 201, and a reinforcing material 60 bonded to the first chip pad 101. The coefficient of linear expansion of the reinforcing material 60 is smaller than that of the sealing resin 50. Therefore, according to this structure, in the semiconductor device A50, it is also possible to reduce the thermal stress generated at the boundary between the first semiconductor element 201 and the sealing resin 50. Furthermore, in the semiconductor device A50, a structure common to the semiconductor device A10 is provided, thereby achieving the same effect as the semiconductor device A10.

[0137] In the semiconductor device A50, the reinforcing material 60 has a second metal layer 64 that is located on the side opposite to the first metal layer 62 with respect to the insulating layer 61 and laminated on the insulating layer 61. The second metal layer 64 is bonded to the first conduction member 31. By adopting this structure, the heat conducted from the first semiconductor element 201 to the first conduction member 31 can be conducted to the first chip pad 101 via the reinforcing material 60. Thereby, it is possible to improve the heat dissipation efficiency of the semiconductor device A50 and allow a larger current to flow through the first conduction member 31. In this case, in order to conduct heat from the first conduction member 31 to the first chip pad 101 more rapidly, it is preferable that the thermal conductivity of the insulating layer 61 is higher than that of the sealing resin 50.

[0138] The present disclosure is not limited to the above-described embodiments. The specific structures of the respective parts of the present disclosure can be freely modified in various ways.

[0139] The present disclosure includes the embodiments described in the following appendices.

[0140] Appendix 1.

[0141] A semiconductor device, comprising:

[0142] A first chip pad;

[0143] A first semiconductor element bonded to the first chip pad;

[0144] A sealing resin covering the first semiconductor element; and

[0145] A reinforcing material bonded to the first chip pad,

[0146] wherein the coefficient of linear expansion of the reinforcing material is smaller than that of the sealing resin.

[0147] Appendix 2. The semiconductor device according to Appendix 1, wherein

[0148] the reinforcing material is covered by the sealing resin.

[0149] Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein,

[0150] the reinforcing material is located on the same side as the first semiconductor element with respect to the first chip pad in the first direction.

[0151] Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein,

[0152] when observed in the first direction, the first semiconductor element has a first edge extending in a second direction orthogonal to the first direction,

[0153] the dimension of the reinforcing material in the second direction is larger than the dimension of the first edge.

[0154] Supplementary Note 5. The semiconductor device according to Supplementary Note 4, wherein,

[0155] when observed in the first direction, two imaginary lines respectively passing through both ends of the first edge and extending in a third direction orthogonal to the first direction and the second direction respectively intersect the reinforcing material.

[0156] Supplementary Note 6. The semiconductor device according to Supplementary Note 5, wherein,

[0157] the dimension of the first chip pad in the second direction is larger than the dimension of the first chip pad in the third direction.

[0158] Supplementary Note 7. The semiconductor device according to Supplementary Note 5, wherein,

[0159] when observed in the first direction, the reinforcing material surrounds the first semiconductor element.

[0160] Supplementary Note 8. The semiconductor device according to any one of Supplementary Notes 4 to 7, wherein,

[0161] the dimension of the reinforcing material in the first direction is larger than the dimension of the first semiconductor element in the first direction.

[0162] Supplementary Note 9. The semiconductor device according to Supplementary Note 4, further comprising:

[0163] a first lead that separates from the first chip pad; and

[0164] a first conductive member that is conductively bonded to the first semiconductor element and the first lead respectively,

[0165] the first conductive member is covered by the encapsulating resin.

[0166] Supplementary Note 10. The semiconductor device according to Supplementary Note 9, wherein,

[0167] The reinforcing material has an insulating layer and a first metal layer laminated on the insulating layer.

[0168] The first metal layer is joined to the first chip pad.

[0169] Note 11. The semiconductor device according to Note 10, wherein

[0170] A part of the encapsulating resin is sandwiched between the insulating layer and the first conducting member in the first direction.

[0171] Note 12. The semiconductor device according to Note 10, wherein

[0172] The reinforcing material has a second metal layer located on the side opposite to the first metal layer with respect to the insulating layer and laminated on the insulating layer.

[0173] The second metal layer is joined to the first conducting member.

[0174] Note 13. The semiconductor device according to Note 12, wherein

[0175] The thermal conductivity of the insulating layer is higher than that of the encapsulating resin.

[0176] Note 14. The semiconductor device according to Note 9, wherein

[0177] The reinforcing material is made of metal.

[0178] Note 15. The semiconductor device according to any one of Notes 9 to 14, wherein

[0179] The first semiconductor element is electrically joined to the first chip pad.

[0180] The first chip pad has a first back surface facing the side opposite to the first semiconductor element in the first direction.

[0181] The first back surface is exposed from the encapsulating resin.

[0182] Note 16. The semiconductor device according to Note 15, further comprising:

[0183] A second chip pad;

[0184] A second semiconductor element electrically joined to the second chip pad; and

[0185] A second conducting member electrically joined to the second semiconductor element and the first chip pad, respectively.

[0186] The second semiconductor element and the second conduction member are covered by the encapsulating resin.

[0187] The second chip pad has a second back surface facing the side opposite to the first semiconductor element in the first direction.

[0188] The second back surface is exposed from the encapsulating resin.

[0189] Supplementary Note 17. The semiconductor device according to Supplementary Note 16 further includes:

[0190] A second lead wire connected to the first chip pad; and

[0191] A third lead wire connected to the second chip pad,

[0192] The third lead wire is located on the side opposite to the second lead wire with respect to the first lead wire.

[0193] A part of each of the first lead wire, the second lead wire, and the third lead wire protrudes from the encapsulating resin to the outside.

[0194] Symbol Explanation

[0195] A10, A20, A30, A40, A50 - semiconductor devices, 101 - first chip pad, 101A - first main surface, 101B - first back surface, 101C - first seat portion, 102 - second chip pad, 102A - second main surface, 102B - second back surface, 11 - first lead, 111 - mounting portion, 112 - covering portion, 113 - second seat portion, 12 - second lead, 121 - mounting portion, 122 - covering portion, 13 - third lead, 131 - mounting portion, 132 - covering portion, 14 - fourth lead, 14A - first gate terminal, 14B - second gate terminal, 141 - mounting portion, 142 - covering portion, 15 - fifth lead, 15A - first detection terminal, 15B - second detection terminal, 151 - mounting portion, 152 - covering portion, 20 - semiconductor element, 201 - first semiconductor element, 202 - second semiconductor element, 20A - first edge, 20B - second edge, 21 - first electrode, 22 - second electrode, 23 - gate electrode, 24 - detection electrode, 29 - conductive bonding layer, 31 - first conduction member, 311 - first joint portion, 312 - second joint portion, 313 - first intermediate portion, 313A - first part, 313B - second part, 314 - bending portion, 32 - second conduction member, 321 - third joint portion, 322 - fourth joint portion, 323 - second intermediate portion, 34 - first conductive bonding layer, 35 - second conductive bonding layer, 36 - third conductive bonding layer, 37 - fourth conductive bonding layer, 41 - first wire, 42 - second wire, 43 - first relay wire, 44 - second relay wire, 50 - encapsulating resin, 51 - top surface, 52 - bottom surface, 53 - first side surface, 54 - second side surface, 55 - third side surface, 56 - recess, 57 - groove, 60 - reinforcing material, 601 - first reinforcing material, 602 - second reinforcing material, 61 - insulating layer, 62 - first metal layer, 63 - first bonding layer, 64 - second metal layer, z - first direction, x - second direction, y - third direction.

Claims

1. A semiconductor device, characterized in that, it includes: a first chip pad; a first semiconductor element bonded to the first chip pad; a sealing resin covering the first semiconductor element; and a reinforcing material bonded to the first chip pad, wherein the coefficient of linear expansion of the reinforcing material is smaller than that of the sealing resin.

2. The semiconductor device according to claim 1, characterized in that, the reinforcing material is covered by the sealing resin.

3. The semiconductor device according to claim 2, characterized in that, in a first direction, the reinforcing material is located on the same side as the first semiconductor element with respect to the first chip pad.

4. The semiconductor device according to claim 3, characterized in that, when observed in the first direction, the first semiconductor element has a first edge extending in a second direction orthogonal to the first direction, and the dimension of the reinforcing material in the second direction is larger than the dimension of the first edge.

5. The semiconductor device according to claim 4, characterized in that, when observed in the first direction, two imaginary lines respectively passing through both ends of the first edge and extending in a third direction orthogonal to the first direction and the second direction respectively intersect the reinforcing material.

6. The semiconductor device according to claim 5, characterized in that, the dimension of the first chip pad in the second direction is larger than the dimension of the first chip pad in the third direction.

7. The semiconductor device according to claim 5, characterized in that, when observed in the first direction, the reinforcing material surrounds the first semiconductor element.

8. The semiconductor device according to any one of claims 4 to 7, characterized in that, the dimension of the reinforcing material in the first direction is larger than the dimension of the first semiconductor element in the first direction.

9. The semiconductor device according to claim 4, characterized in that, it further includes: a first lead leaving the first chip pad; and a first conduction component electrically bonded to the first semiconductor element and the first lead respectively, wherein the first conduction component is covered by the sealing resin.

10. The semiconductor device according to claim 9, characterized in that, the reinforcing material has an insulating layer and a first metal layer laminated on the insulating layer, and the first metal layer is bonded to the first chip pad.

11. The semiconductor device according to claim 10, characterized in that, a part of the sealing resin is sandwiched between the insulating layer and the first conduction component in the first direction.

12. The semiconductor device according to claim 10, characterized in that, the reinforcing material has a second metal layer located on the side opposite to the first metal layer with respect to the insulating layer and laminated on the insulating layer, and the second metal layer is bonded to the first conduction component.

13. The semiconductor device according to claim 12, characterized in that, the thermal conductivity of the insulating layer is higher than that of the sealing resin.

14. The semiconductor device according to claim 9, characterized in that, The reinforcing material is made of metal.

15. The semiconductor device according to any one of claims 9 to 14, wherein, the first semiconductor element is electrically connected to the first chip pad, the first chip pad has a first back surface facing the side opposite to the first semiconductor element in the first direction, the first back surface is exposed from the encapsulating resin.

16. The semiconductor device according to claim 15, wherein, further comprising: a second chip pad; a second semiconductor element electrically connected to the second chip pad; and a second conduction component electrically connected to the second semiconductor element and the first chip pad respectively, the second semiconductor element and the second conduction component are covered by the encapsulating resin, the second chip pad has a second back surface facing the side opposite to the first semiconductor element in the first direction, the second back surface is exposed from the encapsulating resin.

17. The semiconductor device according to claim 16, wherein, further comprising: a second lead connected to the first chip pad; and a third lead connected to the second chip pad, the third lead is located on the side opposite to the second lead with respect to the first lead, a part of each of the first lead, the second lead, and the third lead protrudes from the encapsulating resin to the outside.

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