Power converter circuit

Abstract

A switched capacitor power converter circuit comprising: a first converter segment; a second converter segment; and a control circuit, wherein the control circuit is configured to selectively activate the second converter segment based on an operating parameter indicative of a load current that the switched capacitor power converter circuit needs to support.

Description

Technical Field

[0001] The present disclosure relates to a power converter circuit. Background Art

[0002] Mobile devices such as laptop computers and tablet computers typically use a battery pack composed of multiple single batteries coupled in series, such as a 2S battery pack (including two batteries connected in series) or a 3S battery pack (including three batteries connected in series). Such battery packs can supply relatively high voltages and currents, but a single load or subsystem of the host device (e.g., a processor subsystem, a display subsystem, etc.) typically does not require the full supply voltage that the battery pack can supply. For example, a typical 3S battery pack of a laptop computer may have a nominal output voltage between 10.8V and 12.3V, while the processor subsystem of the laptop computer may only require a supply voltage of 1V. Therefore, a power converter circuit is needed to step down the supply voltage of the battery pack to a lower voltage suitable for the load or subsystem of the host device.

[0003] In one approach, as Figure 1a shown, the host device 100a may include a battery pack 110 and separate buck converters (or other inductive converters) 120-1 to 120-n for each of the multiple subsystems or loads 130-1 to 130-n of the host device 100a. Each buck converter 110-1 to 110-n is configured to step down the battery output voltage VBatt in a single step (e.g., from 10.8V to 1V) to generate corresponding supply voltages VSup1 to VSupn for the associated subsystems or loads 120-1 to 120-n.

[0004] Such converters typically require large inductors and large capacitors, which may make them unsuitable for use in small devices and may also have high power consumption when waking up from the sleep mode.

[0005] In an alternative approach, as Figure 1bAs shown, the host device 100b includes multiple stages. The first stage includes a buck converter 130 configured to step down the battery output voltage VBatt to an intermediate voltage VInt (e.g., from a battery output voltage VBatt of 10.8V to an intermediate voltage of 3.6V), and the second stage includes separate power management integrated circuits (e.g., implementing a DC-DC switching regulator) 150-1 to 150-n for each of the multiple subsystems or loads 130-1 to 130-n of the host device 100b. Each instance of the power management integrated circuit is configured to step down the intermediate voltage VInt to the respective lower supply voltages VSup1 to VSupn required by the associated subsystems or loads 130-1 to 130-n of the host device 100b (e.g., from an intermediate voltage VInt of 3.6V to a supply voltage VSup1 of 1V).

[0006] Compared with the buck converter method described above, this multi-stage method can improve power efficiency because the second stage can use an efficient converter. However, each instance of the power management integrated circuit used in the second stage may require one or more inductors, which may lead to an increase in cost. Additionally, the buck converter in the first stage still requires a relatively large inductor. SUMMARY OF THE INVENTION

[0007] According to a first aspect, the present invention provides a switched capacitor power converter circuit, the switched capacitor power converter circuit comprising:

[0008] A first converter segment;

[0009] A second converter segment; and

[0010] Control circuitry, wherein the control circuitry is configured to selectively activate the second converter segment based on an operating parameter indicative of the load current that the switched capacitor power converter circuit needs to support.

[0011] Each of the first converter segment and the second converter segment may include:

[0012] A switch network including a plurality of switches;

[0013] A first contact for coupling the switch network to a flying capacitor; and

[0014] A second contact for coupling the switch network to an output capacitor of the switched capacitor power converter circuit.

[0015] The operating parameter may be the switching frequency of the switch network of the first converter segment.

[0016] The control circuit can be configured to: activate the second converter circuit if the switching frequency is equal to or less than a first switching frequency threshold.

[0017] The first switching frequency threshold can be configured to prevent the switching network from switching at a switching frequency in the audio band.

[0018] The first switching frequency threshold can be configured to maintain the switching frequency equal to or greater than 25 kHz.

[0019] The control circuit can be configured to: deactivate the second converter circuit if the switching frequency is equal to or greater than a second switching frequency threshold.

[0020] The first converter segment can be configured to receive a first clock signal for controlling the switching frequency of the switching network of the first converter segment.

[0021] The second converter segment can be configured to receive a second clock signal for controlling the switching frequency of the switching network of the second converter segment.

[0022] The control circuit can be configured to disable the second clock signal to deactivate the second converter segment and enable the second clock signal to activate the second converter segment.

[0023] The control circuit can be operable to control the switching frequency of the switching network of the first converter segment and / or the second converter segment based on the output voltage of the power converter circuit or the ratio of the input voltage to the output voltage of the power converter circuit.

[0024] If the output voltage of the power converter circuit meets a first predefined threshold, the control circuit can be operable to increase the switching frequency.

[0025] The control circuit can be operable to activate the first converter segment and the second converter segment when the output voltage of the power converter circuit meets or drops below a second predefined threshold.

[0026] The control circuit can be operable to deactivate the second converter segment when the output voltage of the power converter subsequently exceeds the second predefined threshold and the switching frequency is equal to or less than the second switching frequency threshold.

[0027] The control circuit can be operable to adjust the effective on-resistance of one or more of the plurality of switches of the switching network of the first converter segment and / or the second converter segment.

[0028] The first converter segment and the second converter segment can be coupled in parallel.

[0029] The first converter segment and the second converter segment can have different switching frequency to output impedance characteristics.

[0030] A switched capacitor power converter circuit can implement a converter stage of a multi-stage power converter architecture.

[0031] According to a second aspect, the present invention provides an integrated circuit including the switched capacitor power converter circuit according to the first aspect.

[0032] According to a third aspect, the present invention provides a host device including the switched capacitor power converter circuit according to the first aspect.

[0033] The host device may include a laptop, notebook, netbook or tablet computer, a gaming device, a game console, a controller for a game console, a virtual reality (VR) or augmented reality (AR) device, a mobile phone, a portable audio player, a portable device, an accessory device used with a laptop, notebook, netbook or tablet computer, a gaming device, a game console, a VR or AR device, a mobile phone, a portable audio player or other portable device.

[0034] According to a fourth aspect, the present invention provides a switched capacitor power converter circuit including:

[0035] a plurality of converter segments; and

[0036] a control circuit,

[0037] wherein a first converter segment among the plurality of converter segments is always active, and wherein the control circuit is configured to selectively activate or deactivate other converter segments among the plurality of converter segments based on the switching frequency of the first converter segment.

[0038] According to a fifth aspect, the present invention provides a switched capacitor power converter circuit for powering a load, the switched capacitor power converter circuit including a plurality of converter segments and a control circuit, wherein the control circuit is configured to activate all of the converter segments among the plurality of converter segments in response to detecting a load step condition.

[0039] According to a sixth aspect, the present invention provides the switched capacitor power converter circuit according to claim 21, wherein the control circuit includes a comparator circuit configured to compare an output voltage of the switched capacitor power converter circuit with a load step voltage threshold, and output a signal indicating that a load step condition is detected when the output voltage is equal to or less than the load step threshold voltage.

[0040] According to a seventh aspect, the present invention provides a switched-capacitor power converter circuit, the switched-capacitor power converter circuit including a plurality of converter segments, each converter segment having a different load current capacity for a given switching frequency, wherein the switched-capacitor power converter circuit is operable to activate one or more of the converter segments based on the current demand of a load coupled to the switched-capacitor power converter circuit.

[0041] According to an eighth aspect, the present invention provides a power converter integrated circuit (IC) for providing a supply voltage to a load, the power converter IC including a plurality of individual switched-capacitor power converter segments, each switched-capacitor power converter segment including a switching network configured to be coupled to a respective flying capacitor and a common output capacitor.

[0042] The power converter IC may further include control circuitry for controlling the operation of the switching network of the switched-capacitor power converter segment.

[0043] The control circuitry may be configured to selectively activate one or more of the plurality of individual switched-capacitor power converter segments based on the switching frequency of the active power converter segments among the plurality of individual switched-capacitor power converter segments.

[0044] The control circuitry may be configured to activate all of the switched-capacitor power converter segments of the plurality of individual switched-capacitor power converter segments in response to determining that the output voltage of the power converter IC is equal to or less than a load step threshold voltage.

[0045] According to a ninth aspect, the present invention provides a power converter system for providing a supply voltage to a load, the power converter system including:

[0046] A primary power converter IC including a first plurality of switched-capacitor power converter segments; and

[0047] A secondary power converter IC including a second plurality of switched-capacitor power converter segments, the secondary power converter IC being coupled to the primary power converter IC,

[0048] wherein the primary power converter IC is configured to control the operation of the switched-capacitor power converter segments of the primary power converter IC and the secondary power converter IC.

[0049] The primary power converter IC may include control circuitry operable to selectively activate the switched-capacitor converter segments of the primary power converter IC and the secondary power converter IC based on the switching frequency of the active switched-capacitor converter segments.

[0050] The primary power converter IC may include a control circuit operable to activate all switched-capacitor converter segments of a first power converter IC and a second power converter IC in response to determining that an output voltage of the power converter system is equal to or less than a load step threshold voltage.

[0051] According to a tenth aspect, the present invention provides a power converter system for providing a supply voltage to a load, the power converter system comprising:

[0052] A first power converter IC including a first plurality of switched-capacitor power converter segments; and

[0053] A second power converter IC including a second plurality of switched-capacitor power converter segments, the second power converter IC being coupled to the first power converter IC,

[0054] A control circuit configured to control the operation of the switched-capacitor power converter segments of the first power converter IC and the second power converter IC.

[0055] The control circuit may be provided in the first power converter IC and / or the second power converter IC.

[0056] According to an eleventh aspect, the present invention provides a power converter system comprising:

[0057] A first converter stage configured to receive a supply voltage and output an intermediate voltage; and

[0058] A second converter stage configured to receive the intermediate voltage and output a final supply voltage for powering a load,

[0059] Wherein the first converter stage or the second converter stage includes:

[0060] A switched-capacitor converter circuit including:

[0061] A first converter segment;

[0062] A second converter segment; and

[0063] A control circuit configured to selectively activate the first converter segment and the second converter segment based on an operating parameter indicative of a load current that the power converter system is required to support. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Embodiments of the present invention will now be described, by way of example only and with strict reference to the accompanying drawings, in which:

[0065] Figure 1a is a graphical representation of a method for providing a suitable supply voltage to a subsystem or load of a host device;

[0066] Figure 1b is a graphical representation of an alternative method for providing a suitable supply voltage to a subsystem or load of a host device;

[0067] Figure 2 is a graphical representation of another alternative method for providing a suitable supply voltage to a subsystem or load of a host device;

[0068] Figure 3 is a schematic representation of a switched capacitor DC-DC converter circuit;

[0069] Figure 4 shows Figure 3 the relationship between the switching frequency and the output impedance in the switched capacitor DC-DC converter circuit of;

[0070] Figure 5 is a schematic representation of a power converter circuit according to the present disclosure;

[0071] Figure 6 shows Figure 5 the relationship between the switching frequency and the output impedance of the converter section in the power converter circuit of;

[0072] Figure 7 is a schematic representation of an example circuit for selectively activating Figure 5 the converter section of the power converter circuit of; and

[0073] Figure 8 is a graphical representation of a power converter system that includes a plurality of individual power converter circuit instances coupled together to provide an output voltage VOUT to a load. Specific embodiments

[0074] Figure 2 is a graphical representation of another alternative method for providing a suitable supply voltage to a subsystem or load of a host device. In this method, the host device 200 includes a battery pack 210 (such as a 2S or 3S battery pack) and a power conversion architecture that includes multiple stages for stepping down the output voltage of the battery pack 210 to a supply voltage suitable for the multiple subsystems or loads of the host device 200.

[0075] The first stage includes a switched capacitor converter 220 configured to step down the battery output voltage VBatt to an intermediate voltage VInt (e.g., from a battery output voltage VBatt of 10.8 V to an intermediate voltage of 3.6 V), and the second stage includes separate power management integrated circuits (e.g., implementing a DC-DC switching regulator) 230-1 to 230-n for each of a plurality of subsystems or loads 240-1 to 240-n of the host device 200. Each instance of the power management integrated circuit is configured to step down the intermediate voltage VInt to the respective lower final supply voltages VSup1 to VSupn required by the associated subsystems or loads 240-1 to 240-n of the host device 100b (e.g., from an intermediate voltage VInt of 3.6 V to a supply voltage VSup1 of 1.2 V).

[0076] Figure 3 is a schematic representation of an example switched capacitor converter. As shown generally at 300, the switched capacitor converter in this example includes a switching network that includes first through fourth switches 312 to 318, a flying capacitor 320, an output capacitor 330, and controller circuitry 340.

[0077] The first switch 312 and the second switch 314 (which are MOSFET devices in this example) are coupled in series between the input voltage supply rail VIN and a first node 352, and the third switch 316 and the fourth switch 318 (which are also MOSFET devices in this example) are coupled in series between the first node 352 and the ground (or other reference voltage) supply rail.

[0078] The flying capacitor 320 is coupled between a second node 354 and a third node 356. The second node is between the first switch 312 and the second switch 314, and the third node is between the third switch 312 and the fourth switch 314.

[0079] The output capacitor 330 is coupled between the first node 352 and the ground (or other reference voltage) supply rail.

[0080] In operation of the switched capacitor converter 300, the controller circuitry 340 supplies control signals to the control terminals (e.g., the gate terminals in this example) of the switches 312 to 318 to cause the flying capacitor 320 to be coupled to the input supply voltage rail VIN or to be coupled in parallel with the output capacitor 330. The output voltage VOUT supplied to the load 350 depends on the input voltage, the switching frequency F SW and the capacitances of the flying capacitor 320 and the output capacitor 330. SW

[0081] Figure 3The switched capacitor converter 300 can be modeled as an ideal transformer with an output impedance R OUT . The output impedance R OUT is a function of the switching frequency F SW , the sizes of the flying capacitor 320 and the output capacitor 330, and the sizes of the switches 312 to 318.

[0082] Figure 4 FIG. shows the output impedance R OUT in the switched capacitor converter 300 SW and the switching frequency F Figure 4 . As can be seen in OUT , above the upper threshold of the switching frequency (which is 500 kHz in this example), the output impedance R FSL has a constant value R OUT . When the switching frequency is below the upper threshold of the switching frequency, the output impedance R SW decreases as the switching frequency F SW increases. In this example, when the switching frequency F OUT is 25 Hz, the output impedance R FSL is equal to 20 kR SW , and when the switching frequency F OUT is 25 kHz, the output impedance R FSL is equal to 20 R OUT . The output impedance R SW continues to decrease as the switching frequency F SW increases until the upper switching frequency is reached, after which the output impedance remains constant at R FSL as the switching frequency F

[0083] increases. The switched capacitor converter is very efficient in providing integer ratio conversions (such as 2:1, 3:1, 3:2, etc.), has a fast transient response, and is therefore very suitable for use in Figure 2 the first stage of a multi-stage buck conversion arrangement.

[0084] In some embodiments, the capacitors 320, 330 of the switched capacitor converter 300 are ceramic capacitors. In such embodiments, during each switching event, the mechanical resonance of these ceramic capacitors can be excited. If the switching frequency of the switched capacitor converter 300 is within the audible frequency band (20 Hz to 20 kHz), the mechanical resonance of the capacitors will generate audible noise.

[0085] As can be understood, such audible noise is generally undesirable. One option to avoid audible noise is to limit the switching frequency F SW to a frequency above the audible range, for example by setting the switching frequency F SWis limited to a frequency equal to or greater than 25 kHz. However, limiting the switching frequency F in this way SW also limits the dynamic range of the output impedance R OUT . In the Figure 5 example shown, limiting the switching frequency F SW to a frequency equal to or greater than 25 kHz limits the dynamic range of the output impedance R OUT to a factor of 10 (since at a switching frequency of 25 kHz, the output impedance is 20R FSL , while at a switching frequency of 500 kHz and above, the output impedance is R FSL ). However, in some applications, the dynamic range of the current drawn by the load can be almost four orders of magnitude (e.g., from a minimum load current of 10 mA to a maximum load current of 100 A).

[0086] At high load currents, limiting the switching frequency to avoid audible noise is not a problem, but at lower load currents, as the load current decreases, the efficiency of the converter decreases. Since the converter must switch at an artificially high switching frequency (i.e., higher than the switching frequency required to support the load current) to avoid audible noise, the losses associated with the converter switching (such as gate switching losses and parasitic drain losses) are not proportional to the load current and are proportionally higher compared to higher load currents, resulting in a decrease in efficiency.

[0087] One way to improve efficiency is to reduce the switching size at lower switching frequencies by only turning on a small fraction of the switches used for active switched capacitors. While this method can moderately improve the efficiency of the converter, it does not reduce the losses due to parasitic drain capacitance, which remain connected together even when the switching size is reduced in this way. Therefore, even with this method, the converter efficiency may not be sufficient to meet the requirements of a particular application.

[0088] Figure 5 is a schematic representation of a power converter circuit according to the present disclosure. Figure 5 The power converter circuit shown generally at 500 in Figure 2 is particularly suitable for replacing the switched capacitor converter 220 in the first stage of the power conversion architecture of the host device 200 shown in Figure 2 . The power converter circuit 500 can also be used to replace one or more of the power management integrated circuits 230-1 to 230-n in the second stage of the power conversion architecture of the host device 200 shown in

[0089] The power converter circuit 500 includes a plurality (three in this example) of parallel instances 510-1 to 510-N of converter circuits of different sizes (hereinafter referred to as "converter segments"), an output capacitor 530 shared by all converter segments 510-1 to 510-N, and a control circuit 540 (which is also shared by all converter segments 510-1 to 510-N in this example). In other examples, each converter segment 510-1 to 510-N may be associated with its own control circuit.

[0090] In this example, each converter segment 510-1 to 510-N includes a separate instance of a switched-capacitor converter circuit, but other possible implementations may use different converter topologies for some or all of the converter segments 510-1 to 510-N. For example, in some implementations, each converter segment 510-1 to 510-N may include a separate instance of an inductor converter circuit (e.g., a buck converter circuit), or may include a separate instance of a hybrid capacitor-inductor converter circuit. Other implementations may employ a hybrid topology approach, where one or more of the converter segments 510-1 to 510-N are instances of switched-capacitor converter circuits, and one or more of the converter segments 510-1 to 510-N are instances of some other type of converter circuit, such as an inductor converter circuit or a hybrid capacitor-inductor converter circuit.

[0091] For clarity and brevity, embodiments of the power converter circuit 500 in which any of the converter segments 510-1 to 510-N include a switched-capacitor stage or switched capacitors will be referred to herein as "switched-capacitor power converter circuits". Thus, as used herein, the term "switched-capacitor power converter circuit" is intended to encompass embodiments of the power converter circuit 500 in which one or more of the converter segments 510-1 to 510-N include switched capacitors or hybrid capacitor-inductor converter circuits, regardless of the topology of any other converter segments 510-1 to 510-N.

[0092] Figure 5 In the example where each of the converter segments 510-1 to 510-N is an instance of a switched-capacitor converter circuit, and includes a corresponding switch network and a corresponding flying capacitor. Thus, the first converter segment 510-1 includes a switch network that includes first to fourth switches 512-1 to 518-1 and a flying capacitor 520-1.

[0093] A first switch 512-1 and a second switch 514-1 (which are MOSFET devices in this example) are serially coupled between an input voltage supply rail VIN and a first node 552-1, and a third switch 516-1 and a fourth switch 518-1 (which are also MOSFET devices in this example) are serially coupled between the first node 552-1 and a ground (or other reference voltage) supply rail.

[0094] A flying capacitor 520-1 is coupled between a second node 554-1 and a third node 556-1. The second node 554-1 is located between the first switch 512-1 and the second switch 514-1, and the third node 556-1 is located between the third switch 512-1 and the fourth switch 514-1.

[0095] A first terminal of a common output capacitor 530 is coupled to the first node 552-1, and a second terminal of the common output capacitor 530 is coupled to the ground (or other reference voltage) supply rail. Thus, the first node 552-1 can be regarded as the output node of the first converter segment 510-1.

[0096] A second converter segment 510-2 includes a switch network that includes first to fourth switches 512-2 to 512-8 and a flying capacitor 520-2 coupled in the same configuration as in the first converter segment 510-1, wherein a first node 552-2 (also referred to as the output node of the second converter segment 510-2) between the second switch 514-2 and the third switch 516-2 is coupled to the first terminal of the common output capacitor 530.

[0097] Similarly, an Nth (third in this example) converter segment 510-N includes a switch network that includes first to fourth switches 512-N to 512-N and a flying capacitor 520-N coupled in the same configuration as in the first converter segment 510-1, wherein a first node 552-N (also referred to as the output node of the third converter segment 510-N) between the second switch 514-N and the third switch 516-N is coupled to the first terminal of the common output capacitor 530.

[0098] The sizes of the converter segments are different because their switches may have different sizes and / or their flying capacitors may have different capacitances. For example, the flying capacitor 520-1 of the first converter segment 510-1 may be implemented as a first group including a first plurality of capacitors coupled in parallel to achieve a first capacitance, while the flying capacitor 520-2 of the second converter segment 510-2 may be implemented as a second group including a second plurality of capacitors coupled in parallel to achieve a second capacitance lower than the first capacitance, and the flying capacitor 520-N of the Nth converter segment 510-N may be a single capacitor having a third capacitance lower than the first capacitance and the second capacitance.

[0099] Accordingly, the first converter segment 510-1 may be regarded as a "large segment", the second converter segment 510-2 may be regarded as a "medium-sized segment", and the Nth converter segment 510-N may be regarded as a "small segment".

[0100] Each of the converter segments N has different switching frequency / output impedance characteristics, as Figure 6 shown.

[0101] Figure 6 The bottommost trace 610 in OUT shows the switching frequency / output impedance characteristics of the first converter segment 510-1. From this, it can be seen that in this example, the output impedance R of the first converter segment 510-1 at a switching frequency of 25 kHz is 20R FSL , and it decreases as the switching frequency increases, reaching a minimum value R FSL at a switching frequency of 500 kHz. When the switching frequency is higher than 500 kHz, the output impedance R of the first converter segment 510-1 OUT remains at R FSL .

[0102] Figure 6 The middle trace 620 in OUT shows the switching frequency / output impedance characteristics of the second converter segment 510-2. From this, it can be seen that in this example, the output impedance R of the second converter segment 510-2 at a switching frequency of 25 kHz is 200R FSL , and it decreases as the switching frequency increases, reaching a minimum value of 10R FSL at a switching frequency of 500 kHz. When the switching frequency is higher than 500 kHz, the output impedance R of the second converter segment 510-2 OUT remains at R FSL .

[0103] Figure 6The uppermost trace 630 shows the switching frequency / output impedance characteristics of the Nth converter segment 510-N. From this, it can be seen that in this example, the output impedance R of the Nth converter segment 510-N at a switching frequency of 25 kHz OUT is 20 kR FSL , and it decreases as the switching frequency increases, reaching a minimum value of 100 R at a switching frequency of 500 kHz FSL . When the switching frequency is higher than 500 kHz, the output impedance R of the Nth converter segment 510-N OUT remains at 10 R FSL .

[0104] In the operation of the power converter circuit 500, the control circuit 540 selectively activates the plurality of converter segments 510-1 to 510-N based on the load current that the power converter circuit 500 needs to support, to generate an output voltage VOUT to supply to the load 550. Only those converter segments 510-1 to 510-N that are required to support the current or expected load current are activated. For example, in the case of a small load current (e.g., when the host device including the power converter circuit is in a sleep mode), the control circuit 540 can activate only the Nth (smallest) converter segment 510-N. For a higher load current, all converter segments 510-1 to 510-N can be activated, and for an intermediate load current, only the first converter segment 510-1 and the second converter segment 510-2 can be activated. Since all converter segments 510-1 to 510-N are coupled in parallel and only the DC nodes are shared, the losses associated with the switches are minimized. Thus, selectively activating the converter segments 510-1 to 510-N in this way allows a range of load currents to be supported efficiently without using switching frequencies in the audio band, thereby preventing audible noise from occurring.

[0105] The power converter circuit 500 can be implemented in the form of an integrated circuit, for example, implemented as one or more integrated circuits (ICs). In the integrated circuit implementation of the power converter circuit 500, the switches 512-1 to 518-N, the control circuit 540, the flying capacitors 520-1 to 520-N, and the output capacitor 530 can be implemented in the integrated circuit (i.e., can be on-chip components).

[0106] Alternatively, the flying capacitors 520-1 to 520-N and the output capacitor 530 may be located outside the integrated circuit implementing the switches 512-1 to 518-N and the control circuit 540 (i.e., the flying capacitors 520-1 to 520-N and the output capacitor 530 may be off-chip components), where the integrated circuit includes contacts for coupling each switch network of the converter segments 510-1 to 510-N to the corresponding off-chip flying capacitors 520-1 to 520-N and the off-chip common output capacitor 530.

[0107] Thus, in such embodiments, the power converter IC may include a plurality of individual power converter segments, each power converter segment including a switch network configured to be coupled to a corresponding flying capacitor and a common output capacitor.

[0108] Figure 7 is a schematic representation of an example circuit for selectively activating the converter segments 510-1 to 510-N. The illustrated circuit may be implemented, for example, by the control circuit 540 of the power converter circuit 500.

[0109] Figure 7 The circuit of implements a first control method and a second control method. The first control method selectively activates the converter segments 510-1 to 510-N based on the switching frequency F of the currently active converter segment SW (which provides an indication of the load current), and the second control method controls the switching frequency F of the active converter segments 510-1 to 510-N based on the output voltage VOUT SW , and activates all the converter segments 510-1 to 510-N when a load step condition is detected.

[0110] In Figure 7 The circuit shown as 700 in its entirety includes a first comparator circuit 710 having a non-inverting (+) input and an inverting (-) input. At the non-inverting input, a first threshold signal Th1 is received, and the inverting input is coupled to Figure 5 a first terminal of the output capacitor 530 of the power converter circuit 500 of, thereby receiving the output voltage VOUT of the power converter circuit 500.

[0111] The output of the first comparator circuit 710 is coupled to the control input of a signal generator circuit 720. The signal generator circuit 720 may be, for example, an oscillator circuit and is configured to generate an oscillating output signal whose frequency may vary according to the output signal of the first comparator circuit 710.

[0112] The output of the signal generator circuit 720 is coupled to the input of the clock generator circuit 730. The clock generator circuit 730 is configured to generate and output a clock signal based on the oscillating output signal output by the signal generator circuit 720 to control the switching frequencies of all the converter segments 510-1 to 510-3.

[0113] The first comparator circuit 710, the signal generator circuit 720, and the clock generator circuit 730 are operable to control the switching frequencies of the active converter segments among the plurality of converter segments 510-1 to 510-3. The output voltage VOUT of the power converter circuit 500 indicates the current drawn by the load 550. As the load current increases, the output voltage VOUT decreases until it reaches a level where the active converter segment of the power converter circuit 500 cannot support the load current at the current switching frequency and thus the switching frequency should be increased.

[0114] Accordingly, the first comparator circuit 710 is operable to compare the output voltage VOUT with the first threshold signal Th1. When the output voltage VOUT is greater than the voltage amplitude of the first threshold signal Th1, the output of the first comparator circuit 710 remains low. When the output voltage VOUT is equal to or lower than the voltage amplitude of the first threshold signal Th1, the output of the first comparator circuit 710 goes high. This causes the signal generator circuit 720 to increase the frequency of its oscillating output signal, which in turn increases the frequency of the clock signal output by the clock generator circuit 730 to control the switching frequency of the active converter segment.

[0115] The circuit 700 further includes a second comparator circuit 740 having a non-inverting (+) input and an inverting (-) input. At the non-inverting input, a second threshold signal Th2 (also referred to as the load step threshold voltage) is received, and the inverting input is coupled to Figure 5 the first terminal of the output capacitor 530 of the power converter circuit 500 so as to receive the output voltage VOUT of the power converter circuit 500.

[0116] The output of the second comparator circuit 740 is coupled to the first input of an AND gate 750, and the output of the AND gate 750 is coupled to the clock input of a D flip-flop 760. The D input of the D flip-flop is coupled to a logic level 1 or a high reference voltage source. The Q output of the D flip-flop is coupled to the first input of an OR gate 770 having a second input coupled to the output of the second comparator circuit 740. The output of the OR gate 770 is coupled to an input of a controller 780.

[0117] The second comparator circuit 740 and the OR gate 770 are operable to activate all the converter segments 510-1 to 510-3 in response to a step increase in the load current that the power converter circuit 500 needs to support.

[0118] The second comparator circuit 740 is operable to compare the output voltage VOUT with a second threshold signal Th2.

[0119] When the output voltage VOUT is greater than the voltage magnitude of the second threshold signal Th2 (which is lower than the voltage magnitude of the first threshold signal Th1), the output of the second comparator circuit 740 remains low.

[0120] When the output voltage VOUT is equal to or lower than the voltage magnitude of the second threshold signal Th2, the output of the second comparator circuit 740 goes high, thereby causing the output of the OR gate 770 to go high, which in turn causes the controller 780 to output a control signal to the clock generator circuit 730 to activate all the converter segments 510-1 to 510-3 (as will be explained in more detail below).

[0121] If the output voltage VOUT drops to (or drops below) the second threshold, all the converter segments 510-1 to 510-3 are activated, which ensures that the power converter circuit 500 can respond quickly to a step increase in the load current, such that the power converter circuit 500 can support a sudden increase in the load current with minimal delay.

[0122] Once the load current has stabilized to a steady state after a step increase (e.g., when any transient effects have subsided), converter segments that are not needed to support the steady-state load current can be deactivated, as will be explained in more detail below.

[0123] When the load current is changing slowly (e.g., during normal operation of the power converter circuit 500 or when the load current has stabilized after a step increase), the AND gate 750, D-type flip-flop 760, OR gate 770, and controller 780 are operable to selectively activate the converter segments 510-1 to 510-3 based on the switching frequency of the active converter segments.

[0124] To this end, the controller 780 is configured to receive a signal indicative of the switching frequency F of the active converter segments SW The reset output of the controller 780 is coupled to the active-low reset input of the D-type flip-flop 760 and the second input of the AND gate 740.

[0125] As can be seen from Figure 4 and Figure 6 it is evident that the higher the load current, the lower the output impedance R of the power converter circuit OUT must be, and thus the higher the switching frequency F of the active converter segments SW must be. Accordingly, the controller 780 can use the switching frequency F of the active converter segments SWAs a proxy for the load current. When the load current has stabilized or reached a steady state after a step increase in the load current, or when the load current is changing slowly, the switching frequency F of the active converter segments SW is constant or changes slowly.

[0126] During normal operation of the circuit 700 (i.e., when there is no step increase in the load current or after the load current has stabilized after a load step), the reset output of the controller 780 remains low, causing the Q output of the D flip-flop 760 to also be low. As long as the output voltage VOUT is greater than the second threshold Th2, the output of the second comparator circuit 740 is low, and thus the output of the OR gate 770 is also low. The controller 780 interprets the low signal at its input as an indication that it does not need to keep all converter segments active, but can deactivate some converter segments to reduce power consumption and improve efficiency. Thus, when the load current has stabilized to a steady state after a load step, the controller 780 can output a control signal to the clock generator circuit 730 to deactivate or "pause" some of the converter segments 510-1 to 510-N, provided that the output voltage VOUT has returned to a level greater than the second threshold Th2.

[0127] In the example discussed above, the output voltage VOUT is compared with a first threshold to determine whether the switching frequency of the active converter segments should be increased. In other examples, the switching frequency of the active converter segments can be controlled based on the ratio of the input voltage VIN to the output voltage VOUT. In such examples, the first comparator circuit 710 can be operable to compare the input voltage / output voltage ratio VIN:VOUT with a first threshold signal Th1 (which is appropriately adjusted), and control the signal generator circuit 720 based on the result of that comparison, as described above.

[0128] Similarly, in some examples, rather than comparing the output voltage VOUT with a second threshold signal Th2 to determine whether all converter segments 510-1 to 510-N should be activated in response to a load current step, the ratio VIN:VOUT can be compared with a second threshold signal Th2 (which is again appropriately adjusted) by the second comparator circuit 740, and the result of that comparison can be used to trigger the activation of all converter segments 510-1 to 510-N, as described above.

[0129] To determine which of the converter segments 510-1 to 510-N can be deactivated or paused after a step increase in the load current, the controller 780 compares the switching frequency F of the active converter SW with a plurality of switching frequency thresholds. For as Figure 5For the power converter circuit 500 having three converter segments 510-1 to 510-N as shown, the controller 780 can be operable to compare the switching frequency F SW with first, second, and third gradually decreasing switching frequency thresholds.

[0130] If the switching frequency F SW is equal to or greater than the switching frequency upper threshold ThSwUpper, this may indicate that although the load current has stabilized, all converter segments 510-1 to 510-N are required to remain active to support the load current, and thus the controller 780 continues to output a control signal to the clock generator circuit 730 to maintain all converter segments 510-1 to 510-N in an active state.

[0131] If the switching frequency F SW is below the switching frequency upper threshold ThSwUpper but greater than or equal to the intermediate switching frequency threshold ThSwInt, this may indicate that the first converter segment 510-1 is not required to support the load current and can thus be deactivated or paused. Accordingly, the controller 780 outputs a control signal to the clock generator circuit 730 to maintain the second converter segment 510-2 and the third converter segment 510-3 in an active state, and deactivates or pauses the first controller segment 510-1.

[0132] If the switching frequency F SW is below the intermediate switching frequency threshold ThSwUpper but greater than or equal to the switching frequency lower threshold ThSwInt, this may indicate that the first converter segment 510-1 and the second converter segment 510-2 are not required to support the load current and can thus be deactivated or paused. Accordingly, the controller 780 outputs a control signal to the clock generator circuit 730 to maintain the third converter segment 510-3 in an active state, and deactivates or pauses the first controller segment 510-1 and the second controller segment 510-2.

[0133] The switching frequency lower threshold ThSwLower is selected or configured to prevent the switches of the active converter segments from switching at a switching frequency within the audio band, which may generate audible noise due to the excitation mechanical resonance of the flying capacitors 520-1 to 520-3 and / or the output capacitor 530 as discussed above. For example, the switching frequency lower threshold ThSwLower can be 25 kHz, or can be selected or configured to maintain the switching frequency at 25 kHz or above to prevent switching in the audio band.

[0134] Thus, by selectively deactivating those converter segments 510-1 to 510-3 that are not required to support the steady-state load current, the power converter circuit 500 can return to a more efficient operating state after a step increase in the load current.

[0135] The controller 780 can similarly operate to compare the switching frequency F of the active converter segments during normal operation of the power converter circuit 500 SW with a plurality of switching frequency thresholds.

[0136] Thus, if the power converter circuit 500 is operating with only the third converter segment 510-3 active and the switching frequency FSW increases above the intermediate switching frequency threshold ThSwInt, this can indicate that the third converter segment 510-3 cannot support the load current, and thus the controller 780 can output a control signal to maintain the third converter segment 510-3 in the active state and activate the second converter segment 510-2.

[0137] Similarly, if the power converter circuit 500 is operating with the second converter segment 510-2 and the third converter segment 510-3 active and the switching frequency F SW increases above the switching frequency upper threshold ThSwUpper, this can indicate that the combination of the second converter segment 510-2 and the third converter segment 510-3 cannot support the load current, and thus the controller 780 can output a control signal to maintain the second converter segment 510-2 and the third converter segment 510-3 in the active state and activate the first converter segment 510-1.

[0138] If the switching frequency F SW subsequently drops below the switching frequency upper threshold ThSwUpper or the intermediate switching frequency threshold ThSwInt, the first converter segment 510-1 and the second converter segment 510-2 can be deactivated or suspended as described above.

[0139] In some examples, the switching frequency thresholds with which the controller 780 compares the switching frequency F SW are different when the current is increasing than when the load current is decreasing. When the load current is increasing, the controller 780 can compare the switching frequency F SW with a first intermediate switching frequency threshold ThSwInt1 and a switching frequency upper threshold ThSwUpper1, and when the load current is decreasing, the controller 780 can compare the switching frequency F SWCompare with a second intermediate switching frequency threshold ThSwInt2 and a switching frequency upper threshold ThSwUpper2, where ThSwInt2 is lower than ThSwInt1, and ThSwUpper2 is lower than ThSwUpper2. This provides a degree of hysteresis to prevent "hunting", that is, in response to changes in the switching frequency that occur due to the activation or deactivation of converter segments, the continuous activation and deactivation of converter segments 510-1 to 510-2.

[0140] In the above example, the controller 780 is operable to compare the switching frequency with three switching frequency thresholds, which correspond to Figure 5 three converter segments of the power converter circuit 500. As will be understood by those of ordinary skill in the art, in a power converter circuit having more than three converter segments, there will be more than three switching frequency thresholds, and in a power converter circuit having two converter segments, there will be only two switching frequency thresholds.

[0141] To allow for the rapid activation of converter segments to support a step increase in load current as described above, it is beneficial to "pause" any inactive converter segments rather than turning them off completely (e.g., by disconnecting them from the power supply). This can be achieved by placing the inactive converter segments in an operating condition where any bootstrap capacitors associated with the converter segments are maintained at the correct voltage for the active operation of the converter segments, and any auxiliary power supply rails associated with the converter segments are charged to the level required for the active operation of the converter segments.

[0142] To this end, each of the plurality of converter segments 510-1 to 510-N can receive a respective clock signal derived from the main clock signal for controlling the switching frequency of switches 512 to 518. For example, the clock generator circuit 730 can be configured to generate a main clock signal based on the oscillating output signal output by the signal generator circuit 720, and generate first to Nth derived clock signals CLK-1 to CLK-N based on the main clock signal for output to the first to Nth converter segments 510-1 to 510-N to control the switching frequency of the switches of the converter segments 510-1 to 510-N.

[0143] To pause a particular converter segment, the clock generator circuit 730 can disable the derived clock signal output to the particular converter segment. To subsequently reactivate the converter segment, the clock generator circuit 730 can enable the relevant derived clock signal.

[0144] For example, to pause the first converter segment 510-1 (e.g., when the load current has returned to a steady state after a step increase), the clock generator circuit 730 can disable the associated derived clock signal CLK-1 in response to a control signal output by the controller 780 to the clock generator circuit 730. Since switches 512-1 to 518-1 are now not receiving a clock signal, they stop switching, thereby effectively deactivating the first converter segment 510-1. However, the circuitry (external to the first converter segment 510-1) that maintains the voltage of any bootstrap capacitors and the voltage of any auxiliary power supply rails associated with the first converter segment 510-1 continues to operate, thereby maintaining the voltage of any such bootstrap capacitors and auxiliary power supply rails at the correct level to allow for a quick transition to active operation of the first converter segment 510-1.

[0145] To reactivate the first converter segment after it has been paused, the clock generator circuit 730 can enable the associated derived clock signal CLK-1 such that the switches 512-1 to 518-1 of the first converter segment 510-1 can start switching again.

[0146] The clock generator circuit 730 can include control circuitry (e.g., logic circuitry) to allow each of the derived clock signals CLK-1 to CLK-N to be asynchronously enabled (i.e., out of sync with the pulses of the main clock signal) without malfunction.

[0147] In the example described above with reference to Figure 7 the converter segments 510-1 to 510-N are selectively activated or deactivated based on the switching frequency F of the active converter segments SW However, the converter segments 510-1 to 510-N can be selectively activated or deactivated based on other operating parameters of the power converter circuit 500 (instead of the switching frequency F

[0148] SW or as a supplement to the switching frequency). For example, the input current of the power converter circuit 500 and / or the output current of the power converter circuit can be monitored (e.g., by the controller), and the converter segments 510-1 to 510-N can be selectively activated or deactivated based on a comparison of the input and / or output current with one or more thresholds.

[0149] ​In addition to selectively activating and deactivating converter segments 510-1 to 510-N to support a desired load current, the present disclosure also contemplates extending the range of load current that the active converter segments 510-1 to 510-N can support. In some examples, the effective on-resistance of one or more of switches 512 to 518 of the active converter segments 510-1 to 510-N can be modulated to adjust the output impedance R of the power converter circuit 500 OUT , thereby changing the range of load current that the active converter segments 510-1 to 510-N can support. In such examples, the controller 780 can control the on-resistance of the switch to turn on the switch by adjusting the gate-source voltage applied to the switch based on the operating parameters of the power converter circuit 500 (e.g., switching frequency, input current, or output current).

[0150] As described above, the load current that the power converter circuit 500 can support is a function of the output impedance R of the power converter circuit 500 OUT . The target output impedance of the power converter circuit is indirectly determined by the output voltage drop relative to the ideal conversion ratio of the power converter circuit 500, which typically has a predefined fixed value. If instead of using the predefined fixed value of the output voltage drop, the voltage drop is modulated, for example, by the control circuit 540, the range of load current that the converter segments 510-1 to 510-N can support can be changed. Thus, in some examples, the controller 540 can be configured to modulate the output voltage drop to change the target output impedance of one or more of the converter segments 510-1 to 510-N, thereby changing the range of load current that one or more of the converter segments 510-1 to 510-N can support.

[0151] In the above example, a single instance of the power converter circuit 500 (which can be implemented as an integrated circuit) includes a plurality of individual converter segments 510-1 to 510-N that can be selectively activated based on the operating parameters of the power converter circuit 500 indicating the load current requirement (i.e., the load current that the power converter circuit needs to support).

[0152] The present disclosure also extends to a power converter system that includes a plurality of individual instances of the power converter circuit 500 coupled together to provide an output voltage VOUT to a load.

[0153] Figure 8 is a graphical representation of such a power converter system. In Figure 8 The system shown generally at 800 includes a plurality (three in this example) of ICs 810-1 to 810-N that implement the above reference Figure 5A power converter circuit of the described kind. Those of ordinary skill in the art should understand that the power converter system 800 may include only two ICs, or may include more than three ICs.

[0154] The input voltage contacts (e.g., balls, pads, pins, etc.) of each of the ICs 810-1 to 810-N are coupled to the supply voltage rail 820, and the output voltage contacts (e.g., balls, pins, pads, etc.) are coupled to the output voltage rail 830. The ground contacts (e.g., balls, pads, pins, etc.) of each of the ICs 810-1 to 810-N are coupled to the ground (or other reference voltage) supply rail.

[0155] The ICs 810-1 to 810-N are coupled together in a daisy-chain configuration, where the first IC 810-1 is designated as the primary or controller IC, and the other ICs 810-2 to 810-N are designated as secondary ICs. The ICs 810-1 to 810-N use a communication protocol to communicate with each other such that the primary or controller IC 810-1 can selectively activate and deactivate not only its own converter segments but also the converter segments of the secondary ICs based on the operating parameters (e.g., switching frequency, input current, output current, output voltage, etc.) of the power converter circuit of the primary or controller IC 810-1.

[0156] To this end, the control output of the controller 780 of the power converter circuit 500 of the primary or controller IC 810-1 can be coupled to the control inputs (e.g., the control inputs of the controllers 780 or the clock generator circuits 730 of the secondary ICs 810-1 to 810-N) of the secondary ICs 810-1 to 810-N such that the controller 780 of the primary or controller IC 810-1 can control the operation of the converter segments of the secondary ICs 810-1 to 810-N to allow the system 800 to support the load current requirements.

[0157] Specifically, if the output voltage VOUT of the system 800 drops to (or drops below) a second threshold Th2, the controller 780 of the primary or controller IC 810-1 can activate all the converter segments of all the ICs 810-1 to 810-N in response to a step increase in the load current (which can be detected as described above). The controller 780 of the primary or controller IC 810-1 can also selectively activate and deactivate the converter segments of all the ICs 810-1 to 810-N in the above-described manner based on the operating parameters (e.g., switching frequency, input current, output current, or output voltage).

[0158] In another example of a power converter system, implementing the above reference Figure 5Two or more ICs 810-1 to 810-N of the described kind of power converter circuit can be coupled together as Figure 8 shown, such that the ICs 810-1 to 810-N can communicate with each other using a communication protocol, but none of the ICs is designated as a primary or controller IC. Instead, each of the ICs 810-1 to 810-N includes a respective control circuit (e.g., the control circuit 540 as described above with reference to Figure 5 ), which can control the activation and deactivation of the converter segments of its own IC 810-1 to 810-N (and in some examples, the converter segments of other ICs 810-1 to 810-N) according to the operating parameters of the power converter system (e.g., switching frequency, input current, output current, output voltage, etc.). Distributing or dispersing the control of the converter segments of the ICs 810-1 to 810-N in this way allows for more refined control of the converter segments to meet the load current requirements.

[0159] In the example described above with reference to Figure 5 , an instance of the power converter circuit 500 includes three separate converter segments 510-1 to 510-N. One of ordinary skill in the art can understand that the power converter circuit 500 can include more than three converter segments. Increasing the number of converter segments increases the granularity with which the output impedance of the power converter circuit can be controlled, thereby allowing for more refined control of the range of load currents that the power converter circuit can support, which can facilitate optimizing or improving the efficiency of the power converter circuit for a given load current requirement.

[0160] In some applications, the power converter circuit 500 may not need to include three (or more) converter segments, and thus in such applications, the power converter circuit 500 can include only two converter segments. Specifically, in the case where multiple ICs implementing the power converter circuit are coupled together to form a power converter system as described above with reference to Figure 8 , each IC can implement a power converter circuit having only two converter segments, where the converter segments of each IC have different sizes such that the power converter system can support the desired range of load currents.

[0161] The power converter circuit 500 of the present disclosure has been described above as being particularly suitable for use in the power conversion architecture of the host device 200 as Figure 2 shown, i.e., as a buck converter to provide a reduced supply voltage. However, it should be understood that the power converter circuit 500 can equally be used as a boost converter, where appropriate control schemes are employed for the switches 512 to 518 for each of the converter segments 510-1 to 510-N.

[0162] In addition, the power converter circuit 500 is equally applicable to forward power conversion applications (boost or buck), such as for powering one or more loads from a battery or battery pack, and to reverse power conversion applications (boost or buck), such as for charging the battery or battery pack of a first device using power received from the battery or battery pack of a second device or from another power source (such as a battery charger).

[0163] As is apparent from the foregoing discussion, the power converter circuit of the present disclosure effectively balances the efficiency requirements with the need to avoid switching frequencies in the audio band, thereby allowing for high efficiency to be achieved within a desired load current range without generating audible noise.

[0164] In the examples described in the foregoing specification, the power converter circuit 500 includes a switched capacitor converter circuit, but those of ordinary skill in the art will understand that the principles of the present disclosure may equally be implemented using different power converter topologies or using a combination of different power converter topologies. For example, multiple converter segments may be implemented as multiple separate instances of an inductive converter circuit (such as a buck converter circuit), or as one or more inductive converter circuit instances coupled in parallel with one or more capacitive converter circuit instances, or as one or more hybrid capacitive-inductive converter circuit instances.

[0165] The circuits described above with reference to the accompanying drawings may be incorporated in a host device (such as a laptop, notebook, netbook, or tablet computer), a gaming device (such as a game console or a controller for a game console), a virtual reality (VR) or augmented reality (AR) device, a mobile phone, a portable audio player, or some other portable device, or may be incorporated in an accessory device used in conjunction with a laptop, notebook, netbook, or tablet computer, a gaming device, a VR or AR device, a mobile phone, a portable audio player, or other portable device.

[0166] Those skilled in the art will recognize that some aspects of the above-described apparatus and methods may be embodied as processor control code, for example, on a non-volatile carrier medium (such as a magnetic disk, CD, or DVD-ROM), in a programmable memory (such as read-only memory (firmware)), or on a data carrier (such as an optical or electrical signal carrier). For many applications, the implementation will be on a DSP (digital signal processor), an ASIC (application specific integrated circuit), or an FPGA (field programmable gate array). Thus, the code may include conventional program code or microcode, or code for setting or controlling an ASIC or FPGA, for example. The code may also include code for dynamically configuring a reconfigurable device (such as a reprogrammable logic gate array). Similarly, the code may include code for a hardware description language (such as Verilog TMor VHDL (Very High-Speed Integrated Circuit Hardware Description Language)) code. As those skilled in the art will understand, the code can be distributed among multiple coupled components that communicate with each other. In appropriate cases, code that runs on a field-programmable (reprogrammable) analog array or similar device to configure analog hardware can also be used to implement the embodiments.

[0167] It should be noted that the above embodiments illustrate rather than limit the present invention, and those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims, "a" or "an" does not exclude a plurality, and a single feature or other unit may perform the functions of several units recited in the claims. Any reference signs or labels in the claims should not be construed as limiting their scope.

Claims

1. A switched-capacitor power converter circuit, comprising: a first converter segment; a second converter segment; and a control circuit, wherein the control circuit is configured to selectively activate the second converter segment based on an operating parameter indicative of a load current that the switched-capacitor power converter circuit is required to support.

2. The switched-capacitor power converter circuit according to claim 1, wherein each of the first converter segment and the second converter segment comprises: a switch network including a plurality of switches; a first contact for coupling the switch network to a flying capacitor; and a second contact for coupling the switch network to an output capacitor of the switched-capacitor power converter circuit.

3. The switched-capacitor power converter circuit according to claim 2, wherein the operating parameter is a switching frequency of the switch network of the first converter segment.

4. The switched-capacitor power converter circuit according to claim 3, wherein the control circuit is configured to: activate the second converter circuit if the switching frequency is equal to or less than a first switching frequency threshold.

5. The switched-capacitor power converter circuit according to claim 4, wherein the first switching frequency threshold is configured to prevent switching of the switch network at a switching frequency in the audio band.

6. The switched-capacitor power converter circuit according to claim 5, wherein the first switching frequency threshold is configured to maintain the switching frequency equal to or greater than 25 kHz.

7. The switched-capacitor power converter circuit according to claim 4 or claim 5, wherein the control circuit is configured to: activate the second converter circuit if the switching frequency is equal to or greater than a second switching frequency threshold.

8. The switched-capacitor power converter circuit according to claim 7, wherein: the first converter segment is configured to receive a first clock signal for controlling a switching frequency of the switch network of the first converter segment; the second converter segment is configured to receive a second clock signal for controlling a switching frequency of the switch network of the second converter segment; and the control circuit is configured to disable the second clock signal to deactivate the second converter segment and enable the second clock signal to activate the second converter segment.

9. The switched-capacitor power converter circuit according to any one of claims 2 to 8, wherein the control circuit is operable to control a switching frequency of the switch network of the first converter segment and / or the second converter segment based on an output voltage of the power converter circuit or a ratio of an input voltage of the power converter circuit to the output voltage.

10. The switched-capacitor power converter circuit according to claim 9, wherein the control circuit is operable to increase the switching frequency when the output voltage of the power converter circuit meets a first predefined threshold.

11. The switched capacitor power converter circuit according to claim 9 or claim 10, wherein the control circuit is operable to activate the first converter segment and the second converter segment when the output voltage of the power converter circuit meets or drops below a second predefined threshold.

12. The switched capacitor power converter circuit according to claim 11, wherein the control circuit is operable to deactivate the second converter segment when the output voltage of the power converter subsequently exceeds the second predefined threshold and the switching frequency is equal to or less than a second switching frequency threshold.

13. The switched capacitor power converter circuit according to any one of claims 2 to 12, wherein the control circuit is operable to adjust the effective on-resistance of one or more of the plurality of switches of the switching network of the first converter segment and / or the second converter segment.

14. The switched capacitor power converter circuit according to any one of the preceding claims, wherein the first converter segment and the second converter segment are coupled in parallel.

15. The switched capacitor power converter circuit according to any one of the preceding claims, wherein the first converter segment and the second converter segment have different switching frequency-to-output impedance characteristics.

16. The switched capacitor power converter circuit according to any one of the preceding claims, wherein the switched capacitor power converter circuit implements a converter stage of a multistage power converter architecture.

17. An integrated circuit comprising the switched capacitor power converter circuit according to any one of the preceding claims.

18. A host device comprising the switched capacitor power converter circuit according to any one of the preceding claims.

19. The host device according to claim 18, wherein the host device comprises a laptop, notebook, netbook or tablet computer, a gaming device, a game console, a controller for a game console, a virtual reality (VR) or augmented reality (AR) device, a mobile phone, a portable audio player, a portable device, an accessory device used in conjunction with a laptop, notebook, netbook or tablet computer, a gaming device, a game console, a VR or AR device, a mobile phone, a portable audio player or other portable device.

20. A switched capacitor power converter circuit comprising: a plurality of converter segments; and a control circuit, wherein a first converter segment of the plurality of converter segments is always active, and wherein the control circuit is configured to selectively activate or deactivate other converter segments of the plurality of converter segments based on the switching frequency of the first converter segment.

21. A switched capacitor power converter circuit for powering a load, the switched capacitor power converter circuit comprising a plurality of converter segments and a control circuit, wherein the control circuit is configured to activate all of the converter segments of the plurality of converter segments in response to detecting a load step condition.

22. The switched capacitor power converter circuit according to claim 21, wherein the control circuit includes a comparator circuit configured to compare an output voltage of the switched capacitor power converter circuit with a load step voltage threshold and output a signal indicating detection of a load step condition when the output voltage is equal to or less than the load step threshold voltage.

23. A switched capacitor power converter circuit including a plurality of converter segments, each converter segment having a different load current capacity for a given switching frequency, wherein the switched capacitor power converter circuit is operable to activate one or more of the converter segments based on a current demand of a load coupled to the switched capacitor power converter circuit.

24. A power converter integrated circuit (IC) for providing a supply voltage to a load, the power converter IC including a plurality of individual switched capacitor power converter segments, each switched capacitor power converter segment including a switch network configured to be coupled to a respective flying capacitor and a common output capacitor.

25. The power converter IC according to claim 24, further including a control circuit for controlling operation of the switch network of the switched capacitor power converter segment.

26. The power converter IC according to claim 25, wherein the control circuit is configured to selectively activate one or more of the plurality of individual switched capacitor power converter segments based on a switching frequency of an active power converter segment among the plurality of individual switched capacitor power converter segments.

27. The power converter IC according to claim 25, wherein the control circuit is configured to activate all of the switched capacitor power converter segments of the switched capacitor power converter segments of the plurality of individual switched capacitor power converter segments in response to determining that an output voltage of the power converter IC is equal to or less than a load step threshold voltage.

28. A power converter system for providing a supply voltage to a load, the power converter system comprising: a primary power converter IC including a first plurality of switched capacitor power converter segments; and a secondary power converter IC including a second plurality of switched capacitor power converter segments, the secondary power converter IC being coupled to the primary power converter IC, wherein the primary power converter IC is configured to control operation of the switched capacitor power converter segments of the primary power converter IC and the secondary power converter IC.

29. The power converter system according to claim 28, wherein the primary power converter IC includes a control circuit operable to selectively activate the switched capacitor converter segments of the primary power converter IC and the secondary power converter IC based on a switching frequency of an active switched capacitor converter segment.

30. The power converter system according to claim 28, wherein the primary power converter IC includes a control circuit that is operable to activate all of the switched capacitor converter segments of the first power converter IC and the second power converter IC in response to determining that the output voltage of the power converter system is equal to or less than a load step threshold voltage.

31. A power converter system for providing a supply voltage to a load, the power converter system comprising: a first power converter IC including a first plurality of switched capacitor power converter segments; and a second power converter IC including a second plurality of switched capacitor power converter segments, the second power converter IC being coupled to the first power converter IC, a control circuit configured to control the operation of the switched capacitor power converter segments of the first power converter IC and the second power converter IC.

32. The power converter system according to claim 31, wherein the control circuit is provided in the first power converter IC and / or the second power converter IC.

33. A power converter system, comprising: a first converter stage configured to receive a supply voltage and output an intermediate voltage; and a second converter stage configured to receive the intermediate voltage and output a final supply voltage for powering a load, wherein the first converter stage or the second converter stage includes: a switched capacitor converter circuit including: a first converter segment; a second converter segment; and a control circuit configured to selectively activate the first converter segment and the second converter segment based on an operating parameter indicative of a load current that the power converter system is required to support.

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