Photoelectric control polymorphic nonvolatile memory based on Van der Waals ferroelectric semiconductor

Abstract

The photoelectric regulation and control polymorphic nonvolatile memory based on the Van der Waals ferroelectric semiconductor sequentially comprises an insulating substrate, a bottom metal electrode, a ferroelectric gate medium, an insulating layer h-BN, a conducting channel layer, a source metal electrode and a drain metal electrode from bottom to top, and the source metal electrode and the drain metal electrode are connected with the two ends of the conducting channel layer respectively. The ferroelectric gate dielectric layer is made of a two-dimensional Van der Waals ferroelectric semiconductor material In2Se3, and the conductive channel layer is made of a two-dimensional Van der Waals ferroelectric semiconductor material InSe. According to the invention, a resistance state modulation window is formed based on grid voltage and source-drain voltage polarization, and charge injection and extraction from a channel are controlled in a combined manner. The prepared device stores multi-state information through two saturated polarizations, and realizes more storage states by means of regulation and control of positive and negative domain ratios.

Description

Technical Field

[0001] The present invention belongs to the technical field of optoelectronic semiconductors, and particularly relates to a multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors. Background Art

[0002] Non-volatile storage technology, as the basic unit of the computing-in-memory technology, has excellent characteristics such as byte-addressable, low power consumption, and fast read and write speeds. Non-volatile storage technology has extensive and important applications in the fields of artificial intelligence, Internet of Things, and cloud computing, and is a cutting-edge storage technology with important application value. In traditional non-volatile storage devices, such as traditional ferroelectric storage devices, the interface quality between oxides and perovskites is low, so there are problems such as charge trapping and gate leakage, which is one of the key bottlenecks restricting the practical application of non-volatile storage technology.

[0003] Different from traditional non-volatile memories, non-volatile storage based on low-dimensional semiconductor materials does not come from the bulk material medium, but realizes the non-volatile storage function based on unique physical mechanisms in low-dimensional semiconductors. In floating-gate memories, low-dimensional materials are usually introduced between the blocking layer and the tunneling layer to achieve charge trapping; ferroelectric memories use low-dimensional ferroelectrics instead of floating gates to achieve charge traps, and the current can generate a hysteresis loop under the action of an external voltage. The reported non-volatile storage devices based on low-dimensional semiconductor materials all have certain limitations. For example, the programming time of flash memory devices constructed from two-dimensional atomic crystals is very long, on the order of hundreds of microseconds to several seconds, and when the current state is unknown, switching the storage state usually requires an additional erasing step; two-dimensional ferroelectric materials realize stored data by changing the polarization state through an electric field. Currently, most non-volatile storage devices based on two-dimensional ferroelectric semiconductor materials can only store at one or both ends, and it is very difficult to achieve three-terminal storage, making it difficult to increase the storage density of circuits and reduce costs. Summary of the Invention

[0004] The purpose of the present invention is to provide a multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors for the problems in the prior art.

[0005] To achieve the above object, the present invention adopts the following technical solutions: The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors includes, from bottom to top, an insulating substrate, a bottom metal electrode, a ferroelectric gate dielectric, an insulating layer h-BN, a conductive channel layer, a source metal electrode, and a drain metal electrode. The source metal electrode and the drain metal electrode are respectively connected to both ends of the conductive channel layer to form a current path. Among them, the ferroelectric gate dielectric layer is a two-dimensional van der Waals ferroelectric semiconductor material In 2 Se 3, the conductive channel layer is a two-dimensional van der Waals ferroelectric semiconductor material InSe. By applying a gate voltage to the ferroelectric gate dielectric, the electric field polarization induced by it polarizes the carrier density in the channel, realizing gate voltage-controlled charge injection. By adjusting the magnitude and direction of the source-drain voltage, the energy band alignment between the conductive channel layer and the electrodes changes, controlling the amount of charge extracted from the conductive channel layer. By changing the combination of the gate voltage and the source-drain voltage, the ferroelectric gate dielectric is switched between two polarization states, realizing the writing and reading of information. By controlling the ratio of positive and negative domains in the ferroelectric gate dielectric and introducing multiple intermediate states between these two polarization states, the storage of more-state information is realized.

[0006] While adopting the above technical solution, the present invention can also adopt or combine the following technical solutions: As a preferred technical solution of the present invention: the insulating substrate is a silicon substrate with 285 nanometers of silicon dioxide covered on its surface; The bottom metal electrode is a chromium / gold electrode, and the thicknesses of chromium and gold are 15 nanometers and 25 nanometers respectively; The thickness of the ferroelectric gate dielectric layer is 70 nanometers; The insulating layer is a two-dimensional insulating dielectric material h-BN with a thickness of 10 nanometers; The thickness of the conductive channel layer is 30 nanometers.

[0007] As a preferred technical solution of the present invention: it is prepared by the following steps: S1, obtaining a preset source-drain electrode pattern by electron beam lithography technology, and then removing the photoresist through metal thermal evaporation combined with a lift-off process to prepare the bottom metal electrode on the surface of the insulating substrate; S2, obtaining a 70-nanometer-thick ferroelectric gate dielectric In 2 Se 3 from a purchased In 2 Se 3 crystal by mechanical exfoliation and transfer method, and transferring it to the surface of the bottom metal electrode; S3, obtaining a 10-nanometer-thick insulating layer h-BN from a purchased h-BN crystal by mechanical exfoliation and transfer method, and transferring it to the surface of the ferroelectric gate dielectric In 2 Se 3 ; S4, obtaining a 30-nanometer-thick conductive channel layer InSe from a purchased InSe crystal by mechanical exfoliation and transfer method and transferring it to the surface of the insulating layer h-BN; S5, obtaining a preset source-drain electrode pattern by electron beam lithography technology, and then removing the photoresist through metal thermal evaporation combined with a lift-off process to obtain the source metal electrode and the drain metal electrode.

[0008] Compared with the prior art, the multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention has the following beneficial effects: By combining the advantages of ferroelectric materials and low-dimensional semiconductor materials, it is proposed to control charge injection and extraction from the channel by gate voltage and source-drain voltage respectively, and a multi-state memory that realizes direct conversion between four states is developed, solving the problem that most of the existing non-volatile storage devices based on two-dimensional ferroelectric semiconductor materials can only store at one or both ends, it is difficult to achieve three-terminal storage, the number of storage terminals is limited and the storage density is difficult to improve.

[0009] The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention directly converts between four storage states. The FeS-FeFET does not require additional pre-check or erasure steps, simplifies the operation process, improves the storage efficiency, and also significantly reduces the wear caused by multiple erasures and writes, prolongs the service life of the device, making the memory of the present invention have higher practicability and reliability in multi-state storage applications.

[0010] The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention has an on / off ratio between the highest and lowest channel currents greater than 10 4 , solves the data loss or error caused by errors in data transmission and storage, has high data accuracy during storage state switching, improves the reliability of the overall storage system, and has great application prospects in storage fields that require long-term preservation and processing of a large amount of data.

[0011] The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention has a fast storage speed of 40 nanoseconds, a retention time of more than 10 3 seconds, optically stores 7 bits, improves the speed, stability and storage density of the storage device, demonstrates excellent electro-optic three-terminal regulation multi-bit storage ability, can store more information in a smaller physical space, improves the storage density, and reduces the cost.

[0012] The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention utilizes the In and Se elements contained in both InSe and In 2 Se 3 to prepare FeS-FeFET devices with large-area arrays by optimizing the growth conditions, providing broad prospects for practical applications.

[0013] The multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors of the present invention combines two different saturated polarization states, proposes ferroelectric regulation of carrier concentration and channel extraction, and develops a multi-state memory (4 resistance states) in a single device. The device shows sufficient resistance state differences in the four resistance states, and the on / off ratio between the highest and lowest channel currents is greater than 104 , with stable retention characteristics (> 10 3 seconds), fast storage (40 nanoseconds), polymorphic optical and electrical signal storage, and exhibits excellent three-terminal storage capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 are the front view and top view of the multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention; In the drawings: insulating substrate 1, bottom metal electrode 2, ferroelectric gate dielectric In 2 Se 3 3, insulating layer h-BN4, conductive channel InSe5, source metal electrode 6, drain metal electrode 7; Figure 2 is the relationship between the magnitude of the current and the changes in 4 sets of gate voltages and source-drain voltages of the multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention; Figure 3 is the retention time of the channel current after polarization of the gate voltage and source-drain voltage of the multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention; Figure 4 is the electrical pulse storage state of the multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention; Figure 5 is the optical pulse storage state of the multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0015] The present invention will be further described in detail with reference to the drawings and specific embodiments.

[0016] A multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention provides a new device design idea for the application of two-dimensional ferroelectric semiconductor materials in the field of memory. It combines the advantages of ferroelectric materials and low-dimensional semiconductor materials, and uses the gate voltage and source-drain voltage to polarize the channel material to form a combination of two types of resistance state modulation windows, obtaining a unit device with multi-state storage.

[0017] A multi-state non-volatile memory based on van der Waals ferroelectric semiconductor with optoelectronic regulation of the present invention has a device structure that, from bottom to top, is successively: - insulating substrate 1, - bottom metal electrode 2, - ferroelectric gate dielectric In 2 Se 3 3, - insulating layer h-BN4, - conductive channel InSe5, - Source metal electrode 6 and drain metal electrode 7, wherein the insulating substrate 1 is a silicon substrate with 285-nanometer-thick silicon dioxide on its surface; wherein the bottom metal electrode 2 is a chromium / gold electrode; wherein the ferroelectric gate dielectric In 2 Se 3 3 is a two-dimensional layered ferroelectric semiconductor material; wherein the insulating layer h-BN4 is a two-dimensional layered wide-bandgap insulating material; wherein the conductive channel InSe5 is a two-dimensional layered ferroelectric semiconductor material; wherein the source metal electrode 6 and drain metal electrode 7 are chromium / gold electrodes; A multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors according to the present invention, the device preparation includes the following steps: S1. Preparation of the bottom electrode Use electron beam lithography to obtain a preset source-drain electrode pattern, and use metal thermal evaporation and lift-off processes to remove the photoresist to prepare the bottom metal electrode. The electrode is chromium / gold with a thickness of 15 / 25 nanometers. S2. According to the requirements of the coverage between materials, use the mechanical exfoliation and transfer method to prepare the ferroelectric gate dielectric In 2 Se 3 , the insulating layer h-BN and the conductive channel InSe corresponding to the target bottom electrode S3. Transfer the ferroelectric gate dielectric In 2 Se 3 , the insulating layer h-BN and the conductive channel InSe to the surface of the target bottom electrode in sequence. S4. Evaporate on the surface of the ferroelectric gate dielectric In 2 Se 3 , the insulating layer h-BN and the conductive channel InSe, and use the lift-off process to remove the photoresist to prepare the source metal electrode and the drain metal electrode with a thickness of 15 / 85 nanometers, thus obtaining the multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors.

[0018] The advantages of the present invention are as follows: Based on the resistance state modulation window formed by gate voltage and source-drain voltage polarization, the present invention combines to control the injection of charges and the extraction from the channel. The prepared device stores multi-state information through two saturated polarizations, and realizes more storage states by regulating the positive and negative domain ratios. In addition, the device also has the characteristics of simple structure, fast storage speed (40 nanoseconds), multi-state electrical storage and optical storage, high switching ratio (greater than 10 4 ), and stable retention characteristics (>10 3 seconds), etc. Example 1

[0019] Such as Figure 1As shown, a multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors in the present invention combines two different saturated polarization states, and proposes to develop a multi-state memory (4 resistance states) in a single device based on ferroelectric regulation of carrier concentration and channel extraction. The device exhibits sufficient resistance state differences in the four resistance states, and the on / off ratio between the highest and lowest channel currents is greater than 10 4 , with stable retention characteristics (>10 3 seconds), fast storage (40 nanoseconds), multi-state optical and electrical signal storage, and exhibits excellent three-terminal storage capabilities.

[0020] The specific steps are as follows: 1. Substrate selection Select a silicon substrate with 285-nanometer-thick silicon dioxide on its surface.

[0021] 2. Preparation of the bottom metal electrode Use electron beam lithography to prepare the pattern of the bottom metal electrode; use thermal evaporation technology to prepare the metal electrode, 15 nanometers of chromium and 25 nanometers of gold; combine the lift-off method to lift off the metal film to obtain the bottom metal electrode.

[0022] 3. Preparation and transfer of the ferroelectric gate dielectric In 2 Se 3 Mechanically exfoliate the ferroelectric gate dielectric In 2 Se 3 crystal with tape, and then transfer it onto the bottom metal electrode. The thickness of In 2 Se 3 is about 70 nanometers.

[0023] 4. Preparation and transfer of the insulating layer h-BN Mechanically exfoliate the insulating layer h-BN crystal with tape, and then transfer it onto the ferroelectric gate dielectric In 2 Se 3 electrode. The thickness of the insulating layer h-BN is about 10 nanometers.

[0024] 5. Preparation and transfer of the conductive channel InSe Mechanically exfoliate the conductive channel InSe crystal with tape, and then transfer it onto the insulating layer h-BN electrode. The thickness of the conductive channel InSe is about 30 nanometers.

[0025] 6. Preparation of the source metal electrode and the drain metal electrode Spin coat a layer of PMMA on the sample surface in step 5, bake it on a hot plate at 180 °C for 5 minutes, and then use the electron beam exposure process to expose the source metal electrode and drain metal electrode patterns respectively. Subsequently, use the developer to develop for 5 seconds to expose the electrode deposition area, and deposit the metal electrode by thermal evaporation, 15 nm of chromium and 85 nm of gold. Finally, immerse the sample in acetone at 55 °C for 20 minutes to remove the metal in the unpatterned area, and obtain the source metal electrode and drain metal electrode with a channel width of 5 microns.

[0026] 7. Memory performance test Place the prepared device in the probe station, and connect the bottom metal electrode, source metal electrode, and drain metal electrode of the sample to the corresponding probes respectively. Control the polarization direction through the bottom voltage and source-drain voltage, and test the change of the channel current with the polarization voltage. As Figure 2 shown, after applying ±5 volts to the bottom electrode and ±5 volts to the source-drain voltage, apply a constant voltage of 0.1 volts between the source-drain electrodes, and detect the change of the device current with the voltage magnitude. The device has four resistance states, namely high resistance state, medium-high resistance state, medium-low resistance state, and low resistance state, and the switching ratio between the highest and lowest channel currents is greater than 10 4 . As Figure 3 shown, after applying ±4 volts to the bottom electrode and ±2 volts to the source-drain voltage, apply a constant voltage of 0.1 volts between the source-drain electrodes, and the holding time of the device current is greater than 10 3 seconds. As Figure 4 shown, apply a voltage of -5 volts and an electrical pulse with a pulse width of 40 nanoseconds to the gate electrode, and detect that the device has multiple electrical signal intermediate state storages. Subsequently, place the laser spot on the device channel through the optical path. Apply a constant voltage of 0.1 volts between the source-drain electrodes, and detect the change of the channel current with the incident light pulse. As Figure 5 shown, under the irradiation of a laser pulse with a wavelength of 520 nm, the device has an optical pulse storage state of more than 7 bits.

[0027] The present invention proposes a multi-state non-volatile memory based on optoelectronic regulation of van der Waals ferroelectric semiconductors. Combining the advantages of ferroelectric materials and low-dimensional semiconductor materials, it is proposed to control charge injection and extraction from the channel based on the gate voltage and source-drain voltage respectively, and develop a multi-state memory that can directly convert between four states. The proposed FeS-FeFET does not require additional pre-check or erasure steps to be able to directly switch between four storage states. In terms of multi-state storage performance, the fabricated FeS-FeFET device has an on / off ratio between the highest and lowest channel currents greater than 10 4 , has a fast storage speed of 40 nanoseconds, a holding time of more than 10 3 seconds, and an optical storage capacity of 7 bits, demonstrating excellent multi-bit electrical storage and optical storage capabilities.

[0028] The above specific embodiments are used to explain the present invention, which are only the preferred embodiments of the present invention, rather than limiting the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and scope of the claims of the present invention fall within the protection scope of the present invention.

Claims

1. A multi-state non-volatile memory based on photoelectric control of van der Waals ferroelectric semiconductors, characterized in that: From bottom to top, they are an insulating substrate (1), a bottom metal electrode (2), a ferroelectric gate dielectric (3), an insulating layer h-BN (4), a conductive channel layer (5), a source metal electrode (6) and a drain metal electrode (7), wherein the source metal electrode (6) and the drain metal electrode (7) are respectively connected to two ends of the conductive channel layer (5) to form a current path, wherein the ferroelectric gate dielectric layer (3) is a two-dimensional van der Waals ferroelectric semiconductor material In2Se3, and the conductive channel layer (5) is a two-dimensional van der Waals ferroelectric semiconductor material InSe. A gate voltage is applied to the ferroelectric gate dielectric, and the electric field polarization formed thereby induces the carrier density of the channel, thereby realizing gate voltage-controlled charge injection. By adjusting the magnitude and direction of the source-drain voltage, the energy band alignment of the conductive channel layer and the electrode is changed, and the amount of charge extracted from the conductive channel layer is controlled. By changing the combination of the gate voltage and the source-drain voltage, the ferroelectric gate dielectric is switched between two polarization states, thereby realizing the writing and reading of information, controlling the ratio of positive and negative domains in the ferroelectric gate dielectric, and introducing multiple intermediate states between the two polarization states, thereby realizing the storage of more multi-state information.

2. The multi-state non-volatile memory based on photoelectric control of van der Waals ferroelectric semiconductor according to claim 1, characterized in that: The insulating substrate (1) is a silicon substrate with a surface covered with 285 nanometers of silicon dioxide; The bottom metal electrode (2) is a chromium / gold electrode, and the thickness of chromium and gold are 15 nanometers and 25 nanometers respectively; The thickness of the ferroelectric gate dielectric layer (3) is 70 nanometers; The insulating layer (4) is a two-dimensional insulating dielectric material h-BN, with a thickness of 10 nanometers; The thickness of the conductive channel layer (5) is 30 nanometers.

3. The multi-state non-volatile memory based on photoelectric control of van der Waals ferroelectric semiconductor according to claim 1, characterized in that: Prepared by the following steps: S1, using electron beam exposure technology to obtain a preset source and drain electrode pattern, and then removing the photoresist by metal thermal evaporation combined with a stripping process to prepare a bottom metal electrode (2) on the surface of the insulating substrate (1); S2, using a mechanical stripping transfer method to obtain a ferroelectric gate dielectric In2Se3 (3) with a thickness of 70 nanometers from a purchased In2Se3 crystal, and transfer it to the surface of the bottom metal electrode (2); S3, using a mechanical lift-off transfer method to obtain an insulating layer h-BN (4) with a thickness of 10 nm from a purchased h-BN crystal, and transfer it to the surface of the ferroelectric gate dielectric In2Se3 (3); S4, using a mechanical lift-off transfer method to obtain a conductive channel layer InSe (5) with a thickness of 30 nm from a purchased InSe crystal and transfer it to the surface of the insulating layer h-BN (4); S5, using electron beam exposure technology to obtain a preset source-drain electrode pattern, and then removing the photoresist by metal thermal evaporation combined with a stripping process to obtain a source metal electrode (6) and a drain metal electrode (7).

Images