Chip sorting method, computer device, chip sorting system and storage medium

Abstract

The present invention discloses a chip sorting method, a computer device, a chip sorting system and a storage medium, relating to the technical field of chip sorting. The method includes: obtaining the optoelectronic properties and position information of each die in a target wafer, defining the BIN value of each die according to the optoelectronic properties and position information, and generating a probe file according to the BIN value and position information; obtaining the position information of the ordinary dies missed during optoelectronic detection and defining the BIN value of the missed ordinary dies, and updating the probe file to form an AOI file; dividing the wafer area, updating the BIN value of the ordinary dies in the wafer area according to the die yield, and updating the AOI file according to the new BIN value to form a sorting file; scanning the target wafer to generate a scan image, converting the sorting file into a virtual wafer image, and performing a fusion process on the dies in the scan image and the dies in the virtual wafer image to generate a combined file; and performing a sorting process on the target wafer according to the combined file. By adopting the present invention, the number of dies to be picked can be reduced, and the output of normal dies can be increased.

Description

Technical Field

[0001] The present invention relates to the technical field of chip sorting, and particularly to a chip sorting method, a computer device, a chip sorting system, and a storage medium. Background Art

[0002] In the field of LED chip manufacturing, with the continuous improvement of production technology levels, the produced 4-inch wafers have achieved a qualitative leap, with a significant increase in the overall yield and an increasingly smaller product size.

[0003] According to the conventional sorting method, qualified die need to be distributed on different blue films according to the same certain attributes, and the die to be sorted account for the vast majority, resulting in excessive sorting pressure.

[0004] Now, to reduce the sorting pressure, the method is changed to reverse picking, that is, the unqualified die of the wafer are sorted onto the blue film, and the qualified die are retained to complete the sorting process and directly shipped. However, the existing reverse picking sorting method has the following problems:

[0005] (1) Since the CCD recognition rates of the full test machine and the sorting machine are much lower than that of the appearance inspection machine, during the sorting operation, there are cases where some unqualified die cannot be recognized and the sorting machine will not pick them, resulting in the omission of unqualified die after sorting and flowing to the client, causing customer complaints;

[0006] (2) When sorting die, there is a problem of film shrinkage after the blue film is punctured, resulting in a difference between the actual position of the die during sorting and the position of the first combination, so that there are deviations and misalignments when selecting die during sorting, increasing the alarm of the sorting machine;

[0007] (3) The appearance inspection machine will misidentify some whiteboard die used for position comparison as unqualified die, so that the whiteboard die is picked, but the sorting machine frequently alarms when picking the whiteboard die, increasing the number of die to be picked and reducing the output of qualified die. Summary of the Invention

[0008] The technical problem to be solved by the present invention is to provide a chip sorting method, a computer device, a chip sorting system, and a storage medium, which can improve the sorting accuracy, reduce the number of die to be picked, and increase the output of normal die.

[0009] To solve the above technical problems, the present invention provides a chip sorting method, including: driving a full-test machine to perform optoelectronic detection on a target wafer to obtain the optoelectronic properties and position information of each die in the target wafer, defining the BIN value of each die according to the optoelectronic properties and position information, generating a spot-test file according to the BIN value and position information, where the die includes normal dies and blank dies; driving an appearance detection machine to perform appearance detection on the target wafer to obtain the position information of the normal dies missed during the optoelectronic detection and define the BIN value of the missed normal dies, and updating the spot-test file according to the BIN value and position information of the missed normal dies to form an AOI file; dividing the target wafer into at least one wafer area, updating the BIN value of the normal dies in the wafer area according to the die yield of the wafer area, and updating the AOI file according to the new BIN value to form a sorting file; driving a sorting machine to scan the target wafer to generate a scan map, converting the sorting file into a virtual wafer map, and performing a fusion process on the dies in the scan map and the dies in the virtual wafer map according to the position information of the blank dies to generate a combined file; driving the sorting machine to perform a sorting process on the target wafer according to the combined file.

[0010] As an improvement of the above solution, the step of defining the BIN value of each die according to the optoelectronic properties and position information includes: dividing the die into normal dies and blank dies according to the position information; setting the BIN value of the blank die to the maximum BIN value, where the maximum BIN value is greater than a preset reference BIN value; setting the BIN value of the normal die according to the optoelectronic properties, and the BIN value of the normal die is less than the maximum BIN value.

[0011] As an improvement of the above solution, the step of defining the BIN value of the missed normal dies includes: setting the BIN value of the missed normal dies to the initial BIN value, where the initial BIN value is greater than a preset reference BIN value.

[0012] As an improvement of the above solution, the step of updating the BIN value of the normal dies in the wafer area according to the die yield of the wafer area includes: judging whether the die yield of the wafer area is greater than a preset yield; if the judgment is yes, updating the BIN value of the normal dies in the AOI file whose BIN value is less than or equal to the preset reference BIN value to the first BIN value, and updating the BIN value of the normal dies in the AOI file whose BIN value is greater than the reference BIN value to the second BIN value, where the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value; if the judgment is no, keeping the BIN value of the normal dies in the wafer area.

[0013] As an improvement to the above solution, the step of fusing the grains in the scanned image with the grains in the virtual wafer map according to the position information of the blank grains to generate a combined file includes: matching the grains in the scanned image with the grains in the virtual wafer map one by one according to the position information of the blank grains; using the grains in the virtual wafer map that cannot be matched as filling grains, and filling the filling grains into the corresponding positions in the scanned image; generating a combined file according to the coordinates and BIN values of the grains in the scanned image.

[0014] As an improvement to the above solution, during the sorting process of the target wafer, the real-time distance between the blank grains is calculated regularly, and the sorting machine is driven to perform position compensation processing according to the real-time distance.

[0015] As an improvement to the above solution, during the sorting process of the target wafer, if the picking deviation occurs twice continuously when sorting the filling grains, the sorting machine is driven to perform position compensation processing.

[0016] Correspondingly, the present invention also provides a computer device, including a memory and a processor, where the memory stores a computer program, and wherein the processor implements the steps of the above chip sorting method when executing the computer program.

[0017] Correspondingly, the present invention also provides a chip sorting system, which includes: the above computer device; a full-test machine for performing optoelectronic detection on the target wafer; an appearance detection machine for performing appearance detection on the target wafer; a sorting machine for scanning the target wafer to generate a scanned image and performing sorting processing on the target wafer.

[0018] Correspondingly, the present invention also provides a computer-readable storage medium, on which a computer program is stored, and wherein the computer program implements the steps of the above chip sorting method when executed by a processor.

[0019] Implementing the present invention has the following beneficial effects:

[0020] In view of the situation that the blank grains are identified as unqualified grains by the full-test machine and it is difficult to sort and pick them, the present invention utilizes the property that the positions of the blank grains are fixed, and can accurately output their position coordinates and assign specific BIN values;

[0021] In view of the situation that the CCD resolution of the full-test machine is limited, the present invention uses the appearance detection machine to locate the grains, and outputs the position coordinates and assigns fixed BIN values to the ordinary grains that are not identified by the full-test machine but are identified by the appearance detection machine;

[0022] For the grains that are not recognized by the sorting machine but have coordinate data in the sorting file, the present invention performs virtual supplementary filing on all of them, and the sorting machine picks up the filled grains for virtual supplementary positioning;

[0023] For the case where the position of the blue film punctured and shrink-wrapped grains is offset, the present invention performs position compensation processing on the target wafer by periodically positioning and calculating the real-time distance between the whiteboard grains and / or real-time monitoring the offset of the filled grains. Description of the Drawings

[0024] Figure 1 is a flowchart of an embodiment of the chip sorting method of the present invention;

[0025] Figure 2 is a schematic structural diagram of a target wafer;

[0026] Figure 3 is another schematic structural diagram of the target wafer;

[0027] Figure 4 is a schematic structural diagram of an embodiment of the chip sorting system of the present invention. Detailed Embodiment

[0028] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the drawings. It is hereby declared that the orientation terms such as up, down, left, right, front, back, inside, and outside that appear or will appear in the present invention are only based on the drawings of the present invention and do not specifically limit the present invention.

[0029] See Figure 1 , Figure 1 shows a flowchart of an embodiment of the chip sorting method of the present invention, which includes:

[0030] S101, driving the full-test machine to perform optoelectronic detection on the target wafer to obtain the optoelectronic performance and position information of each grain in the target wafer, defining the BIN value of each grain according to the optoelectronic performance and position information, and generating a point measurement file according to the BIN value and position information;

[0031] As Figure 2 shown, the grains include ordinary grains E and whiteboard grains Q. Among them, the whiteboard grains Q are arranged at specific positions of the target wafer, and the other grains except the specific positions are ordinary grains E.

[0032] When the target wafer is subjected to optoelectronic detection, the full-test machine will first confirm the origin of the wafer, and then calculate the positions of the ordinary grains based on the origin and test their optoelectronic properties; at the same time, since the whiteboard grains are arranged at fixed positions on the target wafer and their distances from the center position of the target wafer are fixed, once the origin is confirmed, the position coordinates of the whiteboard grains can be compared, and thus the position information of the whiteboard grains can also be deduced from the origin.

[0033] Accordingly, the steps of defining the BIN value of each die according to the optoelectronic performance and position information include:

[0034] (1) Divide the dies into normal dies and blank dies according to the position information;

[0035] Since the blank dies are arranged at specific positions of the target wafer, the dies can be divided into normal dies and blank dies according to the position information.

[0036] (2) Set the BIN value of the blank die to the maximum BIN value;

[0037] In the prior art, according to the optoelectronic performance of the blank die, the full test machine will identify the blank die as a non-conforming die. In the present invention, the BIN value of the blank die is specially set separately without considering its optoelectronic performance.

[0038] In this embodiment, the BIN value of the blank die is set to the maximum BIN value; wherein, the reference BIN value is set to 150 BIN, and the maximum BIN value is set to 170 BIN, but this is not a limitation, as long as the maximum BIN value is greater than the preset reference BIN value.

[0039] (3) Set the BIN value for the normal die according to the optoelectronic performance;

[0040] In the present invention, the BIN value of the normal die can be defined according to the existing classification rules, where different BIN values represent different optoelectronic performances; accordingly, the BIN value of the normal die in the present invention is less than the maximum BIN value.

[0041] Therefore, for the situation that the blank die is identified as a non-conforming die by the full test machine and it is difficult to sort and pick, the present invention utilizes the attribute that the position of the blank die is fixed, and can accurately output its position coordinates and assign a specific BIN value (i.e., 170 BIN).

[0042] S102, drive the appearance inspection machine to perform an appearance inspection on the target wafer to obtain the position information of the normal dies missed during the optoelectronic performance inspection and define the BIN value of the missed normal dies, and update the point measurement file according to the BIN value and position information of the missed normal dies to form an AOI file;

[0043] For the dies not identified and missed by the full test machine, the present invention can synchronously locate the dies during the appearance inspection, so as to combine the detected AOI data and the data in the point measurement file, and then fill in the positions of the dies missed during the optoelectronic performance inspection.

[0044] Correspondingly, the present invention sets the BIN value of the missing normal grains to the initial BIN value; wherein, the initial BIN value is set to 156 BIN, but not limited thereto, as long as the initial BIN value is greater than the preset reference BIN value. Therefore, in this embodiment, the grains that do not exist during the optoelectronic detection but are recognized by the appearance inspection machine can be defined as 156 BIN.

[0045] In the prior art, when the appearance inspection machine performs appearance inspection on the target wafer, since the BIN value of the blank grains is not set, the blank grains will be misrecognized as normal grains, so the BIN value of the blank grains will also be defined as 156 BIN. Different from the prior art, the present invention continues to use the BIN value recorded in the point measurement file for the blank grains (i.e., 170 BIN), and combines it with the BIN values of other normal grains to finally output the AOI file.

[0046] Therefore, in view of the limited CCD resolution of the full inspection machine, the appearance inspection machine locates the grains, outputs the position coordinates of the normal grains that are not recognized by the full inspection machine but are recognized by the appearance inspection machine and assigns a fixed BIN value (i.e., 156 BIN).

[0047] S103, divide the target wafer into at least one wafer area, update the BIN values of the normal grains in the wafer area according to the grain yield of the wafer area, and update the AOI file according to the new BIN values to form a sorting file;

[0048] In this embodiment, the target wafer is separated into four wafer areas. Specifically, according to the central position of the target wafer, the target wafer can be divided into four parts, and then the four wafer areas are processed separately.

[0049] Correspondingly, the step of updating the BIN values of the normal grains in the wafer area according to the grain yield of the wafer area includes:

[0050] (1) Judge whether the grain yield of the wafer area is greater than the preset yield;

[0051] In this embodiment, the preset yield is preferably 70%, but not limited thereto, and can be set according to the actual situation.

[0052] (2) When the judgment is yes, update the BIN value of the normal grains in the AOI file whose BIN value is less than or equal to the preset reference BIN value to the first BIN value, and update the BIN value of the normal grains in the AOI file whose BIN value is greater than the reference BIN value to the second BIN value;

[0053] In this embodiment, the first BIN value is set to 154 BIN, and the second BIN value is set to 147 BIN, but not limited thereto, as long as the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value.

[0054] For example, when the die yield of wafer area A > 70%, ordinary dies with BIN values ≤ 150 BIN (qualified dies) within the AOI bin are converted to 154 BIN. At the same time, ordinary dies with BIN values > 150 BIN (unqualified dies) within the AOI bin are converted to 147 BIN. Correspondingly, the BIN value of the blank die remains 170 BIN, and no bin conversion action is performed.

[0055] When the judgment is negative, the BIN values of ordinary dies within the wafer area are maintained.

[0056] For example, when the die yield of wafer area B ≤ 70%, it means that there are not many qualified dies within wafer area B. The existing sorting method can be maintained, and the reverse picking sorting method is not performed.

[0057] S104, drive the sorting machine to scan the target wafer to generate a scan map, convert the sorting bin to a virtual wafer map, and perform a fusion process on the dies in the scan map and the dies in the virtual wafer map according to the position information of the blank die to generate a combined bin;

[0058] After the sorting machine operates on the target wafer, the sorting machine can scan the target wafer to obtain a scan map and / or a scan bin, and the scan bin is used to record the position information of each die in the target wafer.

[0059] Correspondingly, the step of performing a fusion process on the dies in the scan map and the dies in the virtual wafer map according to the position information of the blank die to generate a combined bin includes:

[0060] (1) According to the position information of the blank die, match the dies in the scan map and the dies in the virtual wafer map one by one;

[0061] Perform a point-by-point combination of the virtual wafer map and the sorting bin according to the position information of the blank die, and make the positions of the dies in the scan map and the corresponding dies in the virtual wafer map match one by one.

[0062] (2) Use the dies in the virtual wafer map that cannot be matched as filling dies, and fill the filling dies into the corresponding positions in the scan map;

[0063] Automatically fill the position coordinates of the extra dies in the virtual wafer map into the corresponding positions.

[0064] (3) Generate a combined bin according to the coordinates and BIN values of each die in the scan map.

[0065] S105, drive the sorting machine to perform a sorting process on the target wafer according to the combined bin.

[0066] Further, during the sorting process of the target wafer, if the picking deviation occurs twice consecutively when sorting and filling the die, the sorting machine is driven to perform position compensation processing.

[0067] During the sorting operation, the real-time distance between the blank die is periodically calculated, and the sorting machine is driven to perform position compensation processing according to the real-time distance.

[0068] As Figure 3 shown, generally, the theoretical short-side distance of the blank die is X, and the theoretical long-side distance is Y, while the calculated actual short-side distance of the blank die is X1, and the actual long-side distance is Y1. Specifically:

[0069] X1 = (c1 / d1 + e1 / f1 + c2 / d2 + e2 / f2) / 4

[0070] Y1 = (a1 / b1 + a2 / b2) / 2

[0071] Where:

[0072] c1 is the distance between the blank die Q1 and the blank die Q2;

[0073] d1 is the number of ordinary die rows between the blank die Q1 and the blank die Q2;

[0074] e1 is the distance between the blank die Q2 and the blank die Q3;

[0075] f1 is the number of ordinary die rows between the blank die Q2 and the blank die Q3;

[0076] c2 is the distance between the blank die Q3 and the blank die Q4;

[0077] d2 is the number of ordinary die rows between the blank die Q3 and the blank die Q4;

[0078] e2 is the distance between the blank die Q4 and the blank die Q5;

[0079] f2 is the number of ordinary die rows between the blank die Q4 and the blank die Q5;

[0080] a1 is the distance between the blank die Q3 and the blank die Q6;

[0081] b1 is the number of ordinary die rows between the blank die Q3 and the blank die Q6;

[0082] a2 is the distance between the blank die Q3 and the blank die Q7;

[0083] b2 is the number of ordinary die rows between the blank die Q3 and the blank die Q7.

[0084] When the gap between the actual short side pitch X1 of the blank wafers and the theoretical short side pitch X of the blank wafers exceeds the preset short side threshold, the sorting machine platform needs to be driven to perform position compensation processing;

[0085] Similarly, when the gap between the actual long side pitch Y1 of the blank wafers and the theoretical long side pitch Y of the blank wafers exceeds the preset long side threshold, the sorting machine platform needs to be driven to perform position compensation processing.

[0086] Correspondingly, the X-axis compensation value is: + / -(X1 - X), and the Y-axis compensation value is: + / -(Y1 - Y).

[0087] In addition, if there are two consecutive picking offset alarms when picking the extra filled grains in the virtual wafer map, the sorting machine platform will also make appropriate position compensation.

[0088] Therefore, for the grains that the sorting machine platform fails to recognize but there are coordinate data in the sorting file, all are virtually filled in. The sorting machine platform must perform picking actions on the filled grains for virtual filling positions to further avoid offsets.

[0089] As can be seen from the above, the chip sorting method of the present invention can effectively avoid the situation that unqualified grains cannot be recognized due to the much lower CCD recognition rates of the full testing machine platform and the sorting machine platform than that of the appearance inspection machine platform, and the sorting machine platform does not pick and miss and flow to the client, resulting in customer complaints; to a certain extent, it reduces the picking alarms caused by the position offset of the blue film punctured and shrunk film grains during grain sorting, solves the problem of frequent alarms for the sorting machine platform to pick blank wafers, reduces the number of grains to be picked, and increases the output of normal grains.

[0090] Correspondingly, the present invention also discloses a computer device, including a memory and a processor, the memory stores a computer program, wherein when the processor executes the computer program, the steps of the above chip sorting method are realized. At the same time, the present invention also discloses a computer-readable storage medium, on which a computer program is stored, wherein when the computer program is executed by the processor, the steps of the above chip sorting method are realized.

[0091] As Figure 4 shown, the chip sorting system 100 of the present invention includes:

[0092] A computer device 1, including a memory and a processor, the memory stores a computer program, wherein when the processor executes the computer program, the steps of the above chip sorting method are realized;

[0093] A full testing machine platform 2, used for performing optoelectronic property detection on the target wafer;

[0094] An appearance inspection machine platform 3, used for performing appearance inspection on the target wafer;

[0095] The sorting machine 4 is used to scan the target wafer to generate a scan map and perform sorting processing on the target wafer.

[0096] The full test machine 2, the appearance inspection machine 3 and the sorting machine 4 are respectively connected to the computer device 1.

[0097] During operation, the computer device 1 drives the full test machine 2 to perform optoelectronic detection on the target wafer to obtain the optoelectronic performance and position information of each die in the target wafer, defines the BIN value of each die according to the optoelectronic performance and position information, and generates a point measurement file according to the BIN value and position information; then, the computer device 1 drives the appearance inspection machine 3 to perform appearance inspection on the target wafer to obtain the position information of the ordinary dies missed during optoelectronic detection and define the BIN value of the missed ordinary dies, and updates the point measurement file according to the BIN value and position information of the missed ordinary dies to form an AOI file; then, the computer device 1 divides the target wafer into at least one wafer area, updates the BIN value of the ordinary dies in the wafer area according to the die yield of the wafer area, and updates the AOI file according to the new BIN value to form a sorting file; subsequently, the computer device 1 drives the sorting machine 4 to scan the target wafer to generate a scan map, converts the sorting file into a virtual wafer map, and performs fusion processing on the dies in the scan map and the dies in the virtual wafer map according to the position information of the blank dies to generate a combined file; finally, the computer device 1 drives the sorting machine 4 to perform sorting processing on the target wafer according to the combined file.

[0098] Therefore, the chip sorting system 100 of the present invention can automatically determine the fixed position of the blank dies, output a combined document by fixing the BIN value of the blank dies and controlling the transfer of a certain yield, synchronize the sorting scan physical map file combination, supplement the virtual die coordinates to perform the sorting action, and at the same time perform a sorting method with positioning compensation during sorting.

[0099] The above is the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements are also regarded as the protection scope of the present invention.

Claims

1. A method for chip sorting, characterized in that, Including: Driving a full test machine to perform optoelectronic detection on a target wafer to obtain the optoelectronic performance and position information of each die in the target wafer, defining the BIN value of each die according to the optoelectronic performance and position information, and generating a spot test file according to the BIN value and position information, where the die includes normal dies and blank dies; Driving an appearance detection machine to perform appearance detection on the target wafer to obtain the position information of the normal dies missed during the optoelectronic detection and define the BIN value of the missed normal dies, and updating the spot test file according to the BIN value and position information of the missed normal dies to form an AOI file; Dividing the target wafer into at least one wafer area, updating the BIN value of the normal dies in the wafer area according to the die yield of the wafer area, and updating the AOI file according to the new BIN value to form a sorting file; Driving a sorting machine to scan the target wafer to generate a scan image, converting the sorting file into a virtual wafer image, and performing a fusion process on the dies in the scan image and the dies in the virtual wafer image according to the position information of the blank dies to generate a combined file; Driving the sorting machine to perform sorting processing on the target wafer according to the combined file.

2. The chip sorting method according to claim 1, wherein The step of defining the BIN value of each die according to the optoelectronic performance and position information includes: Dividing the die into normal dies and blank dies according to the position information; Setting the BIN value of the blank die to the maximum BIN value, where the maximum BIN value is greater than a preset reference BIN value; Setting the BIN value for the normal die according to the optoelectronic performance, where the BIN value of the normal die is less than the maximum BIN value.

3. The chip sorting method according to claim 1, characterized in that, The step of defining the BIN value of the missed normal dies includes: Setting the BIN value of the missed normal die to the initial BIN value, where the initial BIN value is greater than a preset reference BIN value.

4. The chip sorting method according to claim 1, wherein, The step of updating the BIN value of the normal dies in the wafer area according to the die yield of the wafer area includes: Judging whether the die yield of the wafer area is greater than a preset yield; When the judgment is yes, updating the BIN value of the normal dies in the AOI file whose BIN value is less than or equal to the preset reference BIN value to the first BIN value, and updating the BIN value of the normal dies in the AOI file whose BIN value is greater than the reference BIN value to the second BIN value, where the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value; When the judgment is no, keeping the BIN value of the normal dies in the wafer area.

5. The chip sorting method according to claim 1, characterized in that The step of performing a fusion process on the dies in the scan image and the dies in the virtual wafer image according to the position information of the blank dies to generate a combined file includes: Matching the dies in the scan image and the dies in the virtual wafer image one by one according to the position information of the blank dies; Taking the dies in the virtual wafer image that cannot be matched as filling dies, and filling the filling dies into the corresponding positions in the scan image; Generating a combined file according to the coordinates and BIN values of each die in the scan image.

6. The chip sorting method according to claim 1, wherein During the process of sorting the target wafer, the real-time distance between the blank dies is calculated regularly, and the sorting machine is driven to perform position compensation processing according to the real-time distance.

7. The chip sorting method according to claim 6, wherein, During the process of sorting the target wafer, if the picking deviation occurs twice continuously when sorting the filled dies, the sorting machine is driven to perform position compensation processing.

8. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, the steps of the chip sorting method according to any one of claims 1 to 7 are implemented.

9. A chip sorting system, characterized in that, Including: The computer device according to claim 8; A full-test machine for performing optoelectronic detection on the target wafer; An appearance detection machine for performing appearance detection on the target wafer; A sorting machine for scanning the target wafer to generate a scan map and performing sorting processing on the target wafer.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, the steps of the chip sorting method according to any one of claims 1 to 7 are implemented.

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