Apparatus for detecting switch damage, method of operating same, and method of operating power management integrated circuit

Abstract

The invention provides an apparatus for detecting switch damage, a method of operating the same, and a method of operating a power management integrated circuit. The method of operating the apparatus includes: measuring a first temperature of a switch included in the power management integrated circuit; detecting an input voltage applied to the switch; measuring a second temperature of the switch based on the detected input voltage being the supply voltage; obtaining a first temperature change amount of the switch based on the first temperature and the second temperature; comparing the first temperature change amount with a threshold temperature change amount; and selectively turning off the switch based on a result of the comparison.

Description

[0001] This application is based on and claims the benefit of priority from Korean Patent Application No. 10-2023-0175446 filed on December 6, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] One or more disclosed example embodiments relate to an apparatus for detecting damage to a switch of a circuit for managing power and a method of operating the apparatus. Background Art

[0003] An electronic device may include a power management integrated circuit (PMIC) for supplying appropriate power to a circuit included in the electronic device. When a switch of the PMIC is damaged and a leakage current flows through the switch, overheating and fire may occur in the electronic device. Therefore, a method of detecting damage to a switch of the PMIC is needed. Summary of the invention

[0004] One or more disclosed example embodiments provide methods and apparatus for detecting damage to a switch in a circuit that manages power.

[0005] According to one aspect of the disclosed example embodiments, there is provided a method of operating an apparatus for detecting damage to a switch included in a power management integrated circuit, the method comprising: measuring a first temperature of the switch included in the power management integrated circuit; detecting an input voltage applied to the switch; measuring a second temperature of the switch based on the detected input voltage being a power supply voltage; obtaining a first temperature change of the switch based on the first temperature and the second temperature; comparing the first temperature change with a threshold temperature change; and selectively disconnecting the switch based on a result of the comparison.

[0006] According to one aspect of the disclosed example embodiments, there is provided an apparatus for detecting damage to a switch of a power management integrated circuit, the apparatus comprising: a temperature sensor configured to measure a first temperature of the switch; a voltage detector configured to detect an input voltage applied to the switch; and a control circuit, wherein the temperature sensor is further configured to measure a second temperature of the switch based on the detected input voltage being a power supply voltage, and wherein the control circuit is configured to: obtain a first temperature change of the switch based on the first temperature and the second temperature; compare the first temperature change with a threshold temperature change; and selectively disconnect the switch based on a result of the comparison.

[0007] According to one aspect of the disclosed example embodiments, there is provided a method for operating a power management integrated circuit including a first switch and a second switch, the method including: measuring a first temperature of at least one of the first switch and the second switch; detecting an input voltage applied to the at least one switch; measuring a second temperature of the at least one switch based on the detected input voltage being a power supply voltage; obtaining a temperature change of the at least one switch based on the first temperature and the second temperature; comparing the temperature change with a threshold temperature change; and selectively disconnecting the at least one switch based on a result of the comparison, wherein the first switch is a high-side switch and the second switch is a low-side switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: Figure 1 is a block diagram illustrating a power management integrated circuit (PMIC) and a load according to one or more example embodiments; Figure 2 is a block diagram illustrating a damage detector according to one or more example embodiments; Figure 3 is a block diagram illustrating a PMIC including one or more switches according to one or more example embodiments; Figure 4 is a circuit diagram illustrating a switch of a PMIC according to one or more example embodiments; Figure 5A is a flow chart of a method of operating a damage detector according to one or more example embodiments; Figure 5B is a flow chart of iterative operations of a damage detector according to one or more example embodiments; Figure 6 is a flowchart of a method of operating a PMIC according to one or more example embodiments; Figure 7 is a flow chart of a method of operating a PMIC including one or more switches according to one or more example embodiments; Figure 8 is a block diagram illustrating a PMIC including a damage detector that performs temperature sensing and current sensing according to one or more example embodiments; Fig. 9 is a diagram of a system to which a storage device according to one or more example embodiments is applied; Fig.10 is a diagram of a Universal Flash Storage (UFS) system according to one or more example embodiments; and Fig.11 is a block diagram of a wireless communication apparatus according to one or more example embodiments. DETAILED DESCRIPTION

[0009] Hereinafter, example embodiments are described with reference to the accompanying drawings.

[0010] Figure 1 is a block diagram illustrating a power management integrated circuit (PMIC) and a load according to one or more example embodiments.

[0011] Reference Figure 1 , the PMIC 100 includes a damage detector 200 and a switch 110. The PMIC 100 may provide a suitable voltage and a suitable current to the load 300. For example, the PMIC 100 may convert an AC current into a DC current, convert a high voltage into a low voltage, and / or distribute the current. The PMIC 100 may also include a component for providing a suitable voltage and current to the load 300. The PMIC 100 may receive a power supply voltage, generate a voltage, and provide the voltage to the load 300 under the control of the host.

[0012] The PMIC 100 includes a damage detector 200 and a switch 110. The switch 110 may be turned on or off. According to one or more embodiments, when the switch 110 is turned on, the PMIC 100 may provide a voltage to the load 300, and when the switch 110 is turned off, the PMIC 100 may not provide a voltage to the load 300.

[0013] According to one or more embodiments, the damage detector 200 may measure a first temperature of the switch 110. The first temperature may be an initial temperature of the switch 110, which is a temperature of the switch 110 before a power supply voltage is applied to the switch 110. The damage detector 200 may detect an input voltage Vin applied to the switch 110. According to one or more embodiments, the damage detector 200 may measure the first temperature of the switch 110 before detecting the input voltage Vin. When the input voltage Vin is greater than or equal to the power supply voltage, the damage detector 200 may measure a second temperature of the switch 110. For example, when the input voltage Vin is the power supply voltage, the damage detector 200 may measure the second temperature of the switch 110. The power supply voltage may be VDD. The second temperature may be a temperature of the switch 110 when the power supply voltage is applied to the switch 110. When the input voltage Vin is less than the power supply voltage, the damage detector 200 may (e.g., periodically) re-measure the first temperature. The damage detector 200 may obtain a first temperature change amount of the switch 110 based on the first temperature (e.g., initially measured or re-measured) and the second temperature. The damage detector 200 may compare the first temperature change amount to a threshold temperature change amount.

[0014] The damage detector 200 may disconnect the switch 110 based on a comparison result between the first temperature change amount and the threshold temperature change amount. For example, when the first temperature change amount is greater than the threshold temperature change amount, the damage detector 200 may disconnect the switch 110. As a result, the damaged switch 110 may not be turned on, thereby protecting the PMIC 100. In addition, when the first temperature change amount is less than or equal to the threshold temperature change amount, the damage detector 200 may control the switch 110 to operate normally.

[0015] The damage detector 200 may repeatedly check whether the switch 110 is damaged by periodically sensing the input voltage Vin applied to the switch 110. For example, the damage detector 200 may measure a third temperature of the switch 110 when detecting that the power supply voltage is applied to the switch 110 after controlling the switch 110 to operate normally (i.e., after measuring the first temperature and the second temperature and controlling the switch 110 to operate normally based on them). The third temperature may be the temperature of the switch 110 when the power supply voltage is applied to the switch 110. The damage detector 200 may calculate a second temperature change amount of the switch 110 based on the first temperature and the third temperature. The damage detector 200 may compare the second temperature change amount with a threshold temperature change amount. When the second temperature change amount is greater than the threshold temperature change amount, the damage detector 200 may disconnect the switch 110.

[0016] According to one or more embodiments, the first temperature change amount may be a difference between the second temperature and the first temperature. According to another embodiment, the first temperature change amount may be a ratio of the second temperature to the first temperature. However, these are merely examples, and embodiments are not limited thereto.

[0017] As described above, the damage detector 200 according to one or more embodiments may detect whether the switch 110 of the PMIC 100 is damaged before the damaged switch 110 operates.

[0018] The damage detector 200 according to one or more embodiments may detect whether the switch 110 of the PMIC 100 is damaged without sensing a leakage current of the switch 110 .

[0019] The damage detector 200 according to one or more embodiments may detect damage of the switch 110 of the PMIC 100 by detecting a temperature change of the switch 110 .

[0020] Even when the leakage current of the switch 110 is very small, the damage detector 200 according to one or more embodiments may detect damage of the switch 110 by detecting a temperature change of the switch 110 according to whether a power voltage is applied to the switch 110 of the PMIC 100 .

[0021] The PMIC 100 according to one or more embodiments may independently detect whether the switch 110 of the PMIC 100 is damaged by detecting a temperature change of the PMIC 100 .

[0022] The PMIC 100 according to one or more embodiments may be included in various electronic devices. For example, the PMIC 100 may be included in a storage device including at least one of a volatile memory (such as a dynamic random access memory (DRAM), a static random access memory (SRAM), etc.) and a non-volatile memory (NVM), and may also be included in a wireless communication device.

[0023] Figure 2 is a block diagram illustrating a damage detector according to one or more example embodiments. Figure 1 describe Figure 2 , and repeated descriptions may be omitted.

[0024] Reference Figure 2 , the PMIC 100 includes a damage detector 200 and a switch 110 .

[0025] The damage detector 200 may include a voltage detector 210 , a control circuit 220 , and a temperature sensor 230 .

[0026] According to one or more embodiments, the damage detector 200 may include a temperature sensor 230 that measures the temperature of the switch 110, a voltage detector 210 that detects an input voltage Vin applied to the switch 110, and a control circuit 220. The temperature sensor 230 may periodically measure the temperature of the switch 110, and may transmit the measured temperature value to the control circuit 220. The voltage detector 210 may periodically detect the input voltage Vin applied to the switch 110, and may transmit the magnitude of the input voltage Vin to the control circuit 220.

[0027] The control circuit 220 may measure a first temperature of the switch 110 through the temperature sensor 230. The first temperature may be an initial temperature of the switch 110, which is a temperature of the switch 110 before the power supply voltage is applied to the switch 110. When the input voltage Vin is greater than or equal to the power supply voltage, the control circuit 220 may measure a second temperature of the switch 110 through the temperature sensor 230. For example, when the input voltage Vin is the power supply voltage, the control circuit 220 may measure the second temperature of the switch 110 through the temperature sensor 230. When the input voltage Vin of the control circuit 220 is less than the power supply voltage of the switch 110, the control circuit 220 may re-measure or re-sens the first temperature of the switch 110 through the temperature sensor 230 (e.g., periodically).

[0028] The control circuit 220 may calculate a first temperature change amount of the switch 110 based on the first temperature and the second temperature. The control circuit 220 may compare the first temperature change amount with a threshold temperature change amount. The control circuit 220 may disconnect the switch 110 based on the comparison result between the first temperature change amount and the threshold temperature change amount. When the first temperature change amount is greater than the threshold temperature change amount, the control circuit 220 may control the switch 110 to disconnect. When the first temperature change amount is less than or equal to the threshold temperature change amount, the control circuit 220 may control the switch 110 to operate normally. For example, the switch 110 may be periodically and / or repeatedly turned on and off.

[0029] According to one or more embodiments, after the control circuit 220 measures the first temperature of the switch 110 through the temperature sensor 230 , the control circuit 220 may detect the power supply voltage applied to the switch 110 through the voltage detector 210 .

[0030] The control circuit 220 may repeatedly check whether the switch 110 is damaged by repeating the above operation. For example, the control circuit 220 may repeatedly check whether the switch 110 is damaged by periodically sensing the input voltage Vin applied to the switch 110. According to one or more embodiments, after controlling the switch 110 to operate normally, the control circuit 220 may measure the third temperature of the switch 110 through the temperature sensor 230 when the power supply voltage is detected to be applied to the switch 110. The control circuit 220 may calculate the second temperature change amount of the switch 110 based on the first temperature and the third temperature. The control circuit 220 may compare the second temperature change amount with the threshold temperature change amount. When the second temperature change amount is greater than the threshold temperature change amount, the control circuit 220 may disconnect the switch 110.

[0031] Figure 3 is a block diagram illustrating a PMIC including one or more switches according to one or more example embodiments.

[0032] Reference Figure 3 , the PMIC 100 may include a damage detector 200, a first switch 110a, and a second switch 110b. The PMIC 100 may periodically turn on and off each of the first switch 110a and the second switch 110b, and may provide a voltage smaller than the input voltage Vin to the load 300.

[0033] The damage detector 200 may include a voltage detector 210, a control circuit 220, a first temperature sensor 230a, and a second temperature sensor 230b. The first temperature sensor 230a may periodically sense the temperature of the first switch 110a and send the temperature information of the first switch 110a to the control circuit 220. The second temperature sensor 230b may periodically sense the temperature of the second switch 110b and send the temperature information of the second switch 110b to the control circuit 220.

[0034] According to one or more embodiments, the control circuit 220 may measure a first temperature of at least one of the first switch 110a and the second switch 110b. The first temperature may be an initial temperature of at least one of the first switch 110a and the second switch 110b. The first temperature may be measured before a power supply voltage is applied to the first switch 110a or the second switch 110b. The control circuit 220 may detect an input voltage Vin applied to the first switch 110a. When the input voltage Vin is greater than or equal to the power supply voltage, the control circuit 220 may measure a second temperature of the at least one switch. When the input voltage Vin is less than the power supply voltage, the control circuit 220 may (e.g., periodically) re-measure the first temperature of the at least one switch.

[0035] The control circuit 220 may generate a temperature change amount of at least one switch based on a first temperature and a second temperature of the at least one switch. The control circuit 220 may compare the temperature change amount with a threshold temperature change amount. The control circuit 220 may disconnect the corresponding at least one switch based on a comparison result between the temperature change amount of the corresponding at least one switch and the threshold temperature change amount. For example, when the temperature change amount of the corresponding at least one switch is greater than the threshold temperature change amount, the control circuit 220 may disconnect the corresponding at least one switch. When the temperature change amount of the corresponding at least one switch is less than or equal to the threshold temperature change amount, the control circuit 220 may control the corresponding at least one switch to operate normally.

[0036] The first switch 110a may be a high-side switch, and the second switch 110b may be a low-side switch. The high-side switch may refer to a switch that receives an input voltage, and the low-side switch may refer to a switch that is connected to ground. In other words, the low-side switch may be referred to as a grounding switch.

[0037] According to one or more embodiments, the damage detector 200 may detect whether at least one of the first switch 110a and the second switch 110b is damaged based on whether the power supply voltage is applied to the first switch 110a. Specifically, when the power supply voltage is applied to the first switch 110a, the damage detector 200 may sense the temperature of the first switch 110a through the first temperature sensor 230a, and may sense the temperature of the second switch 110b through the second temperature sensor 230b. When the temperature change amount of the first switch 110a is greater than the threshold temperature change amount, the damage detector 200 may disconnect the first switch 110a. When the temperature change amount of the second switch 110b is greater than the threshold temperature change amount, the damage detector 200 may disconnect the second switch 110b.

[0038] As described above, the damage detector 200 according to one or more embodiments may detect a power supply voltage applied to one switch among one or more switches included in the PMIC 100, and may detect whether one or more switches are damaged by detecting a temperature change of the one or more switches according to the power supply voltage.

[0039] The PMIC 100 may include various switches, and even when the PMIC 100 includes various switches, damage of any one of the switches may be detected as described above.

[0040] Figure 4 is a circuit diagram showing a switch of a PMIC according to one or more example embodiments. Figure 1 and Figure 2 To describe Figure 4 .

[0041] Reference Figure 4 , the switch 110 may be a metal oxide semiconductor field effect transistor (MOSFET). For example, the switch 110 may be an N-type metal oxide semiconductor (NMOS) transistor NM1. When the input voltage Vin is applied to the drain terminal of the switch 110, the drain current I LEAK The damage detector 200 according to one or more embodiments may flow into the switch 110 when the switch 110 is damaged. LEAK Whether the switch is damaged is determined by detecting the power supply voltage applied to the switch 110 without detecting the temperature change of the switch 110.

[0042] The damage detector 200 may control the switch 110 not to operate. For example, the damage detector 200 may control the switch 110 not to operate based on detecting damage of the switch 110. For example, the damage detector 200 may send a signal for a protection mode to the switch 110. As an example, the damage detector 200 may not apply a voltage that turns on the transistor NM1 to the gate terminal of the transistor NM1.

[0043] The damage detector 200 may control the switch 110 to operate normally. For example, the damage detector 200 may control the switch 110 to operate normally based on not detecting damage to the switch 110. For example, the damage detector 200 may send a signal for a normal mode to the switch 110. For example, the damage detector 200 may apply a voltage to turn on the transistor NM1 to the gate terminal of the transistor NM1.

[0044] and Figure 4 Differently, in another embodiment, the switch 110 may be a P-type metal oxide semiconductor (PMOS) transistor.

[0045] Figure 5A is a flow chart of a method of operating a damage detector according to one or more example embodiments. Figure 1 and Figure 2 To describe Figure 5A .

[0046] Reference Figure 5A , in operation S101 a , the damage detector 200 measures a first temperature of the switch 110 of the PMIC 100 .

[0047] In operation S103a, the damage detector 200 may detect the input voltage Vin applied to the switch 110. When the input voltage Vin is greater than or equal to the power voltage, the damage detector 200 may detect the power voltage through the voltage detector 210. When the damage detector 200 does not detect the power voltage, the first temperature of the switch 110 may be remeasured by returning to operation S101a.

[0048] In operation S105 a , when the damage detector 200 detects the power supply voltage, the damage detector 200 may measure a second temperature of the switch 110 of the PMIC 100 .

[0049] In operation S107 a , the damage detector 200 may compare the temperature change amount of the switch 110 with a threshold temperature change amount.

[0050] In operation S109a, when the temperature change amount of the switch 110 is greater than the threshold temperature change amount, the damage detector 200 may turn off the switch 110. As a result, the damaged switch 110 may not be turned on, thereby protecting the PMIC 100.

[0051] In operation S111 a , when the temperature change amount of the switch 110 is less than or equal to the threshold temperature change amount, the damage detector 200 may control the switch 110 to operate normally.

[0052] Figure 5B is a flow chart of iterative operations of a damage detector according to one or more example embodiments. Figure 1 , Figure 2 and 5A To describe Figure 5B .

[0053] Reference Figure 5B In operation S101b, when the power supply voltage is re-detected after the switch 110 is controlled to operate normally, the damage detector 200 may re-measure the third temperature of the switch 110 based on the re-detected power supply voltage.

[0054] In operation S103b, the damage detector 200 may calculate a second temperature change amount of the switch 110 based on the first temperature and the third temperature.

[0055] In operation S105b, the damage detector 200 may compare the second temperature change amount with a threshold temperature change amount.

[0056] In operation S107 b , when the second temperature change amount is greater than the threshold temperature change amount, the damage detector 200 may turn off the switch 110 .

[0057] In operation S109b, when the second temperature change amount is less than or equal to the threshold temperature change amount, the damage detector 200 may control the switch 110 to operate normally.

[0058] Figure 6 is a flowchart of a method of operating a PMIC according to one or more example embodiments. Figure 1 and Figure 2 To describe Figure 6 .

[0059] Reference Figure 6 In operation S201, the PMIC 100 may (for example, using Figure 2 The temperature sensor 230 in the embodiment measures and stores the initial temperature (or first temperature) of the switch 110 .

[0060] In operation S203, the PMIC 100 may (for example, using Figure 2 The voltage detector 210 in FIG. 1 checks whether the power voltage is applied to the switch 110. When the power voltage is not applied to the switch 110, the PMIC 100 may measure and store the initial temperature of the switch 110 by returning to operation S201.

[0061] In operation S205 , when the power voltage is applied to the switch 110 , the PMIC 100 may measure and store a second temperature of the switch 110 .

[0062] In operation S207 , the PMIC 100 may compare the threshold temperature change amount with a value obtained by subtracting the first temperature from the second temperature.

[0063] In operation S209, when a value obtained by subtracting the first temperature from the second temperature is greater than a threshold temperature change amount, the PMIC 100 may enter a protection mode. The protection mode may refer to a mode in which the damaged switch 110 is not turned on.

[0064] In operation S211, when a value obtained by subtracting the first temperature from the second temperature is less than or equal to a threshold temperature change amount, the PMIC 100 may enter a normal mode. The normal mode may refer to a mode in which the switch 110 is normally turned on and off.

[0065] In operation S213 , the PMIC 100 may determine whether a PMIC enable signal is received. When the PMIC 100 does not receive the PMIC enable signal within a certain period of time (“No” at operation S213 ), the PMIC 100 may recheck whether a power supply voltage is applied to the switch 110 by returning to operation S203 .

[0066] In operation S215 , when the PMIC 100 receives the PMIC enable signal (“Yes” at operation S213 ), the switch 110 may operate normally.

[0067] Figure 7 is a flow chart of a method of operating a PMIC including one or more switches according to one or more example embodiments. Figure 1 and Figure 3 To describe Figure 7 .

[0068] Reference Figure 7 In operation 301 , the PMIC 100 may measure a first temperature of at least one of the first switch 110 a and the second switch 110 b .

[0069] In operation 303 , the PMIC 100 may detect an input voltage Vin applied to the first switch 110 a .

[0070] In operation 305, when the input voltage Vin is greater than or equal to the power supply voltage, the PMIC 100 may measure the second temperature of the at least one switch. When the input voltage Vin is less than the power supply voltage, the PMIC 100 may (eg, periodically) remeasure the first temperature of the at least one switch.

[0071] In operation 307 , the PMIC 100 may calculate a temperature change amount of at least one switch based on the first temperature and the second temperature.

[0072] In operation 309 , the PMIC 100 may compare the temperature change amount with a threshold temperature change amount.

[0073] In operation 311, the PMIC 100 may disconnect at least one switch based on a comparison result between a temperature change amount of the corresponding at least one switch and a threshold temperature change amount. For example, when the temperature change amount of the corresponding at least one switch is greater than the threshold temperature change amount, the PMIC 100 may disconnect the corresponding at least one switch. In addition, when the temperature change amount of the corresponding at least one switch is less than or equal to the threshold temperature change amount, the PMIC 100 may control the corresponding at least one switch to operate normally.

[0074] Figure 8 is a block diagram illustrating a PMIC including a damage detector that performs temperature sensing and current sensing according to one or more example embodiments.

[0075] Reference Figure 8 , the PMIC 400 according to one or more embodiments may include a damage detector 200, a first switch 110a, a second switch 110b, and a current sensor 410. The first switch 110a may be a high-side switch, and the second switch 110b may be a low-side switch. The high-side switch may represent a switch that receives an input voltage Vin, and the low-side switch may represent a switch that is connected to ground. In other words, the low-side switch may be referred to as a ground switch.

[0076] When the power voltage is applied to the first switch 110 a , the PMIC 400 may determine whether the first switch 110 a is damaged based on an amount of temperature change of the first switch 110 a .

[0077] The current sensor 410 of the PMIC 400 can determine whether the second switch 110b is damaged by sensing the leakage current flowing through the second switch 110b. Additionally or alternatively, when the power voltage is applied to the first switch 110a, the PMIC 400 can determine whether the second switch 110b is damaged based on the temperature change amount of the second switch 110b.

[0078] In other words, as described above, the PMIC 400 according to one or more embodiments can detect damage to the high-side switch by sensing the temperature of the high-side switch, and can detect damage to the low-side switch by sensing at least one of the temperature of the low-side switch and the current flowing through the low-side switch.

[0079] Fig. 9 is a diagram of a system to which a storage device according to one or more example embodiments is applied. Figure 1 and Figure 2 To describe Fig. 9 .

[0080] Reference Fig. 9 , a diagram showing a system 1000 to which a storage device according to one or more embodiments is applied. Fig. 9The system 1000 may be substantially a mobile system such as a mobile phone, a smart phone, a tablet personal computer, a wearable device, a healthcare device, and / or an Internet of Things (IoT) device, but is not necessarily limited thereto. Fig. 9 The system 1000 may also include a personal computer, a laptop computer, a server, a media player, and / or an automotive device (such as a navigation system).

[0081] Reference Fig. 9 , system 1000 may include a main processor 1100, memories 1200a and 1200b, and storage devices 1300a and 1300b, and may also include one or more of an image capture device 1410, a user input device 1420, a sensor 1430, a communication device 1440, a display 1450, a speaker 1460, a power supply device 1470, and a connection interface 1480.

[0082] The main processor 1100 may control the overall operation of the system 1000, and more specifically, may control operations of other components constituting the system 1000. The main processor 1100 may be implemented as a general processor, a microprocessor, a microcontroller, a dedicated processor, and / or an application processor.

[0083] The main processor 1100 may include one or more CPU cores 1110, and may further include a controller 1120 to control memories 1200a and 1200b and / or storage devices 1300a and 1300b. According to one or more embodiments, the main processor 1100 may further include an accelerator 1130 as a dedicated circuit for high-speed data calculations, such as artificial intelligence (AI) data calculations. The accelerator 1130 may include a graphics processing unit (GPU), a neural processing unit (NPU), and / or a data processing unit (DPU), and may also be implemented as a separate chip physically independent of other components of the main processor 1100.

[0084] Memories 1200a and 1200b may be used as main memory of system 1000 and may include volatile memory such as SRAM and / or DRAM, but may also include NVM such as flash memory, phase change random access memory (PRAM), and / or resistive random access memory (RRAM). Memories 1200a and 1200b may also be implemented in the same package as main processor 1100.

[0085] The memory devices 1300a and 1300b may be used as non-volatile memory devices that store data regardless of whether power is supplied or not, and may have a relatively large storage capacity compared to the memories 1200a and 1200b. The memory devices 1300a and 1300b may include memory controllers (or controllers) 1310a and 1310b and NVMs (e.g., flash memories) 1320a and 1320b that store data under the control of the memory controllers 1310a and 1310b. The NVMs 1320a and 1320b may include flash memories of a two-dimensional (2D) structure or a three-dimensional (3D) vertical NAND (V-NAND) structure, but may also include other types of NVMs (such as PRAM and / or RRAM).

[0086] The storage devices 1300a and 1300b may be included in the system 1000 while being physically separated from the main processor 1100, or may be implemented in the same package as the main processor 1100. In addition, the storage devices 1300a and 1300b may be in the same form as a solid-state device SSD or a memory card, and may be detachably coupled to other components of the system 1000 through an interface (such as a connection interface 1480 to be described below). The storage devices 1300a and 1300b may be, but are not necessarily limited to, devices to which a standard protocol (such as Universal Flash Storage (UFS), Embedded Multimedia Card (eMMC), and / or Non-Volatile Memory Express (NVMe)) is applied.

[0087] The image capture device 1410 may capture still images and / or moving images and may include a camera, a camcorder, and / or a webcam.

[0088] The user input device 1420 may receive various types of data input from a user of the system 1000 and may include a touch pad, a keypad, a keyboard, a mouse, and / or a microphone.

[0089] The sensor 1430 may detect various types of physical quantities that may be obtained from the outside of the system 1000, and may convert the detected physical quantities into electrical signals. The sensor 1430 may include a temperature sensor, a pressure sensor, an illumination sensor, a position sensor, an acceleration sensor, a biosensor, and / or a gyro sensor.

[0090] The communication device 1440 may exchange signals with other devices outside the system 1000 according to various communication protocols. The communication device 1440 may be implemented to include an antenna, a transmitter, and / or a modem.

[0091] Display 1450 and speaker 1460 may be used as output devices for outputting visual information and audio information, respectively, to a user of system 1000 .

[0092] The power supply device 1470 may appropriately convert power supplied from a battery (not shown) built in the system 1000 and / or an external power source, and supply the converted power to each component of the system 1000. The power supply device 1470 may include a damage detector 200 according to one or more embodiments. The damage detector 200 may detect damage to any one of the switches of the power supply device 1470.

[0093] The connection interface 1480 may provide a connection between the system 1000 and an external device that is connected to the system 1000 and can exchange data with the system 1000. The connection interface 1480 may be implemented in various interface formats such as Advanced Technology Attachment (ATA), Serial ATA (SATA), External SATA (e-SATA), Small Computer Small Interface (SCSI), Serial Attached SCSI (SAS), Peripheral Component Interconnect (PCI), PCI Express (PCIe), NVMe, IEEE 1394, Universal Serial Bus (USB), Secure Digital (SD) Card, MultiMedia Card (MMC), eMMC, UFS, Embedded Universal Flash Storage (eUFS), and Compact Flash (CF) Card interfaces.

[0094] Fig.10 is a diagram of a UFS system according to one or more example embodiments. Figure 1 , Figure 2 and Fig. 9 To describe Fig.10 .

[0095] Reference Fig.10 , a diagram showing a UFS system 2000 according to one or more embodiments. The UFS system 2000, which may be a system conforming to the UFS standard issued by the Joint Electron Device Engineering Council (JEDEC), may include a UFS host 2100, a UFS device 2200, and a UFS interface 2300. Fig. 9 The description of system 1000 may also be used without Fig.10 The following descriptions apply to the extent of the conflict Fig.10 UFS system 2000.

[0096] Reference Fig.10 , the UFS host 2100 and the UFS device 2200 may be interconnected via a UFS interface 2300. Fig. 9 When the main processor 1100 in the embodiment is an application processor, the UFS host 2100 may be implemented as a part of the application processor. The UFS host controller 2110 and the host memory 2140 may correspond to Fig. 9 The UFS device 2200 may correspond to the controller 1120 of the main processor 1100 and the memories 1200a and 1200b. Fig. 9 The storage devices 1300a and 1300b in the embodiment, and the UFS device controller 2210 and the NVM 2220 may correspond to Fig. 9 The storage controllers 1310a and 1310b and the NVMs 1320a and 1320b in FIG.

[0097] The UFS host 2100 may include a UFS host controller 2110, an application 2120, a UFS driver 2130, a host memory 2140, and a UFS interconnect (UIC) layer 2150. The UFS device 2200 may include a UFS device controller 2210, an NVM 2220, a storage interface 2230, a device memory 2240, a UIC layer 2250, and a regulator 2260. The NVM 2220 may include a plurality of memory cells 2221. The plurality of memory cells 2221 may include a V-NAND flash memory of a 2D or 3D structure, but may also include other types of NVMs such as PRAM and / or RRAM. The UFS device controller 2210 may be connected to the NVM 2220 through a storage interface 2230. The storage interface 2230 may be implemented to comply with a standard protocol such as a toggle or ONFI (Open NAND Flash Interface).

[0098] The application 2120 may represent a program that wishes to communicate with the UFS device 2200 to use the functions of the UFS device 2200. The application 2120 may send an input-output request (IOR) to the UFS driver 2130 to perform input and output to the UFS device 2200. The IOR may represent a read request, a write request, and / or a discard request for data, but is not necessarily limited thereto.

[0099] The UFS driver 2130 can manage the UFS host controller 2110 through a UFS host controller interface (HCI). The UFS driver 2130 can convert the IOR generated by the application 2120 into a UFS command defined by the UFS standard, and can send the UFS command to the UFS host controller 2110. One IOR can be converted into a plurality of UFS commands. The UFS command can basically be a command defined by the SCSI standard, but can also be a command exclusive to the UFS standard.

[0100] The UFS host controller 2110 may transmit the UFS command converted by the UFS driver 2130 to the UIC layer 2250 of the UFS device 2200 through the UIC layer 2150 and the UFS interface 2300. In this process, the UFS host register 2111 of the UFS host controller 2110 may be used as a command queue (CQ).

[0101] The UIC layer 2150 of the UFS host 2100 may include a MIPI M-PHY 2151 and a MIPI UniPro 2152 , and the UIC layer 2250 of the UFS device 2200 may further include a MIPI M-PHY 2252 and a MIPI UniPro 2251 .

[0102] The UFS interface 2300 may include a line transmitting a reference clock REF_CLK, a line transmitting a hardware reset signal RESET_n to the UFS device 2200 , a pair of lines transmitting a differential input signal pair DIN_t and DIN_c, and a pair of lines transmitting a differential output signal pair DOUT_t and DOUT_c.

[0103] The frequency value of the reference clock REF_CLK provided from the UFS host 2100 to the UFS device 2200 may be one of the following four values: 19.2 MHz, 26 MHz, 38.4 MHz, and 52 MHz, but is not necessarily limited thereto. The UFS host 2100 may change the frequency value of the reference clock REF_CLK even during operation (e.g., during data transmission and reception between the UFS host 2100 and the UFS device 2200). The UFS device 2200 may generate clocks of various frequencies from the reference clock REF_CLK provided by the UFS host 2100 using a phase-locked loop (PLL) or the like. In addition, the UFS host 2100 may set the data rate value between the UFS host 2100 and the UFS device 2200 by the frequency value of the reference clock REF_CLK. In other words, the data rate value may be determined based on the frequency value of the reference clock REF_CLK.

[0104] The UFS interface 2300 may support multiple channels, and each channel may be implemented as a different line pair. For example, the UFS interface 2300 may include one or more receiving channels and one or more transmitting channels. Fig.10 In the embodiment, a pair of lines configured to transmit a differential input signal pair DIN_t and DIN_c may constitute a receiving channel, and a pair of lines configured to transmit a differential output signal pair DOUT_t and DOUT_c may constitute a transmitting channel. Fig.10 One transmit channel and one receive channel are shown, but the number of transmit channels and receive channels may vary.

[0105] The receiving channel and the transmitting channel may transmit data by a serial communication method, and due to the structure in which the receiving channel and the transmitting channel are separated, full-duplex communication between the UFS host 2100 and the UFS device 2200 is possible. In other words, the UFS device 2200 may transmit data to the UFS host 2100 through the transmitting channel while receiving data from the UFS host 2100 through the receiving channel. In addition, control data such as a command from the UFS host 2100 to the UFS device 2200 and user data that the UFS host 2100 intends to write to or read from the NVM 2220 of the UFS device 2200 may be transmitted through the same channel. In this way, in addition to a pair of receiving channels and a pair of transmitting channels, it is not necessary to provide a separate channel for data transmission between the UFS host 2100 and the UFS device 2200.

[0106] The UFS device controller 2210 of the UFS device 2200 may control the overall operation of the UFS device 2200. The UFS device controller 2210 may manage the NVM 2220 through a logical unit (LU) 2211 as a logical data storage unit. The number of LUs 2211 may be eight, but is not limited thereto. In one or more embodiments, the LUs 2211 may include the 0th logical unit to the N-1th logical unit, where N is an integer greater than 1. The UFS device controller 2210 may include a flash translation layer FTL, and may use address mapping information of the FTL to convert a logical data address (e.g., a logical block address (LBA)) sent from the UFS host 2100 into a physical data address (e.g., a physical block address (PBA)). In the UFS system 2000, a logical block for storing user data may have a size within a preset range. For example, the minimum size of a logical block may be set to 4 kilobytes.

[0107] When a command from the UFS host 2100 is input into the UFS device 2200 through the UIC layer 2250 , the UFS device controller 2210 may perform an operation according to the input command and may transmit a completion response to the UFS host 2100 when the operation is completed.

[0108] For example, when the UFS host 2100 intends to write user data to the UFS device 2200, the UFS host 2100 may send a data write command to the UFS device 2200. When receiving a response indicating that the user data is ready to be sent from the UFS device 2200, the UFS host 2100 may send the user data to the UFS device 2200. The UFS device controller 2210 may temporarily write the sent user data into the device memory 2240 based on the address mapping information of the FTL and write the user data temporarily written into the device memory 2240 into a selected location of the NVM 2220.

[0109] As another example, when the UFS host 2100 intends to read user data written to the UFS device 2200, the UFS host 2100 may send a data read command to the UFS device 2200. The UFS device controller 2210, which has received the command, may read the user data from the NVM 2220 based on the data read command, and temporarily write the read user data to the device memory 2240. In this reading process, the UFS device controller 2210 may use a built-in error correction code (ECC) engine (not shown) to detect and correct errors in the read user data. More specifically, the ECC engine may generate parity bits of the write data to be written in the NVM 2220, and the generated parity bits may be stored in the NVM 2220 together with the write data. When reading data from the NVM 2220, the ECC engine may correct errors in the read data using the parity bits read from the NVM 2220 together with the read data, and may output the error-corrected read data.

[0110] In addition, the UFS device controller 2210 may send user data temporarily written to the device memory 2240 to the UFS host 2100. In addition, the UFS device controller 2210 may further include an Advanced Encryption Standard (AES) engine (not shown). The AES engine may perform at least one of encryption and decryption operations on data input to the UFS device controller 2210 using a symmetric key algorithm.

[0111] The UFS host 2100 may store commands to be transmitted to the UFS device 2200 in a UFS host register 2111 that may be used as a CQ in order, and may transmit the commands to the UFS device 2200 in the order. Even when a previously transmitted command is still being processed by the UFS device 2200, that is, before receiving a notification that a previously transmitted command has been processed by the UFS device 2200, the UFS host 2100 transmits the next command waiting in the CQ to the UFS device 2200, and thus, even when the previously transmitted command is being processed, the UFS device 2200 may receive the next command from the UFS host 2100. The maximum number of commands that may be stored in the CQ may be, for example, 32. In addition, the CQ may be implemented as a circular queue type that indicates the start and end of a command sequence stored in the queue by a head pointer and a tail pointer, respectively.

[0112] Each of the plurality of memory cells 2221 may include a memory cell array (not shown) and a control circuit (not shown) that controls the operation of the memory cell array. The memory cell array may include a 2D memory cell array or a 3D memory cell array. The memory cell array includes a plurality of memory cells, and each memory cell may be a single-level cell (SLC) storing 1 bit of information, but may also be a cell storing 2 or more bits of information (such as a multi-level cell (MLC), a triple-level cell (TLC), or a quad-level cell (QLC)). The 3D memory cell array may include a vertical NAND string that is vertically oriented so that at least one memory cell is located on top of another memory cell.

[0113] VCC, VCCQ1, VCCQ2, etc. may be input to the UFS device 2200 as power supply voltages. VCC is a main power supply voltage for the UFS device 2200 and may have a value of about 2.4V to about 3.6V. VCCQ1 is a power supply voltage for supplying a low range voltage mainly for the UFS device controller 2210 and may have a value of about 1.14V to about 1.26V. VCCQ2 is a power supply voltage for supplying a voltage in a range lower than VCC but higher than VCCQ1 mainly for input and output interfaces (such as MIPI M-PHY 2252) and may have a value of about 1.7V to about 1.95V. These power supply voltages may be supplied to each component of the UFS device 2200 via the regulator 2260. The regulator 2260 may be implemented as a group of unit regulators respectively connected to the above-mentioned power supply voltages. The regulator 2260 may include a damage detector 200 according to one or more embodiments. The damage detector 200 may detect damage to any one of the switches of the regulator 2260.

[0114] Fig.11 is a block diagram of a wireless communication device according to one or more example embodiments. Figure 1 and Figure 2 To describe Fig.11 .

[0115] Reference Fig.11 , the wireless communication device 500 may include the PMIC 100 , a processor 510 , and a radio frequency integrated circuit (RFIC) 520 . The wireless communication device 500 may further include components for wireless communication. The PMIC 100 includes a damage detector 200 .

[0116] The PMIC 100 may provide appropriate voltages to the processor 510 and the RFIC 520. As described above, the damage detector 200 may detect damage to the switch 110 of the PMIC 100, and may control the switch not to operate based on the detection of damage to the switch 110 (eg, by entering a protection mode).

[0117] While the inventive concepts have been particularly shown and described with reference to example embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A method of operating an apparatus for detecting damage to a switch, the switch being included in a power management integrated circuit, the method comprising: measuring a first temperature of a switch included in the power management integrated circuit; detecting an input voltage applied to the switch; measuring a second temperature of the switch based on the detected input voltage being the power supply voltage; obtaining a first temperature change of the switch based on the first temperature and the second temperature; comparing the first temperature change amount to a threshold temperature change amount; as well as The switch is selectively opened based on the result of the comparison.

2. The method according to claim 1, wherein: The step of measuring the first temperature is performed before detecting that the input voltage is the power supply voltage.

3. The method according to claim 1, further comprising: The first temperature is re-measured based on the detected input voltage being less than the power supply voltage.

4. The method according to claim 1, wherein: The steps for selective disconnection include: opening the switch based on the first temperature change being greater than a threshold temperature change; or Based on the first temperature change amount being less than or equal to the threshold temperature change amount, the switch is controlled to operate normally.

5. The method according to claim 4, wherein: Based on the first temperature change amount being less than or equal to the threshold temperature change amount, the switch is controlled to operate normally, and The method further comprises: after the control switch operates normally, measuring a third temperature of the switch based on the power supply voltage applied to the switch being detected; obtaining a second temperature change of the switch based on the first temperature and the third temperature; comparing the second temperature change to a threshold temperature change; and The switch is selectively opened based on a result of comparing the second temperature change amount to a threshold temperature change amount.

6. The method according to claim 1, wherein: The step of obtaining the first temperature change amount includes obtaining the first temperature change amount based on a difference between the second temperature and the first temperature.

7. The method according to claim 1, wherein: The step of obtaining the first temperature change amount includes obtaining the first temperature change amount based on a ratio of the second temperature to the first temperature.

8. A device for detecting damage to a switch of a power management integrated circuit, the device comprising: a temperature sensor configured to measure a first temperature of the switch; a voltage detector configured to detect an input voltage applied to the switch; as well as Control circuit, Wherein the temperature sensor is further configured to measure a second temperature of the switch based on the detected input voltage being the power supply voltage, and Wherein, the control circuit is configured as: obtaining a first temperature change of the switch based on the first temperature and the second temperature; comparing the first temperature change amount to a threshold temperature change amount; and The switch is selectively opened based on the result of the comparison.

9. The device according to claim 8, wherein: The first temperature is measured before the voltage detector detects that the input voltage is the power supply voltage.

10. The device according to claim 8, wherein: The temperature sensor is further configured to re-measure the first temperature based on the detected input voltage being less than the power supply voltage.

11. The device according to claim 8, wherein: The control circuit is configured as: Based on the first temperature change being greater than the threshold temperature change, controlling the switch to be turned off; or Based on the first temperature change amount being less than or equal to the threshold temperature change amount, the switch is controlled to operate normally.

12. The device according to claim 11, wherein The control circuit is configured to: based on the first temperature change amount being less than or equal to the threshold temperature change amount, control the switch to operate normally, and Wherein, after the control switch operates normally, the control circuit is further configured as follows: Based on the power supply voltage applied to the switch being detected, measuring a third temperature of the switch by the temperature sensor; obtaining a second temperature change of the switch based on the first temperature and the third temperature; comparing the second temperature change to a threshold temperature change; and Based on the first temperature change being greater than a threshold temperature change, the switch is selectively opened.

13. The device according to claim 8, wherein: The control circuit is configured to obtain a first temperature change amount based on a difference between the second temperature and the first temperature.

14. The device according to claim 8, wherein: The control circuit is configured to obtain a first temperature change amount based on a ratio of the second temperature to the first temperature.

15. A method of operating a power management integrated circuit, the power management integrated circuit comprising a first switch and a second switch, the method comprising: measuring a first temperature of at least one of the first switch and the second switch; detecting an input voltage applied to the first switch; measuring a second temperature of the at least one switch based on the detected input voltage being the supply voltage; obtaining a temperature change of the at least one switch based on the first temperature and the second temperature; comparing the temperature change to a threshold temperature change; and selectively opening the at least one switch based on a result of the comparison, Therein, the first switch is a high-side switch and the second switch is a low-side switch.

16. The method according to claim 15, wherein: The step of measuring the first temperature is performed before detecting that the input voltage is the power supply voltage.

17. The method according to claim 15, further comprising: The first temperature is re-measured based on the input voltage being less than the power supply voltage.

18. The method according to claim 15, wherein: The step of selectively opening the at least one switch comprises: opening the at least one switch based on the temperature change being greater than a threshold temperature change; or Based on the temperature change amount being less than or equal to a threshold temperature change amount, the at least one switch is controlled to operate normally.

19. The method according to claim 15, wherein: The step of obtaining the temperature change amount includes obtaining the temperature change amount based on a difference between the second temperature and the first temperature.

20. The method according to claim 15, wherein: The step of obtaining the temperature change amount includes obtaining the temperature change amount based on a ratio of the second temperature to the first temperature.

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