Kernel space data transceiving method and device, storage medium and program product

Abstract

The embodiment of the invention provides a kernel space data receiving and transmitting method and device, a storage medium and a program product, and the method comprises the steps: carrying out the data receiving and transmitting of a kernel space through a kernel receiving and transmitting thread in the kernel space of a controller based on a first preset period; the first control instruction is read from the first shared memory through the kernel transceiving thread, the first control instruction is sent to the multiple target actuators through the industrial internet bus, so that the multiple target actuators send first feedback information to the kernel transceiving thread, the first feedback information is written into a second shared memory through the kernel transceiving thread, and the first feedback information is sent to the second shared memory through the kernel transceiving thread. The first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space. According to the kernel space data receiving and transmitting method provided by the embodiment of the invention, excessive function call overhead is avoided, and efficient kernel space data receiving and transmitting between the master station and the slave station can be conveniently realized.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of humanoid robots, and in particular to a kernel space data receiving and sending method, device, storage medium and program product. Background Art

[0002] With the development of technology, the communication needs of humanoid robots are constantly improving and changing.

[0003] In the related art, wired communication methods such as serial communication can be used to realize data transmission between sensors and actuators in a humanoid robot and a controller.

[0004] However, in the process of implementing the present application, the inventors found that there are at least the following problems in the prior art: the data transmission and reception efficiency in the above-mentioned method is low. Summary of the invention

[0005] The embodiments of the present application provide a kernel space data transmission and reception method, device, storage medium and program product to improve the efficiency of data transmission and reception.

[0006] In a first aspect, an embodiment of the present application provides a kernel space data transmission and reception method, which is applied to a humanoid robot, wherein the humanoid robot includes a controller and a plurality of target actuators, wherein the controller is connected to the plurality of target actuators via an EtherCAT bus, and the method includes:

[0007] Based on a first preset period, performing data transmission and reception in the kernel space through a kernel transmission and reception thread in the kernel space of the controller;

[0008] For each of the first preset cycles, a first control instruction address serial number is obtained through the kernel transceiver thread, a first control instruction is read from the first shared memory based on the first control instruction address serial number, and the first control instruction is sent to the multiple target executors through the EtherCAT bus, so that the multiple target executors send first feedback information to the kernel transceiver thread; the first feedback information is obtained by the target executor executing the second control instruction; the second control instruction is an instruction read in the previous first preset cycle; the first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller, and is issued by the control algorithm in the user space;

[0009] The first feedback information address serial number is obtained through the kernel transceiver thread, and the first feedback information is written into the second shared memory based on the first feedback information address serial number; the first feedback information is used to be read through the data exchange thread, and the first feedback information is sent to the control algorithm in the user space; the first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space.

[0010] In a possible design, the first control instruction address serial number is used to indicate a first address in the first shared memory; and reading the first control instruction from the first shared memory based on the first control instruction address serial number includes:

[0011] Based on the first control instruction address sequence number, reading the first control instruction from the first address;

[0012] Correspondingly, the first feedback information address serial number is used to indicate the second address in the second shared memory; and writing the first feedback information into the second shared memory based on the first feedback information address serial number includes:

[0013] Based on the first feedback information address serial number, the first feedback information is written to the third address in the first shared memory. After the first feedback information is written, the first feedback information address serial number is indicated to the third address to obtain the second feedback information address serial number, and the second feedback information address serial number is stored in the preset storage space in the kernel space; the third address is the next address of the second address.

[0014] In a possible design, obtaining the first control instruction address sequence number through the kernel transceiver thread includes:

[0015] Acquire a spin lock through the kernel transceiver thread, and acquire a first control instruction address sequence number under the protection of the spin lock;

[0016] The obtaining the first feedback information address sequence number through the kernel transceiver thread includes:

[0017] The spin lock is acquired through the kernel transceiver thread, and the first feedback information address sequence number is acquired under the protection of the spin lock.

[0018] In a possible design, obtaining the first control instruction address sequence number through the kernel transceiver thread includes:

[0019] Determine a first target triggering time corresponding to the current first preset period;

[0020] If the time difference between the current moment and the first target triggering moment is greater than a first preset threshold, sleeping is performed based on a first preset step length;

[0021] If the time difference between the current moment and the first target trigger moment is less than or equal to the first preset threshold, spin waiting is performed until the first target trigger moment is reached, and then the first control instruction address sequence number is obtained through the kernel transceiver thread.

[0022] In one possible design, the first preset period is determined according to a data processing period of the control algorithm.

[0023] In one possible design, the method further includes:

[0024] Based on a second preset period, data in the user space is sent and received through a data exchange thread in the user space; the second preset period is consistent with the first preset period;

[0025] For each of the second preset cycles, obtaining a second control instruction address serial number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address serial number;

[0026] The second feedback information address serial number is obtained through the data exchange thread, and the first feedback information is read from the second shared memory based on the second feedback information address serial number.

[0027] In a possible design, obtaining the second control instruction address sequence number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address sequence number includes:

[0028] Obtaining a second control instruction address sequence number from a preset storage space of the kernel space based on a preset function through the data exchange thread; the second control instruction address sequence number is used to indicate a fourth address in the first shared memory; the fourth address is a previous address of the first address;

[0029] Based on the second control instruction address serial number, write the first control instruction into the first address, after the first control instruction is written, indicate the first address with the first control instruction address serial number, obtain the first control instruction address serial number, and store the second control instruction address serial number into the preset storage space;

[0030] Correspondingly, reading the first feedback information from the second shared memory through the data exchange thread includes:

[0031] Obtaining a second feedback information address sequence number from the preset storage space based on a preset function through the data exchange thread;

[0032] The first feedback information is read from the third address based on the second feedback information address serial number.

[0033] In a possible design, obtaining the second control instruction address sequence number through the data exchange thread includes:

[0034] Based on a preset function, sending a first target request to a target processing function in the kernel space through a data exchange thread in the user space;

[0035] In response to the first target request, the target processing function acquires a spin lock, and sends the second control instruction address sequence number to the data exchange thread under the protection of the spin lock;

[0036] Correspondingly, obtaining the second feedback information address sequence number through the data exchange thread includes:

[0037] Based on a preset function, sending a second target request to the target processing function in the kernel space through a data exchange thread in the user space;

[0038] In response to the second target request, the target processing function acquires a spin lock, and sends the second feedback information address sequence number to the data exchange thread under the protection of the spin lock.

[0039] In a possible design, obtaining the second control instruction address sequence number through the data exchange thread includes:

[0040] Determine a second target triggering time corresponding to the current second preset period;

[0041] If the time difference between the current moment and the second target triggering moment is greater than a second preset threshold, sleeping is performed based on a second preset step length;

[0042] If the time difference between the current moment and the second target trigger moment is less than or equal to the second preset threshold, spin waiting is performed until the second target trigger moment is reached, and then the second control instruction address sequence number is obtained through the data exchange thread.

[0043] In a second aspect, an embodiment of the present application provides a kernel space data transceiver device, including:

[0044] A transceiver module, configured to perform kernel space data transmission and reception through a kernel transceiver thread in a kernel space of a controller based on a first preset period;

[0045] A reading module, used for obtaining a first control instruction address serial number through the kernel transceiver thread for each first preset cycle, reading the first control instruction from the first shared memory based on the first control instruction address serial number, and sending the first control instruction to the multiple target executors through the EtherCAT bus, so that the multiple target executors send first feedback information to the kernel transceiver thread; the first feedback information is obtained by the target executor executing the second control instruction; the second control instruction is an instruction read in the previous first preset cycle; the first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller, and is issued by the control algorithm in the user space;

[0046] A writing module is used to obtain a first feedback information address serial number through the kernel transceiver thread, and write the first feedback information into a second shared memory based on the first feedback information address serial number; the first feedback information is used to be read through the data exchange thread, and the first feedback information is sent to a control algorithm in a user space; the first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space.

[0047] In a third aspect, an embodiment of the present application provides a kernel space data transceiver device, including: at least one processor and a memory;

[0048] The memory stores computer-executable instructions;

[0049] The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the method described in the first aspect and various possible designs of the first aspect.

[0050] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the method described in the first aspect and various possible designs of the first aspect are implemented.

[0051] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements the method described in the first aspect and various possible designs of the first aspect.

[0052] The present embodiment provides a kernel space data receiving and sending method, device, storage medium and program product. The method includes performing kernel space data receiving and sending through a kernel receiving and sending thread in a kernel space of a controller based on a first preset cycle. For each first preset cycle, a first control instruction address sequence number is obtained through the kernel receiving and sending thread, the first control instruction is read from a first shared memory based on the first control instruction address sequence number, and the first control instruction is sent to multiple target executors through an industrial Internet bus, so that the multiple target executors send first feedback information to the kernel receiving and sending thread. The first feedback information is obtained by the target executor executing the second control instruction. The second control instruction is an instruction read in the previous first preset cycle. The first control instruction is written into the first shared memory by a data exchange thread in a user space of the controller and is issued by a control algorithm in the user space. The first feedback information address sequence number is obtained through the kernel receiving and sending thread, and the first feedback information is written into the second shared memory based on the first feedback information address sequence number. The first feedback information is used to be read through the data exchange thread, and the first feedback information is sent to the control algorithm in the user space. The first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space. The kernel space data receiving and sending method provided in the embodiment of the present application maps the address of the kernel space to the user space, and realizes the data receiving and sending between the bottom communication program of the kernel space and the upper control program of the user space in a shared memory manner, thereby realizing the kernel space and multiple target actuators of the EtherCAT bus (such as motors in a humanoid robot), avoiding excessive function call overhead, and facilitating the realization of efficient data receiving and sending between the master station and the slave station on the EtherCAT. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0054] Figure 1 A schematic diagram of an application scenario of the kernel space data receiving and sending method provided by an embodiment of the present disclosure;

[0055] Figure 2 A flowchart of a kernel space data receiving and sending method provided in an embodiment of the present application;

[0056] Figure 3 A schematic diagram of the principle of shared memory provided in an embodiment of the present application;

[0057] Figure 4A schematic diagram of a process for a kernel transceiver thread in a kernel space to perform kernel space data transmission and reception in an embodiment of the present application;

[0058] Figure 5 A schematic diagram of a process for sending and receiving kernel space data by a data exchange thread in a user space provided in an embodiment of the present application;

[0059] Figure 6 A schematic diagram of a process for detecting whether a triggering moment has been reached provided in an embodiment of the present application;

[0060] Figure 7 A schematic diagram of the structure of a kernel space data transceiver device provided in an embodiment of the present application;

[0061] Figure 8 A schematic diagram of the hardware structure of the kernel space data transceiver device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0063] It should be noted that the kernel space data receiving and sending method provided in the present application can be used in the field of humanoid robot technology, and can also be used in any field other than the field of humanoid robot technology. The application field of the kernel space data receiving and sending method provided in the present application is not limited.

[0064] The Ethernet for Control Automation Technology (EtherCAT) bus is used to connect controllers (such as industrial PCs) and actuators (such as motors), allowing the former to send control instructions to the latter and collect feedback information from the latter.

[0065] The existing master station software includes TwinCAT on Windows, while in the field of humanoid robots with extremely high real-time requirements, SOME and IgH on Linux are widely used due to the requirements of the technical route. The former runs in the user space of Linux and needs to go through the network stack of the operating system for data transmission and reception, while the latter runs in the kernel space of Linux combined with the adapted network card driver, avoiding the context switching between the user space and the kernel space and the occurrence of interrupt requests.

[0066] When performing EtherCAT data transmission and reception in the Linux kernel space, the first challenge is how to transmit data bidirectionally between the user space and the kernel space. Although data transmission and reception occur in the kernel space, the data sent to the slave station originates from the control program in the user space, and the data received from the slave station needs to be passed to the control program in the user space.

[0067] In the related art, the function ioctl() can be called to directly transmit and receive kernel space data between kernel space and user space. However, since the amount of data transmitted each time is more than a few bytes, using ioctl() to directly transmit data here will result in more function call overhead, and the efficiency of kernel space data transmission and reception is low.

[0068] In order to solve the above technical problems, the inventors of the present application have found that data exchange between kernel space and user space can be performed by sharing memory. For example, mmap() can be used to map a segment of addresses in kernel space to user space. Based on this, an embodiment of the present application provides a kernel space data transmission and reception method.

[0069] Figure 1 Schematic diagram of an application scenario of the kernel space data receiving and sending method provided by the embodiment of the present disclosure. Figure 1 As shown, the humanoid robot includes a controller 101 and a plurality of actuators 102. The controller and the plurality of actuators use the industrial Internet EtherCAT bus for data transmission and reception. Optionally, the actuator may include a servo motor, a stepper motor, a hydraulic actuator, a starting actuator, a linear actuator or an electromagnetic actuator, etc.

[0070] In the specific implementation process, the EtherCAT data frame is sent by the EtherCAT master software running on the controller, and is processed by each EtherCAT slave software in turn through the cable that serially connects the controller and each actuator. During this period, each slave software obtains the control instructions it is concerned about at the corresponding position in the data frame and writes its feedback information to the corresponding position. After the data frame is processed by the last slave, it returns to the master in reverse. Among them, the master software can use IgH on Linux, which runs in the kernel space. Since the data sent by the master to the slave comes from the control program in the user space, it is also necessary to pass the data received from the slave to the control program in the user space. In the process of sending and receiving data between the kernel space and the user space, the kernel space data can be sent and received through the kernel sending and receiving thread in the kernel space of the controller based on the first preset cycle. For each first preset cycle, the first control instruction address number is obtained through the kernel sending and receiving thread, the first control instruction is read from the first shared memory based on the first control instruction address number, and the first control instruction is sent to multiple target executors through the industrial Internet bus, so that the multiple target executors send the first feedback information to the kernel sending and receiving thread. The first feedback information is obtained by the target executor executing the second control instruction. The second control instruction is an instruction read in the previous first preset cycle. The first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller and is issued by the control algorithm in the user space. The first feedback information address number is obtained through the kernel sending and receiving thread, and the first feedback information is written into the second shared memory based on the first feedback information address number. The first feedback information is used to read through the data exchange thread, and the first feedback information is sent to the control algorithm in the user space. The first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space. The kernel space data receiving and sending method provided in the embodiment of the present application maps the address of the kernel space to the user space, and realizes the data receiving and sending between the bottom communication program of the kernel space and the upper control program of the user space in a shared memory manner, thereby realizing the kernel space and multiple target actuators of the EtherCAT bus (such as motors in a humanoid robot), avoiding excessive function call overhead, and facilitating the realization of efficient data receiving and sending between the master station and the slave station on the EtherCAT.

[0071] It should be noted that Figure 1 The scenario diagram shown is merely an example. The kernel space data sending and receiving method and scenario described in the embodiment of the present application are intended to more clearly illustrate the technical solution of the embodiment of the present application, and do not constitute a limitation on the technical solution provided in the embodiment of the present application. A person of ordinary skill in the art can know that with the evolution of the system and the emergence of new business scenarios, the technical solution provided in the embodiment of the present application is also applicable to similar technical problems.

[0072] The technical solution of the present application is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0073] Figure 2 The flowchart of the kernel space data receiving and sending method provided by the embodiment of the present application is as follows. Figure 2 As shown, the method is applied to a humanoid robot, the humanoid robot includes a controller and a plurality of target actuators, the controller is connected to the plurality of target actuators via an EtherCAT bus, and the method includes:

[0074] 201. Perform data transmission and reception in a kernel space through a kernel transmission and reception thread in a kernel space of a controller based on a first preset period.

[0075] The execution subject of this embodiment is the controller where the main station software is located, or a device such as a humanoid robot to which the controller belongs.

[0076] Specifically, in order to meet real-time requirements, improve system stability, and optimize resource utilization, the kernel transceiver thread in the kernel space can periodically transmit and receive data.

[0077] In some embodiments, in order to improve the real-time performance of the control algorithm, the first preset period may be determined according to the data processing period of the control algorithm. Exemplarily, the first preset period may be set to be consistent with the data processing period of the control algorithm, so that the control algorithm can obtain new feedback information in real time, so as to generate new control instructions based on the new feedback information, thereby improving the real-time performance.

[0078] 202. For each of the first preset cycles, the first control instruction address serial number is obtained through the kernel transceiver thread, the first control instruction is read from the first shared memory based on the first control instruction address serial number, and the first control instruction is sent to the multiple target executors through the EtherCAT bus, so that the multiple target executors send first feedback information to the kernel transceiver thread; the first feedback information is obtained by the target executor executing the second control instruction; the second control instruction is the instruction read in the previous first preset cycle; the first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller, and is issued by the control algorithm in the user space.

[0079] Specifically, the function mmap() can be used to perform address mapping, and N segments (N is greater than or equal to 3) of memory addresses are allocated as the first shared memory for statically sending and receiving data of control instructions from kernel space to user space in kernel space, for example, 3 segments of memory addresses. Different memory addresses correspond to different control instruction address numbers.

[0080] In some embodiments, the first control instruction address serial number is used to indicate a first address in the first shared memory; reading the first control instruction from the first shared memory based on the first control instruction address serial number may include: reading the first control instruction from the first address based on the first control instruction address serial number.

[0081] For example, Figure 3 As shown, the variable storing the ordinal number of the control instruction address in the kernel space can be named OI (Ordinal Instruction). The value of OI can be 1, 2 or 3, which instructs the kernel transceiver thread in the bottom communication program to obtain the control instruction from one of the three memory addresses for storing control instructions (i.e., an address with the ordinal number of OI) and then send it to the motor, and also instructs the data exchange thread in the upper control program to write the control instruction transmitted by the control algorithm into one of the three segments (i.e., an address with the ordinal number of OI plus 1, for example, assuming that OI is equal to 3, then it needs to be written into the first segment address). The writing thread always performs a write operation on the next segment address of the address indicated by the ordinal number, and updates the ordinal number after the write operation is completed, so that the reading thread can read the written data from the address indicated by the updated ordinal number.

[0082] In some embodiments, the first control instruction address serial number can be stored in a preset storage space within the kernel space; the first control instruction is a control instruction sent by the controller to the target executor through the industrial Internet bus.

[0083] 203. Obtain a first feedback information address serial number through the kernel transceiver thread, and write the first feedback information into a second shared memory based on the first feedback information address serial number; the first feedback information is used to be read through the data exchange thread, and the first feedback information is sent to a control algorithm in a user space; the first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space.

[0084] Specifically, the function mmap() can be used for address mapping, and the kernel space data transmission and reception of feedback information from the user space to the kernel space is statically allocated in the kernel space. N segments (N is greater than or equal to 3) of memory addresses are used as the second shared memory, for example, 3 segments of memory addresses. Different memory addresses correspond to different feedback information address numbers. In each cycle, the data transceiver thread writes the control instruction transmitted by the control algorithm into the first shared memory, so that the kernel transceiver thread reads and changes the control instruction and writes the control instruction into a data packet, and sends the data packet to each target actuator (such as a motor) through the EtherCAT bus. The target actuator writes the feedback information generated based on the previous control instruction into the data packet, and feeds it back to the kernel space through the EtherCAT bus. The kernel space writes the feedback information into the second shared memory, and then the data transceiver thread reads the feedback information written into the second shared memory by the kernel transceiver thread to feed it back to the control algorithm, so that the control algorithm generates a new control instruction according to the feedback information.

[0085] In some embodiments, the first feedback information address serial number is used to indicate the second address in the second shared memory; writing the first feedback information into the second shared memory based on the first feedback information address serial number may include: based on the first feedback information address serial number, writing the first feedback information into a third address in the first shared memory, after completing writing the first feedback information, indicating the third address with the first feedback information address serial number, obtaining the second feedback information address serial number, and storing the second feedback information address serial number into a preset storage space in the kernel space; the third address is the next address of the second address.

[0086] For example, Figure 3 As shown, the variable storing the sequence number of the feedback information address can be named OF (Ordinal Feedback). The value of OF can be 1, 2 or 3, indicating which of the three memory addresses for storing feedback information the kernel transceiver thread in the bottom communication program writes the information fed back by the motor into (the segment with the sequence number of OF plus 1, if OF is 3, the first segment), and also indicating which of the three segments (the segment with the sequence number of OF) the data exchange thread in the upper control program obtains the feedback information from and passes it to the control algorithm. The write thread always performs a write operation on the next segment of the address indicated by the sequence number, and updates the sequence number after the write operation is completed, so that the read thread can read the written data from the address indicated by the updated sequence number.

[0087] In some embodiments, the first feedback information address serial number can be stored in a preset storage space within the kernel space; the target feedback information is information that the target executor feeds back to the controller through the industrial Internet bus.

[0088] In some embodiments, obtaining the first control instruction address number through the kernel transceiver thread may include: obtaining a spin lock through the kernel transceiver thread, and obtaining the first control instruction address number under the protection of the spin lock; obtaining the first feedback information address number through the kernel transceiver thread may include: obtaining a spin lock through the kernel transceiver thread, and obtaining the first feedback information address number under the protection of the spin lock.

[0089] Specifically, how to perform read and write protection on the data in the shared memory becomes a focus. In the related art, read protection can be performed by a mutex lock. However, the same mutex lock cannot be used in the user space and in the kernel space. Therefore, the inventors of the present application have found that a spin lock can be used to protect operations such as reading and updating the sequence number. The kernel transceiver thread uses spin lock protection when reading OI. The kernel transceiver thread uses spin lock protection when reading OF and updating OF. In this embodiment, by using a spin lock to protect the access to the above two read address sequence numbers in the processing function that responds to the change and obtain read address sequence number ioctl() request from the user space in the kernel space, and also using a spin lock to protect their access in the kernel transceiver thread, it is possible to implement read and write protection for the data in the shared memory and improve the accuracy of kernel space data transmission and reception.

[0090] The following combination Figure 4 The data sending and receiving cycle process of the kernel sending and receiving thread is illustrated by example, such as Figure 4 As shown, the EtherCAT transceiver thread in the kernel space starts, obtains the value of OF, receives EtherCAT data and writes the feedback information to the next address indicated by OF. After writing is completed, the value of OF is updated so that OF indicates the address to which the feedback information has just been written, obtains the value of OI, reads the control instruction from the address indicated by OI and sends the data through EtherCAT. When the next trigger moment arrives, the next transceiver cycle is performed and the above steps are repeated.

[0091] In this embodiment, there are multiple ways to perform EtherCAT data frame transceiving at fixed time intervals. In the first way, a sleep mode can be used, specifically using usleep_range() to sleep and wake up when the transceiving operation is imminent. However, because there is a deviation between the wake-up time and the set value, the deviation can be as long as nearly 200 microseconds on soft real-time Linux, so the accuracy is low. In the second way, a spin-wait mode can be used, but when waiting, the kernel transceiver thread completely occupies a CPU, and the performance consumption is large. In the third way, the usleep_range() sleep mode and the spin-wait mode can be combined and applied to the timing data transceiving of the kernel thread, which greatly reduces the average fluctuation of the transceiver cycle. Among them, when the distance to the target trigger moment is far (for example, the time difference between the current moment and the target trigger moment is greater than 12% of the transceiver cycle), usleep_range() is continuously used to sleep for a step length of time - about 4% to 8% of the transceiver cycle, until the distance to the target trigger moment is close (less than 12% of the transceiver cycle), spin-wait is used until the target trigger moment, and then data is transceived. During the spin-wait period, the thread continuously checks whether the trigger time has been reached, exchanging full CPU occupancy for the punctuality of data transmission and reception.

[0092] In some embodiments, obtaining the first control instruction address number through the kernel transceiver thread may include: determining the first target trigger moment corresponding to the current first preset cycle; if the time difference between the current moment and the first target trigger moment is greater than a first preset threshold, sleeping based on a first preset step size; if the time difference between the current moment and the first target trigger moment is less than or equal to the first preset threshold, spin waiting until the first target trigger moment is reached, and then obtaining the first control instruction address number through the kernel transceiver thread.

[0093] For example, Figure 6 As shown, enter the sleep mode. If the current mode is sleep mode, use usleep_range() to sleep for a step length of time. After waking up, get the current time. If the current time is greater than the preset time from the target trigger time, continue to sleep for a step length of time. After waking up, get the current time again. If the current time is less than or equal to the preset time from the target trigger time, turn off the sleep mode and enter the spin wait until the trigger time is reached.

[0094] The kernel space data receiving and sending method provided in this embodiment maps the address of the kernel space to the user space, and realizes the data receiving and sending between the bottom communication program of the kernel space and the upper control program of the user space in a shared memory manner, thereby realizing the kernel space and multiple target actuators of the EtherCAT bus (such as motors in a humanoid robot), avoiding excessive function call overhead, and facilitating the realization of efficient data receiving and sending between the master station and the slave station on the EtherCAT.

[0095] In some embodiments, based on the above embodiments, for example, Figure 2 Based on the shown embodiment, the method may further include: sending and receiving data in the user space through a data exchange thread in the user space based on a second preset cycle; the second preset cycle is consistent with the first preset cycle; for each of the second preset cycles, obtaining a second control instruction address number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address number; obtaining a second feedback information address number through the data exchange thread, and reading the first feedback information from the second shared memory based on the second feedback information address number.

[0096] Specifically, in order to meet the real-time requirements, improve system stability, and optimize resource utilization, the data transceiver thread in the user space can periodically perform data transceiver. In each cycle, the data transceiver thread writes the control instruction transmitted by the control algorithm into the first shared memory, so that the kernel transceiver thread reads and changes the control instruction and writes the control instruction into a data packet, and sends the data packet to each target actuator (such as a motor) through the EtherCAT bus. The target actuator writes the feedback information generated based on the previous control instruction into the data packet, and feeds it back to the kernel space through the EtherCAT bus. The kernel space writes the feedback information into the second shared memory, and then the data transceiver thread reads the feedback information written into the second shared memory by the kernel transceiver thread to feed it back to the control algorithm, so that the control algorithm generates a new control instruction according to the feedback information.

[0097] In some embodiments, obtaining the second control instruction address sequence number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address sequence number may include: obtaining the second control instruction address sequence number from the preset storage space of the kernel space based on a preset function through the data exchange thread; the second control instruction address sequence number is used to indicate a fourth address in the first shared memory; the fourth address is the previous address of the first address; writing the first control instruction into the first address based on the second control instruction address sequence number, after completing writing the first control instruction, indicating the first address with the first control instruction address sequence number, obtaining the first control instruction address sequence number, and storing the second control instruction address sequence number into the preset storage space; correspondingly, reading the first feedback information from the second shared memory through the data exchange thread includes: obtaining the second feedback information address sequence number from the preset storage space based on a preset function through the data exchange thread; and reading the first feedback information from the third address based on the second feedback information address sequence number.

[0098] Specifically, Figure 3 As shown, the variable storing the address sequence number of the control instruction in the kernel space can be named OI (Ordinal Instruction). The value of OI can be 1, 2 or 3, indicating which of the three memory addresses for storing control instructions (the segment with the sequence number of the value of OI) the kernel transceiver thread in the bottom communication program obtains the control instruction from and then sends it to the motor, and also instructs the data exchange thread in the upper control program to write the control instruction transmitted by the control algorithm into which of the three segments (the segment with the sequence number of the value of OI plus 1, if OI is equal to 3, the first segment). The writing thread always performs a write operation on the next segment of the address indicated by the sequence number, and updates the sequence number after the write operation is completed, so that the reading thread can read the written data from the address indicated by the updated sequence number. The variable storing the sequence number of the feedback information address can be named OF (Ordinal Feedback). OF can be 1, 2 or 3, indicating which of the three memory addresses for storing feedback information the kernel transceiver thread in the underlying communication program writes the information from the motor (the one with the serial number of OF plus 1, if OF is 3, the first segment), and also indicating which of the three segments (the one with the serial number of OF) the data exchange thread in the upper control program obtains the feedback information from and passes it to the control algorithm. The write thread always writes to the next address of the address indicated by the serial number, and updates the serial number after the write operation is completed, so that the read thread can read the written data from the address indicated by the updated serial number.

[0099] In some embodiments, obtaining the second control instruction address number through the data exchange thread may include: based on a preset function, sending a first target request to the target processing function in the kernel space through the data exchange thread in the user space; in response to the first target request, the target processing function obtains a spin lock, and sends the second control instruction address number to the data exchange thread under the protection of the spin lock; correspondingly, obtaining the second feedback information address number through the data exchange thread may include: based on a preset function, sending a second target request to the target processing function in the kernel space through the data exchange thread in the user space; in response to the second target request, the target processing function obtains a spin lock, and sends the second feedback information address number to the data exchange thread under the protection of the spin lock.

[0100] Specifically, spin locks can be used to protect operations such as reading and updating the sequence number. The preset function can be an ioctl() function. The request for reading OI and updating OI sent by the data exchange thread to the underlying communication program through ioctl() is processed by the request processing function in the underlying communication program, and the function also has spin lock protection when accessing the OI variable. The request for reading OF sent by the data exchange thread to the underlying communication program through ioctl() is processed by the request processing function in the underlying communication program, and the function also has spin lock protection when accessing the OF variable. In this embodiment, by using spin locks to protect the access to the above two read address sequence numbers in the processing function that responds to the change and obtains the read address sequence number ioctl() request from the user space in the kernel space, and also using spin locks to protect their access in the kernel transceiver thread, it is possible to implement read and write protection for data in the shared memory and improve the accuracy of kernel space data transmission and reception.

[0101] The following combination Figure 5 The data sending and receiving cycle process of the data sending and receiving thread is illustrated by example, such as Figure 5 As shown, the user space data exchange thread starts, obtains the value of OF, reads feedback information from the address indicated by OF and passes it to the control algorithm, obtains the value of OI, writes the control instruction passed by the control algorithm to the next address of the address indicated by OI, and after writing is completed, updates the value of OI so that OI indicates the address to which the control instruction has just been written. When the next trigger moment is reached, the next transmit and receive cycle is entered, and the above steps are repeated.

[0102] In some embodiments, obtaining the second control instruction address number through the data exchange thread may include: determining the second target trigger moment corresponding to the current second preset period; if the time difference between the current moment and the second target trigger moment is greater than the second preset threshold, sleeping based on the second preset step size; if the time difference between the current moment and the second target trigger moment is less than or equal to the second preset threshold, spin waiting until the second target trigger moment is reached, and then obtaining the second control instruction address number through the data exchange thread.

[0103] In this embodiment, the second preset threshold may be equal to the first preset threshold.

[0104] For example, Figure 6 As shown, enter the sleep mode. If the current mode is sleep mode, use usleep_range() to sleep for a step length of time. After waking up, get the current time. If the current time is greater than the preset time from the target trigger time, continue to sleep for a step length of time. After waking up, get the current time again. If the current time is less than or equal to the preset time from the target trigger time, turn off the sleep mode and enter the spin wait until the trigger time is reached.

[0105] The kernel space data receiving and sending method provided in this embodiment maps the address of the kernel space to the user space, and realizes the data receiving and sending between the bottom communication program of the kernel space and the upper control program of the user space in a shared memory manner, thereby realizing the kernel space and multiple target actuators of the EtherCAT bus (such as motors in a humanoid robot), avoiding excessive function call overhead, and facilitating the realization of efficient data receiving and sending between the master station and the slave station on the EtherCAT.

[0106] Figure 7 This is a schematic diagram of the structure of the kernel space data transceiver device provided in the embodiment of the present application. Figure 7 As shown, the kernel space data transceiver device 70 includes: a transceiver module 701, a read module 702 and a write module 703.

[0107] The transceiver module 701 is used to perform kernel space data transmission and reception through a kernel transceiver thread in the kernel space of the controller based on a first preset period;

[0108] The reading module 702 is used for obtaining the first control instruction address serial number through the kernel transceiver thread for each first preset cycle, reading the first control instruction from the first shared memory based on the first control instruction address serial number, and sending the first control instruction to the multiple target executors through the EtherCAT bus, so that the multiple target executors send the first feedback information to the kernel transceiver thread; the first feedback information is obtained by the target executor executing the second control instruction; the second control instruction is the instruction read in the previous first preset cycle; the first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller, and is issued by the control algorithm in the user space;

[0109] The write module 703 is used to obtain the first feedback information address serial number through the kernel transceiver thread, and write the first feedback information into the second shared memory based on the first feedback information address serial number; the first feedback information is used to read through the data exchange thread, and the first feedback information is sent to the control algorithm in the user space; the first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space.

[0110] The kernel space data transceiver device provided in the embodiment of the present application maps the address of the kernel space to the user space, and realizes data transmission and reception between the underlying communication program of the kernel space and the upper control program of the user space in a shared memory manner, thereby realizing kernel space and multiple target actuators of the EtherCAT bus (such as motors in a humanoid robot), avoiding excessive function call overhead, and facilitating efficient data transmission and reception between the master station and the slave station on the EtherCAT.

[0111] In some embodiments, the first control instruction address number is used to indicate the first address in the first shared memory; the read module 702 is specifically used to: read the first control instruction from the first address based on the first control instruction address number; correspondingly, the first feedback information address number is used to indicate the second address in the second shared memory; the write module 703 is specifically used to: write the first feedback information to a third address in the first shared memory based on the first feedback information address number, after the first feedback information is written, indicate the third address with the first feedback information address number, obtain the second feedback information address number, and store the second feedback information address number in the preset storage space in the kernel space; the third address is the next address of the second address.

[0112] In some embodiments, the read module 702 is specifically used to: obtain a spin lock through the kernel transceiver thread, and obtain a first control instruction address number under spin lock protection; the write module 703 is specifically used to: obtain a spin lock through the kernel transceiver thread, and obtain a first feedback information address number under spin lock protection.

[0113] In some embodiments, the reading module 702 is specifically used to: determine the first target trigger moment corresponding to the current first preset cycle; if the time difference between the current moment and the first target trigger moment is greater than the first preset threshold, sleep based on the first preset step size; if the time difference between the current moment and the first target trigger moment is less than or equal to the first preset threshold, spin wait until the first target trigger moment is reached, and then obtain the first control instruction address number through the kernel transceiver thread.

[0114] In some embodiments, the first preset period is determined according to a data processing period of the control algorithm.

[0115] In some embodiments, the transceiver module 701 is also used to: perform data transmission and reception in the user space through the data exchange thread in the user space based on a second preset cycle; the second preset cycle is consistent with the first preset cycle; the write module 703 is also used to: for each of the second preset cycles, obtain the second control instruction address number through the data exchange thread, and write the first control instruction into the first shared memory based on the second control instruction address number; the read module 702 is also used to: obtain the second feedback information address number through the data exchange thread, and read the first feedback information from the second shared memory based on the second feedback information address number.

[0116] In some embodiments, the write module 703 is specifically used to: obtain a second control instruction address number from a preset storage space of the kernel space based on a preset function through the data exchange thread; the second control instruction address number is used to indicate a fourth address in the first shared memory; the fourth address is the previous address of the first address; based on the second control instruction address number, write the first control instruction to the first address, and after the first control instruction is written, indicate the first address with the first control instruction address number, obtain the first control instruction address number, and store the second control instruction address number in the preset storage space; the read module 702 is specifically used to: obtain a second feedback information address number from the preset storage space based on a preset function through the data exchange thread; based on the second feedback information address number, read the first feedback information from the third address.

[0117] In some embodiments, the write module 703 is specifically used for: based on a preset function, sending a first target request to the target processing function in the kernel space through the data exchange thread in the user space; in response to the first target request, the target processing function acquires a spin lock, and sends the second control instruction address number to the data exchange thread under the protection of the spin lock; the read module 702 is specifically used for: based on a preset function, sending a second target request to the target processing function in the kernel space through the data exchange thread in the user space; in response to the second target request, the target processing function acquires a spin lock, and sends the second feedback information address number to the data exchange thread under the protection of the spin lock.

[0118] In some embodiments, the write module 703 is specifically used to: determine the second target trigger moment corresponding to the current second preset period; if the time difference between the current moment and the second target trigger moment is greater than the second preset threshold, sleep based on the second preset step size; if the time difference between the current moment and the second target trigger moment is less than or equal to the second preset threshold, spin wait until the second target trigger moment is reached, and then obtain the second control instruction address number through the data exchange thread.

[0119] The kernel space data transceiver device provided in the embodiment of the present application can be used to execute the above-mentioned method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.

[0120] Figure 8 A schematic diagram of the hardware structure of a kernel space data transceiver device provided in an embodiment of the present application, which device may be a controller, a humanoid robot, etc.

[0121] The device 80 may include one or more of the following components: a processing component 801 , a memory 802 , a power component 803 , a multimedia component 804 , an audio component 805 , an input / output (I / O) interface 806 , a sensor component 807 , and a communication component 808 .

[0122] The processing component 801 generally controls the overall operation of the device 80, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 801 may include one or more processors 809 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 801 may include one or more modules to facilitate the interaction between the processing component 801 and other components. For example, the processing component 801 may include a multimedia module to facilitate the interaction between the multimedia component 804 and the processing component 801.

[0123] The memory 802 is configured to store various types of data to support operations on the device 80. Examples of such data include instructions for any application or method operating on the device 80, contact data, phone book data, messages, pictures, videos, etc. The memory 802 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0124] The power supply component 803 provides power to the various components of the device 80. The power supply component 803 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device 80.

[0125] The multimedia component 804 includes a screen that provides an output interface between the device 80 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 804 includes a front camera and / or a rear camera. When the device 80 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and the rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0126] The audio component 805 is configured to output and / or input audio signals. For example, the audio component 805 includes a microphone (MIC), and when the device 80 is in an operating mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 802 or sent via the communication component 808. In some embodiments, the audio component 805 also includes a speaker for outputting audio signals.

[0127] I / O interface 806 provides an interface between processing component 801 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0128] The sensor assembly 807 includes one or more sensors for providing various aspects of status assessment for the device 80. For example, the sensor assembly 807 can detect the open / closed state of the device 80, the relative positioning of components, such as the display and keypad of the device 80, and the sensor assembly 807 can also detect the position change of the device 80 or a component of the device 80, the presence or absence of user contact with the device 80, the orientation or acceleration / deceleration of the device 80, and the temperature change of the device 80. The sensor assembly 807 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 807 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 807 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0129] The communication component 808 is configured to facilitate wired or wireless communication between the device 80 and other devices. The device 80 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 808 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 808 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0130] In an exemplary embodiment, the device 80 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), host computers, micro-host computers, microprocessors or other electronic components to perform the above-mentioned methods.

[0131] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 802 including instructions, and the instructions can be executed by a processor 809 of the device 80 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0132] The computer-readable storage medium mentioned above can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The readable storage medium can be any available medium that can be accessed by a general or special-purpose computer.

[0133] An exemplary readable storage medium is coupled to a processor so that the processor can read information from the readable storage medium and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can be located in an application specific integrated circuit (Application Specific Integrated Circuits, referred to as: ASIC). Of course, the processor and the readable storage medium can also exist in the device as discrete components.

[0134] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, disk or optical disk and other media that can store program codes.

[0135] An embodiment of the present application also provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements the kernel space data transceiving method performed by the kernel space data transceiving device as above.

[0136] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A kernel space data sending and receiving method, characterized in that: Applied to a humanoid robot, the humanoid robot comprises a controller and a plurality of target actuators, the controller is connected to the plurality of target actuators via an EtherCAT bus, and the method comprises: Based on a first preset period, performing data transmission and reception in the kernel space through a kernel transmission and reception thread in the kernel space of the controller; For each of the first preset cycles, a first control instruction address serial number is obtained through the kernel transceiver thread, a first control instruction is read from a first shared memory based on the first control instruction address serial number, and the first control instruction is sent to the multiple target executors through the EtherCAT bus, so that the multiple target executors send first feedback information to the kernel transceiver thread; the first feedback information is obtained by the target executor executing the second control instruction; the second control instruction is an instruction read in the previous first preset cycle; the first control instruction is written into the first shared memory by the data exchange thread in the user space of the controller, and is issued by the control algorithm in the user space; The first feedback information address serial number is obtained through the kernel transceiver thread, and the first feedback information is written into the second shared memory based on the first feedback information address serial number; the first feedback information is used to be read through the data exchange thread, and the first feedback information is sent to the control algorithm in the user space; the first shared memory and the second shared memory are obtained by mapping the address of the kernel space to the user space.

2. The method according to claim 1, characterized in that: The first control instruction address serial number is used to indicate a first address in the first shared memory; and reading the first control instruction from the first shared memory based on the first control instruction address serial number includes: Based on the first control instruction address sequence number, reading the first control instruction from the first address; Correspondingly, the first feedback information address serial number is used to indicate the second address in the second shared memory; and writing the first feedback information into the second shared memory based on the first feedback information address serial number includes: Based on the first feedback information address serial number, the first feedback information is written to the third address in the first shared memory. After the first feedback information is written, the first feedback information address serial number is indicated to the third address to obtain the second feedback information address serial number, and the second feedback information address serial number is stored in the preset storage space in the kernel space; the third address is the next address of the second address.

3. The method according to claim 1, characterized in that The obtaining the first control instruction address sequence number through the kernel transceiver thread includes: Acquire a spin lock through the kernel transceiver thread, and acquire a first control instruction address sequence number under the protection of the spin lock; The obtaining the first feedback information address sequence number through the kernel transceiver thread includes: The spin lock is acquired through the kernel transceiver thread, and the first feedback information address sequence number is acquired under the protection of the spin lock.

4. The method according to claim 1, characterized in that The obtaining the first control instruction address sequence number through the kernel transceiver thread includes: Determine a first target triggering time corresponding to the current first preset period; If the time difference between the current moment and the first target triggering moment is greater than a first preset threshold, sleeping is performed based on a first preset step length; If the time difference between the current moment and the first target trigger moment is less than or equal to the first preset threshold, spin waiting is performed until the first target trigger moment is reached, and then the first control instruction address sequence number is obtained through the kernel transceiver thread.

5. The method according to claim 1, characterized in that The first preset period is determined according to a data processing period of the control algorithm.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: Based on a second preset period, data in the user space is sent and received through a data exchange thread in the user space; the second preset period is consistent with the first preset period; For each of the second preset cycles, obtaining a second control instruction address serial number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address serial number; The second feedback information address serial number is obtained through the data exchange thread, and the first feedback information is read from the second shared memory based on the second feedback information address serial number.

7. The method according to claim 6, characterized in that The acquiring the second control instruction address serial number through the data exchange thread, and writing the first control instruction into the first shared memory based on the second control instruction address serial number, comprises: Obtaining a second control instruction address sequence number from a preset storage space of the kernel space based on a preset function through the data exchange thread; the second control instruction address sequence number is used to indicate a fourth address in the first shared memory; the fourth address is a previous address of the first address; Based on the second control instruction address serial number, write the first control instruction into the first address, after the first control instruction is written, indicate the first address with the first control instruction address serial number, obtain the first control instruction address serial number, and store the second control instruction address serial number into the preset storage space; Correspondingly, reading the first feedback information from the second shared memory through the data exchange thread includes: Obtaining a second feedback information address sequence number from the preset storage space based on a preset function through the data exchange thread; Based on the second feedback information address serial number, the first feedback information is read from a third address.

8. The method according to claim 6, characterized in that The acquiring the second control instruction address sequence number through the data exchange thread includes: Based on a preset function, sending a first target request to a target processing function in the kernel space through a data exchange thread in the user space; In response to the first target request, the target processing function acquires a spin lock, and sends the second control instruction address sequence number to the data exchange thread under the protection of the spin lock; Correspondingly, obtaining the second feedback information address sequence number through the data exchange thread includes: Based on a preset function, sending a second target request to the target processing function in the kernel space through a data exchange thread in the user space; In response to the second target request, the target processing function acquires a spin lock, and sends the second feedback information address sequence number to the data exchange thread under the protection of the spin lock.

9. The method according to claim 6, characterized in that The acquiring the second control instruction address sequence number through the data exchange thread includes: Determine a second target triggering time corresponding to the current second preset period; If the time difference between the current moment and the second target triggering moment is greater than a second preset threshold, sleeping is performed based on a second preset step length; If the time difference between the current moment and the second target trigger moment is less than or equal to the second preset threshold, spin waiting is performed until the second target trigger moment is reached, and then the second control instruction address sequence number is obtained through the data exchange thread.

10. A kernel space data transceiver device, characterized in that: include: at least one processor and memory; The memory stores computer-executable instructions; The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the kernel space data sending and receiving method as described in any one of claims 1 to 9.

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