A Fault Tolerant Intelligent Evaluation Method for Chip Interfaces with Multimodal Data Fusion

Abstract

The present invention relates to the technical field of chip interface fault tolerance assessment, specifically a multimodal data fusion chip interface fault tolerance intelligent assessment method, comprising: first, synchronously collecting multimodal fault tolerance data of the chip interface; then, based on the data, using a dynamic baseline model and cross-domain event correlation analysis to detect single-point anomalies and associated anomalies in the interface operation; then, using an expert knowledge base and a data-driven diagnostic model in parallel to generate rule-based fault tolerance results and data-driven fault tolerance results, respectively, and integrating them according to a preset fusion strategy to obtain a final fault tolerance result; calculating the interface health index and predicting the remaining effective life; finally, combining the final fault tolerance result with the remaining effective life to calculate the fault risk, generate a comprehensive assessment report, and trigger an adaptive fault tolerance mechanism verification and optimization action based on the fault risk through a decision logic engine. The present invention improves the accuracy and intelligence level of chip interface fault tolerance capability assessment.

Description

Technical Field

[0001] The present invention relates to the technical field of chip interface fault tolerance evaluation, and in particular to a chip interface fault tolerance intelligent evaluation method based on multimodal data fusion. Background Art

[0002] With the development of fields such as high-performance computing and artificial intelligence, high-computing chips and their high-speed interfaces have become critical. However, high-speed transmission is susceptible to multiple factors, such as signal integrity and thermal effects, which can lead to transmission errors. Therefore, the fault tolerance of the interface is crucial. Fault tolerance refers to the ability of an interface to maintain normal functionality or acceptable performance levels in the presence of physical or logical layer errors. It typically relies on mechanisms such as error detection, error correction, and link state recovery.

[0003] Current methods for error detection and reliability assessment of internal interfaces in such computing systems primarily include physical layer parameter measurement and logical layer functional verification. However, these methods have shortcomings when assessing the impact of interfaces on overall system reliability under complex operating conditions. First, existing technologies often rely on a single monitoring dimension, making it difficult to effectively detect complex, sporadic internal errors or faults that are caused by the coupling of multiple physical factors or are related to system status. For example, they fail to correlate physical layer degradation with logical layer anomalies, resulting in insufficient identification of potential cascading failure modes. Second, existing testing techniques often employ fixed-mode stimulation and static threshold judgments, which fail to accurately reflect the true error response characteristics of interfaces under actual dynamic system loads and interference, limiting the ability to monitor potential errors during system operation. Finally, existing technologies often rely on a posteriori statistics after an error has occurred, lacking the ability to conduct online, real-time monitoring and early warning of the health of interfaces and their associated system components. This makes it difficult to effectively diagnose the root cause of errors and predictive maintenance based on error degradation trends.

[0004] To this end, in order to improve the error detection, monitoring and fault diagnosis and evaluation capabilities of high-speed interfaces within computing systems, a chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion is proposed. Summary of the Invention

[0005] The purpose of the present invention is to provide a chip interface fault tolerance intelligent evaluation method based on multimodal data fusion, aiming to improve the accuracy of chip interface fault tolerance capability evaluation. First, the multimodal fault tolerance data of the chip interface is synchronously collected; then, based on the data, a dynamic baseline model and cross-domain event correlation analysis are used to detect single-point anomalies and associated anomalies in the interface operation; then, the expert knowledge base and the data-driven diagnostic model are used in parallel to generate rule-based fault tolerance results and data-driven fault tolerance results, respectively, and the final fault tolerance results are obtained by integrating them according to a preset fusion strategy; the interface health index is calculated and the remaining effective life is predicted; finally, the fault risk is calculated by combining the final fault tolerance result and the remaining effective life, a comprehensive evaluation report is generated, and based on the fault risk, an adaptive fault tolerance mechanism verification and optimization action is triggered by a decision logic engine, thereby improving the accuracy and intelligence level of chip interface fault tolerance capability evaluation.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] A multimodal data fusion chip interface fault-tolerant intelligent evaluation method, comprising:

[0008] Synchronize the acquisition of multi-modal fault-tolerant data from chip interfaces;

[0009] Based on the multimodal fault-tolerant data, a dynamic baseline model is constructed according to the LSTM-AE model and the EWMA method, and the reconstruction error value of the multimodal fault-tolerant data before and after reconstruction is calculated using the dynamic baseline model to generate a single point anomaly; based on the single point anomaly, a cross-domain event correlation analysis is performed to generate a correlation anomaly;

[0010] Inputting the single point anomaly and the associated anomaly into an expert knowledge base to generate a rule-based fault tolerance result; concurrently inputting the single point anomaly and the associated anomaly into a data-driven diagnostic model to generate a data-driven fault tolerance result; integrating the rule-based fault tolerance result and the data-driven fault tolerance result according to a preset fusion strategy to obtain a final fault tolerance result;

[0011] Calculating an interface health index based on the long-term evolution characteristics of the multimodal fault-tolerant data, and predicting the future interface health index using a time series prediction model to calculate the remaining effective life;

[0012] The fault risk is calculated based on the final fault-tolerance result and the remaining effective life; based on the fault risk, the decision logic engine matches the preset rules to trigger the adaptive fault-tolerance mechanism verification and optimization action.

[0013] Furthermore, the multimodal fault-tolerant data collection process includes:

[0014] Collect physical layer data, including eye diagram parameters, jitter values and signal-to-noise ratio;

[0015] Collect protocol layer data, including protocol state transition events, error packet counts, retransmission requests, and flow control state changes;

[0016] Collect logic layer data, including bit error information from the built-in self-test engine and response data from injected error vectors;

[0017] Collect system-level data, including chip temperature, power rail voltage, performance monitoring unit counts, and operating system log records;

[0018] The collected multimodal fault-tolerant data is timestamp aligned and normalized preprocessed through a protocol synchronization mechanism.

[0019] Furthermore, using the dynamic baseline model for detection specifically includes:

[0020] An LSTM-AE model is used as a dynamic baseline model. The LSTM-AE model includes an encoder consisting of at least one LSTM layer and a decoder consisting of at least one LSTM layer. The encoder is used to compress the multimodal fault-tolerant data within a time window into a potential representation, and the decoder is used to reconstruct the multimodal fault-tolerant data based on the potential representation. The reconstruction error values of the multimodal fault-tolerant data before and after reconstruction are calculated. The EWMA method is used to smooth the time series of the reconstruction error values, calculate the baseline error level and the dynamic error standard deviation, and generate an adaptive threshold. When the reconstruction error value exceeds the adaptive threshold, the corresponding time window is marked as the single point anomaly.

[0021] Furthermore, the detection using the cross-domain event correlation analysis specifically includes:

[0022] The constructed interface fault-tolerant event graph is represented using an adjacency matrix, including: defining the detected single-point anomaly and the multimodal characteristic state exceeding a preset threshold as an abnormal event node; wherein the abnormal event node represents at least one type of physical layer parameter anomaly, protocol layer state anomaly, or system layer performance anomaly; establishing directed edges between the abnormal event nodes, wherein the directed edges represent the temporal dependencies between the single-point anomalies and the multimodal characteristic states; and assigning weights to the directed edges, representing the inverse of the time difference;

[0023] Association rule mining is performed on the interface fault tolerance event graph to generate the association anomaly.

[0024] Furthermore, association rule mining is performed on the interface fault tolerance event graph, including:

[0025] Serialize the abnormal event nodes within each time window into a transaction to form a transaction database;

[0026] The transaction database is processed using the FP-Growth algorithm to extract abnormal event node combinations and generate high-confidence association rules based on minimum confidence;

[0027] The high-confidence association rule is identified as the association anomaly.

[0028] Furthermore, the fusing of the rule-based fault tolerance result and the data-driven fault tolerance result specifically includes:

[0029] Extracting abnormal feature vectors from the single point abnormality and the associated abnormality, matching them with the expert rules stored in the expert knowledge base, and using forward chain reasoning to output rule fault tolerance results and a first confidence level;

[0030] Inputting the abnormal feature vector and the time feature vector into a pre-trained data-driven diagnosis model, wherein the data-driven diagnosis model is a random forest model, and is used to output a data-driven fault tolerance result and a second confidence level;

[0031] If the rule-based fault-tolerance result and the data-driven fault-tolerance result are the same, the final fault-tolerance result is output based on a weighted average method of confidence; otherwise, the diagnosis result with the highest confidence is retained as the final fault-tolerance result.

[0032] Furthermore, predicting the remaining useful life specifically includes:

[0033] Extracting degradation trend features from the multimodal data collected over a long time window, normalizing the degradation trend features, and determining chip interface loads using a principal component analysis method; using the chip interface loads as feature weights, and calculating the interface health index using a linear fusion function based on the weighted degradation trend features according to the feature weights;

[0034] An LSTM model is used to predict the future interface health index, and a Monte Carlo Dropout is used to calculate the mean and confidence interval of the future interface health index, and a prediction curve is output; the prediction curve is compared with a preset failure threshold to estimate the remaining useful life.

[0035] Compared with the prior art, the present invention has the following beneficial effects:

[0036] 1. This invention integrates synchronized multimodal data acquisition with a dual intelligent anomaly detection mechanism. By comprehensively capturing and aligning the physical, protocol, logical, and system-layer status data of the chip's high-speed interface, and combining subtle deviation detection based on a dynamic baseline model with complex pattern recognition based on cross-domain event correlation analysis, it achieves sensitive capture of early, intermittent, and cross-domain coupled potential errors. Compared to traditional monitoring methods that rely on a single data source or static thresholds, this invention improves the coverage, sensitivity, and environmental adaptability of fault detection, and can effectively adapt to the dynamic working conditions of the interface.

[0037] 2. This invention constructs a hybrid diagnostic approach that complements the strengths of expert knowledge and data-driven models. By parallelizing forward-chaining reasoning based on a predefined rule base and data-driven classification based on machine learning models, and integrating the results of the two diagnostic paths using a specific fusion strategy based on confidence, this invention balances the rapid and accurate identification of known fault patterns with the intelligent inference of complex, unknown patterns. This improves the accuracy and robustness of root cause location, thereby enhancing the precision, reliability, and adaptability of chip interface fault diagnosis to different fault types.

[0038] 3. This invention introduces a quantitative health assessment and forward-looking lifespan prediction technology based on long-term trends. By extracting long-term degradation characteristics from multimodal data, objectively determining feature weights and constructing a comprehensive health index using methods such as principal component analysis, this technology then combines time series prediction models and uncertainty quantification to predict future trends in interface health and estimate remaining useful life. This enables quantitative and dynamic tracking of interface health and predictive assessment of future failure risks, thereby enhancing the forward-looking reliability management of chip high-speed interfaces and the proactiveness of maintenance strategies. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 The present invention provides a flowchart of a chip interface fault-tolerant intelligent evaluation method for multimodal data fusion;

[0040] Figure 2 A schematic diagram of the process of synchronously collecting operating data and detecting using a dynamic baseline model according to the present invention;

[0041] Figure 3 A schematic diagram of a process for generating the associated anomaly according to the present invention. DETAILED DESCRIPTION

[0042] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0043] See also Figures 1 to 3 The present invention provides a chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion, and the technical solution is as follows:

[0044] Example 1:

[0045] To meet the ever-increasing demand for data throughput, modern high-computing chips integrate extremely high-speed internal and external interfaces. However, in such a high-speed transmission environment, multiple factors such as signal integrity, power supply noise, thermal effects, and complex workloads can easily cause interface transmission errors, posing a severe challenge to the stability and reliability of chip interface detection. Existing chip interface testing and evaluation methods, such as single physical layer eye diagram testing and protocol layer compliance checking or functional vector testing, often have the following limitations: single data dimension, inability to simulate real-time dynamic working conditions, lack of intelligent analysis capabilities, and inability to perform early risk prediction. These shortcomings make it difficult for existing technologies to comprehensively, accurately, and prospectively evaluate the actual fault tolerance of chip interfaces in actual complex application environments, making it difficult to meet the urgent need for ultimate reliability in interface detection.

[0046] In order to overcome the above-mentioned defects of the prior art, this embodiment describes in detail a specific technical process of implementing a chip interface fault-tolerant intelligent evaluation method of multimodal data fusion. Figure 1 Shown, including:

[0047] Synchronously collect multimodal fault-tolerant data from chip interfaces as the basis for subsequent intelligent analysis.

[0048] Further, if Figure 2 As shown, the multimodal fault-tolerant data collection process includes:

[0049] Collect physical layer data to obtain analog characteristics related to signal quality, including eye diagram parameters, jitter values, and signal-to-noise ratio;

[0050] Collect protocol layer data, capture protocol interaction events and error statistics, including protocol state transition events, error packet counts, retransmission requests, and flow control state changes;

[0051] Collect logic layer data, including bit error information from the built-in self-test engine and response data from injected error vectors;

[0052] Collect system-level data and read relevant system environmental parameters, including chip temperature, power rail voltage, performance monitoring unit counts, and operating system log records;

[0053] The collected multimodal fault-tolerant data is pre-processed with timestamp alignment and normalization through a protocol synchronization mechanism, including correcting the timestamps of all data points or events and mapping them to a unified global time reference axis to ensure that data from different sources are accurately aligned in the time dimension. For features extracted from continuous signals such as the physical layer, aggregation processing is performed according to a unified time window (such as 1 millisecond), such as calculating the average, maximum, and standard deviation within the window. For discrete events at the protocol layer, logic layer, and system layer, their precise occurrence time points are retained to ensure that the timing information of the events is not lost. Transient noise (such as glitches) in analog signal features is removed through a moving average or median filter to improve data stability and reliability. Then, the Z-score normalization method is used to convert these features into a distribution with a mean of 0 and a standard deviation of 1, thereby ensuring that these features are comparable when subsequently input into the machine learning model.

[0054] By synchronously collecting data from four key layers—the physical, protocol, logical, and system layers—a comprehensive view of the operating status of high-speed chip interfaces is constructed. This breaks through the limitations of traditional technologies that rely solely on a single data dimension (such as eye diagrams or bit error rate assessments) and captures the complex behaviors and potential hazards arising from the interplay of factors across multiple layers. The integrated analysis of this multi-dimensional data provides comprehensive and multi-dimensional data support for subsequent fault-tolerance assessments, more accurately revealing the true performance of chip interfaces under complex operating conditions.

[0055] Furthermore, based on the multimodal fault-tolerant data, a dynamic baseline model is constructed according to the LSTM-AE model and the EWMA method, and the reconstruction error value of the multimodal fault-tolerant data before and after reconstruction is calculated using the dynamic baseline model to generate a single point anomaly; based on the single point anomaly, a cross-domain event correlation analysis is performed to generate a correlation anomaly;

[0056] A single-point anomaly refers to a statistically significant deviation in the operational status of an interface at a specific moment, often serving as an initial warning of a potential problem. A correlated anomaly, through cross-domain event correlation analysis, combines single-point anomalies or events with specific characteristic thresholds according to specific temporal relationships or co-occurrence patterns to form a composite event pattern. This signature can more comprehensively reflect the characteristics and evolution of abnormal behavior.

[0057] Further, if Figure 2 As shown, the detection using the dynamic baseline model specifically includes:

[0058] An LSTM-AE model is used as a dynamic baseline model. The LSTM-AE model includes: an encoder composed of at least one LSTM layer and a decoder composed of at least one LSTM layer; the encoder is used to compress the multimodal fault-tolerant data within a time window into a latent representation, and the decoder is used to reconstruct the multimodal fault-tolerant data based on the latent representation;

[0059] In this embodiment, the encoder uses a two-layer LSTM structure, with each layer containing 128 hidden units. It takes as input multimodal fault-tolerant data with a length of 50 time steps. The encoder compresses the input data into a 64-dimensional latent representation that captures the core features of the data. The decoder, also using a two-layer LSTM structure, receives the latent representation output by the encoder and attempts to reconstruct the original multimodal fault-tolerant data.

[0060] This LSTM-AE model requires pre-training on a large amount of multimodal fault-tolerant data representing "normal" chip interface operation. The training goal is to minimize the mean squared error (MSE) between the input data and the model's reconstructed output, enabling the model to accurately reproduce normal behavior patterns. The Adam optimizer is used during training, and early stopping is employed to prevent overfitting and ensure the model's generalization capabilities.

[0061] During actual operation or testing of the interface, the normalized real-time multimodal fault-tolerant data is input into the trained LSTM-AE model using the same time window length (50 steps) as used during training. For each input time window, the model outputs a reconstructed multimodal fault-tolerant data. The mean squared error (MSE) of the multimodal fault-tolerant data before and after reconstruction is calculated and recorded as the reconstruction error value for the current window.

[0062] In order to adapt to the slow changes in the normal working state of the interface (such as the gradual increase in temperature or the smooth switching of the load), the EWMA method is used to smooth the time series of the reconstruction error value, calculate the baseline error level and the dynamic error standard deviation, and generate an adaptive threshold, which is expressed as:

[0063] ;

[0064] ;

[0065] ;

[0066] in, For time The baseline error level, For time The reconstruction error value of For time The baseline error level, is the smoothing factor, which can be set to 0.1. is the standard deviation of the dynamic error, For time The adaptive threshold, is the sensitivity parameter, refer to rule, can be set to 3; in addition, the initial value of the exponentially weighted moving average Equal to the initial value of the reconstruction error value .

[0067] When the reconstruction error value exceeds the adaptive threshold, the corresponding time window is marked as the single point anomaly.

[0068] The LSTM-AE model is capable of capturing complex, nonlinear temporal dependencies in high-dimensional, multimodal data and is extremely sensitive to subtle deviations from "normal" behavior patterns. Even if these changes haven't yet reached the threshold to trigger a fixed alarm, the model can detect abnormal signals in the early stages of a fault or degradation, thus providing early warning. Furthermore, the EWMA adaptive threshold mechanism dynamically adjusts the judgment baseline based on normal fluctuations in the interface's operating status, avoiding the large number of false positives generated by fixed thresholds when the environment or operating conditions change, thereby improving the robustness and accuracy of chip interface fault tolerance assessments.

[0069] Further, if Figure 3 As shown, the detection using the cross-domain event correlation analysis specifically includes:

[0070] The interface fault-tolerant event graph constructed using the adjacency matrix is used to organize discrete abnormal events from different modalities into a structured graph to explicitly represent the temporal relationship between them, laying the foundation for subsequent abnormal signature mining. It includes:

[0071] Single-point anomalies and multimodal characteristic states exceeding preset thresholds (for example, "jitter RMS > 10ps," "retransmission rate > 0.1%," and "temperature > 85°C") are defined as abnormal event nodes. These nodes reflect one or more types of abnormalities: physical layer parameter anomalies, protocol layer status anomalies, or system layer performance anomalies. They contain the timestamp of the event, the event type (for example, "single-point anomaly," "physical layer jitter exceeding the limit," and an optional abnormal magnitude value.

[0072] Traverse the pairs of abnormal event nodes that are adjacent in time, and establish directed edges between the abnormal event nodes. The directed edges represent the temporal dependencies between single-point abnormalities and multimodal feature states. Among them, multimodal feature states refer to the set of situations in which multimodal fault-tolerant data exists. For example, if the event of node B occurs after node A, and the time difference between the two is Less than the preset time window threshold ( , for example, 1 millisecond), a directed edge (A→B) is established between A and B. This directed edge represents the close temporal dependency or potential sequential triggering relationship between the two abnormal events.

[0073] Assign a weight to the directed edge, which represents the inverse of the time difference, i.e., the weight This means that the closer two events are in time, the higher the weight of their edge, indicating a stronger potential correlation between them. Through directed edges and time-difference-based weights, the graph structure can accurately capture and quantify the sequence and temporal closeness of abnormal events, helping to understand fault propagation paths, identify causal chains, and distinguish between coincidental and correlated events.

[0074] As new abnormal events occur, nodes and edges are continuously updated to form a dynamically evolving interface fault tolerance event graph. This graph can be stored and processed using standard graph data structures. Finally, association rule mining is performed on the interface fault tolerance event graph to generate the associated anomalies.

[0075] By transforming the previously scattered and multi-sourced abnormal event stream into a structured graph representation, the temporal relationships between abnormal events of different types and levels can be clearly revealed, facilitating subsequent complex pattern analysis and algorithmic processing. Furthermore, the graph structure itself enables visual analysis of abnormal events, helping domain experts intuitively observe the evolution and aggregation of abnormal events, thereby gaining an intuitive understanding of potential issues with chip interfaces.

[0076] Further, if Figure 3 As shown, performing association rule mining on the interface fault tolerance event graph includes:

[0077] Serialize abnormal event nodes within each time window into a transaction. A transaction contains the type identifiers of all unique abnormal event nodes that occurred within that window. For example, if "jitter exceeded limit" occurred twice and "temperature exceeded limit" occurred once within a window, the transaction would be represented as {jitter exceeded limit, temperature exceeded limit}. Continuously process the monitoring data stream, collect a large number of such transactions, and form a transaction database.

[0078] The FP-Growth algorithm is used to process the transaction database. The key parameters of the algorithm are set, including: minimum support (0.05), which represents the lower limit of the frequency of abnormal event combinations in the transaction database, and the support represents the frequency of abnormal event combinations in the transaction database; minimum confidence (0.7), which represents the threshold for subsequent generation of association rules, and the confidence represents the credibility of this rule:

[0079] ;

[0080] in, If A occurs, then B occurs. Indicates the number of times A and B appear together, Indicates the number of times A appears.

[0081] Extract the abnormal event node combination, and generate a high-confidence association rule based on the minimum confidence, that is, an association rule greater than 0.7, and identify the high-confidence association rule as the associated anomaly.

[0082] As shown in Tables 1 and 2, since the confidence level of the high-confidence association rule "If {temperature exceeds limit} then {jitter exceeds limit}" exceeds 0.7, it is officially classified as a "correlated anomaly." The identified correlated anomalies are based on the actual statistical patterns of abnormal events in actual interface operation, rather than relying solely on a priori knowledge. This approach helps discover unexpected fault coupling mechanisms or unique failure modes under specific operating conditions. By providing richer, more diagnostically valuable input containing contextual information, correlated anomalies can significantly improve the accuracy and efficiency of subsequent fault diagnosis steps.

[0083] Table 1 Support of abnormal event node combinations

[0084]

[0085] Table 2 High confidence association rules

[0086]

[0087] Furthermore, the single point anomaly and the associated anomaly are input into an expert knowledge base to generate a rule-based fault tolerance result; the single point anomaly and the associated anomaly are simultaneously input into a data-driven diagnosis model to generate a data-driven fault tolerance result; the rule-based fault tolerance result and the data-driven fault tolerance result are integrated according to a preset fusion strategy to obtain a final fault tolerance result;

[0088] Furthermore, the fusing of the rule-based fault tolerance result and the data-driven fault tolerance result specifically includes:

[0089] Extract anomaly feature vectors from the single-point anomaly and the associated anomalies. For example, if a single-point anomaly includes jitter RMS = 12 ps, temperature = 87°C, and retransmission rate = 0.15%, then the anomaly feature vector X = [12, 87, 0.15]. Alternatively, extract the time feature vector of multimodal fault-tolerant data, such as anomaly duration: 5 ms; frequency: 3 times / minute. Combine the anomaly feature vector and the time feature vector as input.

[0090] Match the expert rules stored in the expert knowledge base and use forward chain reasoning to output the rule fault tolerance result and its first confidence level. For example, rule 1: IF [jitter RMS > 10ps AND temperature > 85°C] THEN [diagnosis: signal integrity degraded due to high temperature, confidence level = 0.8], the reasoning results in the rule fault tolerance result D1 = [(high temperature degradation)], where the first confidence level is 0.8.

[0091] The abnormal feature vector and time feature vector are input into a pre-trained data-driven diagnosis model, a random forest model, which outputs a data-driven fault tolerance result and its second confidence level. This model, trained on a large amount of historical fault data or fault injection experimental data, establishes a complex mapping relationship between abnormal feature vectors and diagnosis results. For example, the output data-driven fault tolerance result D2 = [(high temperature degradation)] with a second confidence level of 0.85.

[0092] If the rule-based fault tolerance result is the same as the data-driven fault tolerance result, the final fault tolerance result is output based on the weighted average method of confidence, which is expressed as:

[0093] ;

[0094] in, Indicates the final fault tolerance result, indicates the rule weight, Represents the data-driven diagnosis model weight.

[0095] Otherwise, the diagnosis result with the highest confidence is retained as the final fault-tolerant result.

[0096] Expert rules provide determinism and explainability when dealing with clear and known fault modes, while random forest models demonstrate strong classification capabilities when dealing with complex, nonlinear patterns. This combination achieves higher diagnostic accuracy and coverage than either approach alone. Furthermore, a clear decision fusion strategy is employed to provide a clear and robust basis for decision-making when integrating diagnostic information from two different sources. This improves the reliability of fault-tolerance judgments for chip interfaces, especially in situations of information conflict or high uncertainty.

[0097] Furthermore, based on the long-term evolution characteristics of the multimodal fault-tolerant data, an interface health index is calculated, and a time series prediction model is used to predict the remaining effective life;

[0098] Furthermore, predicting the remaining useful life specifically includes:

[0099] Extracting degradation trend features from the multimodal data collected over a long time window, normalizing the degradation trend features, and determining chip interface loads using a principal component analysis method;

[0100] Among them, the selected features include: the long-term growth slope of the root mean square value of jitter and the decay rate of eye diagram height over time at the physical layer; the growth rate of correctable error count at the protocol layer and the trend of shortening the average time interval of link retraining events; the long-term rising slope of the bit error rate under a specific high-stress data mode at the logic layer; the average operating temperature of the interface core area at the system layer and the standard deviation trend of temperature changes over time, etc.

[0101] To objectively integrate multiple degradation trend features and reflect their weighted impact on overall health, a historical dataset consisting of the normalized degradation trend features described above at different health stages (from new to near-failure) was collected. Principal component analysis (PCA) was applied to this dataset to calculate the principal components. The first principal component (PC1), which explains the majority of the data variance, was selected. The load vector corresponding to this first principal component was used as the feature weight for each original degradation trend feature. The absolute value of the chip interface load reflects the importance of the corresponding feature in describing the primary degradation direction.

[0102] To objectively integrate multiple degradation trend features and reflect their weighted impact on overall health, we first collected a historical dataset of normalized degradation trend features covering different health stages. Next, we applied principal component analysis (PCA) to this dataset and calculated the principal components. PC1, which explains the majority of the data variance, was selected, and its corresponding chip interface load vector was used as the weight for each original degradation trend feature. The larger the absolute value of the chip interface load, the more important the feature is in describing the primary degradation direction. This effectively quantifies the weight of each feature's impact on overall health, providing a scientific basis for subsequent health assessments.

[0103] According to the feature weights, the weighted degradation trend features are calculated using a linear fusion function to obtain the interface health index; wherein the interface health index ranges from [0, 1], where 1 represents complete health and 0 represents complete failure.

[0104] An LSTM model is used to predict the future interface health index and output a sequence of future interface health indexes. Monte Carlo Dropout is used to calculate the mean and standard deviation of the future interface health index sequence. This yields a mean prediction curve for the future interface health index and a confidence interval around the mean curve. For example, a mean ± 1.96 * standard deviation corresponds to a 95% confidence interval. Finally, a prediction curve graph containing these two pieces of information is output.

[0105] Compare the predicted curve with the preset failure threshold of 0.3, find the time point when the predicted curve is continuously lower than (or equal to) the preset failure threshold for the first time, record it as the predicted failure time point, calculate the time difference from the current time point to the predicted failure time point, and obtain the remaining useful life.

[0106] By integrating multiple long-term degradation characteristics and using PCA to weight each characteristic, the constructed health index can more comprehensively quantify the current health status of the interface, facilitating trend monitoring and horizontal comparison. This promotes a shift in maintenance strategies from traditional passive repair or periodic replacement to proactive and condition-based maintenance based on actual condition prediction. This not only reduces unplanned downtime but also optimizes spare parts inventory, thereby improving the accuracy and intelligence of chip interface fault tolerance assessment.

[0107] The final fault-tolerance result and the remaining effective life are combined to calculate the failure risk and generate a comprehensive assessment report; based on the failure risk, the decision logic engine matches the preset rules to trigger the adaptive fault-tolerance mechanism verification and optimization actions.

[0108] By synchronously collecting and integrating multi-dimensional status data from the physical, protocol, logical, and system layers, this invention overcomes the limitations of traditional methods that rely on a single information source and enables comprehensive monitoring of interface status. Using intelligent detection technology based on dynamic baseline models and cross-domain event correlation analysis, it can detect early, subtle, and complex anomalies that are coupled across multiple domains, improving the coverage and accuracy of error detection and adapting to the changing operating conditions of dynamic chip interfaces. Furthermore, a hybrid diagnostic strategy combining expert knowledge with data-driven models integrates diagnostic results, improving the accuracy and robustness of root cause location. Furthermore, by constructing a health index and predicting remaining useful life, it achieves a shift from passive response to proactive predictive maintenance, enhancing system reliability and availability. Finally, an evaluation report is generated based on comprehensive analysis, and adaptive fault-tolerance responses can be optionally triggered. This not only provides a deep quantitative assessment of the interface's fault tolerance capabilities, but also forms a closed loop of monitoring, evaluation, and optimization, thereby improving the operational reliability and intelligent management of the chip interface and, ultimately, the entire computing system.

[0109] Example 2:

[0110] Based on the detailed description of the complete technical process and specific implementation details of the chip interface fault-tolerant intelligent evaluation method of multimodal data fusion proposed in the present invention in Example 1, this example aims to further illustrate the application of this method in specific industrial scenarios.

[0111] A chip company deployed a large number of high-speed chip interfaces in its data center. While ensuring service continuity, the company hoped to effectively monitor and diagnose occasional performance degradation or unstable connections that might occur during high-concurrency and long-term operations on these critical interfaces. Traditional threshold-based monitoring and post-analysis methods were unable to meet these requirements. To address this, a multimodal data fusion-based intelligent fault-tolerance assessment method for chip interfaces was developed, including:

[0112] Synchronize the acquisition of multi-modal fault-tolerant data from chip interfaces;

[0113] Based on the multimodal fault-tolerant data, a dynamic baseline model is constructed according to the LSTM-AE model and the EWMA method, and the reconstruction error value of the multimodal fault-tolerant data before and after reconstruction is calculated using the dynamic baseline model to generate a single point anomaly; based on the single point anomaly, a cross-domain event correlation analysis is performed to generate a correlation anomaly;

[0114] Inputting the single point anomaly and the associated anomaly into an expert knowledge base to generate a rule-based fault tolerance result; concurrently inputting the single point anomaly and the associated anomaly into a data-driven diagnostic model to generate a data-driven fault tolerance result; integrating the rule-based fault tolerance result and the data-driven fault tolerance result according to a preset fusion strategy to obtain a final fault tolerance result;

[0115] Specifically, to verify the superiority of the hybrid fault root cause diagnosis method proposed in the present invention over a single diagnosis method, the following comparative experiment is designed:

[0116] Method A (Expert Rules): Only expert knowledge base and forward chaining reasoning are used for diagnosis.

[0117] Method B (data-driven model): Only use the pre-trained data-driven model (taking random forest RF as an example) for diagnosis.

[0118] Method C (present invention): Execute Method A and Method B in parallel and integrate the results according to a preset fusion strategy.

[0119] The abnormal feature vectors in the test set were input into methods A, B, and C respectively. The performance comparison results are shown in Table 3. Method C outperforms methods A or B in terms of overall diagnostic accuracy and F1 scores of various fault types, which proves the performance improvement brought by the present invention.

[0120] Table 3 Performance comparison results

[0121]

[0122] Table 4 Comprehensive Assessment Report

[0123]

[0124] Calculating an interface health index based on the long-term evolution characteristics of the multimodal fault-tolerant data, and predicting the future interface health index using a time series prediction model to calculate the remaining effective life;

[0125] The final fault-tolerance result and the remaining effective life are combined to calculate the failure risk and generate a comprehensive assessment report; based on the failure risk, the decision logic engine matches the preset rules to trigger the adaptive fault-tolerance mechanism verification and optimization actions.

[0126] Specifically, the failure probability is modeled using an exponential decay function according to the remaining useful life:

[0127] ;

[0128] in, represents the failure probability, Indicates the remaining useful life. Indicates the maximum health status of the interface, which is set according to the interface design life. represents the confidence interval width, Indicates the maximum possible width.

[0129] The predefined severity weight table is used to query the severity weight corresponding to the final fault tolerance result. The severity weight is multiplied by the confidence level to obtain the impact factor. Fault risk is calculated by weighted fusion of the impact factor and the failure probability. Fault risk is mapped to the following risk levels: Low: [0, 0.3); Medium: [0.3, 0.6); High: [0.6, 0.8); Critical: [0.8, 1.0].

[0130] The generated comprehensive evaluation report is shown in Table 4, which includes abnormal statistics within the corresponding time range, final fault tolerance results, and failure risks.

[0131] Furthermore, the triggering and execution process of the adaptive fault tolerance mechanism is as follows: the fault risk level and health index (HI) and other information are input into the decision logic engine. The engine acts as a rule matcher, matches the predefined rule base based on the input information and executes the corresponding action. For example:

[0132] Rule 1: If RiskLevel = Critical, the condition is met and the corresponding action is to reduce the link speed.

[0133] Rule 2: Complex anomaly = "Temperature exceeds limit → Jitter exceeds limit". If the condition is met, the action is to increase the fan speed.

[0134] When the above rule matches, the "reduce link speed" and "increase fan speed" actions are executed simultaneously. After the actions are executed, a comprehensive evaluation report is regenerated based on the new multimodal fault tolerance data. A feedback mechanism continuously optimizes the rule base and action strategies, forming a closed-loop optimization process of continuous improvement. This ensures rapid response to fault risks under dynamic operating conditions while improving the adaptability and effectiveness of the fault tolerance strategy.

[0135] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion, characterized in that: include: Synchronize the acquisition of multi-modal fault-tolerant data from chip interfaces; The multimodal fault-tolerant data collection process includes: Collect physical layer data, including eye diagram parameters, jitter values and signal-to-noise ratio; Collect protocol layer data, including protocol state transition events, error packet counts, retransmission requests, and flow control state changes; Collect logic layer data, including bit error information from the built-in self-test engine and response data from injected error vectors; Collect system-level data, including chip temperature, power rail voltage, performance monitoring unit counts, and operating system log records; Performing timestamp alignment and normalization preprocessing on the collected multimodal fault-tolerant data through a protocol synchronization mechanism; Based on the multimodal fault-tolerant data, a dynamic baseline model is constructed according to the LSTM-AE model and the EWMA method. The dynamic baseline model is used to calculate the reconstruction error value of the multimodal fault-tolerant data before and after reconstruction to generate a single point anomaly. Based on the single point anomaly, cross-domain event correlation analysis is performed to generate a correlation anomaly. Detection using the cross-domain event correlation analysis specifically includes: The constructed interface fault-tolerant event graph is represented using an adjacency matrix, including: defining the detected single-point anomaly and the multimodal characteristic state exceeding a preset threshold as an abnormal event node; wherein the abnormal event node represents at least one type of physical layer parameter anomaly, protocol layer state anomaly, or system layer performance anomaly; establishing directed edges between the abnormal event nodes, wherein the directed edges represent the temporal dependencies between the single-point anomalies and the multimodal characteristic states; and assigning weights to the directed edges, representing the inverse of the time difference; Performing association rule mining on the interface fault-tolerant event graph to generate the associated anomaly; Inputting the single point anomaly and the associated anomaly into an expert knowledge base to generate a rule-based fault tolerance result; concurrently inputting the single point anomaly and the associated anomaly into a data-driven diagnostic model to generate a data-driven fault tolerance result; integrating the rule-based fault tolerance result and the data-driven fault tolerance result according to a preset fusion strategy to obtain a final fault tolerance result; Calculating an interface health index based on the long-term evolution characteristics of the multimodal fault-tolerant data, and predicting the future interface health index using a time series prediction model to calculate the remaining effective life; The fault risk is calculated based on the final fault-tolerance result and the remaining effective life; based on the fault risk, the decision logic engine matches the preset rules to trigger the adaptive fault-tolerance mechanism verification and optimization action.

2. The chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion according to claim 1 is characterized in that: The detection using the dynamic baseline model specifically includes: Using the LSTM-AE model as a dynamic baseline model, the LSTM-AE model includes an encoder consisting of at least one LSTM layer and a decoder consisting of at least one LSTM layer; the encoder is used to compress the multimodal fault-tolerant data in a time window into a latent representation, and the decoder is used to reconstruct the multimodal fault-tolerant data based on the latent representation; The reconstruction error values of the multimodal fault-tolerant data before and after reconstruction are calculated; the time series of the reconstruction error values are smoothed using the EWMA method, the baseline error level and the dynamic error standard deviation are calculated, and an adaptive threshold is generated; when the reconstruction error value exceeds the adaptive threshold, the corresponding time window is marked as the single point anomaly.

3. The chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion according to claim 1 is characterized in that: Performing association rule mining on the interface fault tolerance event graph includes: Serialize the abnormal event nodes within each time window into a transaction to form a transaction database; The transaction database is processed using the FP-Growth algorithm to extract abnormal event node combinations and generate high-confidence association rules based on minimum confidence; The high-confidence association rule is identified as the association anomaly.

4. The chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion according to claim 1 is characterized in that: The fusion of the rule-based fault tolerance result and the data-driven fault tolerance result specifically includes: Extracting abnormal feature vectors from the single point abnormality and the associated abnormality, matching them with the expert rules stored in the expert knowledge base, and using forward chain reasoning to output rule fault tolerance results and a first confidence level; Inputting the abnormal feature vector and the time feature vector into a pre-trained data-driven diagnosis model, wherein the data-driven diagnosis model is a random forest model, and is used to output a data-driven fault tolerance result and a second confidence level; If the rule-based fault-tolerance result and the data-driven fault-tolerance result are the same, the final fault-tolerance result is output based on a weighted average method of confidence; otherwise, the diagnosis result with the highest confidence is retained as the final fault-tolerance result.

5. The chip interface fault-tolerant intelligent evaluation method based on multimodal data fusion according to claim 1 is characterized in that: Predicting the remaining useful life specifically includes: Extracting degradation trend features from the multimodal data collected over a long time window, normalizing the degradation trend features, and determining chip interface loads using a principal component analysis method; using the chip interface loads as feature weights, and calculating the interface health index using a linear fusion function based on the weighted degradation trend features according to the feature weights; The LSTM model is used to predict the future interface health index, the Monte Carlo Dropout is used to calculate the mean and confidence interval of the future interface health index, and a prediction curve is output; the prediction curve is compared with a preset failure threshold to calculate the remaining useful life.

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