Light detection circuit, chip and light detection method

By using bipolar transistors in the photodetection circuit and providing bias current, the problems of complex structure and large layout area of ​​the photodetection circuit are solved, and the effect of simplifying the structure, reducing costs and improving anti-interference ability is achieved.

CN120105495APending Publication Date: 2025-06-06BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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Patent Information

Application Number
CN202510168823.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-14
Publication Date
2025-06-06

AI Technical Summary

Technical Problem

The optical detection circuit has a complex structure and a large layout area, which leads to a high overall area cost for the whole chip protection and is easily disturbed by environmental noise.

Method used

A bipolar transistor is used as a photosensitive device, and bias current is provided to its base and emitter through the first current source circuit and the second current source circuit respectively. The bipolar transistor is used to generate an amplified photocurrent signal when light is irradiated, and an alarm signal is generated.

Benefits of technology

The circuit structure is simplified, the layout area is reduced, the overall area cost of full-chip protection is reduced, and it can be directly applied inside the logic circuit, reducing the interference of environmental noise and improving the anti-interference ability.

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Abstract

The invention provides a light detection circuit, a chip and a light detection method. The light detection circuit comprises a bipolar transistor; the first current source circuit is connected with the base electrode of the bipolar transistor and provides a first bias current for the base electrode of the bipolar transistor; the second current source circuit is connected with the emitting electrode of the bipolar transistor and provides a second bias current for the emitting electrode of the bipolar transistor; wherein under the condition that the bipolar transistor senses light irradiation, an amplified light current signal is generated at an emitting electrode, and the light detection circuit generates an alarm signal based on the amplified light current signal and the second bias current. According to the scheme, the bipolar transistor with the current amplification function is adopted as a photosensitive device, use of a current mirror module is reduced, the circuit structure is simple, the layout area is small, and application to the interior of a logic circuit is facilitated.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a light detection circuit, a chip and a light detection method. Background Art

[0002] The optical attack detection circuit (abbreviated as light detector, LD in this article) is a circuit device used to detect and prevent optical attacks. Optical attacks are a security attack method against electronic devices, which uses strong light or laser to illuminate the target device to interfere with or destroy its normal function. The design of the optical attack detection circuit is to identify and respond to this potential security threat and protect the security and stability of electronic equipment.

[0003] Optical attack detection circuits usually include components such as optical sensors, signal processors, and response controllers. Optical sensors are used to detect the light intensity and frequency in the environment, convert optical signals into electrical signals, and transmit them to the signal processor. The signal processor analyzes and processes the received optical signals to identify whether there is an optical attack. Once an optical attack is detected, the response controller will trigger corresponding safety measures, such as shutting down the device, sounding an alarm, or recording attack information.

[0004] In practical applications, optical attack detection circuits can be applied to various electronic devices, such as smartphones, computers, sensors, security systems, etc., to improve the security and anti-interference capabilities of the equipment. By timely detecting and responding to optical attacks, it is possible to effectively prevent equipment from being damaged or data from being leaked, thus ensuring the safety of users and systems. Therefore, optical attack detection circuits have important application prospects and market demands in the current field of information security. Summary of the invention

[0005] In order to solve the above technical problems, the present application provides a light detection circuit, a chip and a light detection method, aiming to solve the problems of complex structure and large layout area of ​​the light detection circuit, reduce the overall area cost of full-chip protection, and reduce the interference of environmental noise.

[0006] According to a first aspect of the present application, a light detection circuit is provided, comprising:

[0007] Bipolar transistor;

[0008] A first current source circuit is connected to the base of the bipolar transistor and provides a first bias current to the base of the bipolar transistor;

[0009] a second current source circuit connected to the emitter of the bipolar transistor and providing a second bias current to the emitter of the bipolar transistor;

[0010] Wherein, when the bipolar transistor senses light irradiation, it generates an amplified photocurrent signal at the emitter, and the light detection circuit generates an alarm signal based on the amplified photocurrent signal and the second bias current.

[0011] Optionally, the bipolar transistor is a PNP transistor, and the collector of the bipolar transistor is connected to a reference ground.

[0012] Optionally, the bipolar transistor is an NPN transistor, and the collector of the bipolar transistor is connected to the supply voltage.

[0013] Optionally, the magnitude of the first bias current and / or the second bias current is adjustable.

[0014] Optionally, the first current source circuit receives a first control signal, and adjusts the magnitude of the output first bias current according to the first control signal;

[0015] The second current source circuit receives a second control signal and adjusts the magnitude of the output second bias current according to the second control signal.

[0016] Optionally, the first current source circuit and the second current source circuit both include:

[0017] A power supply end, receiving a power supply voltage;

[0018] A control end receives a corresponding control signal;

[0019] Output terminal, outputs the corresponding bias current.

[0020] Optionally, the first control signal is an n-bit digital signal, where n is an integer greater than or equal to 1;

[0021] The second control signal is an m-bit digital signal, where m is an integer greater than or equal to 1.

[0022] Optionally, the first current source circuit includes:

[0023] n+1 first current paths connected in parallel, each first current path comprising at least one field effect transistor connected in series between a power supply end and an output end of the first current source circuit, and a control end of the field effect transistor on each first current path receiving a corresponding 1-bit digital signal in the first control signal;

[0024] The second current source circuit comprises:

[0025] m+1 second current paths are connected in parallel, each second current path includes at least one field effect transistor connected in series between the power supply end and the output end of the second current source circuit, and the control end of the field effect transistor on each second current path receives a corresponding 1-bit digital signal in the second control signal.

[0026] Optionally, the light detection circuit further includes:

[0027] The output circuit is connected to the emitter of the bipolar transistor, and is used to perform shaping processing on the emitter signal of the bipolar transistor, and output the alarm signal when the amplified photocurrent signal is greater than the second bias current.

[0028] According to a second aspect of the present application, a chip is provided, in which a light detection circuit as described in any embodiment of the present application is integrated.

[0029] According to a third aspect of the present application, a light detection method is provided, comprising:

[0030] providing a first bias current to a base of the bipolar transistor;

[0031] providing a second bias current to an emitter of the bipolar transistor;

[0032] The bipolar transistor is used for light detection, and when light irradiation is sensed, an amplified photocurrent signal is generated at the emitter;

[0033] An alarm signal is generated based on the amplified photocurrent signal and the second bias current.

[0034] Optionally, when the amplified photocurrent signal is greater than the second bias current, the alarm signal is generated after shaping the emitter signal of the bipolar transistor.

[0035] The beneficial effects of this application include at least:

[0036] The embodiment of the present application adopts a bipolar transistor with a current amplification function as a photosensitive device, and provides bias current at the base and emitter of the bipolar transistor respectively. The amplified photocurrent generated at the emitter of the bipolar transistor when sensing light irradiation and the bias current provided to the emitter are used to generate an alarm signal at the emitter node of the bipolar transistor. Compared with the existing technical solutions, the present application solution does not need to use a current mirror module to perform current amplification and reduction operations. While achieving multi-level output, the use of the current mirror module is reduced. The circuit structure is simple and the layout area is small, which is conducive to reducing the overall area cost of full-chip protection and can be directly applied inside the logic circuit.

[0037] In a further embodiment, the light detection circuit disclosed in the embodiment of the present application can directly use digital signals to control the output of bias current of different levels to achieve different light detection sensitivities without using analog reference signals, can reduce the interference of environmental noise, and has a stronger ability to resist environmental interference.

[0038] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory and do not limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A structural block diagram of a light detection circuit in the related art is shown;

[0040] Figure 2 A schematic diagram of an embodiment of a light detection circuit provided according to a first embodiment of the present application is shown;

[0041] Figure 3 A schematic diagram of an embodiment of a light detection circuit provided according to a second embodiment of the present application is shown;

[0042] Figure 4 Show Figure 2 Schematic diagram of the specific structure of the light detection circuit;

[0043] Figure 5 A schematic diagram showing at least part of the internal structure of a current source circuit provided according to an embodiment of the present application;

[0044] Figure 6 A schematic diagram of an implementation flow of a light detection method provided according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0045] In order to facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.

[0046] References to "one embodiment" or "some embodiments" etc. described in this specification mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear at different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0047] In the description of the present application, the words "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments. "And / or" herein is a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B, which can represent: A exists alone, A and B exist at the same time, and B exists alone. "Multiple" refers to two or more than two. In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, the words "first", "second" and the like are used to distinguish between the same items or similar items with substantially the same functions and effects. Those skilled in the art will understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like do not limit them to be necessarily different.

[0048] In addition, the same figure marks in the figures represent the same or similar structures, and thus their repeated description will be omitted. That is, the various parts in this specification are described in a combination of parallel and progressive manners, and each part focuses on the differences from other parts. The same or similar parts between the various parts can be referenced to each other.

[0049] FI (Fault Injection) attack: In order to cause chip failure, there are currently many methods of FI attack on chips, such as power supply voltage jump, external clock jump, temperature, white light, laser, X-ray and heavy ion. The chip failures caused by these FI attack methods are generally divided into two types: transient failure (temporary) and destructive failure (permanent). For transient failures, the semiconductor material silicon is locally ionized and induces current. When the current is strong enough, the circuit treats the wrong value as an internal signal. When the ionization ends, the generated current disappears (the induced error signal also disappears), and the chip returns to normal behavior. Destructive failures are just the opposite. Due to the attack on the chip structure, permanent failures are caused. Once the structure is damaged, the behavior of the chip will always be affected.

[0050] Laser attack: It is a type of transient fault attack. Since the chip is made of silicon semiconductor and a small amount of doped elements, n-type semiconductors carry electrons and p-type semiconductors carry holes. Electrons and holes are bound in covalent bonds. When enough energy is provided to the electrons, they will break free and become free electrons. Since the energy absorption of semiconductors is related to factors such as the material, wavelength of light, and intensity of light, when silicon semiconductors absorb photons of a specific wavelength to a certain extent, electrons will break free from covalent bonds and become free electrons, which will turn on the metal-oxide-semiconductor (MOS) transistors of the chip and generate abnormal data output, thereby achieving the purpose of fault injection. Hackers can change the configuration information (especially sensitive configuration information) stored in the registers by means of laser fault injection (laser attack), making the system running the chip weak, causing some protection functions of the chip to be turned on or weakened, and hackers to obtain configuration information.

[0051] Figure 1 A structural block diagram of a light detection circuit in the related art is shown. Figure 1 As shown, the light detection circuit 100 includes a current reducing unit 110, a current amplifying unit 120 and a comparing unit 130. The current reducing unit 110 reduces the reference current and outputs it to the comparing unit 130. The current amplifying unit 120 amplifies the photocurrent and outputs it to the comparing unit 130. The comparing unit 130 compares the reduced reference current with the amplified photocurrent and generates an alarm signal accordingly.

[0052] In this solution, the photosensitive devices that generate photocurrent are mostly diodes, which do not have an amplification function. At the same time, the current reduction unit 110 and the current amplification unit 120 are mostly implemented using multi-level adjustable current mirrors, but this will undoubtedly increase the circuit layout area.

[0053] In addition, when performing full chip protection, if the protection range of a single light detection circuit is reduced, and full chip protection is achieved by applying a large number of light detection circuits, on the one hand, repeated current mirrors will increase area costs, and on the other hand, multiple reference current routings are very unrealistic. If the protection range of a single light detection circuit is increased to achieve full chip protection, the photosensitive device in the light detection circuit will require a large area, and multiple photosensitive devices will still need to be placed in the chip, and the overall cost will also increase.

[0054] Figure 2 FIG. 1 shows a schematic diagram of an embodiment of a light detection circuit provided in the first embodiment of the present application. Figure 3 FIG. 1 shows a schematic diagram of an embodiment of a light detection circuit provided in the second embodiment of the present application, referring to FIG. Figure 2 and Figure 3In the embodiment of the present application, the light detection circuit 200 includes: a bipolar transistor, a first current source circuit 210 and a second current source circuit 220 .

[0055] The first current source circuit 210 is connected to the base of the bipolar transistor, and the second current source circuit 220 is connected to the emitter of the bipolar transistor. The first current source circuit 210 is used to provide a first bias current to the base of the bipolar transistor, and the second current source circuit 220 is used to provide a second bias current to the emitter of the bipolar transistor. The bipolar transistor is used as a photosensitive device. When performing light detection, the bipolar transistor generates an amplified photocurrent signal at the emitter of the bipolar transistor when sensing light irradiation (such as strong light or laser irradiation, including light attack). The light detection circuit 200 generates an alarm signal based on the amplified photocurrent signal and the second bias current output by the second current source circuit 220.

[0056] Optionally, in Figure 2 In the embodiment shown, the bipolar transistor is a PNP transistor. In this case, the bipolar transistor Q PNP The collector of is connected to the reference ground. Figure 3 In the embodiment shown, the bipolar transistor is an NPN transistor. In this case, the bipolar transistor Q NPN The collector is connected to the supply voltage VDD.

[0057] In some preferred embodiments, such as Figure 2 and Figure 3 As shown, the light detection circuit 200 also includes an output circuit 230, the input end of which is connected to the emitter of the bipolar transistor (i.e., node A, also referred to herein as the current comparison node), and is used to perform shaping processing on the emitter signal of the bipolar transistor (i.e., the voltage signal of node A), and output an alarm signal when the amplified photocurrent signal is greater than the second bias current. In some embodiments, the output circuit 230 also includes inverting processing on the emitter signal of the bipolar transistor (i.e., the voltage signal of node A).

[0058] exist Figure 2 In the embodiment shown, based on the characteristics of the bipolar transistor, when light is sensed, the bipolar transistor Q PNP A photocurrent signal amplified β times will be generated at its emitter (the β value is determined by the process). When the amplified photocurrent signal is greater than the pull-up capability of the second bias current output by the second current source circuit 220 on node A, a voltage jump occurs at node A. After the output circuit 230 rectifies the voltage signal of node A, its output node signal undergoes a corresponding jump and sends out an alarm signal.

[0059] It can be understood that the light detection circuit 200 disclosed in the embodiment of the present application adopts a bipolar transistor (i.e., a triode) with a current amplification function as a photosensitive device and sets a matching bias circuit (a first current source circuit 210 and a second current source circuit 220), thereby eliminating the need to set up an additional current amplification unit, thereby solving the problem of complex structure and large layout area of ​​the light detection circuit, allowing the light detection circuit 200 to be used inside a logic circuit, reducing the overall area cost of full-chip protection.

[0060] exist Figure 3 In the embodiment shown, based on the characteristics of the bipolar transistor, when light is sensed, the bipolar transistor Q NPN A photocurrent signal amplified by β times (β value is determined by the process) will be generated at its emitter. When the amplified photocurrent signal is greater than the pull-down capability of the second bias current output by the second current source circuit 220 on node A, a voltage jump occurs at node A. After the output circuit 230 rectifies the voltage signal of node A, its output node signal jumps accordingly, and an alarm signal is issued. It can be understood that in most processes, the β value of the NPN transistor device is larger, that is, the bipolar transistor Q used in this embodiment is larger. NPN The beta value is Figure 2 The bipolar transistor Q in the embodiment PNP Larger, so a larger protection range can be obtained under the same layout, that is, the area range that protects the chip from light attack.

[0061] In addition, it should be noted that, based on the characteristics of the bipolar transistor, when light irradiation is sensed, a corresponding photocurrent signal will also be generated on the base of the bipolar transistor. When the base current of the bipolar transistor is greater than the first bias current provided by the first current source circuit 210, the base voltage of the bipolar transistor will be converted to a low level state. This will be more conducive to increasing the emitter current of the bipolar transistor (i.e., the amplified photocurrent signal), thereby making the potential of node A and the output terminal potential of the output circuit 230 easier to flip.

[0062] In this embodiment, the magnitude of the first bias current provided by the first current source circuit 210 and / or the second bias current provided by the second current source circuit 220 is adjustable. In other words, the first current source circuit 210 and / or the second current source circuit 220 can achieve multi-level output. Since the detection sensitivity of the light detection circuit 200 is related to the magnitude of the first bias current and the second bias current, it is equivalent to achieving adjustable control of the detection sensitivity of the light detection circuit 200.

[0063] refer to Figure 2 and Figure 3, the first current source circuit 210 receives the first control signal B<0:n>, and adjusts the magnitude of the output first bias current according to the first control signal B<0:n>. The second current source circuit 220 receives the second control signal E<0:m>, and adjusts the magnitude of the output second bias current according to the second control signal E<0:m>. Wherein, n and m are both integers greater than or equal to 1. In some embodiments, the first control signal B<0:n> is an n-bit digital signal, and the second control signal E<0:m> is an m-bit digital signal.

[0064] In these embodiments, the first current source circuit 210 includes: n+1 first current paths connected in parallel, each first current path includes at least one field effect transistor connected in series between the power supply end and the output end of the first current source circuit 210, and the control end of the field effect transistor on each first current path receives a 1-bit digital signal corresponding to the first control signal B<0:n>. The second current source circuit 220 includes: m+1 second current paths connected in parallel, each second current path includes at least one field effect transistor connected in series between the power supply end and the output end of the second current source circuit, and the control end of the field effect transistor on each second current path receives a 1-bit digital signal corresponding to the second control signal E<0:m>.

[0065] In terms of input / output ports, refer to Figure 4 The first current source circuit 210 and the second current source circuit 220 both include: a power supply terminal VDD, a control terminal and an output terminal IOUT. The power supply terminal VDD is used to receive the power supply voltage VDD; the control terminal is used to receive the corresponding control signal; and the output terminal IOUT is used to output the corresponding bias current.

[0066] For example, the first control signal B<0:n> and the second control signal E<0:m> are both 2-bit digital signals. Figure 4 In the example shown, the control terminal of the first current source circuit 210 includes, for example, a control terminal receiving the first bit B in the first control signal B<0:n> <0> and receiving the second bit B in the first control signal B<0:n> <1> The control terminal A1 of the second current source circuit 220 includes, for example: receiving the first bit E in the second control signal E<0:n> <0> and receiving the second bit E in the second control signal E<0:n> <1> The control terminal A1.

[0067] exist Figure 4 Based on the examples shown, refer to Figure 5At this time, the first current source circuit 210 and the second current source circuit 220 each include two current paths connected in parallel between the power supply terminal VDD and the output terminal IOUT, wherein the first current path includes transistors M10~M14 connected in series, the second current path includes transistors M20~M21 connected in series, and the control end of each transistor M10~M14 on the first current path is connected to the control end A0 of the corresponding current source circuit, and the control end of each transistor M20~M21 on the second current path is connected to the control end A1 of the corresponding current source circuit.

[0068] Taking the first current source circuit 210 as an example, when the digital bit signal received by its control terminal A0 is logic 1 and the digital bit signal received by its control terminal A1 is logic 0, the first current source circuit 210 provides a first bias current corresponding to the first gear based on the transistors M10~M14 connected in series between the power supply terminal VDD and the output terminal IOUT; when the digital bit signal received by its control terminal A0 is logic 0 and the digital bit signal received by its control terminal A1 is logic 1, the first current source circuit 210 provides a first bias current corresponding to the second gear based on the transistors M20~M21 connected in series between the power supply terminal VDD and the output terminal IOUT; when the digital bit signals received by its control terminals A0 and A1 are both logic 1, the first current source circuit 210 provides a first bias current corresponding to the third gear based on the transistors M10~M14 and M20~M21 connected in series between the power supply terminal VDD and the output terminal IOUT. That is to say, the light detection circuit 200 disclosed in the present application can adjust the logic value of the digital signal received by the control end of the first current source circuit 210 and the second current source circuit 220 to achieve the magnitude adjustment (or gear adjustment) of the bias current output by the first current source circuit 210 and the second current source circuit 220.

[0069] It can be understood that the light detection circuit 200 can directly use digital signals to control the output of bias currents of different levels, thereby achieving different light detection sensitivities, without the need to use analog reference signals, and can reduce the interference of environmental noise and have a stronger ability to resist environmental interference.

[0070] Of course, the number of current paths (i.e., the number of adjustable gears) contained in the first current source circuit 210 and the second current source circuit 220, as well as the number and size of transistors connected in series on each current path can be set differently according to actual conditions, so as to achieve different bias current gear requirements and obtain different detection sensitivities.

[0071] It should be noted that the light detection circuit 200 disclosed in each embodiment of the present application uses a single-tube bipolar transistor as a photosensitive device, and also uses a current source circuit that is as simple and adjustable as possible. Its circuit structure is simple and the layout area is small, which is very conducive to application inside the logic circuit. On this basis, the embodiment of the present application also provides a chip, which integrates the light detection circuit described in any embodiment of the present application. Optionally, the chip includes but is not limited to a logic circuit chip.

[0072] Furthermore, an embodiment of the present application also discloses a light detection method, which is applied to the light detection circuit or chip disclosed in any of the above embodiments. When it is implemented, Figure 6 As shown, the optical detection method includes performing the following steps:

[0073] In step 610, a first bias current is provided to a base of a bipolar transistor.

[0074] In step 620, a second bias current is provided to the emitter of the bipolar transistor.

[0075] In step 630, light detection is performed using a bipolar transistor, and when light irradiation is sensed, an amplified photocurrent signal is generated at the emitter.

[0076] In step 640, an alarm signal is generated based on the amplified photocurrent signal and the second bias current.

[0077] Furthermore, the light detection method further comprises: when the amplified photocurrent signal is greater than the second bias current, shaping the emitter signal of the bipolar transistor to generate an alarm signal.

[0078] In specific implementation, the specific implementation of each step in the above-described light detection method and the technical effects that can be brought about can refer to the aforementioned embodiments of the light detection circuit, which will not be described in detail here.

[0079] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present application, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present application.

Claims

1. A light detection circuit, comprising: Bipolar transistor; A first current source circuit is connected to the base of the bipolar transistor and provides a first bias current to the base of the bipolar transistor; a second current source circuit connected to the emitter of the bipolar transistor and providing a second bias current to the emitter of the bipolar transistor; Wherein, when the bipolar transistor senses light irradiation, it generates an amplified photocurrent signal at the emitter, and the light detection circuit generates an alarm signal based on the amplified photocurrent signal and the second bias current.

2. The light detection circuit according to claim 1, wherein: The bipolar transistor is a PNP transistor, and the collector of the bipolar transistor is connected to a reference ground.

3. The light detection circuit according to claim 1, wherein: The bipolar transistor is an NPN transistor, and the collector of the bipolar transistor is connected to the power supply voltage.

4. The light detection circuit according to claim 1, wherein: The magnitude of the first bias current and / or the second bias current is adjustable.

5. The light detection circuit according to claim 4, wherein: The first current source circuit receives a first control signal and adjusts the magnitude of the output first bias current according to the first control signal; The second current source circuit receives a second control signal and adjusts the magnitude of the output second bias current according to the second control signal.

6. The light detection circuit according to claim 5, wherein: The first current source circuit and the second current source circuit both include: A power supply end, receiving a power supply voltage; A control end receives a corresponding control signal; Output terminal, outputs the corresponding bias current.

7. The light detection circuit according to claim 6, wherein: The first control signal is an n-bit digital signal, where n is an integer greater than or equal to 1; The second control signal is an m-bit digital signal, where m is an integer greater than or equal to 1.

8. The light detection circuit according to claim 7, wherein: The first current source circuit comprises: n+1 first current paths connected in parallel, each first current path comprising at least one field effect transistor connected in series between a power supply end and an output end of the first current source circuit, and a control end of the field effect transistor on each first current path receiving a corresponding 1-bit digital signal in the first control signal; The second current source circuit comprises: m+1 second current paths are connected in parallel, each second current path includes at least one field effect transistor connected in series between the power supply end and the output end of the second current source circuit, and the control end of the field effect transistor on each second current path receives a corresponding 1-bit digital signal in the second control signal.

9. The light detection circuit according to any one of claims 1 to 8, wherein: The light detection circuit further includes: The output circuit is connected to the emitter of the bipolar transistor, and is used to perform shaping processing on the emitter signal of the bipolar transistor, and output the alarm signal when the amplified photocurrent signal is greater than the second bias current.

10. A chip, in which the light detection circuit according to any one of claims 1 to 9 is integrated.

11. A light detection method, comprising: providing a first bias current to a base of the bipolar transistor; providing a second bias current to an emitter of the bipolar transistor; The bipolar transistor is used for light detection, and when light irradiation is sensed, an amplified photocurrent signal is generated at the emitter of the bipolar transistor; An alarm signal is generated based on the amplified photocurrent signal and the second bias current.

12. The light detection method according to claim 11, wherein: When the amplified photocurrent signal is greater than the second bias current, the alarm signal is generated after shaping the emitter signal of the bipolar transistor.