Electronic product PCB design system and method

Abstract

The invention relates to an electronic product PCB design system and method. In the system, a data preparation and knowledge base construction module is used for collecting, cleaning and de-duplicating multi-source PCB design data and constructing a comprehensive PCB design knowledge base; the polymorphic large model construction and training module adopts a hybrid neural network based on a transformer architecture, and constructs a polymorphic large model with a cross-modal reasoning capability by jointly training a schematic diagram semantic understanding model, a layout topology optimization model and a signal integrity prediction model; the intelligent auxiliary Agent module is used for integrating a reinforcement learning agent and a rule verification agent, and providing a wiring path optimization suggestion, element type selection recommendation and design specification compliance detection in real time; and the system integration module is used for automatically designing the generation module and converting the optimization scheme output by the polymorphic large model into a final PCB design file. The system can improve the design automation level.

Description

Technical Field

[0001] The present application relates to the field of Electronic Design Automation (EDA), and in particular to a system and method for designing PCBs for electronic products. Background Art

[0002] In the modern electronic manufacturing industry, PCB (Printed Circuit Board) is the core carrier for connecting various electronic components. Its design quality is directly related to the performance, reliability and cost of the entire electronic product. With the rapid development of integrated circuit technology and the continuous improvement of chip complexity, the requirements for PCB design are becoming increasingly stringent.

[0003] The traditional PCB design process is usually divided into several stages: first schematic design, then layout planning, wiring implementation, and finally signal integrity analysis and electromagnetic compatibility testing.

[0004] Most current solutions focus on specific tasks, such as predicting resource utilization or optimizing certain physical parameters, but fail to fully cover the entire design chain from conception to final product. In the paper "Application of Machine Learning in FPGA EDA Tool Development", the authors explored the application of machine learning in FPGA design automation tools, emphasizing the importance of ML in predicting congestion, power, performance, and area in different design stages. Despite this, existing methods still have limitations, especially in dealing with complex multi-source data fusion and deep understanding.

[0005] Existing PCB design tools have obvious limitations when facing the increasingly complex needs of electronic products. Secondly, existing systems are difficult and inaccurate when drawing complex circuit diagrams. According to the document "Automatic PCB Layout Optimization of a DC-DC Converter Through Genetic Algorithm Regarding EMC Constraints", traditional PCB design methods rely on engineers' experience and technical level when dealing with large-scale integrated circuit (IC) wiring tasks, resulting in low design efficiency and difficulty in ensuring consistency. This means that when designers use these tools, they often need to go through tedious manual adjustments and repeated verifications, reducing the convenience of user experience and the response speed of the system.

[0006] Another important issue is that the existing PCB design system is not convenient enough to interact with users and has a slow response speed. Summary of the invention

[0007] In order to solve the problem of low PCB design efficiency in the prior art, the present application proposes an electronic product PCB design system and method. By constructing an electronic product PCB design system, the efficiency, accuracy and intelligence level of PCB design are improved.

[0008] To achieve the above objectives, this application adopts the following technical solutions: In a first aspect, the present application provides an electronic product PCB design system, comprising: Data preparation and knowledge base construction module, used to collect, clean and deduplicate multi-source PCB design data, and build a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; The polymorphic large model construction and training module is used to build a polymorphic large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model, and signal integrity prediction model using a hybrid neural network based on the transformer architecture; Intelligent auxiliary agent module, which is used to integrate reinforcement learning agents and rule verification agents to provide real-time wiring path optimization suggestions, component selection recommendations and design specification compliance detection; The system integration module is used to automate the design generation module, integrate the EDA tool chain through the standardized interface protocol, and convert the optimization solution output by the polymorphic large model into the final PCB design file.

[0009] As a further improvement of the present application, the data preparation and knowledge base construction module includes: Data collection submodule, used to obtain PCB raw data from multiple channels; 1a) Data preprocessing submodule, used to preprocess and standardize the acquired PCB raw data; specifically used for: For component symbols, formulate unified graphic representation standards, including symbol shape, line thickness, and color; For circuit templates, clarify the representation of circuit connections, including node markings and line directions; For wiring rules, unify the units and representations of various electrical parameters and manufacturing process requirements; For component information, specify the name and format of the parameters; 1b) The duplicate checking and deduplication submodule processes the original PCB data from different sources in a unified manner to obtain standard format PCB data; by establishing a hash index, the hash value of the corresponding feature of each data point is calculated, including: For schematic symbols, calculate the hash value of the graphic features; For the circuit template, a hash value of the circuit structure feature is calculated; For the layout template, calculate the hash value of the layout features; For the wiring rules, the hash value of the rule parameters is calculated; For component information, calculate the hash value of model and key parameters; The hash value of the corresponding feature of each data point is judged. For records with the same hash value, a similarity algorithm is used to assist in judgment, and duplicates are removed after checking the key parts. 1c) Knowledge base construction submodule: Use database management system to establish and maintain knowledge base and construct structured design knowledge graph; structured design knowledge graph includes: Component parameter subgraph: its nodes include component model, package size, electrical characteristics, and edge relationships define compatible substitution relationships; Wiring rule subgraph: Its nodes store signal types and stacking structure parameters, and its edge relationships define impedance matching rules; EMC knowledge subgraph: Its nodes associate electromagnetic radiation sources with sensitive devices, and the edge weights represent the predicted values ​​of coupling strength.

[0010] As a further improvement of the present application, the polymorphic large model construction and training module includes: 2a) Data input submodule, used to accept data input in various forms; 2b) Feature extraction submodule, which is used to extract key features from the data using deep learning algorithms; CNN is used for edge detection and shape recognition; for text data, RNN is used for semantic analysis to obtain a data set; 2c) Model training submodule, which is used to train the model based on the hybrid neural network of transformer architecture through the dataset.

[0011] As a further improvement of the present application, the hybrid neural network based on the transformer architecture adopts an encoder-decoder mechanism, including: The encoder layer includes: a schematic semantic encoder, which is used to convert the circuit symbol connection relationship into a multi-dimensional vector; a physical layout encoder, which is used to process component coordinates and routing features; The cross-modal fusion layer is used to calculate the association matrix between the schematic semantic vector and the layout feature vector based on the cross-attention mechanism; The decoder layer is used to output layout optimization suggestion heat map and signal integrity prediction report.

[0012] As a further improvement of the present application, the intelligent auxiliary Agent module includes: 3a) Memory submodule, used to store past experience; 3b) Planning submodule, which is used to formulate an overall design plan and select the optimal path according to the current task; 3c) Tool submodule, used to provide technical support, including automatic routing, signal integrity analysis and electromagnetic interference analysis; 3d) Action submodule, which is used to perform specific routing operations and adjust strategies according to actual conditions, monitor line length and impedance changes in real time, and dynamically adjust routing paths.

[0013] As a further improvement of the present application, the planning submodule uses a genetic algorithm to optimize the PCB layout, and the specific steps are as follows: S1, initialize the population and generate a set of random initial layout schemes as population individuals, each of which represents a possible PCB layout configuration; S2, the population size is set according to computing resources and requirements; S3, fitness evaluation uses a fitness function to measure each layout solution. The fitness function integrates multiple factors, including component spacing, signal integrity, and thermal distribution; S4, calculate the fitness value of each individual, which is used as the basis for selecting the next generation of individuals; S5, select excellent individuals from the current population to enter the next generation according to the selection strategy and fitness value; S6, perform a crossover operation on the two selected parent individuals to generate new offspring individuals; S7, for a multi-layer PCB, selecting the connection relationship between different layers as the intersection; S8, applies a certain probability of mutation operation on the newly generated offspring individuals to introduce new gene combinations to prevent the algorithm from converging to the local optimal solution too early; S9, based on the set termination condition, stop running when the termination condition is met; S10, outputting an optimal or suboptimal layout solution as the final result of PCB layout optimization.

[0014] As a further improvement of this application, the formula of the fitness function is:

[0015] Among them, F represents the fitness value is the weight coefficient, , and They represent component spacing, signal integrity, and thermal distribution scores respectively.

[0016] As a further improvement of the present application, the action submodule adopts a reinforcement learning agent and constructs a Markov decision process model, and the Markov decision process model includes: State space: contains the current wiring completion, impedance mismatch value, and thermal distribution parameters; Action space: includes various wiring operations; Reward function:

[0017] Among them, α, β, and γ are system setting parameters.

[0018] As a further improvement of the present application, the system integration module includes: 4a) Data format conversion and multi-modal input and output submodule, used to support the conversion between multiple common file formats and for users to import and export data, including: For schematic diagram data, its component information and connection relationship are converted according to a unified format; component information and connection relationship between components are expressed in a unified format; Accepts data input in various forms, parses it through NLP methods and generates corresponding circuit schematics; Integrate multiple knowledge sources, including open source circuit design libraries, standardized design documents, and industry data; 4b) Real-time interaction and user feedback submodule, which is used to allow real-time interaction between users and the system, establish effective optimization algorithms, and continuously improve the design plan; and has a feedback channel to obtain feedback and make corresponding modifications; 4c) Design rule integration submodule is used to integrate industry standards and internal enterprise regulations into the design process, including: Adopt rule-based reasoning engine to integrate industry standards and internal enterprise regulations into the design process to ensure that each step meets regulatory requirements; Use cross-validation to evaluate the performance of the model on different datasets and adjust hyperparameters to optimize the results; use confusion matrix and ROC curve to evaluate the performance of the classification model.

[0019] In a second aspect, the present application provides an electronic product PCB design method, based on the electronic product PCB design system, comprising: Get uploaded multi-source PCB design data; Collect, clean and de-duplicate multi-source PCB design data, and build a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; A hybrid neural network based on transformer architecture is used to build a multi-modal large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model, and signal integrity prediction model. Integrate reinforcement learning agents and rule checking agents to provide real-time routing path optimization suggestions, component selection recommendations, and design specification compliance checks; The automated design generation module integrates the EDA tool chain through standardized interface protocols and converts the optimization solution output by the polymorphic large model into the final PCB design file; Output the final PCB design file.

[0020] Compared with the prior art, the system of this application builds a comprehensive PCB design knowledge base, integrates multi-source data and performs standardized processing. It uses a polymorphic large model to integrate a variety of information to achieve functions such as schematic generation and layout optimization. The intelligent auxiliary agent improves design efficiency and quality through the synergy of modules such as memory, planning, tools and actions. The system integrates various functional modules and realizes data format conversion, real-time interaction, multi-modal input and output processing, etc. through deep integration with polymorphic large models, thereby improving the level of design automation. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 An overall structural diagram of the system design of the embodiment of the present application; Figure 2 A schematic diagram of a data preparation and knowledge base construction module of an embodiment of the present application; Figure 3 A schematic diagram of a polymorphic large model construction and training module according to an embodiment of the present application; Figure 4 This is a schematic diagram of the intelligent auxiliary Agent module of an embodiment of the present application; Figure 5 This is a schematic diagram of the system integration module of an embodiment of the present application. DETAILED DESCRIPTION

[0022] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and are not to be construed as limitations on the present application. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0023] In the description of this application, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in this application based on the specific content of the technical solution.

[0024] In order to explain the technical solution of the present application in detail, the following is a detailed description of the contents of the present application in conjunction with the accompanying drawings: As described in the background technology, it is necessary to develop an intelligent PCB design platform based on a multimodal large model, which can integrate information from multiple channels, including but not limited to historical case libraries, simulation results, manufacturing process requirements, etc., so as to achieve more efficient and accurate design decision support. The platform will use a deep learning framework to parse various forms of data input and dynamically adjust the design scheme through a reinforcement learning mechanism to ensure that the final product meets performance indicators and effectively controls production costs.

[0025] This application provides an electronic product PCB design system and method, based on a multi-modal large model, to solve the problems of existing technical solutions and provide users with a better experience. The following will describe in detail the specific implementation steps, algorithms used, and innovations of each module, and clarify the connection relationship between modules and the input and output definitions.

[0026] This application provides an electronic product PCB design system, such as Figure 1 As shown in the figure, the overall structure diagram designed for the system includes: Data preparation and knowledge base construction module, used to collect, clean and deduplicate multi-source PCB design data, and build a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; The polymorphic large model construction and training module is used to build a polymorphic large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model and signal integrity prediction model using a hybrid neural network based on the transformer architecture; integrate multiple information and train the polymorphic large model to realize schematic generation and layout optimization functions; Intelligent assistant agent module, which integrates reinforcement learning agent and rule verification agent to provide real-time routing path optimization suggestions, component selection recommendations and design specification compliance detection; it includes memory, planning, tools and action sub-modules to improve design efficiency and quality; The system integration module is used to automate the design generation module, integrate the EDA tool chain through the standardized interface protocol, and convert the optimization solution output by the polymorphic large model into the final PCB design file that conforms to the Gerber / X2 format.

[0027] As an example, the electronic product PCB design system of the present invention realizes functions such as data format conversion, real-time interaction, and multi-modal input and output processing, thereby improving the level of design automation; the system integrates multiple information using a polymorphic large model by fusing multi-source data and performing standardized processing, thereby realizing full-process intelligent design from schematic generation to final PCB design file output.

[0028] The present application also provides an electronic product PCB design method, based on the above-mentioned electronic product PCB design system, comprising the following steps: S100, obtaining uploaded multi-source PCB design data; S200 collects, cleans and de-duplicates multi-source PCB design data, and builds a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; S300 uses a hybrid neural network based on the transformer architecture to build a multi-modal large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model, and signal integrity prediction model; S400, which integrates reinforcement learning agents and rule-checking agents to provide real-time routing path optimization suggestions, component selection recommendations, and design specification compliance checks; S500, an automated design generation module, integrates the EDA tool chain through standardized interface protocols to convert the optimization solution output by the polymorphic large model into the final PCB design file; S600: Output the final PCB design file.

[0029] Therefore, the electronic product PCB design method proposed in this application significantly improves the efficiency, accuracy and intelligence level of PCB design by constructing an electronic product PCB design system. Specifically, this application has the following main advantages: 1. Improve design efficiency: By introducing AI / ML (artificial intelligence and machine learning) technology, a large amount of repetitive manual labor is reduced and the design cycle is greatly shortened.

[0030] 2. Enhance design accuracy: Utilize the powerful analytical capabilities of multimodal large models to ensure that each link is optimized.

[0031] 3. Promote interdisciplinary collaboration: Support a smooth transition from high-level abstract description to specific hardware implementation, breaking traditional boundaries.

[0032] 4. Reduce production costs: Through intelligent optimization mechanism, unnecessary material waste and rework are reduced.

[0033] 5. Comply with industry standards: Strictly follow relevant laws and regulations and internal corporate regulations to ensure the safety and reliability of the design.

[0034] Furthermore, the data preparation and knowledge base construction module specifically includes: a data collection sub-module that obtains schematic data in open source hardware projects through web crawlers, screens relevant papers through literature retrieval, and converts book content into an editable format using OCR (Optical Character Recognition) technology; and a data preprocessing sub-module that cleans, annotates, and converts formats to ensure data consistency and availability.

[0035] Therefore, the first aspect of this embodiment is to provide a data preparation and knowledge base construction module, and to construct a comprehensive PCB design knowledge base according to the following steps. Figure 2 Shown: Data preparation and knowledge base building modules, including: Data collection submodule, used to obtain PCB raw data from multiple channels; 1a) Data preprocessing submodule, used to preprocess and standardize the acquired PCB raw data; 1b) The duplicate checking and deduplication submodule processes the original PCB data from different sources in a unified manner to obtain standard format PCB data; by establishing a hash index, the hash value of the corresponding feature of each data point is calculated; 1c) Knowledge base construction submodule: Use database management system to establish and maintain knowledge base and construct structured design knowledge graph.

[0036] This module is responsible for collecting various PCB design-related data, including but not limited to historical cases, simulation results, manufacturing process requirements, etc., and standardizing them to form a structured knowledge base. The specific steps are as follows: Step 11. Data collection: Obtain PCB raw data from multiple sources, including but not limited to schematic data and / or academic database literature search data.

[0037] The data sources include but are not limited to: (1) Historical PCB design file library (Altium Designer / Cadence format file parser); (2) Electronic component manufacturer data sheets (PDF parsing and parameter extraction algorithms); (3) Electromagnetic compatibility test database, EMI / EMC test record storage architecture based on SQL (Structured Query Language); (4) Industry design specification library (structured storage of IPC-2221 / IPC-7351 standard clauses). Step 12. Data preprocessing: Clean, annotate and convert the collected PCB raw data to ensure its consistency and usability.

[0038] The data obtained from the above data sources needs to be cleaned and deduplicated. A two-level cleaning mechanism can be used: ① Primary cleaning: remove invalid characters through regular expression matching, and apply a duplicate schematic detection algorithm based on Jaccard similarity (specifically, the threshold is set to 0.85); ② Deep cleaning: Establish a component parameter credibility assessment model to automatically correct or mark abnormal data that exceeds the manufacturer's nominal value by ±10%.

[0039] Step 13. Data standardization: standardization of component information, circuit templates, wiring rules, and data format.

[0040] Optional, during data preprocessing and normalization in step 2: For component symbols, a unified graphic representation standard should be formulated, including the shape, line thickness, and color of the symbol; For circuit templates, the representation of circuit connections must be clearly stated, including node markings and line directions; For wiring rules, the units and representations of various electrical parameters and manufacturing process requirements should be unified; For component information, the parameter names and formats must be standardized.

[0041] Step 14. Check and remove duplicate data: Unify data from different sources into a standard format to facilitate subsequent analysis and application.

[0042] Optionally, for the data duplication check and deduplication step in step 4, the specific operations are as follows: For schematic symbols: Calculate the hash value of the graphic features.

[0043] For circuit template: calculate the hash value of the circuit structure features.

[0044] For layout templates: Calculate the hash value of the layout features.

[0045] For wiring rules: Calculate the hash value of the rule parameters.

[0046] For component information: calculate the hash value of the model and key parameters.

[0047] In the above scheme, this embodiment provides a design case: the hash value of the feature is as follows:

[0048] In the formula, K represents the comprehensive score, w i is the weight coefficient, d i It is iThe formula is used to evaluate the comprehensive score of each data point and to determine which data should be included in the knowledge base or used as an important reference.

[0049] Step 15. Knowledge base construction: Use database management system (DBMS) or other storage tools to build and maintain the knowledge base.

[0050] In the specific implementation of the above-mentioned PCB design knowledge base construction module, the detailed functions of each step are described as follows: Data collection and preprocessing are the foundation of building a comprehensive PCB design knowledge base and the basis of intelligent design system. By collecting and organizing schematic data and / or academic database literature retrieval data from multiple channels, the consistency and availability of data are ensured. Data cleaning and annotation are to clean, annotate and convert the format of all collected data to ensure its consistency and availability. For component symbols, a unified graphic representation specification is formulated; for circuit templates, the representation method of circuit connections is clarified; for wiring rules, the units and representation forms of various electrical parameters and manufacturing process requirements are unified.

[0051] Duplicate checking and deduplication is done by building a hash index and calculating the hash value of each data point's corresponding feature. For records with the same hash value, a similarity algorithm is used to assist in judgment, and the key parts are manually checked.

[0052] Knowledge base construction is to use database management system to establish and maintain knowledge base, ensure efficient management and fast retrieval of data. Update data regularly to maintain the timeliness and accuracy of knowledge base. Finally, effect evaluation is required to build a knowledge base containing rich design cases and technical specifications, which provides a solid foundation for subsequent design.

[0053] Furthermore, the polymorphic large model building and training module accepts data input in various forms, trains the model using deep learning algorithms, and regularly evaluates model performance and adjusts hyperparameters to optimize results.

[0054] As a further improvement, it also includes: the construction of structured design knowledge graph, which is implemented using Neo4j graph database, including: Component parameter subgraph: nodes include component model, package size, electrical characteristics, etc., and edge relationships define compatible substitution relationships; Wiring rule subgraph: nodes store signal type (high speed / low frequency), stacking structure parameters, and edge relationships define impedance matching rules; EMC knowledge subgraph: nodes associate electromagnetic radiation sources with sensitive devices, and edge weights represent the predicted values ​​of coupling strength.

[0055] Therefore, the second aspect of this embodiment is to construct a polymorphic large model construction and training module, specifically a polymorphic large model based on a hybrid expert model, which can understand and process various types of data, such as Figure 3 As shown, the polymorphic large model building and training module includes: 2a) Data input submodule, used to accept data input in various forms; 2b) Feature extraction submodule, which is used to extract key features from the data using deep learning algorithms; CNN is used for edge detection and shape recognition; for text data, RNN is used for semantic analysis to obtain a data set; 2c) Model training submodule, which is used to train the model based on the hybrid neural network of transformer architecture through the dataset.

[0056] Furthermore, including text, graphics, and tables, the use of graph neural networks and hybrid neural networks based on transformer architecture helps capture the complex graphic structure and semantic information in the circuit schematic, thereby achieving deeper data fusion and understanding. The specific steps are as follows: Step 21. Data input: accept data input in various forms.

[0057] Step 22. Feature extraction: Use deep learning algorithms to extract key features from the data.

[0058] Step 23. Model training: Train the model using large-scale datasets to improve its generalization ability and prediction accuracy.

[0059] Step 24. Model evaluation: Regularly evaluate the model performance to ensure it is always in the best condition.

[0060] The formula is:

[0061] Where L represents the loss function, are model parameters, and Denote the true label and predicted probability respectively. This formula is used to guide parameter adjustment during model training to minimize the prediction error.

[0062] In the specific implementation of the above-mentioned polymorphic large model construction module, the detailed functions of each step are described as follows: Data input and feature extraction: The polymorphic large model can understand and process various types of data, extract key features from the data through deep learning algorithms, and provide support for subsequent analysis.

[0063] Furthermore, data input: accepts data input in various forms, including images, text, audio, etc. Users can input hand-drawn circuit sketches by uploading pictures, and the system will automatically recognize and convert them into digital format.

[0064] Furthermore, feature extraction: using deep learning algorithms, for image data, CNN (Convolutional Neural Network) is used for edge detection and shape recognition; for text data, RNN (Recurrent Neural Network) is used for semantic analysis.

[0065] Furthermore, effect evaluation is also needed: high-quality features are extracted and the model's ability to understand complex data is enhanced.

[0066] Model training and evaluation: Train the model through large-scale data sets to improve its generalization ability and prediction accuracy. Regularly evaluate model performance to ensure that it is always in the best condition.

[0067] The implementation steps of the polymorphic large model construction module include the following: Model training: Use large-scale datasets to train the model to improve its generalization ability and prediction accuracy. For example, use the ImageNet pre-trained model as a basis and then fine-tune it with a custom PCB design dataset.

[0068] Among them, the present application is an embodiment of a hybrid neural network based on a transformer architecture using an encoder-decoder mechanism: Encoder layer: ① Schematic semantic encoder: converts the connection relationship of circuit symbols into a 768-dimensional vector (based on the Graph Attention network); ② Physical layout encoder: processes component coordinates and routing features (applies CNN+Positional Encoding); Cross-modal fusion layer: designs a cross-attention mechanism to calculate the association matrix between the schematic semantic vector and the layout feature vector (dimension: N×N×256); Decoder layer: outputs a layout optimization suggestion heat map (resolution 0.1mm grid) and a signal integrity prediction report; Specifically, a joint training strategy is adopted, using a three-stage training method: ① Pre-training stage: training the basic feature extractor on 1 million sets of historical design data; ② Fine-tuning stage: Use contrastive learning strategy to handle cross-modal data alignment (the loss function contains the similarity constraint between modalities); ③ Reinforcement learning stage: Introduce the design efficiency reward function (wiring length reduction rate × 0.6 + via number reduction rate × 0.4); Model evaluation: Regularly evaluate the performance of the model to ensure that it is always in the best state. Use cross-validation methods to evaluate the performance of the model on different data sets and adjust hyperparameters to optimize the results.

[0069] Use confusion matrices and ROC curves to evaluate the performance of classification models to ensure high accuracy and low false positive rates.

[0070] Effect evaluation: The trained model has high generalization ability and prediction accuracy, and can run stably in different application scenarios.

[0071] In order to improve performance, this application also requires regular evaluation and optimization to ensure continuous improvement and reliability of the model.

[0072] Furthermore, the memory submodule of the intelligent auxiliary agent module stores past experience for reference for new projects, the planning submodule uses genetic algorithms to optimize component layout to ensure that EMC indicators meet standards, the tool submodule provides technical support such as automatic wiring and signal integrity analysis, and the action submodule performs specific wiring operations and flexibly adjusts them according to actual conditions.

[0073] Therefore, the third aspect of this embodiment is to provide an intelligent auxiliary Agent module, such as Figure 4 As shown: the intelligent auxiliary agent module includes a memory submodule, a planning submodule, a tool submodule, and an action submodule. In particular, the planning submodule introduces a genetic algorithm in the automatic layout optimization process to solve complex circuit board layout problems, ensure that the electromagnetic compatibility (EMC) index meets the standard, and improve design efficiency and accuracy. The specific functions are as follows: 3a) Memory submodule: used to store past experience for quick recall in similar scenarios.

[0074] 3b) Planning submodule: responsible for formulating the overall design plan and selecting the optimal path based on the current task.

[0075] 3c) Tool sub-module: provides necessary technical support, such as automatic routing, signal integrity analysis, etc.

[0076] 3d) Action submodule: performs specific routing operations and flexibly adjusts strategies according to actual conditions.

[0077] As a specific embodiment, for the planning submodule, a genetic algorithm is used to implement the application of PCB layout optimization, and the specific steps are as follows: Step 31, initialize the population: the function initialize_population() is used to generate a set of random initial layout schemes as population individuals, each of which represents a possible PCB layout configuration.

[0078] The population size is set according to computing resources and requirements, usually ranging from dozens to hundreds of individuals.

[0079] Step 32, fitness evaluation: The function evaluate_fitness() is used to define a fitness function to measure the quality of each layout solution. The fitness function takes into account multiple factors, including component spacing, signal integrity, and thermal distribution.

[0080] Calculate the fitness value of each individual and use it as the basis for selecting the next generation of individuals.

[0081] Step 33, selection operation: the function select_parents() is used to select excellent individuals from the current population to enter the next generation according to the fitness value. Common selection strategies include roulette selection method and tournament selection method.

[0082] Ensure that individuals with high fitness have a greater probability of being selected, but also retain a certain proportion of individuals with low fitness to maintain population diversity.

[0083] Step 34, crossover operation: The function crossover() is used to perform a crossover operation on the two selected parent individuals to generate new offspring individuals. The selection of the crossover point can be random or based on some heuristic rules.

[0084] For multi-layer PCB boards, the connection relationship between different layers can be selected as the cross point to maintain the relative stability of the structure of each layer.

[0085] Step 35, mutation operation: The function mutate() is used to apply a mutation operation with a certain probability on the newly generated offspring individuals to introduce new gene combinations to prevent the algorithm from converging to the local optimal solution too early.

[0086] Variations can take the form of fine-tuning certain component positions or changing wiring paths within a specific area.

[0087] Step 36, termination condition: the function check_termination_criteria() is used to set the termination condition, such as reaching the maximum number of iterations, the fitness change is less than the threshold, etc. When any condition is met, the algorithm stops running.

[0088] Step 37, outputting the optimal or suboptimal layout solution as the final result.

[0089] Among them, the fitness value formula is:

[0090] Among them, F represents the fitness value, is the weight coefficient, , and They represent component spacing, signal integrity, and thermal distribution scores, respectively. This formula is used to comprehensively evaluate the pros and cons of each layout solution and guide the optimization direction of the genetic algorithm.

[0091] In the above scheme, the specific implementation process of the intelligent auxiliary agent module and the specific functions of each module are described as follows: The memory submodule and planning submodule, the intelligent auxiliary agent module, helps designers quickly generate and optimize design solutions through memory and planning functions. In particular, the application of genetic algorithms significantly improves the effect of layout optimization. The implementation steps include: Memory submodule: Store past experience for quick recall in similar scenarios. Record previous successful design solutions and solutions to problems encountered for reference in new projects.

[0092] Planning submodule: responsible for formulating the overall design plan and selecting the optimal path according to the current task. Genetic algorithms are used to optimize component layout to ensure that electromagnetic compatibility indicators meet the standards.

[0093] Effect evaluation: The memory submodule provides rich historical data support, allowing new designs to draw on existing experience and reduce duplication of work.

[0094] The tool submodule and the action submodule. The tool submodule provides necessary technical support, such as automatic routing, signal integrity analysis, etc. The action submodule performs specific routing operations and flexibly adjusts strategies according to actual conditions. The specific implementation steps are as follows: Tool submodule: Provides necessary technical support, including automatic routing, signal integrity analysis, etc. Integrates third-party simulation tools. This embodiment uses Kicad software as an EDA tool to perform detailed electromagnetic interference analysis.

[0095] Action submodule: performs specific routing operations and flexibly adjusts strategies based on actual conditions. For example, during the automatic routing process, it monitors line length and impedance changes in real time and dynamically adjusts the routing path.

[0096] Effect evaluation: The tool sub-module provides strong technical support to ensure the professionalism and reliability of the design process.

[0097] As a specific solution of the present invention, a reinforcement learning agent is used in the operation mechanism of the intelligent auxiliary decision engine to construct a Markov decision process model: State space: contains the current wiring completion, impedance mismatch value, and thermal distribution parameters; Action space: For example, you can define 9 routing operations (45° corner, teardrop pad addition, etc.); Reward function:

[0098] As an example, the coefficients are set as: α=0.5, β=0.3, γ=0.2.

[0099] The rule verification agent implements a three-level verification process: ① Real-time DRC check: 200+ design rule verifications (minimum line spacing, aperture ratio, etc.) are performed per second; ② Delay SI analysis: Start transmission line simulation after layout changes, based on the improved FDTD (Finite-Difference Time-Domain) algorithm; ③ Batch DFM (Design for Manufacturing) verification: Connect to the manufacturer's process capability database to perform manufacturability scoring.

[0100] Furthermore, the system integration module supports the conversion between multiple common file formats, accepts multiple forms of data input, and outputs corresponding results. At the same time, it realizes real-time communication through WebSocket, API interface and third-party tool integration, and strictly follows industry standards and internal corporate regulations. WebSocket is a network protocol for full-duplex communication on a single TCP connection, which is a new standard added by HTML5.

[0101] Therefore, the fourth aspect of this embodiment is to provide a system integration module, such as Figure 5 As shown, it is responsible for the integration of the entire system and ensures the connection between various functional modules. The system integration module includes: 4a) Data format conversion and multi-modal input and output submodule, used to support the conversion between multiple common file formats and for users to import and export data, including: For schematic diagram data, its component information and connection relationship are converted according to a unified format; component information and connection relationship between components are expressed in a unified format; Accepts data input in various forms, parses it through NLP methods and generates corresponding circuit schematics; Integrate multiple knowledge sources, including open source circuit design libraries, standardized design documents, and industry data; 4b) Real-time interaction and user feedback submodule, which is used to allow real-time interaction between users and the system, establish effective optimization algorithms, and continuously improve the design plan; and has a feedback channel to obtain feedback and make corresponding modifications; 4c) Design rule integration submodule is used to integrate industry standards and internal enterprise regulations into the design process, including: Adopt rule-based reasoning engine to integrate industry standards and internal enterprise regulations into the design process to ensure that each step meets regulatory requirements; Use cross-validation to evaluate the performance of the model on different datasets and adjust hyperparameters to optimize the results; use confusion matrix and ROC curve to evaluate the performance of the classification model.

[0102] As an optional solution, the system integration module specifically includes the following aspects: Step 41. Data format conversion and multi-modal input and output: Support conversion between multiple common file formats to facilitate users to import and export data.

[0103] Step 42. Real-time interaction and user feedback: Allow real-time communication between users and the system, establish effective optimization algorithms, and continuously improve design solutions; at the same time, set up a complete feedback channel to obtain feedback in a timely manner and make corresponding modifications.

[0104] The formula for user response quality is:

[0105] R(t) represents the quality of user response at time t, α is the weight coefficient, Q(t) is the query resolution, and H(t) is the quality of historical feedback records.

[0106] Step 43. Model evaluation and result verification: Regularly evaluate the model performance to ensure that it is always in the best condition; and strictly verify each result generated to prevent errors or omissions.

[0107] The formula for the area under the curve in the calibration is:

[0108] AUC stands for area under the curve, TPR is the true positive rate, and FPR is the false positive rate.

[0109] Step 44. Design rule integration: Incorporate industry standards and internal company regulations into the design process to ensure that each step meets regulatory requirements.

[0110] Step 45. Distributed training and optimization strategy: Support distributed training of large-scale data sets to improve training efficiency. Use asynchronous update mechanism to speed up model convergence and improve overall performance.

[0111] The loss function formula is:

[0112] Where L(θ) represents the loss function, L(θ;xi,yi) is the loss of a single sample, λ is the regularization parameter, and R(θ) is the regularization term.

[0113] Step 46. Automated feedback loop: After the task is completed, the system will automatically feedback the results to the user, who can modify or confirm. The task process can be flexibly adjusted based on user feedback to ensure that the design meets the expected requirements.

[0114] The state value function formula is:

[0115] In the formula, V ( s ) represents the state value function, a is the action, P(s′|s,a) is the transition probability, R(s,a,s′) is the reward function, and γ is the discount factor.

[0116] In the above scheme, the specific implementation process of the system integration module and the functions of each step are described as follows: Data format conversion and multi-modal input and output. Data formats from different sources vary, and a unified platform is needed to manage and convert these data. Support mutual conversion between multiple common file formats, accept multiple forms of data input, and output corresponding results. Specific implementation steps include: Step 4.1.1 Format conversion: For schematic data, convert its component information, connection relationships, etc. into a unified format (such as XML or JSON). Express the component name, type, parameter and other information as well as the connection relationship between components in a unified format (such as XML or JSON) to ensure data consistency and integrity.

[0117] Step 4.1.2 Image recognition and natural language processing: accept various forms of data input, such as images, text, audio, etc., and output the corresponding results. Users can input hand-drawn circuit sketches by uploading pictures, and the system will automatically recognize and convert them into digital format; users can also enter natural language to describe the design intention, and the system will parse and generate the corresponding circuit schematics through NLP (Natural Language Processing) methods.

[0118] Step 4.1.3 Multi-source data integration: Integrate multiple knowledge sources, including open source circuit design libraries, standardized design documents, and industry data.

[0119] Step 4.1.4 Effect evaluation: Seamless conversion of multiple data formats is achieved, ensuring data interoperability and consistency.

[0120] Real-time interaction and user feedback: Users need an efficient communication channel to obtain feedback from the system and make corresponding modifications based on the feedback. The specific implementation steps are as follows: Step 4.2.1 WebSocket for real-time communication: Users can use WebSocket to achieve real-time communication, view the design progress and interact with the system at any time. Users can upload hand-drawn sketches during the design process, and the system automatically recognizes and converts them into digital format.

[0121] Step 4.2.2 API (Application Programming Interface) interface connection: Integrate with third-party tools through the API interface. This application uses Kicad software (open source electronic design automation software) to perform detailed electromagnetic interference analysis and thermal distribution simulation. Users can call these tools at any time during the design process to obtain the latest simulation results.

[0122] Step 4.2.3 Reinforcement learning algorithm processing: Based on the reinforcement learning algorithm, the system can continuously optimize the design process based on user feedback. For example, after the task is completed, the system will automatically feedback the results to the user, who can modify or confirm; based on user feedback, the system dynamically adjusts the task process to ensure that the design meets the expected requirements.

[0123] Step 4.3 Design rule integration and model evaluation: Ensure that the design process strictly follows industry standards and internal corporate regulations, and ensure that each step meets regulatory requirements. The specific implementation steps are as follows: Rule-based reasoning engine: Integrate industry standards and internal corporate regulations into the design process to ensure that each step meets regulatory requirements. For example, strictly follow the IPC-2221 standard for PCB design to ensure electrical performance and manufacturing feasibility.

[0124] Cross-validation and confusion matrix: Regularly evaluate model performance to ensure that it is always in the best state. Use cross-validation to evaluate the performance of the model on different data sets and adjust hyperparameters to optimize the results; use confusion matrix and ROC curve to evaluate the performance of the classification model to ensure high accuracy and low false positive rate.

[0125] In the above solution, the interface protocol of the automated design generation module is integrated with the EDA tool chain to develop standardized adapter components, such as: Altium Designer interface: bidirectional synchronization of design data via XML-RPC protocol; Cadence Allegro interface: encapsulates API call module based on SKILL language; Open source EDA interface: Perform version compatibility conversion for KiCad design files (supports v5.0-v7.0).

[0126] As an example, Gerber / X2 file generation uses layered processing technology: (1) Photolithography layer generation: divided into 32 process layers according to IPC-2581 standard; (2) Drilling file optimization: Apply the improved ant colony algorithm to plan the drill path; (3) Intelligent annotation system: automatically generates dimension tolerance annotations that comply with ISO 1302 standards.

[0127] As a specific embodiment, the embodiment of the present application also establishes a design process digital twin system, which specifically includes: Demand input stage: natural language requirements are parsed into technical indicators by the BERT model, with a parsing accuracy of ≥ 92%; Manufacturability verification stage: integrated 3D PCB virtual assembly simulation, predicted component placement defect rate <0.15%.

[0128] As a further example, during the iterative design process of the feedback optimization mechanism in the embodiment of the present invention, the following data is automatically collected for model updating, and the updating process is as follows: (1) Engineer operation correction record (recording frequency 10Hz); (2) Production yield feedback data (obtained in real time through the OPC-UA protocol); (3) On-site failure analysis report (based on NLP key factor extraction).

[0129] Optionally, the embodiment of the present application takes a 6-layer high-speed PCB design as an example, and adopts the above-mentioned electronic product PCB design system of the present application for design. The design process and results are as follows: 1. Input requirements: "Support PCIe Gen4 x16 interface, size ≤100x80mm"; 2. The system completed the following tasks within 23 minutes: automatically generated a schematic diagram containing 32 differential pairs; implemented impedance control of 100Ω±5% through layout and routing; and output Gerber files that passed CAM350 verification.

[0130] Through design process analysis, compared with traditional tools, this embodiment shortens the design cycle by 58%, reduces DRC errors by 83%, and reduces manufacturing costs by 12%. Through the detailed description of the above specific implementation methods, this application proves its feasibility and effectiveness in practice through actual cases.

[0131] Compared with the existing methods, the main advantages of this application are: Comprehensive intelligent auxiliary agent: Through the collaborative work of four sub-modules: memory, planning, tools and actions, the intelligence level of design is further enhanced.

[0132] Genetic algorithm layout optimization: Especially in complex circuit design, genetic algorithms can effectively handle multiple constraints such as component spacing, signal integrity and thermal distribution, ensuring that the design scheme meets both electrical performance requirements and has good manufacturing feasibility and reliability.

[0133] Real-time interaction and feedback mechanism: Real-time communication and API interface integration with third-party tools are achieved through WebSocket, which enhances user participation and satisfaction.

[0134] Multi-source data integration and standardization: Integrate multiple knowledge sources to provide optimal design suggestions, enhancing the intelligence and practicality of the system.

[0135] The method of the embodiment of the present application can also be applied to electronic devices, computer-readable storage media and computer program products. These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which is implemented in the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0136] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0137] The present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, readable storage medium, optical storage, etc.) containing computer-usable program codes.

[0138] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0139] Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present application.

[0140] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present application rather than to limit it. Although the present application has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present application can still be modified or replaced by equivalents, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present application should be included in the protection scope of the present application.

Claims

1. An electronic product PCB design system, characterized in that: include: Data preparation and knowledge base construction module, used to collect, clean and deduplicate multi-source PCB design data, and build a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; The polymorphic large model construction and training module is used to build a polymorphic large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model, and signal integrity prediction model using a hybrid neural network based on the transformer architecture; Intelligent auxiliary agent module, which is used to integrate reinforcement learning agents and rule verification agents to provide real-time wiring path optimization suggestions, component selection recommendations and design specification compliance detection; The system integration module is used to automate the design generation module, integrate the EDA tool chain through the standardized interface protocol, and convert the optimization solution output by the polymorphic large model into the final PCB design file.

2. The electronic product PCB design system according to claim 1, characterized in that: The data preparation and knowledge base building module includes: Data collection submodule, used to obtain PCB raw data from multiple channels; 1a) Data preprocessing submodule, used to preprocess and standardize the acquired PCB raw data; specifically used for: For component symbols, formulate unified graphic representation standards, including symbol shape, line thickness, and color; For circuit templates, clarify the representation of circuit connections, including node markings and line directions; For wiring rules, unify the units and representations of various electrical parameters and manufacturing process requirements; For component information, specify the name and format of the parameters; 1b) The duplicate checking and deduplication submodule processes the original PCB data from different sources in a unified manner to obtain standard format PCB data; by establishing a hash index, the hash value of the corresponding feature of each data point is calculated, including: For schematic symbols, calculate the hash value of the graphic features; For the circuit template, a hash value of the circuit structure feature is calculated; For the layout template, calculate the hash value of the layout features; For the wiring rules, the hash value of the rule parameters is calculated; For component information, calculate the hash value of model and key parameters; The hash value of the corresponding feature of each data point is judged. For records with the same hash value, a similarity algorithm is used to assist in judgment, and duplicates are removed after checking the key parts. 1c) Knowledge base construction submodule: Use database management system to establish and maintain knowledge base and construct structured design knowledge graph; structured design knowledge graph includes: Component parameter subgraph: its nodes include component model, package size, electrical characteristics, and edge relationships define compatible substitution relationships; Wiring rule subgraph: Its nodes store signal types and stacking structure parameters, and its edge relationships define impedance matching rules; EMC knowledge subgraph: Its nodes associate electromagnetic radiation sources with sensitive devices, and the edge weights represent the predicted values ​​of coupling strength.

3. The electronic product PCB design system according to claim 1, characterized in that: The polymorphic large model construction and training module includes: 2a) Data input submodule, used to accept data input in various forms; 2b) Feature extraction submodule, which is used to extract key features from the data using deep learning algorithms; CNN is used for edge detection and shape recognition; for text data, RNN is used for semantic analysis to obtain a data set; 2c) Model training submodule, which is used to train the model based on the hybrid neural network of transformer architecture through the dataset.

4. The electronic product PCB design system according to claim 3, characterized in that: The hybrid neural network based on the transformer architecture adopts an encoder-decoder mechanism, including: The encoder layer includes: a schematic semantic encoder, which is used to convert the circuit symbol connection relationship into a multi-dimensional vector; a physical layout encoder, which is used to process component coordinates and routing features; The cross-modal fusion layer is used to calculate the association matrix between the schematic semantic vector and the layout feature vector based on the cross-attention mechanism; The decoder layer is used to output layout optimization suggestion heat map and signal integrity prediction report.

5. The electronic product PCB design system according to claim 1, characterized in that: The intelligent auxiliary Agent module includes: 3a) Memory submodule, used to store past experience; 3b) Planning submodule, which is used to formulate an overall design plan and select the optimal path according to the current task; 3c) Tool submodule, used to provide technical support, including automatic routing, signal integrity analysis and electromagnetic interference analysis; 3d) Action submodule, which is used to perform specific routing operations and adjust strategies according to actual conditions, monitor line length and impedance changes in real time, and dynamically adjust routing paths.

6. The electronic product PCB design system according to claim 5, characterized in that: The planning submodule uses a genetic algorithm to optimize the PCB layout. The specific steps are as follows: S1, initialize the population and generate a set of random initial layout schemes as population individuals, each of which represents a possible PCB layout configuration; and the population size is set according to computing resources and requirements; S2, fitness evaluation uses a fitness function to measure each layout scheme. The fitness function integrates multiple factors, including component spacing, signal integrity, and thermal distribution; the fitness value of each individual is calculated as the basis for selecting the next generation of individuals; S3, select excellent individuals from the current population to enter the next generation according to the selection strategy and fitness value; S4, performing a crossover operation on the two selected parent individuals to generate new child individuals; for a multi-layer PCB board, selecting the connection relationship between different layers as the crossover point; S5, applies a certain probability of mutation operation on the newly generated offspring individuals to introduce new gene combinations to prevent the algorithm from converging to the local optimal solution too early; S6, based on the set termination condition, stops running when the termination condition is met; S7, outputs the optimal or suboptimal layout solution as the final result of PCB layout optimization.

7. The electronic product PCB design system according to claim 6, characterized in that: The formula of the fitness function is: Among them, F represents the fitness value, is the weight coefficient, , and Represents the scores for component spacing, signal integrity, and thermal distribution respectively.

8. The electronic product PCB design system according to claim 7, characterized in that: The action submodule adopts a reinforcement learning agent and constructs a Markov decision process model, which includes: State space: contains the current wiring completion, impedance mismatch value, and thermal distribution parameters; Action space: includes various wiring operations; Reward function: Among them, α, β, and γ are system setting parameters.

9. The electronic product PCB design system according to claim 1, characterized in that: The system integration module comprises: 4a) Data format conversion and multi-modal input and output submodule, used to support conversion between multiple common file formats and for users to import and export data, including: For schematic diagram data, its component information and connection relationship are converted according to a unified format; component information and connection relationship between components are expressed in a unified format; Accepts data input in various forms, parses it through NLP methods and generates corresponding circuit schematics; Integrate multiple knowledge sources, including open source circuit design libraries, standardized design documents, and industry data; 4b) Real-time interaction and user feedback submodule, which is used to allow real-time interaction between users and the system, establish effective optimization algorithms, and continuously improve the design plan; and has a feedback channel to obtain feedback and make corresponding modifications; 4c) Design rule integration submodule is used to integrate industry standards and internal enterprise regulations into the design process, including: Adopt rule-based reasoning engine to integrate industry standards and internal enterprise regulations into the design process to ensure that each step meets regulatory requirements; Use cross-validation to evaluate the performance of the model on different datasets and adjust hyperparameters to optimize the results; use confusion matrix and ROC curve to evaluate the performance of the classification model.

10. A method for designing a PCB for an electronic product, based on the PCB design system for an electronic product according to any one of claims 1 to 9, characterized in that: include: Get uploaded multi-source PCB design data; Collect, clean and de-duplicate multi-source PCB design data, and build a comprehensive PCB design knowledge base including component parameter library, wiring rule library and electromagnetic compatibility knowledge base; A hybrid neural network based on transformer architecture is used to build a multi-modal large model with cross-modal reasoning capabilities by jointly training the schematic semantic understanding model, layout topology optimization model, and signal integrity prediction model. Integrate reinforcement learning agents and rule checking agents to provide real-time routing path optimization suggestions, component selection recommendations, and design specification compliance checks; The automated design generation module integrates the EDA tool chain through standardized interface protocols and converts the optimization solution output by the polymorphic large model into the final PCB design file; Output the final PCB design file.

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