High-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter and conversion method

Abstract

The invention discloses a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter and a conversion method. The upper pole plate change voltage of a flying capacitor C in a Buck mode is the same as the upper pole plate change voltage of the flying capacitor C in a Boost mode, and the lower pole plate change voltage of the flying capacitor C in the Buck mode is the same as the lower pole plate change voltage of the flying capacitor C in the Boost mode. When the switched capacitor converter is in a Buck mode or a Boost mode, the same pole plate change sequence is realized. Therefore, when the voltage conversion ratio is 1: 1, the structure adopted by the invention does not need to consider logic switching, so that efficiency attenuation is avoided when the voltage conversion ratio is 1: 1. In addition, the reconfigurable voltage rail technology is used while continuous efficiency is achieved, the efficiency can be further improved, and the circuit is made to be close to the optimal value of the efficiency under each conversion ratio.

Description

Technical Field

[0001] The present invention relates to the technical field of converters, and in particular to a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter and a conversion method. Background Art

[0002] Millimeter-scale microsensor systems have recently been introduced for various applications such as environmental sensors, implantable medical devices, and smart wearables. Due to environmental constraints and size limitations, these harvesting sources can only provide very low power at low voltages, but even in such challenging implant environments, energy autonomy can be achieved by harvesting energy. Switched capacitor converters have become a good choice for power management units in small, low-power systems. However, the efficient conversion ratios provided by conventional reconfigurable switched capacitor converters are relatively discrete and cannot guarantee efficient and continuous conversion ratios over a wide range.

[0003] Figure 4 The single-topology continuously scalable-conversion-ratio (CSCR) switched capacitor converter shown in the figure adopts advanced scalable parasitic charge redistribution technology (SPCR), which softly charges the capacitor through multi-phase control to achieve a step-by-step change in the plate voltage of the capacitor, greatly reducing parasitic bottom plate loss and charge sharing loss. This technology not only retains the full integration feature of the switched capacitor converter, but also can achieve the same continuous output voltage as the switched inductor DC-DC converter. However, it can only work in the buck mode. In addition, its efficiency is not the optimal value in the case of extreme conversion ratios, and its efficiency cannot be continuous at 1:1. When the voltage conversion ratio is 1, there will be a sudden drop in efficiency loss. Summary of the invention

[0004] The object of the present invention is to overcome the deficiencies of the prior art and provide a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter.

[0005] To achieve the above purpose, the technical solution provided by the present invention is:

[0006] A high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter, comprising 2(M+N)+4 units, an error amplifier, a voltage controlled oscillator, a phase generator, a load capacitor C L ;

[0007] Each unit includes a flying capacitor C, M+N+4 switches, a reconfigurable voltage ladder logic circuit, and a driving circuit; M is the number of voltage rails between the output voltage terminal and the ground terminal; N is the number of voltage rails between the input voltage terminal and the ground terminal;

[0008] Among them, the switch S 1 One end of the switch S 2 One end of the switch S N+1 One end of the switch S N+2 One end of each is connected to the upper plate of the flying capacitor C, and the switch S 1 The other end is connected to the voltage input terminal, switch S 2 The other end of the N , switch S N+1 The other end of the 1 , switch S N+2 The other end of the switch S is connected to the voltage output end; N+3 One end of the switch S N+4 One end of the switch S M+N+3 One end of the switch S M+N+4 One end of each is connected to the lower plate of the flying capacitor C, and the switch S N+3 The other end is connected to the voltage output terminal, switch S N+4 The other end is connected to B M , switch S M+N+3 The other end is connected to B 1 , switch S M+N+4 The other end of T is connected to the ground terminal; 1 To T N B is the voltage rail set between the voltage input terminal and the ground terminal; 1 To B M A voltage rail is provided between the voltage output terminal and the ground terminal; a driving circuit is connected between each switch and the reconfigurable voltage ladder logic circuit;

[0009] The error amplifier is connected to the voltage input terminal and the voltage output terminal; the voltage controlled oscillator is connected between the error amplifier and the phase generator; the phase generator is connected to the reconfigurable voltage ladder logic circuit in each unit;

[0010] Load capacitance C L One end of each unit is connected to the load capacitor C L The other end is grounded.

[0011] To achieve the above object, the present invention further provides a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor conversion method, which is implemented by the above-mentioned high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter, including Buck mode and Boost mode;

[0012] The Buck mode and Boost mode are both achieved by controlling the switches in each unit through the cooperation of an error amplifier, a voltage controlled oscillator, a phase generator, a reconfigurable voltage ladder logic circuit in each unit, and a drive circuit. The control principle is as follows:

[0013] The error amplifier detects the error between the input voltage and the output voltage and feeds it back to the voltage-controlled oscillator. The voltage-controlled oscillator then adjusts the switching frequency of each unit switch according to the error feedback, and then generates a phase signal for controlling the switch through the phase generator. The timing of the control switch is generated through the reconfigurable voltage ladder logic circuit, and finally the drive circuit drives the switching operation of each switch according to the phase signal of the phase generator.

[0014] Furthermore, the Buck mode consists of three stages, as follows:

[0015] In stage 1, the voltage on the upper plate of the flying capacitor C remains at the input voltage, and the voltage on the lower plate changes from the output voltage to B. M The voltage at the lower plate changes gradually to the voltage of the voltage source; the voltage of the lower plate changes each time by ΔV B , and the upper plate is connected to the voltage input terminal, so that each phase change of stage1 satisfies q=CΔV B , which means that every time the lower plate voltage changes, the voltage input terminal provides charge; by accumulating all phases of stage1, we can calculate qIN=(M+1)*CΔV B ;

[0016] In the stage 2 stage, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. In the whole stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge. The stage 2 stage is a transition stage, which is used to meet the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve step-by-step voltage changes.

[0017] In stage 3, the lower plate of the flying capacitor C is always kept at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of stage3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of stage3 to the first phase of stage1, we can calculate qOUT = (N + 1) * CΔV T .

[0018] Furthermore, the Boost mode includes three stages, as follows:

[0019] (1) In Stage 1, the upper plate of the flying capacitor C is always kept at the input voltage, and the voltage of the lower plate changes from the output voltage to B M The voltage at the lower plate changes gradually to the voltage of the voltage source; the amount of each change in the lower plate voltage is ΔV B , and the upper plate is connected to the voltage input terminal, so that each phase change of Stage 1 satisfies q=CΔV B , which means that every time the voltage of the lower plate changes, the voltage input terminal provides charge; by accumulating all phases of Stage 1, we can calculate qIN=(M+1)*CΔV B ;

[0020] (2) In the Stage 2 stage, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. During the entire stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge. The Stage 2 stage is a transition stage, which is used to satisfy the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve a step-by-step voltage change.

[0021] (3) In Stage 3, the lower plate of the flying capacitor C remains at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of Stage 3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of Stage3 to the first phase of Stage1, we can calculate qOUT = (N + 1) * CΔV T .

[0022] Compared with the prior art, the principles and advantages of this technical solution are as follows:

[0023] In this technical solution, the change voltage of the upper plate of the flying capacitor C in the Buck mode is the same as the change voltage of the upper plate of the flying capacitor C in the Boost mode, and the change voltage of the lower plate of the flying capacitor C in the Buck mode is also the same as the change voltage of the lower plate of the flying capacitor C in the Boost mode. When the switching capacitor converter is in Buck mode or Boost mode, the order of plate changes is the same. Therefore, when the voltage conversion ratio is 1:1, the structure of this technical solution does not need to consider logic switching, so that there will be no efficiency attenuation when the voltage conversion ratio is 1:1. In addition, the use of reconfigurable voltage rail technology while achieving efficiency continuity can further improve efficiency and make the circuit close to the optimal value of efficiency at each conversion ratio. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the services required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 A schematic diagram of the structure of a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter according to an embodiment of the present invention;

[0026] Figure 2 This is a working principle diagram of a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter in charging / discharging mode according to an embodiment of the present invention;

[0027] Figure 3 A working principle diagram of a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter in charging / discharging mode according to an embodiment of the present invention;

[0028] Figure 4 A schematic diagram of the structure of an existing single-topology continuously scalable conversion ratio buck-boost switched capacitor converter;

[0029] Figure 5 This is a comparison chart of the efficiencies of CSCR, RCSC and the three structures of the present invention. DETAILED DESCRIPTION

[0030] The present invention will be further described below in conjunction with specific embodiments:

[0031] like Figure 1As shown, a high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter described in this embodiment includes 2 (M + N) + 4 units, an error amplifier (EA), a voltage controlled oscillator (VCO), a phase generator (Phase generator), a load capacitor C L ;

[0032] Each unit includes a flying capacitor C, M+N+4 switches, a reconfigurable voltage ladder logic circuit (RVCF Logic), and a driving circuit (GateDrivers); M is the number of voltage rails between the output voltage terminal and the ground terminal; N is the number of voltage rails between the input voltage terminal and the ground terminal;

[0033] Among them, the switch S 1 One end of the switch S 2 One end of the switch S N+1 One end of the switch S N+2 One end of each is connected to the upper plate of the flying capacitor C, and the switch S 1 The other end is connected to the voltage input terminal, switch S 2 The other end of the N , switch S N+1 The other end of the 1 , switch S N+2 The other end of the switch S is connected to the voltage output end; N+3 One end of the switch S N+4 One end of the switch S M+N+3 One end of the switch S M+N+4 One end of each is connected to the lower plate of the flying capacitor C, and the switch S N+3 The other end is connected to the voltage output terminal, switch S N+4 The other end is connected to B M , switch S M+N+3 The other end is connected to B 1 , switch S M+N+4 The other end of T is connected to the ground terminal; 1 To T N B is the voltage rail set between the voltage input terminal and the ground terminal; 1 To B M A voltage rail is provided between the voltage output terminal and the ground terminal; a driving circuit is connected between each switch and the reconfigurable voltage ladder logic circuit;

[0034] The error amplifier is connected to the voltage input terminal and the voltage output terminal; the voltage controlled oscillator is connected between the error amplifier and the phase generator; the phase generator is connected to the reconfigurable voltage ladder logic circuit in each unit;

[0035] Load capacitance C L One end of each unit is connected to the load capacitor C LThe other end is grounded.

[0036] The working principle of this embodiment is as follows:

[0037] The high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter includes Buck mode and Boost mode; both modes are achieved by controlling the switch in each unit through the cooperation of an error amplifier, a voltage-controlled oscillator, a phase generator, a reconfigurable voltage ladder logic circuit in each unit, and a drive circuit. The control principle is as follows:

[0038] The error amplifier detects the error between the input voltage and the output voltage and feeds it back to the voltage-controlled oscillator. The voltage-controlled oscillator then adjusts the switching frequency of each unit switch according to the error feedback, and then generates a phase signal for controlling the switch through the phase generator. The timing of the control switch is generated through the reconfigurable voltage ladder logic circuit, and finally the drive circuit drives the switching operation of each switch according to the phase signal of the phase generator.

[0039] Specifically, Figure 2 As shown in the figure, Buck mode includes three stages, as follows:

[0040] 1) In stage 1, the voltage on the upper plate of the flying capacitor C remains at the input voltage, and the voltage on the lower plate changes from the output voltage to B M The voltage at the lower plate changes gradually to the voltage of the voltage source; the voltage of the lower plate changes each time by ΔV B , and the upper plate is connected to the voltage input terminal, so that each phase change of stage1 satisfies q=CΔV B , which means that every time the lower plate voltage changes, the voltage input terminal provides charge; by accumulating all phases of stage1, we can calculate qIN=(M+1)*CΔV B , that is, qIN=CV OUT ; At this time through Figure 2 It can be seen that the phase of the charge provided by the input voltage terminal changes from the last phase of stage3 to the first phase of stage1 in addition to all the changes in stage1. This change also provides charge at the voltage input terminal and satisfies qIN=CΔV T Therefore, in the entire change cycle, the total charge provided is qIN = C(V OUT +ΔV T ).

[0041] 2) In the stage 2 stage, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. In the entire stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge; the stage 2 stage is a transition stage, which is used to meet the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve a step-by-step voltage change;

[0042] 3) In stage 3, the lower plate of the flying capacitor C is always kept at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of stage3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of stage3 to the first phase of stage1, we can calculate qOUT = (N + 1) * CΔV T , that is, qOUT=CV IN At this time, through Figure 2 It can be seen that in addition to the above phases, the phase of the charge provided to the output voltage terminal also changes from the last phase of stage2 to the first phase of stage3. This change also provides charge to the output voltage terminal and satisfies qOUT=CΔV B Therefore, in the entire change cycle, the charge provided is qOUT = C (V IN +ΔV B ).

[0043] From the above, we can know that qIN=C(V OUT +ΔV T ), qOUT=C(V IN +ΔV B ). When M and N are relatively large, ΔV T and ΔV B Approximately equal to 0, so qIN=CV OUT ,qOUT=CV IN , so the whole system can be regarded as a gyrator model.

[0044] Specifically, if Figure 3 As shown, the Boost mode consists of three stages, as follows:

[0045] (1) In Stage 1, the upper plate of the flying capacitor C is always kept at the input voltage, and the voltage of the lower plate changes from the output voltage to B M The voltage at the lower plate changes gradually to the voltage of the voltage source; the amount of each change in the lower plate voltage is ΔVB , and the upper plate is connected to the voltage input terminal, so that each phase change of Stage 1 satisfies q=CΔV B , which means that every time the voltage of the lower plate changes, the voltage input terminal provides charge; by accumulating all phases of Stage 1, we can calculate qIN=(M+1)*CΔV B , that is, qIN=CV OUT ; At this time through Figure 3 It can be seen that the phase of the charge provided by the voltage input terminal, in addition to all changes in stage1, also changes from the last phase of stage3 to the first phase of stage1. This change is also the charge provided by the voltage input terminal, and satisfies qIN=CΔV T Therefore, in the entire change cycle, the total charge provided is qIN = C(V OUT +ΔV T ).

[0046] (2) In the Stage 2 stage, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. During the entire stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge. The Stage 2 stage is a transition stage, which is used to satisfy the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve a step-by-step voltage change.

[0047] (3) In Stage 3, the lower plate of the flying capacitor C is always kept at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of Stage 3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of Stage3 to the first phase of Stage1, we can calculate qOUT = (N + 1) * CΔV T , that is, qOUT=CV IN At this time, through Figure 3 It can be seen that the phase of the charge provided to the voltage output terminal is in addition to the above phase, and the last phase of stage2 changes to the first phase of stage3. This change is also given to V OUT Provide charge and satisfy qOUT=CΔV B Therefore, in the entire change cycle, the charge provided is qOUT = C (V IN +ΔV B ).

[0048] From the above, we can know that qIN=C(V OUT +ΔV T ), qOUT=C(V IN +ΔV B ). When M and N are relatively large, ΔV T and ΔV B Approximately equal to 0, so qIN=CV OUT ,qOUT=CV IN , so the whole system can be regarded as a gyrator model.

[0049] In summary, the upper plate change voltage of the flying capacitor C in the Buck mode is the same as the upper plate change voltage of the flying capacitor C in the Boost mode, and the lower plate change voltage of the flying capacitor C in the Buck mode is also the same as the lower plate change voltage of the flying capacitor C in the Boost mode. When the switched capacitor converter is in the Buck mode or the Boost mode, the plate change order is the same. Therefore, when the voltage conversion ratio is 1:1, the structure adopted by the present invention does not need to consider logic switching, so that there will be no efficiency attenuation when the voltage conversion ratio is 1:1. In addition, while achieving continuous efficiency, the use of reconfigurable voltage rail technology can further improve the efficiency, so that the circuit is close to the optimal value of efficiency at each conversion ratio.

[0050] like Figure 5 As shown, compared with the traditional CSCR and RCSC structures, the structure adopted by the present invention not only improves the efficiency in the entire conversion ratio range, but also achieves efficiency continuity through a special capacitor charging and discharging method, avoiding the efficiency loss problem caused by switching between Buck and Boost modes.

[0051] The embodiments described above are only preferred embodiments of the present invention and are not intended to limit the scope of implementation of the present invention. Therefore, all changes made according to the shape and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter, characterized in that: It includes 2(M+N)+4 units, error amplifier, voltage controlled oscillator, phase generator, load capacitor C L ; Each unit includes a flying capacitor C, M+N+4 switches, a reconfigurable voltage ladder logic circuit, and a driving circuit; M is the number of voltage rails between the output voltage terminal and the ground terminal; N is the number of voltage rails between the input voltage terminal and the ground terminal; Among them, one end of switch S1, one end of switch S2, and switch S N+1 One end of the switch S N+2 One end of the switch S1 is connected to the upper plate of the flying capacitor C, the other end of the switch S2 is connected to the voltage input terminal, and the other end of the switch S1 is connected to the upper plate of the flying capacitor C. N , switch S N+1 The other end is connected to T1, switch S N+2 The other end of the switch S is connected to the voltage output end; N+3 One end of the switch S N+4 One end of the switch S M+N+3 One end of the switch S M+N+4 One end of each is connected to the lower plate of the flying capacitor C, and the switch S N+3 The other end is connected to the voltage output terminal, switch S N+4 The other end is connected to B M , switch S M+N+3 The other end is connected to B1, switch S M+N+4 The other end of T1 to T N The voltage rail is set between the voltage input terminal and the ground terminal; B1 to B M A voltage rail is provided between the voltage output terminal and the ground terminal; a driving circuit is connected between each switch and the reconfigurable voltage ladder logic circuit; The error amplifier is connected to the voltage input terminal and the voltage output terminal; the voltage controlled oscillator is connected between the error amplifier and the phase generator; the phase generator is connected to the reconfigurable voltage ladder logic circuit in each unit; Load capacitance C L One end of each unit is connected to the load capacitor C L The other end is grounded.

2. A high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor conversion method, characterized in that: The high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter according to claim 1 is used to implement the converter, including Buck mode and Boost mode; The Buck mode and Boost mode are both achieved by controlling the switches in each unit through the cooperation of an error amplifier, a voltage controlled oscillator, a phase generator, a reconfigurable voltage ladder logic circuit in each unit, and a drive circuit. The control principle is as follows: The error amplifier detects the error between the input voltage and the output voltage and feeds it back to the voltage-controlled oscillator. The voltage-controlled oscillator then adjusts the switching frequency of each unit switch according to the error feedback, and then generates a phase signal for controlling the switch through the phase generator. The timing of the control switch is generated through the reconfigurable voltage ladder logic circuit, and finally the drive circuit drives the switching operation of each switch according to the phase signal of the phase generator.

3. A high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor conversion method according to claim 2, characterized in that: The Buck model consists of three stages, as follows: 1) In stage 1, the voltage on the upper plate of the flying capacitor C remains at the input voltage, and the voltage on the lower plate changes from the output voltage to B M The voltage at the lower plate changes gradually to the voltage of the voltage source; the voltage of the lower plate changes each time by ΔV B , and the upper plate is connected to the voltage input terminal, so that each phase change of stage 1 satisfies q=CΔV B , which means that every time the lower plate voltage changes, the voltage input terminal provides charge; by accumulating all phases of stage1, we can calculate qIN=(M+1)*CΔV B ; 2) In the stage 2 stage, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. In the entire stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge; the stage 2 stage is a transition stage, which is used to meet the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve a step-by-step voltage change; 3) In stage 3, the lower plate of the flying capacitor C is always kept at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of stage3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of stage3 to the first phase of stage1, we can calculate qOUT = (N + 1) * CΔV T .

4. The high-efficiency quasi-continuous conversion ratio buck-boost switched capacitor converter according to claim 2, characterized in that: The Boost mode consists of three stages, as follows: (1) In Stage 1, the upper plate of the flying capacitor C is always kept at the input voltage, and the voltage of the lower plate changes from the output voltage to B. M The voltage at the lower plate changes gradually to the voltage of the voltage source; the amount of each change in the lower plate voltage is ΔV B , and the upper plate is connected to the voltage input terminal, so that each phase change of Stage 1 satisfies q=CΔV B , which means that every time the voltage of the lower plate changes, the voltage input terminal provides charge; by accumulating all phases of Stage 1, we can calculate qIN=(M+1)*CΔV B ; (2) In Stage 2, the upper and lower plates of the flying capacitor C are not connected to the voltage input terminal or the voltage output terminal. During the entire stage, the voltage input terminal does not provide charge and the voltage output terminal does not receive charge. Stage 2 is a transition stage, which is used to satisfy the law of conservation of charge and perform scalable parasitic charge redistribution technology with the flying capacitors C of other units to achieve a step-by-step voltage change. (3) In Stage 3, the lower plate of the flying capacitor C remains at the output voltage, and the voltage of the upper plate changes from the voltage source voltage to T N The voltage of the flying capacitor C changes gradually to the input voltage; the amount of each change in the voltage on the plate is ΔV T , and the lower plate is connected to the voltage output terminal, so that each phase change of Stage 3 satisfies q=CΔV T , which means that every change in the upper plate voltage provides charge to the voltage output terminal; by accumulating the first phase of Stage 3 to the first phase of Stage 1, we can calculate qOUT = (N + 1) * CΔV T .

Images