Motor control system, signal detection method, vehicle, and storage medium

Abstract

The present application relates to the field of signal detection of motor control systems, and more particularly, to a motor control system, a signal detection method, a vehicle provided with the motor control system, and a computer storage medium implementing the signal detection method. The motor control system comprises a driving module which is configured to transmit a first PWM signal received by a first input end of a low-voltage side to a first output end of a high-voltage side in an isolated manner so as to output a control signal aiming at a power module, and collect the control signal at the first output end, comparing the recovered control signal with the first PWM signal to generate a first result signal; and a microprocessor configured to perform transmission fault identification based on the first result signal.

Description

Technical Field

[0001] The present application relates to the field of signal detection of a motor control system, and more specifically to a motor control system, a signal detection method, a vehicle equipped with the motor control system, and a computer-readable storage medium for implementing the signal detection method. Background Art

[0002] In the motor control system of an electric vehicle (EV) or plug-in hybrid electric vehicle (PHEV), a power module with power semiconductors is required to convert the high-voltage DC in the power battery into three-phase AC or convert the three-phase AC current into high-voltage DC to achieve four-quadrant control of the motor. Generally, the control of power semiconductors requires a drive module (e.g., a gate driver) with isolation and amplification functions to transmit the low-voltage side signal (e.g., a pulse width modulation (PWM) signal issued by a microprocessor (MCU)) to the high-voltage side and increase its voltage and load capacity. The transmission path of the PWM signal is crucial to the motor control system. Therefore, for safety reasons, the transmission path of the PWM signal needs to be followed and checked to prevent safety hazards caused by abnormal PWM signal transmission.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0004] In order to solve or at least alleviate one or more of the above problems, the following technical solutions are provided. The embodiments of the present application provide a motor control system, a signal detection method, a vehicle having the motor control system, and a computer-readable storage medium for implementing the signal detection method, which can complete the self-check of the PWM signal without adding external isolation devices, thereby reducing the system cost.

[0005] According to a first aspect of the present application, there is provided a motor control system, comprising: a drive module, configured to: isolate and transmit a first pulse width modulation signal received via a first input terminal on a low voltage side to a first output terminal on a high voltage side to output a control signal for a power module, retrieve the control signal at the first output terminal, and compare the retrieved control signal with the first pulse width modulation signal to generate a first result signal; and a microprocessor, configured to perform transmission fault identification based on the first result signal.

[0006] As an alternative or supplement to the above solution, in a motor control system according to an embodiment of the present application, the drive module includes a first comparison unit, and the drive module is further configured to isolate and transmit the recovered control signal to the first comparison unit on the low-voltage side.

[0007] As an alternative or supplement to the above solution, in a motor control system according to an embodiment of the present application, the first comparison unit is configured to: if the control signal matches the first pulse width modulation signal, the generated first result signal is a high level, otherwise it is a low level.

[0008] As an alternative or supplement to the above scheme, in a motor control system according to an embodiment of the present application, the microprocessor is further configured to: generate an original pulse width modulation signal; input the original pulse width modulation signal into a buffer unit to output a second pulse width modulation signal; retrieve the second pulse width modulation signal, and compare the retrieved second pulse width modulation signal with the original pulse width modulation signal to generate a second result signal; and perform transmission fault identification based on the second result signal.

[0009] As an alternative or supplement to the above scheme, in a motor control system according to an embodiment of the present application, the motor control system also includes the power module, the first output end of the driving module is connected to the first end of the gate resistor of the power module, and the second end of the gate resistor is connected to the gate of the power semiconductor of the power module.

[0010] As an alternative or supplement to the above scheme, in a motor control system according to an embodiment of the present application, the power module is configured to: recover the gate drive signal at the second end of the gate resistor, compare the recovered gate drive signal with the control signal to generate a third result signal; and the microprocessor is further configured to perform transmission fault identification based on the third result signal.

[0011] As an alternative or supplement to the above scheme, in a motor control system according to an embodiment of the present application, the driving module includes a second comparison unit, and the second comparison unit is configured such that: if the gate drive signal matches the control signal, the third result signal is a high level, otherwise it is a low level.

[0012] As an alternative or supplement to the above solution, in a motor control system according to an embodiment of the present application, the driving module is further configured to isolate and transmit the third result signal to the low-voltage side.

[0013] As an alternative or supplement to the above scheme, in a motor control system according to an embodiment of the present application, the driving module also includes an AND gate unit, wherein the two input ends of the AND gate unit are respectively connected to the output end of the first comparison unit and the output end of the second comparison unit, and the output end of the AND gate unit is connected to the second output end of the low-voltage side of the driving module.

[0014] According to a second aspect of the present application, a signal detection method is provided, which is applied to a drive module of a motor control system, and the method includes: receiving a first pulse width modulation signal input via a first input terminal on a low voltage side of the drive module; receiving a control signal output via a first output terminal on a high voltage side of the drive module; and generating a first result signal based on a comparison result between the control signal and the first pulse width modulation signal for a microprocessor to perform transmission fault identification.

[0015] As an alternative or supplement to the above scheme, in a signal detection method according to an embodiment of the present application, the method further includes: receiving a gate drive signal at the second end of the gate resistor of the power module, wherein the first end of the gate resistor is connected to the first output end; and generating a third result signal based on the comparison result of the gate drive signal and the control signal for the microprocessor to perform transmission fault identification.

[0016] As an alternative or supplement to the above scheme, in a signal detection method according to an embodiment of the present application, if the control signal matches the first pulse width modulation signal, the first result signal is a high level, otherwise it is a low level, and if the gate drive signal matches the control signal, the third result signal is a high level, otherwise it is a low level; and the method further includes: performing an AND operation on the first result signal and the third result signal, and outputting the result of the AND operation to the microprocessor.

[0017] According to a third aspect of the present application, a vehicle is provided, which is equipped with a motor control system according to the first aspect of the present application.

[0018] According to a fourth aspect of the present application, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes instructions, and the instructions, when run, execute any one of the signal detection methods described in the second aspect of the present application.

[0019] The signal detection scheme and motor control system according to one or more embodiments of the present application have a drive module that integrates a PWM signal recovery function (i.e., recovering the control signal at the first output terminal on the high-voltage side) and a PWM signal detection function (i.e., comparing the recovered control signal with the first pulse width modulation signal received at the first input terminal on the low-voltage side), and a microprocessor with a transmission fault identification function, which can complete self-inspection of the PWM signal without adding external isolation devices, thereby reducing system costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and / or other aspects and advantages of the present application will become clearer and easier to understand through the following description of various aspects in conjunction with the accompanying drawings, in which the same or similar units are represented by the same reference numerals. In the accompanying drawings:

[0021] Figure 1 A schematic block diagram of a motor control system 10 with an external circuit added;

[0022] Figure 2 is a schematic block diagram of a motor control system 20 according to one or more embodiments of the present application;

[0023] Figure 3 is a schematic block diagram of a motor control system 30 according to one or more embodiments of the present application;

[0024] Figure 4 is a schematic flow chart of a signal detection method 40 according to one or more embodiments of the present application; and

[0025] Figure 5 is a schematic block diagram of a vehicle 50 according to one or more embodiments of the present application. DETAILED DESCRIPTION

[0026] The description of the following specific embodiments is merely exemplary in nature and is not intended to limit the disclosed technology or the application and use of the disclosed technology. In addition, it is not intended to be bound by any express or implied theory presented in the aforementioned technical field, background technology or the following specific embodiments.

[0027] In the following detailed description of the embodiments, many specific details are set forth in order to provide a more thorough understanding of the disclosed technology. However, it is apparent to one of ordinary skill in the art that the disclosed technology can be practiced without these specific details. In other instances, well-known features are not described in detail to avoid unnecessarily complicating the description.

[0028] Terms such as "comprising" and "including" indicate that in addition to the units and steps directly and clearly stated in the specification, the technical solution of the present application does not exclude the situation of having other units and steps that are not directly or clearly stated. Terms such as "first" and "second" do not indicate the order of units in terms of time, space, size, etc., but are only used to distinguish each unit. The technology of the present application is generally used in electric vehicles, which include but are not limited to pure electric vehicles (BEV), hybrid electric vehicles (HEV), fuel cell vehicles (FCEV), etc.

[0029] Hereinafter, various exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings.

[0030] According to one or more embodiments of the present application, the transmission path of the PWM signal may include three parts: the first part, the PWM signal generated by the MCU is transmitted to the input end of the driving module (e.g., gate driver) through the intermediate transmission circuit (e.g., buffer circuit); the second part, the driving module outputs the control signal after isolating and amplifying the PWM signal; the third part, the control signal output by the driving module is transmitted to the gate of the power device through the gate resistor. It can be understood that the failure of any part of the above transmission path may cause the power device to fail, thereby causing the motor control to lose control and cause safety problems.

[0031] In order to solve the above problems and improve the transmission security of PWM signals, additional external circuits can be added to monitor the PWM signals in real time. Figure 1 FIG. 1 is a schematic block diagram of a motor control system 10 with an external circuit added. Figure 1 As shown, in order to achieve signal transmission between the high-voltage side and the low-voltage side, an independent isolator (e.g., an isolation chip) is often required. This type of solution occupies a large printed circuit board (PCB) layout area, is costly, and takes a long time to detect. Fault detection has a certain delay, and has certain limitations on PWM narrow pulse width detection.

[0032] Continue to refer to Figure 2 , Figure 2 FIG. 2 is a schematic block diagram of a motor control system 20 according to one or more embodiments of the present application. Figure 2 As shown, the motor control system 20 includes a microprocessor 210 and a drive module 220. Optionally, the motor control system 20 may further include a power module 230.

[0033] In one or more embodiments of the present application, the microprocessor 210 is used to generate an original PWM signal, and to identify a transmission fault based on a comparison result between a PWM signal retrieved in a transmission path of the original PWM signal and the original PWM signal. Optionally, depending on the specific signal retrieval stage, the above comparison result may be generated by the drive module 220 or by the microprocessor 210 itself, and the motor control system 20 does not need to add an additional isolation chip. Exemplarily, signal retrieval for PWM can be divided into two stages: the control MCU stage and the drive stage.

[0034] The control MCU stage is intended to independently complete the self-check of the first part of the transmission path by the microprocessor 210. Exemplarily, the microprocessor 210 can transmit the original PWM signal to the drive module 220 via the intermediate transmission unit. In one or more embodiments according to the present application, the microprocessor 210 can transmit the generated original PWM signal to the buffer unit, and the buffer unit outputs the second PWM signal. The microprocessor 210 can retrieve the output signal of the buffer unit (that is, the second PWM signal), and compare the retrieved second PWM signal with the generated original PWM signal to determine the consistency of the second PWM signal and the original PWM signal, and generate a second result signal. Exemplarily, determining the consistency of the second PWM signal and the original PWM signal can include one or more of the following: comparing the waveforms of the second PWM signal and the original PWM signal; calculating and comparing the duty cycle of the second PWM signal and the original PWM signal; calculating the time delay between the second PWM signal and the original PWM signal. If it is determined that the second PWM signal and the original PWM signal are highly consistent (for example, the time delay is less than a preset threshold, or the difference in duty cycle is less than a preset threshold), a second result signal with a high level is generated; otherwise, a second result signal with a low level is generated.

[0035] The driving stage is intended to complete the detection of the second part of the transmission path by the driving module 220 and report the detection result to the microprocessor 210. Exemplarily, the driving module 220 can receive the output signal of the microprocessor 210 (for example, the original PWM signal generated by the microprocessor 210 or the first PWM signal output by the buffer unit) via the first input terminal on the low-voltage side, and isolate and transmit it to the first output terminal on the high-voltage side and output the control signal for the power module 230 via the first output terminal. In order to detect whether there is a signal transmission failure from the first input terminal to the first output terminal, the driving module 220 will retrieve the control signal at the first output terminal, and compare the retrieved control signal with the signal received at the first input terminal (for example, the original PWM signal or the first PWM signal) to generate a first result signal. Optionally, the above comparison operation can be implemented by a first comparison unit integrated on the low-voltage side of the driving module 220. In this implementation, the driving module 220 needs to isolate and transmit the retrieved control signal to the first comparison unit on the low-voltage side. Exemplarily, the first comparison unit may determine the consistency of the retrieved control signal and the signal received at the first input terminal (e.g., the original PWM signal or the first PWM signal). Exemplarily, determining the consistency of the control signal and the first PWM signal may include one or more of the following: comparing the waveforms of the control signal and the first PWM signal; calculating and comparing the duty cycles of the control signal and the first PWM signal; calculating the time delay between the control signal and the first PWM signal. If it is determined that the consistency of the control signal and the first PWM signal is high (e.g., the time delay is less than a preset threshold, or the difference in duty cycles is less than a preset threshold), a first result signal with a high level is generated; otherwise, a first result signal with a low level is generated.

[0036] In one or more embodiments according to the present application, the driving stage may also include detection of the third part of the transmission path. Exemplarily, the driving module 220 outputs a control signal via a first output terminal, and the control signal is transmitted to the power module 230 via a gate resistor. Specifically, the first output terminal of the driving module 220 is connected to the first end of the gate resistor of the power module 230, and the second end of the gate resistor is connected to the gate of the power semiconductor (e.g., an insulated gate bipolar transistor (IGBT), a silicon carbide (SiC) semiconductor) of the power module 230. Exemplarily, the driving module 220 recovers the gate drive signal at the second end of the gate resistor, and compares the recovered gate drive signal with the control signal to generate a third result signal. It should be noted here that the recovered gate drive signal and the control signal are both high-voltage side signals, so the above comparison operation is preferably performed on the high-voltage side, and the driving module 220 can isolate and transmit the third result signal on the high-voltage side to the low-voltage side. Optionally, the above comparison operation can be implemented by a second comparison unit integrated on the high-voltage side of the driving module 220. Exemplarily, the second comparison unit can determine the consistency of the recovered gate drive signal and the control signal. Exemplarily, determining the consistency of the recovered gate drive signal and the control signal may include one or more of the following: comparing the waveforms of the gate drive signal and the control signal; calculating and comparing the duty cycles of the gate drive signal and the control signal; calculating the time delay between the gate drive signal and the control signal. If it is determined that the consistency of the gate drive signal and the control signal is high (for example, the time delay is less than a preset threshold, or the difference in duty cycles is less than a preset threshold), a third result signal with a high level is generated; otherwise, a third result signal with a low level is generated.

[0037] Optionally, the driving module 220 may transmit the first result signal and / or the third result signal to the microprocessor 210 for transmission fault identification. In one example, the driving module 220 may transmit the first result signal and the third result signal to the microprocessor 210 via different output terminals, respectively, and the microprocessor 210 may identify the transmission fault of the second part of the transmission path based on the first result signal, and identify the transmission fault of the third part of the transmission path based on the third result signal. In another example, the driving module 220 further includes an AND gate unit, the two input terminals of the AND gate unit are respectively connected to the output terminal of the first comparison unit and the output terminal of the second comparison unit, so as to receive the first result signal and the third result signal, and the output terminal of the AND gate unit is connected to the second output terminal of the low-voltage side of the driving module. In this implementation, if the first result signal and the third result signal are both high levels (that is, the consistency between the control signal and the first PWM signal is high and the consistency between the gate drive signal and the control signal is high), a high level is output to the microprocessor 210 via the second output terminal to indicate that there is no transmission fault in the second and third partial transmission paths (that is, from the first input terminal on the low-voltage side of the driving module 220 to the second end of the gate resistor); if one or both of the first result signal and the third result signal are low levels, a low level is output to the microprocessor 210 via the second output terminal to indicate that there is a transmission fault in the driving stage (that is, the second and / or third partial transmission paths).

[0038] Continue to refer to Figure 3 , Figure 3 is a schematic block diagram of a motor control system 30 according to one or more embodiments of the present application.

[0039] like Figure 3 As shown, after the MCU generates the PWM signal, it is transmitted to the input terminal IN+ of the gate driver through the buffer circuit. The MCU allocates the input terminal IO_1 to monitor the signal at the input terminal IN+ of the gate driver to ensure that the signal transmitted to the input terminal IN+ is consistent with the original PWM signal. Specifically, the MCU can compare the recovered signal of the input terminal IN+ with the original PWM signal, such as comparing the waveform of the signal, the duty cycle and the time delay between the signals.

[0040] The gate state monitoring unit in the gate driver collects the control signals GON and GOFF output by the gate driver, isolates them and transmits them to the comparison unit 1 to compare with the signal at the input terminal IN+, inputs the comparison result into the AND gate AND, and transmits it to the MCU through the nFAULT pin.

[0041] The gate driver collects the gate drive signal at the gate of the power semiconductor (e.g., SiC or IGBT) in the power module through the GM pin, and transmits the gate drive signal to the comparison unit 2 on the high voltage side for comparison with the control signal GON or GOFF, and isolates and transmits the comparison result to the input of the AND gate AND, and transmits it to the MCU through the low voltage side nFAULT pin.

[0042] The MCU allocates input terminal IO_2 for monitoring the nFAULT fault reported by the gate driver. The MCU detects the level state at the nFAULT pin to identify whether there is a transmission fault in the second and third partial transmission paths of the PWM signal. If a high level is identified, there is no transmission fault in the second and third partial transmission paths (that is, from the input terminal IN+ to the gate of the power semiconductor); if a high level is identified, there is a transmission fault in one or both of the second and third partial transmission paths.

[0043] According to one or more embodiments of the present application, the motor control system 30 or 40 has a drive module that integrates the PWM signal recovery function and the PWM signal detection function, and a microprocessor with a transmission fault identification function, which can complete the self-test of the PWM signal without adding external isolation devices, thereby reducing the system cost. In addition, in some implementations, the motor control system 30 or 40 can realize segmented and parallel detection of the PWM signal, complete the parallel self-test of the entire transmission path of the PWM signal, thereby shortening the fault detection time and reducing the PCB layout area, and can also support PWM detection with a narrower pulse width, greatly improving the system reliability.

[0044] Figure 4 4 is a schematic flow chart of a signal detection method 40 according to one or more embodiments of the present application. The method 40 is applied to a drive module (eg, drive module 210 or Figure 3 gate driver in the Figure 4 As shown, in step S410, a first PWM signal inputted via a first input terminal of a low voltage side of a driving module is received. In step S420, a control signal outputted via a first output terminal of a high voltage side of the driving module is received. In step S430, a first result signal is generated based on a comparison result between the control signal and the first PWM signal, so as to provide a microprocessor with a transmission fault identification.

[0045] Optionally, method 40 further includes: receiving a gate drive signal at the second end of the gate resistor of the power module, wherein the first end of the gate resistor is connected to the first output end; and generating a third result signal based on the comparison result of the gate drive signal and the control signal for the microprocessor to identify a transmission fault. Optionally, in method 40, if the control signal matches the first PWM signal, the first result signal is a high level, otherwise it is a low level, and if the gate drive signal matches the control signal, the third result signal is a high level, otherwise it is a low level. Optionally, method 40 further includes: performing an AND operation on the first result signal and the third result signal, and outputting the result of the AND operation to the microprocessor.

[0046] Figure 5 FIG. 5 is a schematic block diagram of a vehicle 50 according to one or more embodiments of the present application. The vehicle 50 is provided with a motor control system 510 (eg, Figure 2 The motor control system 20 shown or Figure 3 The motor control system 30 is shown. For example, the vehicle 50 may be an electric vehicle, including but not limited to a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), a fuel cell electric vehicle (FCEV), etc.

[0047] In addition, as described above, the present application can also be implemented as a computer-readable storage medium, in which a program for causing a computer to execute the following steps is stored. Figure 4 Here, as the computer-readable storage medium, various computer-readable storage media such as disks (e.g., magnetic disks, optical disks, etc.), cards (e.g., memory cards, optical cards, etc.), semiconductor memories (e.g., ROMs, nonvolatile memories, etc.), and tapes (e.g., magnetic tapes, cassette tapes, etc.) can be used.

[0048] In the applicable situation, hardware, software or a combination of hardware and software can be used to realize the various embodiments provided by the application. Moreover, in the applicable situation, without departing from the scope of the application, the various hardware components and / or software components set forth herein can be combined into a composite component comprising software, hardware and / or both. In the applicable situation, without departing from the scope of the application, the various hardware components and / or software components set forth herein can be divided into subcomponents comprising software, hardware or both. In addition, in the applicable situation, it is contemplated that the software component can be implemented as a hardware component, and vice versa.

[0049] Software according to the present application (such as program code and / or data) can be stored on one or more computer-readable storage media. It is also contemplated that the software identified herein can be implemented using one or more general or special-purpose computers and / or computer systems, networked and / or otherwise. Where applicable, the order of the various steps described herein can be changed, combined into composite steps, and / or divided into sub-steps to provide the features described herein.

[0050] The embodiments and examples set forth herein are provided to best illustrate embodiments according to the present application and its specific applications, and thereby enable those skilled in the art to implement and use the present application. However, those skilled in the art will appreciate that the above description and examples are provided only for ease of illustration and example. The description set forth is not intended to cover all aspects of the present application or to limit the present application to the precise form disclosed.

Claims

1. A motor control system, characterized in that: include: A driver module configured to: The first pulse width modulation signal received via the first input terminal of the low voltage side is isolated and transmitted to the first output terminal of the high voltage side to output a control signal for the power module. Retrieving the control signal at the first output terminal, and comparing the retrieved control signal with the first pulse width modulation signal to generate a first result signal; as well as A microprocessor is configured to perform transmission fault identification based on the first result signal.

2. The motor control system according to claim 1, wherein: The driving module includes a first comparing unit, and the driving module is further configured to isolate and transmit the recovered control signal to the first comparing unit on the low-pressure side.

3. The motor control system according to claim 2, wherein: The first comparison unit is configured to: If the control signal matches the first pulse width modulation signal, the generated first result signal is a high level, otherwise it is a low level.

4. The motor control system according to claim 1, wherein: The microprocessor is further configured to: generating a raw pulse width modulated signal; Inputting the original pulse width modulation signal into a buffer unit to output a second pulse width modulation signal; Retrieving the second pulse width modulation signal, and comparing the retrieved second pulse width modulation signal with the original pulse width modulation signal to generate a second result signal; as well as Transmission fault identification is performed based on the second result signal.

5. The motor control system according to claim 1, wherein: The motor control system further includes the power module, the first output end of the driving module is connected to a first end of a gate resistor of the power module, and a second end of the gate resistor is connected to a gate of a power semiconductor of the power module.

6. The motor control system according to claim 5, wherein: The drive module is configured as follows: Retrieving a gate drive signal at a second end of the gate resistor, comparing the recovered gate drive signal with the control signal to generate a third result signal; and The microprocessor is further configured to perform transmission fault identification based on the third result signal.

7. The motor control system according to claim 6, wherein: The driving module is further configured to isolate and transmit the third result signal to a low voltage side.

8. The motor control system according to claim 6, wherein: The driving module includes a second comparing unit, wherein the second comparing unit is configured to: If the gate driving signal matches the control signal, the generated third result signal is a high level, otherwise it is a low level.

9. The motor control system according to any one of claims 6 to 8, wherein: The driving module further comprises an AND gate unit, two input ends of the AND gate unit are respectively connected to the output end of the first comparison unit and the output end of the second comparison unit, and the output end of the AND gate unit is connected to the second output end of the low voltage side of the driving module.

10. A signal detection method, characterized in that: The method is applied to a driving module of a motor control system, and the method comprises: Receiving a first pulse width modulation signal inputted via a first input terminal of a low voltage side of the driving module; receiving a control signal outputted via a first output terminal of a high voltage side of the driving module; and A first result signal is generated based on the comparison result between the control signal and the first pulse width modulation signal, so as to be used by the microprocessor for transmission fault identification.

11. The signal detection method according to claim 10, wherein: The method further comprises: receiving a gate drive signal at a second end of a gate resistor of a power module, wherein a first end of the gate resistor is connected to the first output end; and A third result signal is generated based on the comparison result of the gate drive signal and the control signal, so as to be used by the microprocessor to perform transmission fault identification.

12. The signal detection method according to claim 11, wherein: If the control signal matches the first pulse width modulation signal, the first result signal is at a high level, otherwise it is at a low level. If the gate drive signal matches the control signal, the third result signal is at a high level, otherwise it is at a low level; And the method further comprises: An AND operation is performed on the first result signal and the third result signal, and the result of the AND operation is output to the microprocessor.

13. A vehicle, characterized in that: It comprises a motor control system as claimed in any one of claims 1 to 9.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium comprises instructions, which, when executed, perform the signal detection method according to any one of claims 10-12.

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