Signal Processing Method, Apparatus, Device, Storage Medium, Computer Program Product
Through the automated methods of signal acquisition, analysis and filtering processing, the problem of time-consuming and labor-consuming abnormal signal recognition in the electronic control system is solved, and efficient interference signal recognition and system stability are achieved.
Patent Information
- Application Number
- CN202510578818.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-06
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2045-05-06
AI Technical Summary
In existing electronic control systems, abnormal signal recognition requires manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency.
The signal processing method is adopted, and the input signal is collected in real time through the signal acquisition module. The front signal analysis module determines whether there is an uncontrollable interference signal and triggers an alarm. The filtering module performs filtering processing. The rear signal analysis module determines the signal type and adjusts the filtering parameters to realize automated interference signal identification and filtering.
It realizes automated interference signal identification and filtering processing, reduces manual inspection time, improves the response sensitivity and stability of the electronic control system, and reduces maintenance costs.
Smart Images

Figure CN120110384B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a signal processing method, apparatus, device, storage medium, and computer program product. Background Art
[0002] In traditional electronic control systems (such as those used in sanding machines and injection molding machines), the input signals are mostly low-frequency, with almost no high-frequency signals. Consequently, these systems require minimal sensitivity from the electronic control hardware, requiring only the low-frequency signals generated during operation. However, low-sensitivity electronic control hardware also results in slower response times.
[0003] In recent years, with the advancement of related technologies, the electronic control hardware in electronic control systems has been continuously upgraded. These new electronic control hardware (such as high-precision sensors or analog-to-digital converters (A / D converters)) can capture weaker or higher-frequency signals, significantly improving the response speed of electronic control systems. However, this highly sensitive electronic control hardware may also interpret previously ignored environmental noise (such as electromagnetic interference and thermal noise) as valid signals, causing interference in the detection signal and, in turn, affecting the stability of the input signal. Furthermore, the common coexistence of strong and weak currents in equipment can also lead to unstable input signals in electronic control systems. Finally, common-mode interference introduced into the signal loop due to issues such as aging wiring, poor contact, and missing ground wires can compromise signal integrity and also cause signal interference. Therefore, existing electronic control systems can suffer from significant signal interference at the input.
[0004] However, because signal interference is random and transient, it's difficult to capture and analyze within the timescale observable to the human eye (milliseconds), making manual troubleshooting of abnormal signals extremely challenging. In related technologies, identifying and analyzing abnormal signals in electronic control systems typically requires professionals to use tools like oscilloscopes to capture signals for extended periods of time and combine this with specialized knowledge for diagnosis. This is not only time-consuming and labor-intensive, but also inefficient. Especially in electronic control boxes with hundreds of points, when a signal anomaly occurs, personnel must individually investigate each signal or input point to identify the specific issue, significantly increasing the maintenance cost and efficiency of the electronic control system.
[0005] It can be seen that there is an urgent need for a solution that can efficiently identify interference signals and quickly filter the identified interference signals, thereby ensuring the stability of the input signals ultimately transmitted to the electronic control system. Summary of the Invention
[0006] The embodiments of the present application provide a signal processing method to solve the problem that existing abnormal signal identification solutions require reliance on manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency.
[0007] The embodiment of the present application also provides a signal processing device to solve the problem that the existing abnormal signal identification solution needs to rely on professionals for manual diagnosis, which is time-consuming and labor-intensive, and has low processing efficiency.
[0008] The embodiment of the present application also provides a signal processing device to solve the problem that existing abnormal signal identification solutions require reliance on manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency.
[0009] The embodiments of the present application also provide a computer-readable storage medium to solve the problem that existing abnormal signal identification solutions require reliance on manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency.
[0010] A computer program product is used to solve the problem that existing abnormal signal identification solutions require manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency.
[0011] The embodiments of this application adopt the following technical solutions:
[0012] A signal processing method includes: performing data analysis on an original input signal obtained within a first sampling period according to a preset processing period to determine whether an uncontrollable interference signal appears within the processing period; triggering an alarm reminder when the judgment result is yes; performing filtering processing on the original signal to obtain a filtered processing signal when the judgment result is no; performing data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, adjusting the filtering parameters corresponding to the filtering processing, and continuing the filtering processing based on the updated filtering parameters.
[0013] A signal processing device includes: a first signal analysis unit, which is used to perform data analysis on an original input signal obtained within a first sampling period according to a preset processing period, and determine whether an uncontrollable interference signal appears within the processing period; an alarm unit, which is used to trigger an alarm reminder when the judgment result obtained by the signal analysis unit is yes; a filtering unit, which is used to filter the original signal to obtain a filtered processing signal when the judgment result obtained by the signal analysis unit is no; a second signal analysis unit, which is used to perform data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; and a parameter adjustment unit, which is used to adjust the filtering parameters corresponding to the filtering processing when it is determined that the filtered processing signal is an interference signal.
[0014] A signal processing device, comprising:
[0015] A processor; and a memory arranged to store computer-executable instructions, wherein the executable instructions, when executed, cause the processor to perform the following operations: according to a preset processing cycle, perform data analysis on the original signal at the input end obtained within a first sampling cycle to determine whether an uncontrollable interference signal appears within the processing cycle; when the judgment result is yes, trigger an alarm reminder; when the judgment result is no, perform filtering processing on the original signal to obtain a filtered processing signal; perform data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, adjust the filtering parameters and sampling cycle corresponding to the filtering processing, and continue filtering processing according to the updated filtering parameters and sampling cycle.
[0016] A computer-readable storage medium stores one or more programs, which, when executed by an electronic device including multiple application programs, enable the electronic device to perform the following operations: according to a preset processing cycle, perform data analysis on the original signal at the input end obtained within a first sampling cycle to determine whether an uncontrollable interference signal appears within the processing cycle; when the judgment result is yes, trigger an alarm reminder; when the judgment result is no, perform filtering processing on the original signal to obtain a filtered processing signal; perform data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, adjust the filtering parameters and sampling cycle corresponding to the filtering processing, and continue filtering processing according to the updated filtering parameters and sampling cycle.
[0017] A computer program product includes a computer program, which, when executed by a processor, implements: according to a preset processing cycle, performing data analysis on an original input signal obtained within a first sampling cycle to determine whether an uncontrollable interference signal appears within the processing cycle; when the judgment result is yes, triggering an alarm reminder; when the judgment result is no, performing filtering processing on the original signal to obtain a filtered processing signal; performing data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, adjusting the filtering parameters and sampling cycle corresponding to the filtering processing, and continuing the filtering processing based on the updated filtering parameters and sampling cycle.
[0018] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects:
[0019] Using the signal processing method provided in the embodiment of the present application, during the operation of the electronic control system, the acquisition module will collect the original input signal of the input end according to the preset sampling period, and send the original signal collected in real time to the front signal analysis module. The front signal analysis module can perform data analysis on the original signal of the input end according to the preset processing period to determine whether an uncontrollable interference signal appears during the processing period; when it is determined that an uncontrollable interference signal appears, an alarm reminder is triggered, and these uncontrollable interference signals are screened out, thereby avoiding clutter interference that may occur during subsequent filtering processing; and when the judgment result is no, indicating that the number of clutters appearing during the processing period is low, the original signal is sent to the filtering module, and the filtering module performs filtering processing to obtain a filtered processing signal. After the filtering processing is completed, the filtered signal is passed to the post-signal analysis module, and the post-signal analysis module performs data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal. When it is determined that the filtered processing signal is an interference signal, the filtering parameters and sampling period corresponding to the filtering processing are adjusted, and the filtering processing is continued according to the updated filtering parameters and sampling period. By adopting the signal processing method provided in the embodiment of the present application, on the one hand, through real-time sampling and intelligent analysis before filtering processing, uncontrollable interference signals can be eliminated and alarm prompts can be performed, which facilitates terminal users to quickly locate and solve problems and reduces the time and difficulty of manual troubleshooting; on the other hand, through the analysis and processing of the pre-signal analysis module before filtering processing, uncontrollable interference caused by excessive number of clutter can be eliminated. At the same time, the filtering time is reduced by the reset cycle, and the response sensitivity of the control system is improved; finally, through the post-signal analysis module, the signal after filtering processing can be further screened and identified, and an alarm prompt is issued when uncontrollable interference is determined, and the filtering parameters of the filtering module are updated and adjusted through the acquired data, thereby reducing possible misjudgments during subsequent filtering processing and improving system stability. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0021] Figure 1 A schematic diagram of the specific structure of a signal processing system provided in an embodiment of the present application;
[0022] Figure 2 A schematic diagram of the main control flow of a signal processing system provided in an embodiment of the present application;
[0023] Figure 3 A schematic diagram of a specific flow chart of a signal processing method provided in an embodiment of the present application;
[0024] Figure 4 A signal logic judgment flow diagram of a signal processing method provided in an embodiment of the present application;
[0025] Figure 5 A schematic diagram of the specific structure of a signal processing device provided in an embodiment of the present application;
[0026] Figure 6 A schematic diagram of the specific structure of a signal processing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0027] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions of this application will be clearly and completely described below in conjunction with the specific embodiments of this application and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0028] In order to solve the problem that existing abnormal signal identification solutions require reliance on manual diagnosis by professionals, which is time-consuming and labor-intensive, and has low processing efficiency, an embodiment of the present application provides a signal processing system and a signal processing method based on the signal processing system.
[0029] The specific structure of the signal processing system provided in the embodiment of the present application is as follows: Figure 1 As shown, it mainly includes a signal acquisition module, a front signal analysis module, a filtering module, a rear signal analysis module and a display module. Among them, the signal acquisition module is used to collect multiple original signals from the input end in real time according to the preset sampling period, and send the collected original signals to the front signal analysis module; the front signal analysis module is used to analyze and process the received original signals, and transmit the processed signals to the filtering module; the filtering module is used to filter the high and low level signals transmitted by the front signal analysis module, and transmit the filtered signals to the rear signal analysis module; the rear signal analysis module is used to determine the properties of the signal after filtering. When the rear signal analysis module receives the signal, it judges the signal type. If it is an interference signal, it adjusts the filtering parameters and sampling period corresponding to the filtering process, and continues filtering according to the updated filtering parameters and sampling period. If it is an uncontrollable interference signal, it triggers an alarm and displays it on the display module, which is convenient for manual troubleshooting.
[0030] Specifically, the main control flow of the signal processing system is as follows: Figure 2 As shown, it mainly includes the following processes:
[0031] S101, data acquisition, collecting the original signal of the input end through the signal acquisition module;
[0032] S102, signal analysis, analyzing and processing the received original signal through the pre-signal analysis module;
[0033] S103, signal filtering processing, filtering the level signal through a filtering module;
[0034] S104, determining the properties of the filtered signal, and determining the properties of the filtered signal through a post-signal analysis module;
[0035] S105, if the signal is normal, process normally;
[0036] S106, if it is an interference signal, adjusting the filtering parameters and sampling period corresponding to the filtering process;
[0037] S107, if it is an uncontrollable interference signal, an alarm is triggered and displayed on the display module to facilitate manual troubleshooting.
[0038] Based on the above signal processing system, the specific implementation flow chart of the signal processing method provided in this application is as follows: Figure 3 As shown, it mainly includes the following steps:
[0039] Step 11: After the electronic control system starts working, the signal acquisition module starts to collect the original signal of the input end according to the preset sampling period T0, and sends the collected original signal to the front signal analysis module;
[0040] Specifically, in the embodiment of the present application, the electronic control system can collect the original signal of the input end in real time within the sampling period T0 through time interruption. It should be noted here that when the signal processing system is run for the first time, the sampling period T0 is a pre-set parameter, and during the subsequent operation of the signal processing system, the sampling period T0 will be adjusted according to the change of the filtering time. The specific updating and adjustment process of the sampling period T0 is described in detail below and will not be repeated here.
[0041] Among them, the time interrupt refers to a hardware interrupt triggered by a timer or counter in the system, which is used to execute a specific task (such as the signal acquisition task in the embodiment of the present application) at a specific time interval.
[0042] In one embodiment, the electronic control system can generate periodic interrupt signals through a hardware timer (Timer / Counter) to ensure that tasks (such as signal acquisition and processing) are executed within fixed time intervals. For example, embodiments of the present application can implement time interrupts through timer overflow interrupts. By selecting the system clock (such as the CPU main frequency) as the timer clock, the timer starts counting from 0 and overflows after reaching the maximum value (such as 65535 for a 16-bit timer), triggering an interrupt. It should be noted that the above specific implementation methods of time interrupts are only exemplary, and embodiments of the present application do not limit the specific method used for time interrupts.
[0043] Step 12: performing data analysis on the original input signal acquired during the first sampling period according to the preset processing period T1 to determine whether an uncontrollable interference signal occurs during the processing period. If so, an alarm is triggered; otherwise, step 13 is executed.
[0044] It should be noted here that the processing period T1 can be set according to the conversion frequency of high and low levels in the electronic control system.
[0045] In an embodiment of the present application, the front signal analysis module can record the number of high and low level changes that occur in each processing cycle T1, the low level duration t0 (that is, the time from the signal changing from a low level to a high level until it becomes a low level again), and the high level duration t1 (that is, the time from the signal changing from a high level to a low level until it becomes a high level again).
[0046] In one embodiment, the front signal analysis module can specifically determine whether an uncontrollable interference signal appears within the processing cycle according to the following method, the method including: performing data analysis on the original signal to determine the number of high and low level changes of the original signal within the processing cycle; determining the number of clutter appearing within the processing cycle based on the number of high and low level changes (in the embodiment of the present application, the number of high and low level changes is equal to the number of clutter); when the number of clutter is greater than or equal to a preset clutter number threshold, it is determined that an uncontrollable interference signal appears within the processing cycle.
[0047] After identifying the uncontrollable interference signal, since the uncontrollable interference signal cannot be processed by the filtering module, in order to improve the system processing efficiency, the pre-signal analysis module can identify the uncontrollable interference signal before filtering processing, and intercept the uncontrollable interference signal. At the same time, an alarm will be issued through the display module, and the problem points will be displayed.
[0048] When the current signal analysis module determines that the number of clutter is less than the preset clutter number threshold, the signal can be sent to the filtering module for subsequent processing.
[0049] It should also be noted here that in addition to identifying and eliminating uncontrollable interference signals that appear during the processing cycle, the pre-signal analysis module can also dynamically update and adjust the filtering time of the signal processing system through real-time analysis of the input signal during the preset reset cycle, thereby reducing the misjudgment of the signal processing system and improving system stability.
[0050] In one embodiment, the front signal analysis module can analyze the input signal in real time within a preset reset period by the following method, thereby realizing dynamic update and adjustment of the filtering time, including: respectively determining a first high-level filtering time and a first low-level filtering time corresponding to the current filtering process;
[0051] Determine a first high-level duration corresponding to the original signal within a preset first reset period; when the first high-level duration is greater than or equal to the first high-level filtering time and less than the processing period, clear the maximum high-level duration recorded within the first reset period and re-time the first reset period; when the first high-level duration is less than the first high-level filtering time, determine the maximum high-level duration within the first reset period, update the first high-level filtering time according to the maximum high-level duration, and obtain a second high-level filtering time; determine a first low-level duration corresponding to the original signal within a preset second reset period; when the first low-level duration is greater than or equal to the first low-level filtering time and less than the processing period, clear the maximum low-level duration recorded within the second reset period and re-time the second reset period; when the first low-level duration is less than the first low-level filtering time, determine the maximum low-level duration within the second reset period, update the first low-level filtering time according to the maximum low-level duration, and obtain a second low-level filtering time.
[0052] In the embodiment of the present application, respective reset periods can be set for high-level signals and low-level signals. For example, the reset period corresponding to the high-level signal can be set as the first reset period T2ON, and the reset period corresponding to the low-level signal can be set as the second reset period T2OFF. The following details the specific analysis and processing scheme of the front signal analysis module in the first reset period T2ON and the second reset period T2OFF:
[0053] 1. First reset period T2ON:
[0054] The front signal analysis module can determine that within the set first reset cycle T2ON, the sampling high level duration t1 is used. When the high level duration t1 ≥ the first high level filtering time t3ON set by the current filtering module, and the high level duration t1 < the processing cycle T1, the reset timing is reset and the maximum high level time t recorded within the first reset cycle T2ON is cleared. 1max When the high level duration t1 is less than the first high level filter time t3ON set by the current filter module, the maximum value of the high level duration t1 within the first reset period T2ON is recorded, and the maximum value is determined as the maximum high level time t recorded within the first reset period T2ON. 1max At this time, the system is in a stable state. The system can calculate the maximum high level time t according to the recorded value. 1max Re-adjust the filter time corresponding to the filter module. The specific adjustment method is: high-level filter time t3ON=t 1max At the same time, the sampling period T0 can be updated according to the adjusted high-level filtering time. The specific updating and adjusting process of the sampling period T0 is described in detail later and will not be repeated here.
[0055] 2. Second reset period T2OFF:
[0056] The front signal analysis module can determine that within the set second reset cycle T2OFF, the sampling low level duration t0 is sampled. When the low level duration t0 ≥ the first low level filtering time t3OFF set by the current filtering module, and the low level duration t0 < the processing cycle T1, the reset timing is reset and the maximum low level time t recorded within the second reset cycle T2OFF is cleared. 0max When the low-level duration t0 is less than the first low-level filter time t3OFF set by the current filter module, the maximum value of the low-level duration t0 within the second reset period T2OFF is recorded, and the maximum value is determined as the maximum low-level time t recorded within the second reset period T2OFF. 0max At this time, the system is in a stable state. The system can calculate the maximum low level time t according to the recorded value. 0max Re-adjust the filter time corresponding to the filter module. The specific adjustment method is: low-level filter time t3OFF=t 0max At the same time, the sampling period T0 can be updated according to the adjusted low-level filtering time. The specific updating and adjusting process of the sampling period T0 is described in detail later and will not be repeated here.
[0057] Step 13: Send the original signal to the filtering module, and filter the original signal through the filtering module to obtain a filtered signal;
[0058] In an embodiment of the present application, the filtering module can repeatedly sample the signal according to preset parameters. When the low-level duration t0 of the sampled signal is greater than the low-level filtering time t3OFF, or the high-level duration t1 is greater than the high-level filtering time t3ON, the signal is judged to be valid and sent to the post-signal analysis module, otherwise it is invalid.
[0059] Step 14: the post-signal analysis module performs data analysis on the received filtered signal to determine the signal type corresponding to the filtered signal;
[0060] In an embodiment of the present application, the post-signal analysis module can determine the high-level duration and low-level duration of the filtered signal, and determine the signal type corresponding to the filtered signal based on the relationship between the high-level duration, low-level duration, filtering time, processing period T1, and uncontrollable interference duration of the filtered signal. The uncontrollable interference duration t2 is a value preset based on historical system data.
[0061] In one embodiment, the post-signal analysis module can determine the signal type corresponding to the filtered processing signal according to the following method: respectively determine the second high level duration and the second low level duration corresponding to the filtered processing signal; respectively determine the first high level filtering time and the first low level filtering time corresponding to the filtering processing; and judge whether the filtered processing signal is a normal signal based on the second high level duration, the second low level duration, the first high level filtering time, the first low level filtering time, the processing cycle and the preset uncontrollable interference duration.
[0062] Specifically, in the embodiment of the present application, the post-signal analysis module may determine the signal type corresponding to the filtered signal according to the following sub-steps, including:
[0063] Sub-step 1401, determining the sum of the second low-level duration and the first low-level filtering time t3OFF as the first filtering period;
[0064] The second low level duration refers to the low level duration of the signal after filtering, which is determined by calculating the duration of the low level after the filtered signal changes from a high level to a low level. For the sake of convenience, the second low level duration is referred to as Represents the second low level duration, then the sum of the second low level duration and the first low level filter time t3OFF can be expressed as .
[0065] Sub-step 1402, determining the sum of the second high-level duration and the first high-level filtering time t3ON as the second filtering period;
[0066] The second high level duration refers to the high level duration of the signal after filtering, which is determined by calculating the duration of the high level after the filtered signal changes from a low level to a high level. For the sake of convenience, the second high level duration is referred to as Represents the second high level duration, then the sum of the second high level duration and the first high level filtering time t3ON can be expressed as .
[0067] Sub-step 1403: determining a signal type corresponding to the filtered signal based on a relationship between the first filtering period, the second filtering period, the processing period, and a preset uncontrollable interference duration;
[0068] Sub-step 1405 , when the first filtering period is greater than the processing period or the second filtering period is greater than the processing period, determining that the filtered signal is a normal signal;
[0069] That is >T1, or >T1, it is determined that the filtered signal is a normal signal, and then step 16 is performed.
[0070] Sub-step 1406: when the first filtering period is less than the uncontrollable interference duration or the second filtering period is less than the uncontrollable interference duration, determining that the filtered signal is an interference signal;
[0071] That is < t2, or When t<t2, it is determined that the filtered signal is an interference signal, and then step 15 is performed.
[0072] Sub-step 1407: when the first filtering period is greater than the uncontrollable interference duration and the first filtering period is less than the processing period, or the second filtering period is greater than the uncontrollable interference duration and the second filtering period is less than the processing period, it is determined that the filtered processed signal is an uncontrollable interference signal.
[0073] That is ≥t2 and <T1, or ≥t2 and When <T1, it is determined that the filtered signal is an uncontrollable interference signal, and then an alarm is given through the display module, and the point where the problem exists is displayed.
[0074] Step 15: When the post-signal analysis module determines that the filtered signal is an interference signal by executing step 14, the filtering parameters and sampling period corresponding to the filtering process are adjusted, and the filtering process is continued according to the updated filtering parameters and sampling period;
[0075] It should be noted here that the signal processing system can adjust the filtering parameters according to the following method: according to the first filtering period, the low-level filtering time corresponding to the filtering process is updated to obtain a second low-level filtering time; according to the second filtering period, the high-level filtering time corresponding to the filtering process is adjusted to obtain a second high-level filtering time.
[0076] Specifically, the signal processing system may set the first filtering period Determine the second low level filtering time when performing secondary filtering processing, and set the second filtering period The second highest level filtering time is determined when performing secondary filtering processing.
[0077] It should also be noted that when the filtering time is adjusted, the sampling period also needs to be adjusted accordingly. In an embodiment of the present application, the signal processing system can update the first sampling period according to the second low-level filtering time and the second high-level filtering time to obtain the second sampling period.
[0078] In one embodiment, the signal processing system may update the sampling period according to the following sub-steps, including:
[0079] Sub-step 1501, determining a first pre-update sampling period according to a ratio of a second low-level filtering time to the number of sampling point bits;
[0080] First pre-update sampling period =Second low-level filter time / M.
[0081] Sub-step 1502, determining a second pre-update sampling period according to a ratio of the second high-level filtering time to the number of sampling point bits;
[0082] Second pre-update sampling period =Second highest level filter time / M.
[0083] Sub-step 1503 : Select the shorter period from the first pre-update sampling period and the second pre-update sampling period as the update sampling period, determine the update sampling period as the second sampling period, and continue signal sampling according to the adjusted second sampling period.
[0084] Step 16: When the post-signal analysis module determines that the filtered signal is a normal signal by executing step 14, the control system performs normal action logic processing.
[0085] In one embodiment, the signal logic judgment process when the signal processing system performs signal processing based on the above signal processing method is as follows: Figure 4 As shown, it mainly includes the following processes:
[0086] The process begins:
[0087] S201, set the sampling period T0, set the input end original signal M;
[0088] S202, setting a processing cycle T1;
[0089] S203, setting a first reset period T2ON and a second reset period T2OFF;
[0090] S204: Determine the maximum number of clutter N max , count the high level duration t1, low level duration t0, and uncontrollable interference duration t2;
[0091] S205: In the set first reset period T2ON, when the high-level duration t1 is less than the first high-level filtering time t3ON set by the current filtering module, the maximum value of the high-level duration t1 in the first reset period T2ON is recorded, and the maximum value is determined as the maximum high-level time t3ON recorded in the first reset period T2ON. 1max , and according to the maximum high level time t 1max , adjust the filter parameters and set the high level filter time t3ON to t 1max ;
[0092] S206: In the set second reset period T2OFF, when the low-level duration t0 is less than the first low-level filtering time t3OFF set by the current filtering module, the maximum value of the low-level duration t0 in the second reset period T2OFF is recorded, and the maximum value is determined as the maximum low-level time t3OFF recorded in the second reset period T2OFF. 0max , and according to the maximum high level time t 0max , adjust the filter parameters and set the low-level filter time t3OFF to t 0max ;
[0093] S207, sampling the original signal at the input end in real time according to the sampling period T0;
[0094] S208, determining the number of high and low level changes N that occur within the processing period T1;
[0095] S209, determine whether N is greater than or equal to N max ;
[0096] S210: If the result of the judgment is yes, it is determined to be an uncontrollable interference signal, an alarm is issued through the display module, and the point where the problem exists is displayed;
[0097] S211, when the judgment result is no, perform signal filtering processing;
[0098] S212, when the low level duration t0> the low level filtering time t3OFF, or the high level duration t1> the high level filtering time t3ON, the signal is judged to be valid and sent to the post-signal analysis module, otherwise it is invalid;
[0099] S213: Re-determine the high level duration of the filtered signal And the low level duration ;
[0100] S214, when >T1, or >T1, it is determined that the filtered signal is a normal signal;
[0101] S215, when < t2, or When t<t2, the filtered signal is determined to be an interference signal, the filtering parameters and sampling period corresponding to the filtering process are adjusted, and the filtering process is continued according to the updated filtering parameters and sampling period;
[0102] S216, when ≥t2 and <T1, or ≥t2 and When <T1, the filtered signal is determined to be an uncontrollable interference signal, and an alarm is issued through the display module, and the point where the problem occurs is displayed;
[0103] S217 : Update the first sampling period according to the second low-level filtering time and the second high-level filtering time to obtain a second sampling period, and continue signal sampling according to the adjusted second sampling period.
[0104] Using the signal processing method provided in the embodiment of the present application, during the operation of the electronic control system, the acquisition module will collect the original input signal of the input end according to the preset sampling period, and send the original signal collected in real time to the front signal analysis module. The front signal analysis module can perform data analysis on the original signal of the input end according to the preset processing period to determine whether an uncontrollable interference signal appears during the processing period; when it is determined that an uncontrollable interference signal appears, an alarm reminder is triggered, and these uncontrollable interference signals are screened out, thereby avoiding clutter interference that may occur during subsequent filtering processing; and when the judgment result is no, indicating that the number of clutters appearing during the processing period is low, the original signal is sent to the filtering module, and the filtering module performs filtering processing to obtain a filtered processing signal. After the filtering processing is completed, the filtered signal is passed to the post-signal analysis module, and the post-signal analysis module performs data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal. When it is determined that the filtered processing signal is an interference signal, the filtering parameters and sampling period corresponding to the filtering processing are adjusted, and the filtering processing is continued according to the updated filtering parameters and sampling period. By adopting the signal processing method provided in the embodiment of the present application, on the one hand, through real-time sampling and intelligent analysis before filtering processing, uncontrollable interference signals can be eliminated and alarm prompts can be performed, which facilitates terminal users to quickly locate and solve problems and reduces the time and difficulty of manual troubleshooting; on the other hand, through the analysis and processing of the pre-signal analysis module before filtering processing, uncontrollable interference caused by excessive number of clutter can be eliminated. At the same time, the filtering time is reduced by the reset cycle, and the response sensitivity of the control system is improved; finally, through the post-signal analysis module, the signal after filtering processing can be further screened and identified, and an alarm prompt is issued when uncontrollable interference is determined, and the filtering parameters of the filtering module are updated and adjusted through the acquired data, thereby reducing possible misjudgments during subsequent filtering processing and improving system stability.
[0105] In one embodiment, the present application also provides a signal processing device to solve the problem that the existing abnormal signal identification solution needs to rely on professionals for manual diagnosis, which is time-consuming and labor-intensive, and has low processing efficiency. The specific structural diagram of the signal processing device is as follows Figure 5 As shown, it includes: a first signal analysis unit 51, an alarm unit 52, a filtering unit 53, a second signal analysis unit 54 and a parameter adjustment unit 55.
[0106] The first signal analysis unit 51 is configured to perform data analysis on the original input signal acquired during the first sampling period according to a preset processing period, and determine whether an uncontrollable interference signal occurs during the processing period.
[0107] The alarm unit 52 is configured to trigger an alarm reminder when the judgment result obtained by the signal analysis unit 51 is yes;
[0108] The filtering unit 53 is configured to filter the original signal to obtain a filtered signal when the judgment result obtained by the signal analysis unit 51 is negative;
[0109] A second signal analysis unit 54 is configured to perform data analysis on the filtered signal to determine a signal type corresponding to the filtered signal;
[0110] The parameter adjustment unit 55 is configured to adjust the filtering parameters and sampling period corresponding to the filtering process when the second signal analysis unit 54 determines that the filtered signal is an interference signal.
[0111] In one embodiment, the first signal analysis unit 51 is specifically used to: perform data analysis on the original signal to determine the number of high and low level changes of the original signal within the processing cycle; determine the number of clutter occurring within the processing cycle based on the number of high and low level changes; when the number of clutter is greater than or equal to a preset clutter number threshold, it is determined that an uncontrollable interference signal occurs within the processing cycle.
[0112] In one embodiment, the first signal analysis unit 51 is further configured to: respectively determine a first high-level filtering time and a first low-level filtering time corresponding to the current filtering process;
[0113] Determine a first high-level duration corresponding to the original signal within a preset first reset period; when the first high-level duration is greater than or equal to the first high-level filtering time and less than the processing period, clear the maximum high-level duration recorded within the first reset period and re-time the first reset period; when the first high-level duration is less than the first high-level filtering time, determine the maximum high-level duration within the first reset period, update the first high-level filtering time according to the maximum high-level duration, and obtain a second high-level filtering time; determine a first low-level duration corresponding to the original signal within a preset second reset period; when the first low-level duration is greater than or equal to the first low-level filtering time and less than the processing period, clear the maximum low-level duration recorded within the second reset period and re-time the second reset period; when the first low-level duration is less than the first low-level filtering time, determine the maximum low-level duration within the second reset period, update the first low-level filtering time according to the maximum low-level duration, and obtain a second low-level filtering time.
[0114] In one embodiment, the second signal analysis unit 54 is specifically used to: respectively determine the second high-level duration and the second low-level duration corresponding to the filtered processing signal; respectively determine the first high-level filtering time and the first low-level filtering time corresponding to the filtering processing; and judge whether the filtered processing signal is a normal signal based on the second high-level duration, the second low-level duration, the first high-level filtering time, the first low-level filtering time, the processing cycle and the preset uncontrollable interference duration.
[0115] In one embodiment, the second signal analysis unit 54 is specifically used to: determine the sum of the second low-level duration and the first low-level filtering time as the first filtering period; determine the sum of the second high-level duration and the first high-level filtering time as the second filtering period; when the first filtering period is greater than the processing period or the second filtering period is greater than the processing period, determine that the filtered processing signal is a normal signal; when the first filtering period is less than the uncontrollable interference duration or the second filtering period is less than the uncontrollable interference duration, determine that the filtered processing signal is an interference signal; when the first filtering period is greater than or equal to the uncontrollable interference duration and the first filtering period is less than the processing period, or the second filtering period is greater than or equal to the uncontrollable interference duration and the second filtering period is less than the processing period, determine that the filtered processing signal is an uncontrollable interference signal, and trigger an alarm reminder.
[0116] In one embodiment, the parameter adjustment unit 55 is specifically configured to:
[0117] According to the first filtering cycle, the low-level filtering time corresponding to the filtering process is updated to obtain a second low-level filtering time; according to the second filtering cycle, the high-level filtering time corresponding to the filtering process is adjusted to obtain a second high-level filtering time.
[0118] In one embodiment, the method further includes an updating unit configured to update the first sampling period according to the second low-level filtering time and the second high-level filtering time to obtain a second sampling period.
[0119] In one embodiment, the update unit is specifically used to: determine a first pre-update sampling period based on the ratio of the second low-level filtering time to the number of sampling point bits; determine a second pre-update sampling period based on the ratio of the second high-level filtering time to the number of sampling point bits; and select the shorter period from the first pre-update sampling period and the second pre-update sampling period as the update sampling period, and determine the update sampling period as the second sampling period.
[0120] Using the signal processing device provided in the embodiment of the present application, during the operation of the electronic control system, the acquisition module will collect the original input signal of the input end according to the preset sampling period, and send the original signal collected in real time to the front signal analysis module. The front signal analysis module can perform data analysis on the original signal of the input end according to the preset processing period to determine whether an uncontrollable interference signal appears during the processing period; when it is determined that an uncontrollable interference signal appears, an alarm reminder is triggered, and these uncontrollable interference signals are screened out, thereby avoiding clutter interference that may occur during subsequent filtering processing; and when the judgment result is no, indicating that the number of clutters appearing during the processing period is low, the original signal is sent to the filtering module, and the filtering module performs filtering processing to obtain a filtered processing signal. After the filtering processing is completed, the filtered signal is passed to the post-signal analysis module, and the post-signal analysis module performs data analysis on the filtered processing signal to determine the signal type corresponding to the filtered processing signal. When it is determined that the filtered processing signal is an interference signal, the filtering parameters and sampling period corresponding to the filtering processing are adjusted, and the filtering processing is continued according to the updated filtering parameters and sampling period. By using the signal processing device provided in the embodiment of the present application, on the one hand, through real-time sampling and intelligent analysis before filtering processing, uncontrollable interference signals can be eliminated and alarm prompts can be performed, which facilitates terminal users to quickly locate and solve problems and reduces the time and difficulty of manual troubleshooting; on the other hand, through the analysis and processing of the pre-signal analysis module before filtering processing, uncontrollable interference caused by excessive number of clutter can be eliminated. At the same time, the filtering time is reduced by the reset cycle, and the response sensitivity of the control system is improved; finally, through the post-signal analysis module, the signal after filtering processing can be further screened and identified, and an alarm prompt can be issued when uncontrollable interference is determined, and the filtering parameters of the filtering module can be updated and adjusted through the acquired data, thereby reducing possible misjudgments during subsequent filtering processing and improving system stability.
[0121] Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present application. Figure 6 At the hardware level, the electronic device includes a processor and, optionally, an internal bus, a network interface, and memory. The memory may include internal memory, such as high-speed random-access memory (RAM), or non-volatile memory, such as at least one disk drive. Of course, the electronic device may also include other hardware required for its services.
[0122] The processor, network interface, and memory can be interconnected via an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus. The bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, Figure 6 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or one type of bus.
[0123] The memory is used to store programs. Specifically, the program may include program code, which includes computer operating instructions. The memory may include internal memory and non-volatile memory, and provides instructions and data to the processor.
[0124] The processor reads the corresponding computer program from the non-volatile memory into the internal memory and then runs it, forming a signal processing device at the logical level. The processor executes the program stored in the memory and is specifically used to perform the following operations:
[0125] According to the preset processing cycle, data analysis is performed on the original signal at the input end obtained in the first sampling cycle to determine whether an uncontrollable interference signal appears in the processing cycle; when the judgment result is yes, an alarm reminder is triggered; when the judgment result is no, the original signal is filtered to obtain a filtered processing signal; data analysis is performed on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, the filtering parameters and sampling cycle corresponding to the filtering processing are adjusted, and the filtering processing is continued according to the updated filtering parameters and sampling cycle.
[0126] The above application Figure 6The methods performed by the signal processing electronic device disclosed in the illustrated embodiments can be applied to or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be performed by hardware integrated logic circuits within the processor or by software instructions. The processor may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules within the decoding processor. The software module can be located in a storage medium well-known in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.
[0127] Of course, in addition to software implementation, the electronic device of this application does not exclude other implementation methods, such as logic devices or a combination of software and hardware, etc. That is to say, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.
[0128] The embodiment of the present application also provides a computer-readable storage medium, which stores one or more programs, wherein the one or more programs include instructions, which, when executed by a portable electronic device including multiple application programs, can enable the portable electronic device to execute Figure 3 The method of the embodiment shown is specifically used to perform the following operations:
[0129] According to the preset processing cycle, data analysis is performed on the original signal at the input end obtained in the first sampling cycle to determine whether an uncontrollable interference signal appears in the processing cycle; when the judgment result is yes, an alarm reminder is triggered; when the judgment result is no, the original signal is filtered to obtain a filtered processing signal; data analysis is performed on the filtered processing signal to determine the signal type corresponding to the filtered processing signal; when it is determined that the filtered processing signal is an interference signal, the filtering parameters and sampling cycle corresponding to the filtering processing are adjusted, and the filtering processing is continued according to the updated filtering parameters and sampling cycle.
[0130] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0131] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0132] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0133] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0134] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.
[0135] Memory may include non-permanent storage in a computer-readable medium, in the form of random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.
[0136] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can be implemented using any method or technology to store information. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change RAM (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media such as modulated data signals and carrier waves.
[0137] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0138] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0139] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.
Claims
1. A signal processing method, characterized in that: include: According to a preset processing cycle, performing data analysis on the original input signal obtained in the first sampling cycle to determine whether an uncontrollable interference signal occurs in the processing cycle; When the judgment result is yes, an alarm reminder is triggered; When the judgment result is no, filtering the original signal to obtain a filtered signal; performing data analysis on the filtered signal to determine a signal type corresponding to the filtered signal; When it is determined that the filtered signal is an interference signal, the filtering parameters and sampling period corresponding to the filtering process are adjusted, and the filtering process is continued according to the updated filtering parameters and sampling period; When it is determined that the filtered signal is a normal signal, the control system performs normal action logic processing; The data analysis of the acquired input original signal according to the preset processing cycle includes: respectively determining a first high-level filtering time and a first low-level filtering time corresponding to the current filtering process; determining a first high-level duration corresponding to the original signal within a preset first reset period; when the first high-level duration is greater than or equal to the first high-level filtering time and is less than the processing period, clearing a maximum high-level duration recorded within the first reset period and retiming the first reset period; and when the first high-level duration is less than the first high-level filtering time, determining a maximum high-level duration within the first reset period, updating the first high-level filtering time according to the maximum high-level duration to obtain a second high-level filtering time; Determine a first low-level duration corresponding to the original signal within a preset second reset cycle; when the first low-level duration is greater than or equal to the first low-level filtering time, and the first low-level duration is less than the processing cycle, clear the maximum low-level duration recorded within the second reset cycle, and retime the second reset cycle; when the first low-level duration is less than the first low-level filtering time, determine the maximum low-level duration within the second reset cycle, update the first low-level filtering time according to the maximum low-level duration, and obtain a second low-level filtering time.
2. The method according to claim 1, characterized in that The step of performing data analysis on the original input signal acquired according to the preset processing cycle to determine whether an uncontrollable interference signal occurs within the processing cycle specifically includes: Performing data analysis on the original signal to determine the number of high and low level changes of the original signal occurring within the processing period; Determining the number of clutters that occur within the processing cycle based on the number of high and low level changes; When the number of clutter occurrences is greater than or equal to a preset clutter number threshold, it is determined that an uncontrollable interference signal occurs within the processing period.
3. The method according to claim 1, characterized in that The performing data analysis on the filtered signal to determine the signal type corresponding to the filtered signal specifically includes: respectively determining a second high-level duration and a second low-level duration corresponding to the filtered signal; respectively determining a first high-level filtering time and a first low-level filtering time corresponding to the filtering process; Whether the filtered signal is a normal signal is determined according to the second high level duration, the second low level duration, the first high level filtering time, the first low level filtering time, the processing cycle, and a preset uncontrollable interference duration.
4. The method according to claim 3, characterized in that The determining, according to the second high level duration, the second low level duration, the first high level filtering time, the first low level filtering time, the processing cycle, and the preset uncontrollable interference duration, of a signal type corresponding to the filtered signal specifically includes: determining a sum of the second low-level duration and the first low-level filtering time as a first filtering period; determining a sum of the second high-level duration and the first high-level filtering time as a second filtering period; When the first filtering period is greater than the processing period or the second filtering period is greater than the processing period, determining that the filtered signal is a normal signal; When the first filtering period is less than the uncontrollable interference duration or the second filtering period is less than the uncontrollable interference duration, determining that the filtered signal is an interference signal; When the first filtering period is greater than or equal to the uncontrollable interference duration and the first filtering period is less than the processing period, or the second filtering period is greater than or equal to the uncontrollable interference duration and the second filtering period is less than the processing period, the filtered processing signal is determined to be an uncontrollable interference signal, and an alarm is triggered.
5. The method according to claim 4, characterized in that The adjusting of the filtering parameters corresponding to the filtering process specifically includes: updating the low-level filtering time corresponding to the filtering process according to the first filtering cycle to obtain a second low-level filtering time; According to the second filtering period, the high-level filtering time corresponding to the filtering process is adjusted to obtain a second high-level filtering time.
6. The method according to any one of claims 1 or 5, characterized in that: Also includes: The first sampling period is updated according to the second low-level filtering time and the second high-level filtering time to obtain a second sampling period.
7. The method according to claim 6, characterized in that The updating of the first sampling period according to the second low-level filtering time and the second high-level filtering time to obtain a second sampling period specifically includes: determining a first pre-update sampling period according to a ratio of the second low-level filtering time to the number of sampling point bits; determining a second pre-update sampling period according to a ratio of the second high-level filtering time to the number of sampling point bits; From the first pre-update sampling period and the second pre-update sampling period, the shorter period is selected as the update sampling period, and the update sampling period is determined as the second sampling period.
8. A signal processing device, characterized in that: include: a first signal analysis unit, configured to perform data analysis on an original input signal acquired during a first sampling period according to a preset processing period, and determine whether an uncontrollable interference signal occurs during the processing period; An alarm unit is used to trigger an alarm reminder when the judgment result obtained by the signal analysis unit is yes; a filtering unit, configured to filter the original signal to obtain a filtered signal when the judgment result obtained by the signal analysis unit is negative; a second signal analysis unit, configured to perform data analysis on the filtered signal to determine a signal type corresponding to the filtered signal; a parameter adjustment unit, configured to adjust the filtering parameters and sampling period corresponding to the filtering process when it is determined that the filtered signal is an interference signal; an execution unit, configured to control the system to perform normal action logic processing when determining that the filtered processed signal is a normal signal; The first signal analysis unit is further configured to respectively determine a first high-level filtering time and a first low-level filtering time corresponding to the current filtering process; determining a first high-level duration corresponding to the original signal within a preset first reset period; when the first high-level duration is greater than or equal to the first high-level filtering time and is less than the processing period, clearing a maximum high-level duration recorded within the first reset period and retiming the first reset period; and when the first high-level duration is less than the first high-level filtering time, determining a maximum high-level duration within the first reset period, updating the first high-level filtering time according to the maximum high-level duration to obtain a second high-level filtering time; Determine a first low-level duration corresponding to the original signal within a preset second reset cycle; when the first low-level duration is greater than or equal to the first low-level filtering time, and the first low-level duration is less than the processing cycle, clear the maximum low-level duration recorded within the second reset cycle, and retime the second reset cycle; when the first low-level duration is less than the first low-level filtering time, determine the maximum low-level duration within the second reset cycle, update the first low-level filtering time according to the maximum low-level duration, and obtain a second low-level filtering time.
9. A signal processing device, characterized in that include: processor; as well as a memory arranged to store computer-executable instructions which, when executed, cause the processor to: According to a preset processing cycle, performing data analysis on the original input signal obtained in the first sampling cycle to determine whether an uncontrollable interference signal occurs in the processing cycle; When the judgment result is yes, an alarm reminder is triggered; When the judgment result is no, filtering the original signal to obtain a filtered signal; performing data analysis on the filtered signal to determine a signal type corresponding to the filtered signal; When it is determined that the filtered signal is an interference signal, the filtering parameters and sampling period corresponding to the filtering process are adjusted, and the filtering process is continued according to the updated filtering parameters and sampling period; When it is determined that the filtered signal is a normal signal, the control system performs normal action logic processing; The data analysis of the acquired input original signal according to the preset processing cycle includes: respectively determining a first high-level filtering time and a first low-level filtering time corresponding to the current filtering process; determining a first high-level duration corresponding to the original signal within a preset first reset period; when the first high-level duration is greater than or equal to the first high-level filtering time and is less than the processing period, clearing a maximum high-level duration recorded within the first reset period and retiming the first reset period; and when the first high-level duration is less than the first high-level filtering time, determining a maximum high-level duration within the first reset period, updating the first high-level filtering time according to the maximum high-level duration to obtain a second high-level filtering time; Determine a first low-level duration corresponding to the original signal within a preset second reset cycle; when the first low-level duration is greater than or equal to the first low-level filtering time, and the first low-level duration is less than the processing cycle, clear the maximum low-level duration recorded within the second reset cycle, and retime the second reset cycle; when the first low-level duration is less than the first low-level filtering time, determine the maximum low-level duration within the second reset cycle, update the first low-level filtering time according to the maximum low-level duration, and obtain a second low-level filtering time.
10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores one or more programs, which, when executed by an electronic device including a plurality of application programs, enable the electronic device to perform the signal processing method according to any one of claims 1 to 7.
11. A computer program product, characterized in that The invention comprises a computer program, which implements the signal processing method according to any one of claims 1 to 7 when executed by a processor.
Citation Information
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Intelligent detection system and method for consumer electronic functional device
CN118980870A