Selective passivation contact heterojunction battery and preparation method thereof

Abstract

The invention belongs to the technical field of solar cells, and provides a selective passivation contact heterojunction cell and a preparation method thereof, and the preparation method comprises the steps: forming a patterned local contact part on at least one side surface of a silicon substrate; the local contact part comprises a first contact layer and a second contact layer made of an amorphous silicon-based material, preparing a passivation layer and a doping layer on the front surface and the back surface, opening the local contact part through laser etching, and crystallizing the second contact layer; according to the invention, at least one side of the obtained cell is provided with two contact structures with different conductivity and passivation capability, and a scheme of matching local contact with local laser selective crystallization is adopted, so that a high-temperature process is effectively avoided, and the passivation effect of a non-grid line shielding region is not influenced; and the reduction of the contact resistance of the grid line shielding region also greatly improves the transmission and collection of current carriers, and the conversion efficiency of the heterojunction solar cell is effectively improved.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cells and relates to a selectively passivated contact heterojunction cell and a preparation method thereof. Background Art

[0002] Heterojunction solar cells have attracted widespread attention due to their high opening voltage and high conversion efficiency. Conventional heterojunction solar cells have a double-sided symmetrical film structure by forming an intrinsic amorphous silicon layer, a doped silicon layer (such as a doped microcrystalline silicon layer), a transparent conductive layer and a metal electrode on the front and back of a silicon wafer, which can bring about a good passivation effect.

[0003] However, the poor conductivity of intrinsic amorphous silicon film greatly limits the transport and collection of carriers. Compared with the TOPcon cell structure that currently dominates the market, the contact resistance of the passivation contact structure of heterojunction solar cells is usually between 20 and 100 mΩ·cm. 2 , which is an order of magnitude higher than the contact resistance of the TOPcon cell passivation contact, which hinders the further improvement of the conversion efficiency of heterojunction solar cells. In addition, the temperature sensitivity of amorphous silicon requires that the process temperature of each process of heterojunction solar cells must be lower than 250°C, while doped microcrystalline silicon usually requires a higher temperature to achieve a good crystallization rate and doping. This process contradiction further affects the contact resistance and selectivity of the passivation contact structure in the heterojunction cell.

[0004] In order to make up for the disadvantages of the transmission of the passivation contact structure, the heterojunction solar cells in the prior art usually need to deposit transparent conductive materials with good conductivity on both sides and adopt a metallization process with high wet weight and low resistance. As we all know, the average cost of electricity is the most critical indicator affecting the development of photovoltaic technology. The indium-based transparent conductive materials and metallization pastes with high silver content used in a large number of heterojunction solar cells have resulted in high non-silicon costs, which limit the cost reduction space and competitiveness of heterojunction cells, and are also not conducive to their sustainable development.

[0005] From the above, it can be seen that whether from the perspective of continuous breakthroughs in battery conversion efficiency or the ever-increasing need for cost reduction, heterojunction solar cells are required to adopt a passivation contact structure with better conductivity. Summary of the invention

[0006] In view of the problems existing in the prior art, the purpose of the present invention is to provide a heterojunction battery with selective passivation contact and a preparation method thereof, the preparation method comprising first forming a patterned local contact portion on at least one side surface of a silicon substrate, the local contact portion comprising a first contact layer and a second contact layer composed of an amorphous silicon-based material, and then preparing a passivation layer and a doping layer on the front and back sides, and then opening the local contact portion and crystallizing the second contact layer through a laser etching process; the present invention enables at least one side of the obtained battery to have two contact structures with different conductivity and passivation ability, and the use of a local contact combined with a local laser selective crystallization scheme effectively avoids high-temperature processes, ensuring that the passivation effect of the non-gate line blocking area is not affected, and the reduction of the contact resistance in the gate line blocking area also greatly improves the transmission and collection of carriers, thereby improving the conversion efficiency of the heterojunction solar cell.

[0007] To achieve this object, the present invention adopts the following technical solutions:

[0008] In a first aspect, the present invention provides a method for preparing a heterojunction battery with selective passivation contact, the preparation method comprising the following steps:

[0009] Step S10: providing a silicon substrate;

[0010] Step S20: forming a patterned local contact portion on the front side and / or the back side of the silicon substrate, wherein the patterned local contact portion comprises a first contact layer having a passivation effect and a second contact layer composed of an amorphous silicon-based material;

[0011] Step S30: forming a passivation layer and a doping layer on both the front and back sides of the silicon substrate; and the doping conductivity type of the doping layer on the front side is opposite to that of the doping layer on the back side;

[0012] Step S40: performing a first laser etching on one side of the silicon substrate where the local contact portion is formed, removing the passivation layer and the doping layer covering the local contact portion, forming an opening, exposing the second contact layer in the local contact portion, and performing laser crystallization on the exposed portion of the second contact layer;

[0013] Step S50: forming transparent conductive layers on the front and back sides of the silicon substrate respectively, wherein the transparent conductive layer on the side having the local contact portion fills the opening and is electrically connected to the local contact portion;

[0014] Step S60: forming electrodes on the transparent conductive layer on the front and back sides of the silicon substrate; in a projection direction perpendicular to the horizontal plane, the electrodes at least partially overlap with the local contact portion after the laser crystallization process.

[0015] The preparation method of the present invention effectively improves the crystallization rate and effective doping efficiency of the second contact layer in the local contact portion by forming the local contact portion and cooperating with laser selective crystallization. The local contact portion after laser selective crystallization becomes a carrier efficient collection area, which effectively improves the carrier mobility and greatly reduces the contact resistance of the area, so that the series resistance of the heterojunction battery is greatly improved. Therefore, the preparation chooses to form electrode grid lines on the local contact portion after laser selective crystallization, that is, the grid line shielding area (the area covered under the electrode grid line) is to overlap with the efficient collection area, so the prepared electrode is to overlap at least partially with the local contact portion after laser crystallization.

[0016] At the same time, the laser selective crystallization in the preparation method is connected with the laser etching process, and the high energy provided by the laser is used to realize the transformation of the second contact layer from the amorphous silicon-based material with a crystallization rate of 0% to the crystallization, and at the same time, the effect of enhanced doping is achieved, so that the doped amorphous silicon in this area is rapidly crystallized in a very short time. There is no need to form a doped microcrystalline silicon layer or a doped polycrystalline silicon layer through traditional processes such as high-temperature annealing and other heat treatments in the prior art, so the process is simpler and the impact on passivation is effectively reduced.

[0017] In addition, due to the reduction in contact resistance of the local contact part after laser selective crystallization, the transmission and collection of carriers are greatly improved, and the conversion efficiency of heterojunction solar cells is improved. The improvement in resistance also reduces the requirements of heterojunction solar cells for transparent conductive layers and metallization, and can use lower-cost non-indium-based transparent conductive materials and metallization pastes with lower silver content, thus providing greater room for cost reduction in electricity costs.

[0018] It can be understood that on the side of the silicon substrate where the patterned local contact portion is formed, a passivation layer and a doping layer are subsequently formed on the surface of the silicon substrate not covered by the local contact portion, which plays a better role in light-transmitting passivation and is the main part of the non-gate line shielding area. Relative to this area, the light transmittance of the local contact portion after laser selective crystallization is relatively poor, but the conductivity is better, and the carrier collection and transmission effect is better. Therefore, the side of the battery with the local contact actually has two different passivation contact structures,

[0019] It should be noted that, for those skilled in the art, it can be understood that the front side of the silicon substrate generally refers to the light-incoming side, and the back side generally refers to the backlight side; the opposite doping conductivity types refer to the n-type and p-type that are opposite to each other. For example, the doping layer on the front side is n-type, and the doping layer on the back side is p-type, or the doping layer on the front side is p-type, and the doping layer on the back side is n-type.

[0020] It should also be noted that the present invention does not limit the specific preparation order of the passivation layer and the doping layer on the front and back sides in step S30, and can be reasonably adjusted according to actual conditions. For example, one formation method is to first form a passivation layer on the back side, then form a passivation layer on the front side, then form a doping layer on the front side, and finally form a doping layer on the back side.

[0021] The following are preferred technical solutions of the present invention, but are not intended to be limitations of the technical solutions provided by the present invention. Through the following technical solutions, the technical objectives and beneficial effects of the present invention can be better achieved and realized.

[0022] As a preferred technical solution of the present invention, in the projection direction perpendicular to the horizontal plane, the front and / or back electrodes having the local contact portion do not exceed the edge of the corresponding local contact portion; the width of the opening is less than or equal to the width of the local contact portion.

[0023] In the present invention, when forming an opening, the laser etching process can choose to remove only the portion of the passivation layer and the contact layer covering the local contact portion. At this time, the width of the opening is smaller than the width of the local contact portion. Moreover, at this time, the subsequent laser selective crystallization is only performed on the portion of the second contact layer exposed in the opening. The second contact layer may retain a portion that is not crystallized and is still an amorphous silicon-based material, and an electrode may not be formed above this portion. However, it is preferred that the electrode does not extend beyond the edge of the local contact portion to prevent it from covering the passivation layer and the doping layer on the front or back side and affecting light transmission.

[0024] As a preferred technical solution of the present invention, step S20 includes:

[0025] Step S21: forming a first contact layer having a passivation effect and a second contact layer made of an amorphous silicon-based material on the front side and / or the back side of the silicon substrate;

[0026] Step S22: forming a first mask layer and a second mask layer on the second contact layer;

[0027] Step S23: performing a second laser etching on the second mask layer to form a patterned second mask layer;

[0028] Step S24: using the patterned second mask layer as a mask, performing a first wet etching on the first mask layer to form a patterned first mask layer;

[0029] Step S25: using the patterned first mask and the patterned second mask as masks, performing a second wet etching on the first contact layer and the second contact layer to form a patterned local contact portion.

[0030] In the preparation method described in the present invention, when preparing the local contact portion, a specific "double mask" method is preferably used, by setting two mask layers, and only laser etching the second mask layer on top, and then using the patterned second mask layer as a mask for the first mask layer to prepare a patterned first mask layer, and then using the patterned first mask layer as a mask (the second mask layer is not removed at this time), so that the patterned local contact portion can be obtained by wet etching in the subsequent process, while avoiding the influence and damage caused by directly using laser to perform laser windowing on the first mask layer, the second contact layer and the first contact layer.

[0031] As a preferred technical solution of the present invention, in step S25, the second wet etching also removes the patterned second mask layer simultaneously.

[0032] Preferably, the second wet etching is alkaline etching.

[0033] Preferably, the material of the second mask layer includes an amorphous silicon-based material.

[0034] As a preferred technical solution of the present invention, the step S20 further includes a step S26: performing a third wet etching to remove the patterned first mask layer to expose the patterned local contact portion;

[0035] Preferably, the first wet etching and the third wet etching are both acid etching.

[0036] Preferably, the material of the first mask layer includes silicon nitride.

[0037] As a preferred technical solution of the present invention, step S20 includes:

[0038] Step S21': Covering the front side and / or the back side of the silicon substrate with a patterned mask;

[0039] Step S22': depositing the first contact layer and the second contact layer in the area not covered by the patterned mask;

[0040] Step S23 ′: removing the patterned mask to obtain a patterned local contact portion.

[0041] In the preparation method of the present invention, when preparing the local contact portion, a patterned mask may be directly provided, and then a film layer required for the local contact portion may be directly deposited, and then the patterned mask may be removed to obtain the patterned local contact portion.

[0042] As a preferred technical solution of the present invention, the material of the first contact layer is an intrinsic amorphous silicon material or a silicon oxide material.

[0043] In the present invention, the first contact layer may be silicon oxide (SiO 2 ) material, which has stronger absorption of laser light and can promote uniform heating of the second contact layer to crystallize it during laser selective crystallization.

[0044] Preferably, the second contact layer is doped, and the doping conductivity type is the same as the doping conductivity type of the doping layer on one side of the silicon substrate.

[0045] Preferably, before the laser crystallization process, the effective doping concentration of the second contact layer is 1×10 15 ~8×10 15 / cm 3 ;

[0046] Preferably, the second contact layer after laser crystallization is transformed from an amorphous silicon-based material into a microcrystalline silicon-based material or a polycrystalline silicon-based material, and the effective doping concentration is 4×10 20 / cm 3 ~7×10 20 / cm 3 ; The crystallization rate is 50% to 90%.

[0047] As a preferred technical solution of the present invention, in step S40, the conditions of the laser etching process and the laser crystallization treatment include: the laser wavelength is 300-600nm; the laser pulse width is picoseconds, the laser frequency is 200-400Hz, and the laser power is 15-45W.

[0048] As a preferred technical solution of the present invention, the material of the doping layer is any one of an amorphous silicon-based material, a microcrystalline silicon-based material or a nanocrystalline silicon-based material; the effective doping concentration of the doping layer is 2×10 19 ~7×10 19 / cm 3 , the crystallization rate is 30% to 70%;

[0049] Preferably, the material of the doped layer on the front side is also doped with oxygen;

[0050] Preferably, the material of the passivation layer includes intrinsic amorphous silicon material.

[0051] In a second aspect, the present invention provides a selectively transport enhanced passivated contact heterojunction battery, which is prepared according to the preparation method described in the first aspect.

[0052] Compared with the prior art solutions, the present invention has at least the following beneficial effects:

[0053] The preparation method described in the present invention comprises first forming a patterned local contact portion on at least one side surface of a silicon substrate, wherein the local contact portion comprises a first contact layer and a second contact layer composed of an amorphous silicon-based material, and then preparing a passivation layer and a doping layer on the front and back sides, and then opening the local contact portion and crystallizing the second contact layer through a laser etching process; the present invention enables at least one side of the obtained battery to have two contact structures with different conductivity and passivation capabilities, and the use of a local contact combined with a local laser selective crystallization scheme effectively avoids high-temperature processes, ensuring that the passivation effect of the non-gate line blocking area is not affected, and the reduction of the contact resistance in the gate line blocking area also greatly improves the transmission and collection of carriers, thereby improving the conversion efficiency of heterojunction solar cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 It is a schematic diagram of the structure formed after step S10 in the preparation method of Example 1.

[0055] Figure 2 It is a schematic diagram of the structure formed after step S21 in the preparation method of Example 1.

[0056] Figure 3 It is a schematic diagram of the structure formed after step S22 in the preparation method of Example 1.

[0057] Figure 4 It is a schematic diagram of the structure formed after step S23 in the preparation method of Example 1.

[0058] Figure 5 It is a schematic diagram of the structure formed after step S24 in the preparation method of Example 1.

[0059] Figure 6 It is a schematic diagram of the structure formed after step S25 in the preparation method of Example 1.

[0060] Figure 7 It is a schematic diagram of the structure formed after step S26 in the preparation method of Example 1.

[0061] Figure 8 It is a schematic diagram of the structure formed after step S30 in the preparation method of Example 1.

[0062] Fig. 9 It is a schematic diagram of the structure formed after step S40 in the preparation method of Example 1.

[0063] Fig.10 It is a schematic diagram of the structure formed after step S50 in the preparation method of Example 1.

[0064] Fig.11It is a schematic structural diagram of a heterojunction battery with selective passivation contact obtained after step S60 in the preparation method of Example 1.

[0065] Fig.12 It is a schematic diagram of the structure of the heterojunction battery with selective passivation contact obtained in Example 4.

[0066] Fig.13 It is a schematic diagram of the structure of the heterojunction battery with selective passivation contact obtained in Example 5.

[0067] In the figure: 1-silicon substrate, 2-first front contact layer, 3-second front contact layer, 4-first front mask layer, 5-second front mask layer, 6-back passivation layer, 7-back doping layer, 8-front passivation layer, 9-front doping layer, 10-crystallized part of the second front contact layer, 11-front transparent conductive layer, 12-back transparent conductive layer, 13-front electrode, 14-back electrode, 15-first back contact layer, 16-back second contact layer, 17-crystallized part of the second back contact layer. DETAILED DESCRIPTION

[0068] The technical solution of the present invention is further illustrated below through specific implementation methods.

[0069] It should be clear to those skilled in the art that the embodiments are only intended to help understand the present invention and should not be considered as specific limitations of the present invention.

[0070] In some specific embodiments, the present invention provides a method for preparing a heterojunction battery with selective passivation contact, the preparation method comprising the following steps:

[0071] Step S10: providing a silicon substrate;

[0072] Step S20: forming a patterned local contact portion on the front side and / or the back side of the silicon substrate, wherein the patterned local contact portion comprises a first contact layer having a passivation effect and a second contact layer composed of an amorphous silicon-based material;

[0073] Step S30: forming a passivation layer and a doping layer on both the front and back sides of the silicon substrate; and the doping conductivity type of the doping layer on the front side is opposite to that of the doping layer on the back side;

[0074] Step S40: performing a first laser etching on one side of the silicon substrate where the local contact portion is formed, removing the passivation layer and the doping layer covering the local contact portion, forming an opening, exposing the second contact layer in the local contact portion, and performing laser crystallization on the exposed portion of the second contact layer;

[0075] Step S50: forming transparent conductive layers on the front and back sides of the silicon substrate respectively, wherein the transparent conductive layer on the side having the local contact portion fills the opening and is electrically connected to the local contact portion;

[0076] Step S60: forming electrodes on the transparent conductive layer on the front and back sides of the silicon substrate; in a projection direction perpendicular to the horizontal plane, the electrodes at least partially overlap with the local contact portion after the laser crystallization process.

[0077] In one embodiment, the front side of the silicon substrate is a light incident side, and the back side is a backlight side.

[0078] In one embodiment, the doping layer on the front side is n-type, and the doping layer on the back side is p-type; or, the doping layer on the front side is p-type, and the doping layer on the back side is n-type.

[0079] In one embodiment, in step S30 , a back passivation layer is first formed, then a front passivation layer is formed, then a front doping layer is formed, and finally a back doping layer is formed.

[0080] In one embodiment, preferably, in the projection direction perpendicular to the horizontal plane, the front and / or back electrodes having the local contact portion do not extend beyond the edge of the corresponding local contact portion; the width of the opening is less than or equal to the width of the local contact portion, thereby reducing damage to the substrate during laser processing.

[0081] In one embodiment, step S20 includes:

[0082] Step S21: forming a first contact layer having a passivation effect and a second contact layer made of an amorphous silicon-based material on the front side and / or the back side of the silicon substrate;

[0083] Step S22: forming a first mask layer and a second mask layer on the second contact layer;

[0084] Step S23: performing a second laser etching on the second mask layer to form a patterned second mask layer;

[0085] Step S24: using the patterned second mask layer as a mask, performing a first wet etching on the first mask layer to form a patterned first mask layer;

[0086] Step S25: using the patterned first mask and the patterned second mask as masks, performing a second wet etching on the first contact layer and the second contact layer to form a patterned local contact portion.

[0087] In one embodiment, in step S25, the second wet etching also removes the patterned second mask layer simultaneously.

[0088] In one embodiment, the second wet etching is alkaline etching.

[0089] In one embodiment, the material of the second mask layer includes an amorphous silicon-based material.

[0090] In one embodiment, the second mask layer is an intrinsic amorphous silicon layer, the thickness of the intrinsic amorphous silicon layer is 5 to 30 nm, for example, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 23 nm, 25 nm, 28 nm or 30 nm, and the refractive index is 3.70 to 4.30, for example, 3.70, 3.80, 3.90, 4.00, 4.10, 4.20 or 4.30; the intrinsic amorphous silicon layer is prepared by PECVD deposition.

[0091] In one embodiment, the step S20 further includes a step S26: performing a third wet etching to remove the patterned first mask layer to expose the patterned local contact portion;

[0092] In one embodiment, the first wet etching and the third wet etching are both acid etching.

[0093] In one embodiment, the acid etching includes cleaning with a hydrofluoric acid (HF) solution.

[0094] In one embodiment, the material of the first mask layer includes silicon nitride (SiN).

[0095] In one embodiment, the silicon nitride has a thickness of 30 to 120 nm, for example, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or 120 nm, and a refractive index of 1.50 to 2.50, for example, 1.50, 1.60, 1.70, 1.80, 1.90, 2.00, 2.10, 2.20, 2.30, 2.40 or 2.50, etc.; and the silicon nitride is prepared by PECVD deposition.

[0096] In one embodiment, in step S23, the conditions for the second laser etching include: a laser wavelength of 300 to 600 nm, for example, 300 nm, 330 nm, 350 nm, 380 nm, 400 nm, 420 nm, 450 nm, 480 nm, 500 nm, 520 nm, 550 nm, 580 nm or 600 nm, etc., preferably a 532 nm picosecond laser; a laser power of 5 to 20 W, for example, 5 W, 8 W, 10 W, 12 W, 14 W, 16 W, 18 W or 20 W, etc.

[0097] In one embodiment, step S20 includes:

[0098] Step S21': Covering the front side and / or the back side of the silicon substrate with a patterned mask;

[0099] Step S22': depositing the first contact layer and the second contact layer in the area not covered by the patterned mask;

[0100] Step S23 ′: removing the patterned mask to obtain a patterned local contact portion.

[0101] In one embodiment, the material of the first contact layer is an intrinsic amorphous silicon material or a silicon oxide material.

[0102] In one embodiment, the first contact layer is an intrinsic amorphous silicon layer, and the thickness of the intrinsic amorphous silicon layer is 4 to 12 nm, for example, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm or 12 nm; the intrinsic amorphous silicon layer is prepared by PECVD deposition.

[0103] In one embodiment, preferably, the first contact layer is a silicon oxide layer, and the thickness of the silicon oxide layer is 0.5 to 2 nm, for example, 0.5 nm, 0.8 nm, 1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm or 2 nm, etc.; silicon oxide as an intrinsic layer can provide excellent chemical passivation; the silicon oxide layer is prepared by PECVD deposition.

[0104] In one embodiment, preferably, the second contact layer is doped, and the doping conductivity type is the same as the doping conductivity type of the doping layer on one side of the silicon substrate, so as to improve the transmission and contact of carriers.

[0105] In one embodiment, before the laser crystallization process, the effective doping concentration of the second contact layer is 1×10 15 ~8×10 15 / cm 3 ;

[0106] In one embodiment, the second contact layer after laser crystallization is transformed from an amorphous silicon-based material into a microcrystalline silicon-based material or a polycrystalline silicon-based material, and the effective doping concentration is 4×10 20 / cm 3 ~7×10 20 / cm 3 ; The crystallization rate is 50% to 90%.

[0107] In one embodiment, the thickness of the second contact layer is 40 to 300 nm, for example, 40 nm, 60 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 220 nm, 240 nm, 260 nm, 280 nm or 300 nm, and preferably 50 to 200 nm.

[0108] In one embodiment, in step S40, the conditions of the laser etching process and the laser crystallization treatment include: a laser wavelength of 300 to 600 nm, for example, 300 nm, 330 nm, 350 nm, 380 nm, 400 nm, 420 nm, 450 nm, 480 nm, 500 nm, 520 nm, 550 nm, 580 nm or 600 nm; a laser pulse width of picoseconds; a laser frequency of 200 to 400 Hz, for example, 200 Hz, 230 Hz, 250 Hz, 280 Hz, 300 Hz, 320 Hz, 350 Hz, 380 Hz or 400 Hz; a laser power of 15 to 45 W, for example, 15 W, 18 W, 20 W, 22 W, 25 W, 28 W, 30 W, 32 W, 35 W, 38 W, 40 W, 42 W or 45 W; preferably a 532 nm picosecond laser.

[0109] In one embodiment, the material of the doping layer is any one of an amorphous silicon-based material, a microcrystalline silicon-based material or a nanocrystalline silicon-based material; the effective doping concentration of the doping layer is 2×10 19 ~7×10 19 / cm 3 , the crystallization rate is 30% to 70%;

[0110] In one embodiment, the material of the doping layer on the front side is also doped with oxygen.

[0111] In one embodiment, the thickness of the doping layer on the front side is 15 to 30 nm, for example, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, 25 nm, 26 nm, 27 nm, 28 nm, 29 nm or 30 nm.

[0112] In one embodiment, the thickness of the doping layer on the back side is 20 to 45 nm, for example, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, 30 nm, 32 nm, 34 nm, 36 nm, 38 nm, 40 nm, 4 nm, 42 nm, 43 nm, 44 nm or 45 nm.

[0113] In one embodiment, the material of the passivation layer includes intrinsic amorphous silicon material.

[0114] In one embodiment, the thickness of the passivation layer is 4 to 10 nm, for example, 5 nm, 5.3 nm, 5.5 nm, 5.8 nm, 6 nm, 6.3 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm or 8 nm, etc.; the passivation layer is prepared by PECVD deposition.

[0115] In one embodiment, the transparent conductive layer has a thickness of 70 to 120 nm, for example, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm or 120 nm.

[0116] In one embodiment, the target material for preparing the transparent conductive layer includes indium oxide and tin oxide.

[0117] In one embodiment, the method of forming the electrode comprises screen printing.

[0118] In one embodiment, the silicon substrate is a double-sided textured silicon substrate or a single-sided textured silicon substrate.

[0119] In some specific embodiments, the present invention provides a selectively transport enhanced passivated contact heterojunction battery, which is prepared according to the preparation method described in the above embodiment.

[0120] It should be noted that the present invention does not exhaustively list specific point values ​​applicable in all embodiments, but is not limited to the listed values, and other unlisted values ​​within the above numerical range are also applicable.

[0121] Example 1

[0122] This embodiment provides a method for preparing a heterojunction battery with selective passivation contact, the preparation method comprising the following steps:

[0123] Step S10: Figure 1 , providing a silicon substrate 1; the silicon substrate 1 is an N-type silicon substrate 1, having a front side (light incident side) and a back side (backlight side) opposite to each other; the front side and the back side are both formed by pyramid texturing to form a texturing surface;

[0124] Step S20: forming a patterned local contact portion on the front side of the silicon substrate, specifically comprising:

[0125] Step S21: Figure 2 A first front contact layer 2 and a second front contact layer 3 are deposited on the front surface of the silicon substrate 1; the first front contact layer 2 is an intrinsic amorphous silicon layer deposited by PECVD, with a thickness of 7 to 11 nm; the second front contact layer 3 is an n-type amorphous silicon layer deposited by PECVD, with a thickness of 80 to 200 nm and an effective doping concentration of 5×1015 / cm 3 , the crystallization rate is 0%;

[0126] Step S22: Figure 3 , forming a front first mask layer 4 and a front second mask layer 5 on the front second contact layer 3; the front first mask layer 4 is a silicon nitride layer with a thickness of 30 to 80 nm and a refractive index of 1.50 to 1.85; the front second mask layer 5 is an intrinsic amorphous silicon layer with a thickness of 10 to 30 nm and a refractive index of 3.85 to 4.20;

[0127] Step S23: Figure 4 , performing a second laser etching on the front second mask layer 5 by using a laser, using a picosecond laser with a wavelength of 532nm and a laser power of 5 to 20W, to form a patterned front second mask layer 5;

[0128] Step S24: Figure 5 , using the patterned front second mask layer 5 as a mask, performing a first wet etching on the front first mask layer 4, wherein the first wet etching is an acid etching using a hydrofluoric acid solution to form a patterned front first mask layer 4;

[0129] Step S25: Figure 6 , using the patterned first front mask layer 4 and the second front mask layer 5 as masks, performing a second wet etching on the first front contact layer 2 and the second front contact layer 3, wherein the second wet etching is an alkaline etching using a potassium hydroxide solution to form the patterned first front contact layer 2 and the second front contact layer 3 to constitute a local contact portion of the front side, and removing the patterned second front mask layer 5 at the same time;

[0130] Step S26: Figure 7 After forming the local contact portion on the front side, a third wet etching is performed, wherein the third wet etching is an acidic etching using a hydrofluoric acid solution to remove the patterned first mask layer 4 on the front side, exposing the patterned local contact portion on the front side;

[0131] Step S30: Figure 8 , depositing a back passivation layer 6 on the surface of the back silicon substrate 1, the back passivation layer 6 is an intrinsic amorphous silicon layer with a thickness of 4 to 8 nm; depositing a front passivation layer 8 and a front doping layer 9 on the surface of the front silicon substrate 1; the front passivation layer 8 is an intrinsic amorphous silicon layer with a thickness of 4 to 8 nm; the front doping layer 9 is an n-type doped microcrystalline silicon layer with a thickness of 15 to 30 nm; and then depositing a back doping layer 7 on the surface of the back silicon substrate 1, the back doping layer 7 is a p-type doped microcrystalline silicon layer with a thickness of 20 to 45 nm;

[0132] Step S40: Fig. 9 On the front side of the silicon substrate 1, a first laser etching is performed, using a picosecond laser with a wavelength of 532nm, a controlled power of 20-45W, and a frequency of 300Hz, to remove a portion of the front passivation layer 8 and the front doping layer 9 above the local contact portion of the front side to form a front opening, the width of the front opening is smaller than the width of the local contact portion of the front side, and the front second contact layer 3 in the local contact portion of the front side is exposed in the front opening, and at the same time, the front second contact layer 3 is laser crystallized by laser to form an n-type polysilicon layer with an effective doping concentration of 5.6×10 20 / cm 3 , the crystallization rate is 70%, serving as the front second contact layer crystallization portion 10;

[0133] Step S50: Fig.10 , forming a front transparent conductive layer 11 and a back transparent conductive layer 12 on the front and back of the silicon substrate 1, respectively, both of which are ITO films, and both have a thickness of 70-100 nm; and the front transparent conductive layer 11 fills the opening of the front surface and is electrically connected to the local contact portion of the front surface;

[0134] Step S60: Fig.11 , forming a front electrode 13 and a back electrode 14 on the front transparent conductive layer 11 and the back transparent conductive layer 12 respectively, both of which are screen-printed silver; in the projection direction perpendicular to the horizontal plane, the front electrode 13 does not exceed the edge of the local contact portion of the front side;

[0135] Example 2

[0136] This embodiment provides a method for preparing a selectively transport enhanced passivated contact heterojunction battery, wherein the method only uses the front first mask layer 4 and does not use the front second mask layer 5. Steps S22 to S24 of the method are:

[0137] S22. forming a front first mask layer 4 on the front second contact layer 3; the front first mask layer 4 is a silicon nitride layer with a thickness of 30 to 80 nm and a refractive index of 1.50 to 1.85;

[0138] S23. The front first mask layer 4 is etched by laser, using a picosecond laser with a wavelength of 532nm and a laser power of 5 to 20W to form a patterned front first mask layer 4;

[0139] Omit step S24 and proceed directly to step S25;

[0140] S25. Using the patterned first front mask layer 4 as a mask, the first front contact layer 2 and the second front contact layer 3 are subjected to a second wet etching process, wherein the second wet etching process is an alkaline etching process using a potassium hydroxide solution to form the patterned first front contact layer 2 and the second front contact layer 3, constituting a local contact portion on the front side;

[0141] Except for the above, other conditions are exactly the same as those in Example 1.

[0142] Example 3

[0143] This embodiment provides a method for preparing a selectively transport enhanced passivated contact heterojunction battery. In the preparation method, in step S21, the front first contact layer 2 is adjusted from an intrinsic amorphous silicon layer with a thickness of 9 nm to a silicon oxide layer with a thickness of 1.2 nm to provide good surface passivation. Except for the above, other conditions are exactly the same as those in Example 1.

[0144] Example 4

[0145] This embodiment provides a method for preparing a heterojunction battery with selective passivation contact. In step S20 of the preparation method, a patterned local contact portion is formed on the back side of the silicon substrate 1, and the front side does not have the local contact portion. The method in the preparation method embodiment 1 is the same, except that the patterned local contact portion is only formed on the back side, which will not be further described here. A heterojunction battery with selective passivation contact is obtained, and the specific structure is as follows: Fig.12 shown.

[0146] Example 5

[0147] This embodiment provides a method for preparing a heterojunction battery with selective passivation contact. In step S20 of the preparation method, patterned local contact portions are formed on both the front and back sides of the silicon substrate 1. The preparation method is carried out by combining the steps of Example 1 and Example 4. Except for the above, other conditions are exactly the same as those of Examples 1 and 4. The obtained heterojunction battery with selective passivation contact is as follows: Fig.13 shown.

[0148] Comparative Example 1

[0149] This comparative example provides a method for preparing a heterojunction battery, which adjusts the laser power for laser selective crystallization, that is, in step S40 of the preparation method, the laser power used is relatively low, and the final effect is to only remove the front passivation layer 8 and the front doping layer 9 above the local contact portion of the front side, to form an opening on the front side, to expose the front second contact layer 3, but cannot provide sufficient energy to crystallize the front second contact layer 3 to form an n-type polysilicon layer, and the front second contact layer 3 is still kept unchanged. Except for the above, other conditions are exactly the same as those in Example 1.

[0150] Comparative Example 2

[0151] This comparative example provides a method for preparing a heterojunction battery, wherein the preparation method does not provide a front first contact layer 2 and a front second contact layer 3, that is, the preparation method is:

[0152] Providing a silicon substrate 1;

[0153] Depositing a front passivation layer 8 and a front doping layer 9, and a back passivation layer 6 and a back doping layer 7 on the front and back sides of the silicon substrate 1 respectively;

[0154] Depositing a front transparent conductive layer 11 and a back transparent conductive layer 12 on the front doped layer 9 and the back doped layer 7 respectively;

[0155] A front electrode 13 and a back electrode 14 are respectively prepared on the front transparent conductive layer 11 and the back transparent conductive layer 12;

[0156] Except for the above, other conditions are exactly the same as those in Example 1.

[0157] The heterojunction batteries obtained in the examples and comparative examples were tested, and the results after normalization of various parameters with reference to Example 1 are shown in Table 1.

[0158] Table 1

[0159] Group Conversion efficiency Open circuit voltage Series resistance Short circuit current Example 1 100.0％ 100.0％ 100.0％ 100.0％ Example 2 85.7％ 82.3％ 105.2％ 99.6％ Example 3 97.2％ 94.3％ 101.5％ 101.8％ Example 4 99.5％ 99.4％ 98.4％ 97.8％ Example 5 99.6％ 99.5％ 98.6％ 97.9％ Comparative Example 1 88.3％ 103.3％ 135.7％ 98.4％ Comparative Example 2 92.2％ 102.9％ 123.3％ 103.1％

[0160] It can be seen from Table 1 that compared with the heterojunction battery with the basic structure in the prior art in Comparative Example 2, the efficiency of the battery using selective contact enhancement in Examples 1, 4 and 5 has been significantly improved, and the series resistance has been greatly improved when the open circuit voltage and short circuit current are close. For the battery structure comparative example 1 without laser crystallization, due to the disadvantage of the conductivity of doped amorphous silicon, the series resistance of the battery is even greater; when the single mask technology of Example 2 is used, during the laser etching process, it cannot be guaranteed that the mask layer will not be damaged while other film layers are completely removed, so the open circuit voltage of the battery has a significant loss; in Example 3, the overall performance of the battery using a silicon oxide film layer for the first contact on the front is close to that of Example 1, and it also has the function of assisting laser selective crystallization to promote the crystallization of the second contact layer.

[0161] In summary, the preparation method of the present invention assists in forming two different passivation contact structures on the front side through laser selective crystallization, wherein the passivation contact structure in the gate line shielding area greatly reduces the contact resistance of the carrier efficient collection area corresponding to the front gate line shielding position, greatly improves the series resistance of the heterojunction battery, and improves the battery conversion efficiency. The selective crystallization method can minimize the current loss and insufficient passivation on the front side while improving the front transmission. Based on the improvement of the series resistance of the above structure, the heterojunction solar cell can use a low-indium-based TCO material with lower cost but poor conductivity and a metallization slurry with lower silver content, which promotes the reduction of non-silicon costs and sustainable development of heterojunction solar cells.

[0162] The preferred embodiments of the present invention are described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, a variety of simple modifications can be made to the technical solution of the present invention, and these simple modifications all belong to the protection scope of the present invention.

[0163] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

[0164] In addition, various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the present invention, they should also be regarded as the contents disclosed by the present invention.

Claims

1. A method for preparing a heterojunction battery with selective passivation contact, characterized in that: The preparation method comprises the following steps: Step S10: providing a silicon substrate; Step S20: forming a patterned local contact portion on the front side and / or the back side of the silicon substrate, wherein the patterned local contact portion comprises a first contact layer having a passivation effect and a second contact layer composed of an amorphous silicon-based material; Step S30: forming a passivation layer and a doping layer on both the front and back sides of the silicon substrate; and the doping conductivity type of the doping layer on the front side is opposite to that of the doping layer on the back side; Step S40: performing a first laser etching on one side of the silicon substrate where the local contact portion is formed, removing the passivation layer and the doping layer covering the local contact portion, forming an opening, exposing the second contact layer in the local contact portion, and performing laser crystallization on the exposed portion of the second contact layer; Step S50: forming transparent conductive layers on the front and back sides of the silicon substrate respectively, wherein the transparent conductive layer on the side having the local contact portion fills the opening and is electrically connected to the local contact portion; Step S60: forming electrodes on the transparent conductive layer on the front and back sides of the silicon substrate; in a projection direction perpendicular to the horizontal plane, the electrodes at least partially overlap with the local contact portion after the laser crystallization process.

2. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: In the projection direction perpendicular to the horizontal plane, the electrodes on the front and / or back sides of the local contact portions do not extend beyond the edges of the corresponding local contact portions; and the width of the opening is less than or equal to the width of the local contact portions.

3. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: The step S20 comprises: Step S21: forming a first contact layer having a passivation effect and a second contact layer made of an amorphous silicon-based material on the front side and / or the back side of the silicon substrate; Step S22: forming a first mask layer and a second mask layer on the second contact layer; Step S23: performing a second laser etching on the second mask layer to form a patterned second mask layer; Step S24: using the patterned second mask layer as a mask, performing a first wet etching on the first mask layer to form a patterned first mask layer; Step S25: using the patterned first mask and the patterned second mask as masks, performing a second wet etching on the first contact layer and the second contact layer to form a patterned local contact portion.

4. The method for preparing a selectively passivated contact heterojunction battery according to claim 3, characterized in that: In step S25, the second wet etching also removes the patterned second mask layer simultaneously; The second wet etching is alkaline etching; The material of the second mask layer includes an amorphous silicon-based material.

5. The method for preparing a selectively passivated contact heterojunction battery according to claim 3, characterized in that: The step S20 further includes a step S26: performing a third wet etching to remove the patterned first mask layer to expose the patterned local contact portion; The first wet etching and the third wet etching are both acid etching; The material of the first mask layer includes silicon nitride.

6. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: The step S20 comprises: Step S21': Covering the front side and / or the back side of the silicon substrate with a patterned mask; Step S22': depositing the first contact layer and the second contact layer in the area not covered by the patterned mask; Step S23 ′: removing the patterned mask to obtain a patterned local contact portion.

7. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: The material of the first contact layer is an intrinsic amorphous silicon material or a silicon oxide material; The doping conductivity type of the second contact layer is the same as the doping conductivity type of the doping layer on one side of the silicon substrate; Before laser crystallization, the effective doping concentration of the second contact layer is 1×10 15 ~8×10 15 / cm 3 ; After laser crystallization, the second contact layer is transformed from amorphous silicon-based material to microcrystalline silicon-based material or polycrystalline silicon-based material, with an effective doping concentration of 4×10 20 / cm 3 ~7×10 20 / cm 3 , the crystallization rate is 50% to 90%.

8. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: In step S40, the conditions of the first laser etching include: laser wavelength of 300-600 nm; laser pulse width of picoseconds, laser frequency of 200-400 Hz, and laser power of 15-45 W.

9. The method for preparing a selectively passivated contact heterojunction battery according to claim 1, characterized in that: The material of the doping layer is any one of amorphous silicon-based material, microcrystalline silicon-based material or nanocrystalline silicon-based material; the effective doping concentration of the doping layer is 2×10 19 ~7×10 19 / cm 3 , the crystallization rate is 30% to 70%; The material of the doped layer on the front side is also doped with oxygen; The material of the passivation layer includes intrinsic amorphous silicon material.

10. A selectively transport enhanced passivated contact heterojunction cell, characterized in that: Prepared according to the preparation method according to any one of claims 1 to 9.

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