A low-orbit satellite clock tracing device and method based on Beidou link

Abstract

The present invention provides a low-orbit satellite clock tracing device and method based on Beidou satellites, comprising a satellite-borne atomic clock, a frequency fine-tuning unit, a frequency deviation measurement unit, a GNSS satellite-borne receiver, a communication, control and processing unit, and an FPGA logic control unit; wherein the satellite-borne atomic clock provides a time and frequency reference standard for the low-orbit satellite; the frequency fine-tuning unit receives a 10MHz frequency signal from the satellite-borne atomic clock and simultaneously receives a relative frequency deviation from the communication, control and processing unit, uses the relative frequency deviation to adjust the input 10MHz signal, and outputs the adjusted 10MHz signal to the GNSS satellite-borne receiver, the FPGA logic control unit, and the frequency deviation measurement unit; and the FPGA logic control unit receives control signals from the communication, control and processing unit.

Description

Technical Field

[0001] The present invention belongs to the technical field of satellite clock tracing, and in particular relates to a low-orbit satellite clock tracing device and method based on a Beidou link. Background Art

[0002] With the development of satellite navigation systems, satellite clocks, as one of the core components of these systems, are crucial for precise time synchronization and positioning accuracy. Low Earth Orbit (LEO) satellites, in particular, are the future of satellite navigation and communications, and their clock accuracy and traceability are attracting increasing attention. The Beidou Satellite Navigation System, my country's independently developed global navigation satellite system (GNSS), is widely used in precision positioning, navigation, and time synchronization. Within the Beidou system, the accuracy and stability of satellite clocks play a crucial role in the overall system performance.

[0003] However, existing satellite clock traceability technology primarily relies on high-precision ground-based reference facilities, calibrating clocks through synchronous links between ground stations and satellites. This method has been widely used in high-orbit satellites, but in low-orbit satellites, due to factors such as signal propagation delays, orbital variations, and atmospheric interference, traditional clock traceability methods face difficulties in ensuring accuracy and high costs. Furthermore, as a key satellite navigation system in my country, the Beidou link still has room for improvement in signal transmission stability and anti-interference capabilities. This is particularly true for low-orbit satellite clock traceability, where existing technologies are unable to effectively address the issue of low-cost, high-precision clock traceability.

[0004] Therefore, how to achieve clock traceability of low-orbit satellites based on Beidou links and ensure high-precision and low-cost clock synchronization has become a technical problem that needs to be solved urgently. Summary of the Invention

[0005] The purpose of the present invention is to solve the problems existing in the above-mentioned prior art and to provide a low-orbit satellite clock tracing device and method based on the Beidou link. With the help of the Beidou global satellite navigation system, the GNSS satellite receiver can be used to trace the low-orbit satellite clock to the national benchmark UTC (NIM) of the ground time atomic time scale.

[0006] The present invention provides a method for calibrating absolute time delay of a pulse-triggered sampling channel, comprising the following steps:

[0007] The clock traceability device for low-orbit satellites based on BeiDou satellites includes an onboard atomic clock, a frequency fine-tuning unit, a frequency deviation measurement unit, a GNSS onboard receiver, a communication, control and processing unit, and an FPGA logic control unit. The onboard atomic clock provides a time and frequency reference standard for low-orbit satellites, ensuring that the onboard clock and electronic circuits have a stable and accurate time and frequency signal; the frequency fine-tuning unit receives the 10MHz frequency signal of the onboard atomic clock, and at the same time receives the relative frequency deviation Δf / f from the communication, control and processing unit, and uses the relative frequency deviation to adjust the input 10MHz signal, and outputs the adjusted 10MHz signal to the GNSS onboard receiver, the FPGA logic control unit, and the frequency deviation measurement unit; the FPGA logic control unit receives the control signal from the communication, control and processing unit,

[0008] Furthermore, the FPGA logic control unit includes a synchronous trigger module, a control logic module, a phase adjustment module and a 1PPS generation module, wherein the synchronous trigger module generates a trigger signal under the control of a control signal. After receiving the trigger signal, the 1PPS generation module generates a 1PPS signal based on the 10MHz signal as a reference count. The phase adjustment module performs phase adjustment on the 1PPS signal output by the 1PPS generation module under the control of the control signal. The control logic module generates a logic timing signal and transmits it to the frequency deviation measurement unit; the frequency deviation measurement unit measures the frequency deviation of the two 10MHz signals output by the frequency fine-tuning unit and the onboard atomic clock under the control of the logic timing signal, and sends the measured frequency deviation Δf0 to the communication, control and processing unit; the GNSS onboard receiver receives the 10MHz signal output by the frequency fine-tuning unit and the 1PPS signal output by the FPGA logic control unit, and at the same time, the GNSS onboard receiver receives the Beidou satellite signal, sends the measured ephemeris and observation data to the communication, control and processing unit and stores them as a General GNSS General Time Transfer Standard (CGGTTS) file; the communication, control and processing unit receives Δf0 and stores it. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a structural diagram of a low-orbit satellite clock tracing device based on Beidou satellites according to the present invention;

[0010] Figure 2 Schematic diagram of the low-orbit satellite clock tracing method of the present invention. Specific implementation plan

[0011] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0012] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0013] The present invention provides a low-orbit satellite clock tracing device and method based on Beidou link.

[0014] The low-orbit satellite clock tracing device traces the satellite-borne atomic clock to the national atomic time scale reference device through the satellite common view method, such as Figure 2 As shown. The low-orbit satellite clock traceability device receives GNSS satellite signals through an antenna, and uses the original observations and ephemeris signals to calculate the pseudo-range values ​​between the low-orbit satellite clock traceability device and the GNSS satellite, converts the pseudo-range values ​​into time differences and stores them in a CGGTTS format file. At the same time, the ground reference receiver receives GNSS satellite signals, and uses the original observations and ephemeris information to calculate the pseudo-range values ​​between the reference receiver and the GNSS satellite, converts the pseudo-range values ​​into time differences and stores them in a CGGTTS format file. Using the principle of satellite common view, the difference between the time differences of the same satellite at the same time in the CGGTTS file is calculated, which is the clock difference between the low-orbit satellite onboard atomic clock and the national reference of the ground atomic time scale. This clock difference is used to adjust the low-orbit satellite clock traceability device to ensure that the 1PPS and 10MHz output by the low-orbit satellite clock traceability device are synchronized with UTC (NIM), thereby realizing the traceability of the low-orbit satellite clock.

[0015] The specific implementation steps of the method described in the present invention are as follows:

[0016] The GNSS onboard receiver sends the measured ephemeris and observation data to the communication, control and processing unit, which stores them as CGGTTS files. At the same time, it receives the CGGTTS files measured by the reference receiver. The two CGGTTS files can be used to calculate the time difference Δt between the onboard atomic clock and UTC (NIM).

[0017] The communication, control and processing unit uses the time difference Δt to calculate the relative frequency deviation Δf / f, and the calculation formula is: Where τ is the time difference between two adjacent times Δt n and Δt n-1 the time interval between

[0018] After receiving Δf / f, the frequency fine-tuning unit adjusts the 10MHz frequency signal to ensure that 10MHz is consistent with the 10MHz of UTC (NIM). Then, the FPGA logic control unit generates a 1PPS signal, which maintains a stable time difference with the 1PPS of UTC (NIM).

[0019] The communication, control, and processing unit continuously receives the CGGTTS files from the onboard receiver and the CGGTTS files measured by the reference receiver. It adjusts the phase adjustment module of the FPGA logic control unit through control signals to ensure that the time difference between the 1PPS signal generated by the onboard atomic clock and the 1PPS signal of UTC (NIM) fluctuates around zero, ultimately achieving traceability of the onboard atomic clock to the national atomic time standard UTC (NIM);

[0020] The frequency deviation measurement unit then continuously measures the frequency deviation between the 10MHz output of the frequency fine-tuning unit and the atomic clock output of the onboard atomic clock. The long-term measurement data is stored in the communication, control, and processing unit, and the noise model of the onboard atomic clock is evaluated based on the stored data.

[0021] When the GNSS onboard receiver experiences data interruption or is unable to receive the CGGTTS file from the reference receiver, the communication, control, and processing unit uses the assessed onboard atomic clock noise model and historical data to predict the adjustment amount Δf / f, and then adjusts the frequency fine-tuning unit to ensure that the clock system of the low-orbit satellite can operate normally before the GNSS onboard receiver or communication with the reference receiver is restored to normal.

[0022] The above embodiments further illustrate the features and advantages of the technical solutions of the present invention. Those skilled in the art may design more specific implementations without departing from the scope of the technical solutions of the present invention. However, all such embodiments designed based on the present invention shall fall within the scope of protection of the claims of the present invention.

Claims

1. A low-orbit satellite clock tracing device based on Beidou satellite, characterized in that: The low-orbit satellite clock tracing device based on Beidou satellite includes an onboard atomic clock, a frequency fine-tuning unit, a frequency deviation measurement unit, a GNSS onboard receiver, a communication, control and processing unit and an FPGA logic control unit; wherein the onboard atomic clock provides a time and frequency reference standard for the low-orbit satellite; the frequency fine-tuning unit receives the 10MHz frequency signal of the onboard atomic clock, and at the same time receives the relative frequency deviation of the communication, control and processing unit, adjusts the input 10MHz signal with the relative frequency deviation, and outputs the adjusted 10MHz signal to the GNSS onboard receiver, the FPGA logic control unit and the frequency deviation measurement unit; the FPGA logic control unit receives the control signal of the communication, control and processing unit, and the FPGA logic control unit includes a synchronization trigger module, a control logic module, a phase adjustment module and a 1PPS generation module, wherein the synchronization trigger module generates a phase adjustment signal when the control signal is received. The 1PPS generating module generates a trigger signal under the control of the control signal. After receiving the trigger signal, the 1PPS generating module counts based on the 10MHz signal to generate a 1PPS signal. The phase adjustment module performs phase adjustment on the 1PPS signal output by the 1PPS generating module under the control of the control signal. The control logic module generates a logic timing signal and transmits it to the frequency deviation measurement unit. The frequency deviation measurement unit measures the frequency deviation of the two 10MHz signals output by the frequency fine-tuning unit and the onboard atomic clock under the control of the logic timing signal, and sends the measured frequency deviation to the communication, control and processing unit. The GNSS onboard receiver receives the 10MHz signal output by the frequency fine-tuning unit and the 1PPS signal output by the FPGA logic expansion and control unit. At the same time, the GNSS onboard receiver receives the Beidou satellite signal, sends the measured ephemeris and observation data to the communication, control and processing unit and stores them as a universal GNSS The CGGTTS file is used. The communication, control, and processing unit receives and stores the frequency deviation. The frequency deviation measurement unit continuously measures the frequency deviation between the 10 MHz output of the frequency fine-tuning unit and the atomic clock output of the onboard atomic clock, stores the long-term measurement data in the communication, control, and processing unit, and evaluates the noise model of the onboard atomic clock based on the stored data. When a GNSS onboard receiver experiences data interruption or fails to receive the CGGTTS file from the reference receiver, the communication, control, and processing unit uses the evaluated noise model of the onboard atomic clock and historical data to predict the adjustment amount Δf / f, and then adjusts the frequency fine-tuning unit.

2. A clock tracing method based on the clock tracing device of the BeiDou satellite according to claim 1, characterized in that: The clock tracing method comprises the following steps: The GNSS onboard receiver sends the measured ephemeris and observation data to the communication, control, and processing unit, which stores them as a GNSS Universal Time Transfer Standard file. Simultaneously, it receives the GNSS Universal Time Transfer Standard file measured by the reference receiver. Using these two GNSS Universal Time Transfer Standard files, the time difference between the onboard atomic clock and UTC (NIM) can be calculated. The communication, control and processing unit calculates the relative frequency deviation using the time difference; After receiving the relative frequency deviation, the frequency fine-tuning unit adjusts the 10MHz frequency signal to ensure that the 10MHz is consistent with the 10MHz of UTC (NIM). Then, the FPGA logic control unit generates a 1PPS signal, which maintains a stable time difference with the 1PPS of UTC (NIM). The communication, control and processing unit continuously receives the GNSS Universal Time Transfer Standard file from the onboard receiver and the GNSS Universal Time Transfer Standard file measured by the reference receiver. It adjusts the phase adjustment module of the FPGA logic control unit through the control signal, so that the time difference between the 1PPS signal generated by the onboard atomic clock and the 1PPS signal of UTC (NIM) fluctuates around zero, ultimately realizing the traceability of the onboard atomic clock to the national atomic time standard UTC (NIM).

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