Differential pair ordered escape routing method based on improved monte carlo tree search

Abstract

The application proposes a differential pair ordered escape routing method based on improved Monte Carlo tree search, aiming at solving the path optimization problem of differential pair signal routing in high-density printed circuit board design. The method combines MCTS and Q-learning reinforcement learning technology, does not need to set the intermediate point of routing in advance, and can dynamically generate routing path under grid pin array and staggered pin array. Through multiple simulation and backtracking, the method can effectively handle complex pin arrangement and blocked area, ensure the matching of routing length and reduce electromagnetic interference. At the same time, the method only needs the Q table obtained by Q learning once, which can be used as the basis for simulation of all nodes of Monte Carlo tree, and all expanded nodes are simulated in the simulation stage, overcoming the long simulation time of MCTS. The step-by-step widening strategy adopted by the application accelerates the search ability and convergence speed of MCTS. The application is suitable for PCB design of high-performance electronic equipment, such as communication, computer and avionics field.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic design automation (EDA), and particularly to a differential pair ordered escape routing method based on improved Monte Carlo tree search. BACKGROUND

[0002] With the increasing integration of electronic devices and the increasing demand for high-speed signal transmission, the complexity of printed circuit board (PCB) routing is increasing. Differential pair routing technology is widely used in high-speed circuit design because it can effectively suppress electromagnetic interference (EMI) and signal crosstalk. An important challenge of differential pair routing is ordered escape routing, especially under high-density packaging. How to ensure the equal length of signal lines and the close proximity of differential pairs while orderly leading the differential pair pins out to the boundary of the PCB has become a key problem in automatic PCB routing.

[0003] Ordered escape routing of differential pairs refers to orderly leading out the two pins of a differential pair signal from the pin array, ensuring that the routing paths of each differential signal pair are as identical as possible and minimizing interference. In practical applications, there are generally two common structures of pin arrays: grid pin array (GPA) and staggered pin array (SPA). The pins in GPA are arranged in a square grid, and each pin has four adjacent routing directions, such as the grid-type pin structure shown in (a) of FIG. 1. Figure 1 The pins in SPA are arranged in a hexagonal grid, so that each pin has six adjacent routing directions, such as the staggered-type pin structure shown in (b) of FIG. 1. In order to achieve ordered escape routing of differential pairs in these two pin structures, traditional routing methods often need to pre-set intermediate points or paths, but such methods are less efficient when dealing with high-density pin structures. Figure 1

[0004] ​In the field of differential pair ordered escape routing, there have been several studies on routing algorithms for grid pin arrays and staggered pin arrays. Li (refer to Modelling and optimisation algorithm for length-matching escape routing of differential pairs) et al. proposed a differential pair routing method based on integer linear programming (ILP), but there were problems of computational efficiency when dealing with high-density routing. Jiao (refer to Ordered Escape Routing with Consideration of Differential Pair and Blockage) et al. solved part of the routing problem through the multi-commodity minimum cost flow algorithm (MMCF), but it performed poorly when faced with complex blocked areas.

[0005] In view of this, the present application proposes an intelligent routing algorithm based on reinforcement learning and Monte Carlo tree search (MCTS), aiming to dynamically optimize the routing path.

[0006] Monte Carlo tree search (MCTS) is a search tree-based decision algorithm that can select the optimal path by simulating different strategies in the tree. MCTS works in four steps (such as Figure 2 representation): Selection, Expansion, Simulation, and Backup. This method is widely used in complex game problems, such as Go (refer to Monte Carlo tree search in Kriegspiel). In the PCB routing problem, MCTS can dynamically optimize the escape routing process of differential pairs by randomly simulating and selecting different routing paths. Compared with traditional algorithms, MCTS does not need to pre-set intermediate points of routing, and can handle complex pin arrangements and blocked areas.

[0007] Q-learning (refer to Q-learning) is an algorithm commonly used in reinforcement learning, aiming to gradually find the optimal strategy by iteratively updating the state-action value (Q-value). This algorithm does not depend on the environment model and can gradually optimize the strategy in continuous action space. In the differential pair routing problem, Q-learning updates the reward value of the routing path in real time, providing MCTS with global path optimization guidance. SUMMARY

[0008] The purpose of the present application is to propose a differential pair ordered escape routing method based on improved Monte Carlo tree search; by combining Monte Carlo tree search (MCTS) algorithm and Q learning in reinforcement learning, the ordered escape routing problem of high-density differential pair pins in printed circuit board design is solved. The present application can effectively reduce the wiring length, optimize the CPU calculation time, and can handle the blocked area in complex grid pin array (GPA) and staggered pin array (SPA), realize more efficient wiring path planning.

[0009] To achieve the above purpose, the technical scheme of the present application is: a differential pair ordered escape routing method based on improved Monte Carlo tree search, specifically comprising the following steps:

[0010] Step 1, sort all differential pairs dp i (i∈[1,n]) according to the escape right of the differential pair (estimated length cost) cost from small to large, and add them to the queue Round1, wherein cost is the initial right of the differential pair PW i ;

[0011] Step 2, if the queue Round1 has no differential pair, go to step 5; otherwise, pop the first differential pair dp i from the queue Round1.

[0012] Step 3, if the differential pair dp i cannot find the predicted legal escape point set SetPEP, add the differential pair dp i to the queue Round2, and go to step 2; otherwise, continue to the next step.

[0013] Step 4, according to the Monte Carlo tree search algorithm, route the differential pair dp i and the escape point set SetPEP of the differential pair dp i , if the routing is successful and the differential pair dp i is not popped from the queue Round3, add the differential pair dp i to the queue Round3, and if the routing fails, add the differential pair dp i to the queue Round2.

[0014] Step 5, if the queue Round2 has no differential pair, go to step 8; otherwise, pop a differential pair dp i from the queue Round2 as the current differential pair dp i .

[0015] Step 6, if the current differential pair dp i is in the escape point epP i of the previous differential pair dpP iand the postorder differential pair dpN i escape point epN i If there is a predicted legal escape point set SetPEP between dpP and dpN, go to step 4, otherwise go to next step;

[0016] Step 7, remove the preorder differential pair dpP i and the postorder differential pair dpN i The wiring of the differential pair with the smallest right-of-way in the middle road, to ensure the current differential pair dp i There can be an escape point set SetPEP, increase the right-of-way PW of the current differential pair dp i and join the queue Round2, go to step 5; i

[0017] Step 8, if the queue Round3 has no differential pair, go to step 10; otherwise, pop a differential pair dp i from the queue Round3 as the current differential pair dp i ;

[0018] Step 9, set the right-of-way PW of the current differential pair dp i to the minimum value, and go to step 6; i

[0019] Step 10, save all differential pair wiring paths, and end the wiring.

[0020] Preferably, the calculation of the right-of-way cost is as follows:

[0021] dis = Manhattan distance of two pins + shortest distance from pin midpoint to boundary

[0022] Manhattan distance of two pins = |X Ai -X Bi | + |Y Ai -Y Bi |

[0023] Shortest distance from pin midpoint to boundary = min(X midi , Y midi , Width-X midi , Height-Y midi )

[0024]

[0025] dis represents the estimated wiring length; X Ai , X Bi represent the horizontal coordinates of the A pin and the B pin of the i-th differential pair; Y Ai , Y Bi ​​X represents the ordinate of pin A and pin B of the i-th differential pair; midi Y represents the x-coordinate of the midpoint between the two pins of the i-th difference pair; midi The ordinate represents the y-coordinate of the midpoint between the two pins of the i-th difference pair; Width represents the width of the pin array, and Height represents the height of the pin array.

[0026] Preferably, in step 3, the difference pair dp i The search for the escape point set SetPEP specifically involves finding the current difference pair dp. i If there are other unrouted pins in the quadrilateral formed by the connection between the two pins and the nearest boundary, then the escape point set SetPEP cannot be found; otherwise, the escape point contained in the projection of the difference pair connection onto the boundary is taken as the current difference pair dp. i The predicted set of legal escape points, SetPEP.

[0027] Preferably, the step of performing the difference pair dp according to the Monte Carlo tree search algorithm is... i and difference pairs dp i The specific steps for routing the escape point set SetPEP include:

[0028] Step 4.1: Use difference pairs for dp i The two pin positions are used to initialize the Monte Carlo tree head node Head and all its legal child nodes, and the Monte Carlo tree search iteration begins;

[0029] Step 4.2: If the iteration ends, proceed to step 4.10; otherwise, continue to the next step.

[0030] Step 4.3: Starting from the head node (Head), select the child node with the largest UCT value each time, until the leaf node LN of the Monte Carlo tree is reached. The UCT calculation formula is as follows:

[0031]

[0032] R k N represents the total reward of node k; k N represents the number of times node k is visited; N represents the number of times the parent node of node k is visited; c represents the exploration parameter, which is used to control the balance between exploration and exploitation.

[0033] Step 4.4: Expand the leaf node LN and select one of its child nodes NELN. k ;

[0034] Step 4.5: If the Monte Carlo tree already has a Q-table, skip Q-learning and continue to the next step; otherwise, proceed based on the child node NELN. kQ-learning is performed on the pin positions and escape point set SetPEP. If Q-learning is successful, the Q-table is obtained, and the next step is continued. If Q-learning fails, the current child node NELN is deleted. k And with another child node NELN k The pin locations and escape point set SetPEP are used for Q-learning until Q-learning is successful, then the next step is performed; if all child nodes NELN... k If all Q-learning attempts fail, then the current difference pair dp i Wiring failed, proceed to step 4.12;

[0035] Step 4.6: Use the Q-table to simulate routing for all extended child nodes NELN;

[0036] Step 4.7: NELN for each child node. k Calculate the reward value and backtrack to update the reward value and number of visits, child node NELN k The reward value is calculated as follows:

[0037]

[0038]

[0039]

[0040] r indicates child node NELN k The reward value after simulating wiring; D A D represents the length of a single wire in the analog wiring of pin A. B R(v) represents the single-wire length of the simulated routing at pin B; L represents the double-wire length after pins A and B merge; R(v) represents the reward value of node v; N(v) represents the number of visits to node v; Selection Path represents the path from the root node Head to the child node NELN. k The path to choose;

[0041] Step 4.8: If the current simulated cabling scheme SlnN is better than the previous best cabling scheme SlnBest, that is, the reward value r is higher, then update the best cabling scheme SlnBest to the current simulated cabling scheme SlnN.

[0042] Step 4.9: If the optimal routing scheme SlnBest converges, that is, the routing scheme remains unchanged in a certain number of iterations, then proceed to step 4.11; otherwise, proceed to step 4.2.

[0043] Step 4.10: If the wiring scheme SlnBest exists, the wiring is successful, continue to the next step; otherwise, the wiring fails, go to step 4.12.

[0044] Step 4.11: If the optimal wiring scheme requires removing other differential pairs (dp) j If the wiring is incorrect, then remove the other differential pairs dp. j The wiring and the removed differential pairs dp j Add to queue Round 2 to await rewiring;

[0045] Step 4.12: If the routing is successful and the differential pair dp i If it is not popped from queue Round 3, then the difference pair dp i Add to queue Round 3; if routing fails, add differential pair dp. i The right-of-way and the difference pair dp i Add to queue Round2.

[0046] Preferably, the use of difference pairs dp i Initializing the Monte Carlo tree head node and all its legal child nodes using the two pin positions specifically includes the following steps:

[0047] Step 4.1.1: Number the six wiring areas around the differential pair pins from the top left corner, starting from the top left corner, in a clockwise direction, from 1 to 6;

[0048] Step 4.1.2: Starting from the wiring area position with the two pins having the same odd or even position, 18 matching methods are obtained, including 1-1, 1-3, 1-5, 2-2, 2-4, 2-6, 3-3, 3-5, 3-1, 4-4, 4-6, 4-2, 5-5, 5-1, 5-3, 6-6, 6-2, and 6-4, which respectively form 18 Monte Carlo tree nodes.

[0049] Step 4.1.3: Perform the following checks on all nodes. If all nodes have been checked, end the initialization of the head node.

[0050] Step 4.1.4: If any of the routing areas corresponding to the two pins in the routing area represented by the current node has an obstacle or is occupied by a differential pair with equal or higher path weight, then discard the current node and return to step 4.1.4 to determine the next node; otherwise, continue to the next step.

[0051] Step 4.1.5: If the routing area represented by the current node is occupied by a differential pair dp with a lower priority, then the node can encroach on the routing area of ​​the differential pair dp, disconnect all the differential pairs dp and add them to the queue Round2 to wait for rerouting.

[0052] Step 4.1.6: Make the current node a child node of the head node; return to step 4.1.4 to determine the next node.

[0053] Preferably, in step 4.4, expanding the leaf node LN specifically involves:

[0054] Step 4.4.1: Check the single-wire length of the two pins of the leaf node LN in the previous simulated wiring. If the single-wire lengths of the two pins are the same, proceed to step 4.4.3; otherwise, continue to the next step.

[0055] Step 4.4.2: If one of the two pins has a longer single-wire length and the other has a shorter single-wire length, the pin with the longer single-wire length will only extend in one direction, that is, the current position of the pin with the longer single-wire length is in the direction of the previous simulated routing. The pin with the shorter single-wire length will extend in all legal and feasible directions, that is, directions where there are no obstacles and the routing area is not occupied by differential pairs with equal or higher path weights; proceed to step 4.4.4.

[0056] Step 4.4.3: If the single wire lengths of pins A and B are equal, then pins A and B can be extended in all legal and feasible directions, i.e. directions where there are no obstacles and the wiring area is not occupied by differential pairs with equal or higher right-of-way.

[0057] Step 4.4.4: Combine the directions of pin A and B to form all the child nodes of the leaf node LN.

[0058] Preferably, Q-learning in step 4.5 specifically involves:

[0059] Step 4.5.1: If the current difference pair dp i If the resulting Monte Carlo tree has undergone Q-learning and a Q-table has been obtained, then this step ends; otherwise, continue to the next step.

[0060] Step 4.5.2: Start Q-learning training, with a maximum of nTrain times. After training more than nTrain times, proceed to step 4.5.12.

[0061] Step 4.5.3: Start iterating for each training session, with a maximum of mIteration iterations. After exceeding mIteration iterations, proceed to step 4.5.11.

[0062] Step 4.5.4: For the current difference pair dp i The following strategies are applied to pins A and B respectively. After both pins are completed, proceed to step 4.5.10.

[0063] Step 4.5.5: If the current pin p (p∈{A,B}) position S has reached the escape point set SetPEP, then proceed to step 4.5.4 to calculate the next pin; otherwise, continue to the next step.

[0064] Step 4.5.6: Randomly generate a random number num. If num is less than the exploration probability epsilon, then pin p moves one step from position S in a random direction to reach position S'; otherwise, it moves one step in the direction with the largest Q value at position S to reach position S'.

[0065] Step 4.5.7: If position S' is a wiring area of ​​an obstacle or another differential pair with a greater right-of-way, the reward value is -1; if the escape point set SetPEP is reached, the reward value is 1; if the escape point set SetPEP is reached, the boundary escape point is outside the boundary escape point set SetPEP, the reward value is -0.1 to avoid wiring occupying boundary resources and affecting the escape of other differential pairs; otherwise, the reward value is 0.

[0066] Step 4.5.8: Update the Q table;

[0067] Step 4.5.9, Proceed to Step 4.5.4;

[0068] Step 4.5.10: If both pins A and B reach the escape point set SetPEP, proceed to the next step; otherwise, continue iterating and go to step 4.5.3.

[0069] Step 4.5.11: Save the number of iterations. If the standard deviation of the number of iterations in the latest 10 training iterations converges to less than 1, continue; otherwise, decrease epsilon and continue training, then go to step 4.5.2.

[0070] Step 4.5.12: If both pins A and B reach the predicted escape point set SetPEP, then save the Q table as the basis for simulating all nodes of this Monte Carlo tree, and Q learning is successful; otherwise, Q learning of the current node fails.

[0071] Preferably, the Q table is updated according to the following formula:

[0072]

[0073] Q(s t ,a t ) represents the state s at time step t. t Next, take action a t Action value; α represents the learning rate; r t+1 γ represents the reward value; γ represents the discount factor.

[0074] Preferably, the step of simulating routing for all extended child nodes using the Q-table specifically involves:

[0075] Step 4.6.1: For each child node in all expanded child nodes, NELN k Perform the following steps;

[0076] Step 4.6.2, if the child node NELN k If the positions S1 and S2 of the two pins A and B are both escape point sets SetPEP, then the Monte Carlo tree has successfully found the target, and no simulated routing is needed, ending this method; otherwise, perform the following simulated routing, where the routing proceeds from the head node Head to the extended node NELN. k SEP wiring k It is non-repeatable;

[0077] Step 4.6.3: If S1 is in the escape point set SetPEP, then proceed to step 4.6.6; otherwise, pin A moves to the Q table to find the maximum Q value at position S1 and it is not SEP. k Take one step in the direction to reach S1';

[0078] Step 4.6.4: If S1' is the analog routing area of ​​pin B, it means that pins A and B meet at position S1'. Then, copy the routing of pin B after this point to pin A.

[0079] Step 4.6.5: If the analog wiring of the two pins has merged, S2' is directly equal to S1', and proceed to step 4.6.3; otherwise, continue with the analog wiring of pin B.

[0080] Step 4.6.6: If S2 is in the escape point set SetPEP, proceed to step 4.6.8; otherwise, pin B is in the Q table at position S2 with the maximum Q value and is not SEP. k Take one step in the direction to reach S2';

[0081] Step 4.6.7: If S2' is the analog routing area of ​​pin A, it means that pin A and B meet at position S2'. Then, copy the routing of pin A after this point to pin B.

[0082] Step 4.6.8: If S1' or S2' reaches another difference pair dp with a smaller right-of-way... j If the routing area is defined, then the routing of the current differential pair can encroach on this routing area to preserve the routing of other differential pairs (dp). j To node NELN k In the process, if the Monte Carlo tree path of the final wiring scheme passes through node NELN k This will affect the difference pair dp j Remove and re-insert the stitches;

[0083] Step 4.6.9: If both S1' and S2' reach the escape point set SetPEP, then the simulation wiring is complete; otherwise, continue.

[0084] Step 4.6.10: Update S1 to S1' and S2 to S2', then proceed to step 4.6.2.

[0085] Preferably, the current difference pair dp i In the preceding difference pair dpP i escape point epP i and subsequent difference pairs dpN i Escape point epN i The specific determination of whether a set of predicted legal escape points, SetPEP, exists is as follows:

[0086] Step 6.1, Current difference pair dp i The preorder difference pair is dpP i The sequence number is P, and the escape point is epP. i The subsequent difference pairs are dpN i The sequence number is N (N>i>P), and the escape point is epN. i ;

[0087] Step 6.2, if the escape point epP i With epN i If the number of remaining escape points is less than (NP-1), it means that the number of remaining escape points is insufficient for the difference pair dpP. i and dpN i If the remaining difference pairs escape, return false; otherwise, continue.

[0088] Step 6.3: Divide the escape point interval [epP] i +iP,epN i All escape points between -(Ni)] are treated as difference pairs dp i The predicted set of legal escape points, SetPEP.

[0089] Compared with the prior art, the present invention has the following beneficial effects:

[0090] This invention solves the problem of ordered escape routing of high-density differential pair pins in printed circuit board design. By combining MCTS and Q-learning algorithms, it can dynamically generate routing paths without pre-setting intermediate points, making it particularly suitable for high-density differential pair routing in grid pin arrays and interleaved pin arrays. This invention effectively reduces routing length, optimizes CPU computation time, and can handle congested areas in complex grid pin arrays (GPA) and interleaved pin arrays (SPA), achieving more efficient routing path planning. This invention is widely used in the design and manufacturing process of high-performance electronic devices and is suitable for high-density PCB design in fields such as communications, computers, aerospace, defense, and medical. Attached Figure Description

[0091] Figure 1 There are two types of pin array structures;

[0092] Figure 2 This is a flowchart of the four steps of the Monte Carlo tree search algorithm of this invention;

[0093] Figure 3 This is a flowchart of the differential pair ordered escape wiring algorithm based on improved Monte Carlo tree search proposed in this invention;

[0094] Figure 4 This is a schematic diagram of the method for predicting the escape point of a simple difference pair in the first round according to the present invention;

[0095] Figure 5 This is a schematic diagram showing the numbering of the six wiring regions around the pins when initializing the header node in this invention.

[0096] Figure 6 This is a schematic diagram illustrating the automatic merging of two wirings when one pin wiring reaches the area of ​​another pin wiring in the present invention.

[0097] Figure 7 This is a schematic diagram of the method for predicting the escape point of complex difference pairs in the second round of the present invention. Detailed Implementation

[0098] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings.

[0099] This invention proposes a differential pair ordered escape routing method based on an improved Monte Carlo tree search. Some of the symbols used and their meanings are as follows:

[0100] n: The number of difference pairs;

[0101] dp i : The difference pair with index i;

[0102] cost: The estimated length cost of the escape route (right-of-way) for the difference pair;

[0103] PW i : PathWeight difference pairs dp i The right-of-way of a differential pair with a larger right-of-way can encroach on the wiring area of ​​a differential pair with a smaller right-of-way during the wiring process, and cause the encroached differential pair to be disconnected and re-wired.

[0104] Round 1: Priority queue for the first round of wiring, PW i The larger the value, the higher the priority.

[0105] Round 2: Priority queue for the second round of wiring, PW i The larger the value, the higher the priority.

[0106] Round 3: The priority queue for the third round of routing optimization, where the smaller the differential pair number, the higher the priority.

[0107] SetPEP: Set of Predicted Escape Points, the set of legally predicted escape points;

[0108] Head: The head node of a Monte Carlo tree, which is formed by the positions of two pins in a difference pair;

[0109] LN: LeafNode (Monte Carlo Tree Leaf Node);

[0110] NELN k Node Expanded by Leaf: The k-th child node obtained by expanding a leaf node;

[0111] SlnN: Solution Now - Current analog wiring solution;

[0112] SlnBest: Solution Best - The current best cabling solution;

[0113] dpP i The preceding routed differential pair of the differential pair with sequence number i;

[0114] epP i : The escape point of the differential pair whose preceding route is already wired for the differential pair with index i;

[0115] dpN i The subsequent routed differential pair of the differential pair with sequence number i;

[0116] epN i : The escape point of the differential pair whose preceding route is already wired for the differential pair with index i;

[0117] SEP k Select and Expand Path: This refers to the route selected and expanded from the Head node to node k. This route cannot be interrupted during the simulation routing process.

[0118] refer to Figures 2-3 The method specifically includes the following steps:

[0119] Step 1: DP on all difference pairs i (i∈[1,n]) Sort the escape path weights (estimated length cost) of the difference pairs in ascending order and add them to queue Round1, where cost is used as the initial path weight PW of the difference pairs. i ;

[0120] Step 2: If there are no difference pairs in queue Round 1, proceed to step 5; otherwise, pop the first difference pair dp from queue Round 1. i ;

[0121] Step 3, if for difference pairs dp i If no legally predicted escape point set SetPEP can be found, then the difference pair dp is used. i Add to queue Round 2 and proceed to step 2; otherwise, continue to the next step.

[0122] Step 4: Perform the difference pair dp according to the Monte Carlo tree search algorithm. i and difference pairs dp i The escape point set SetPEP is used for routing. If the routing is successful and the difference pair dp is... i If it is not popped from queue Round 3, then the difference pair dp i Add to queue Round 3; if routing fails, add the difference pair dp. i Add to queue Round 2;

[0123] Step 5: If there are no difference pairs in queue Round 2, proceed to step 8; otherwise, pop a difference pair dp from queue Round 2. i As the current difference pair dp i ;

[0124] Step 6: If the current difference pair dp i In the preceding difference pair dpP i escape point epP i and subsequent difference pairs dpN i Escape point epN i If a set of legally predicted escape points, SetPEP, exists, proceed to step 4; otherwise, continue to the next step.

[0125] Step 7: Remove the preceding difference pair dpP i and subsequent difference pairs dpN i Routing of differential pairs with smaller path weights to ensure the current differential pair dp i The existence of an escape point set SetPEP increases the current difference pair dp. i right-of-way PW i Then add it to queue Round 2 and proceed to step 5;

[0126] Step 8: If there are no difference pairs in queue Round 3, proceed to step 10; otherwise, pop a difference pair dp from queue Round 3. i As the current difference pair dp i ;

[0127] Step 9: Set the current difference pair dp i right-of-way PW i If the minimum value is found, proceed to step 6;

[0128] Step 10: Save all differential pair routing paths and end the routing process.

[0129] Preferably, the calculation of the right-of-way cost is as follows:

[0130] dis = Manhattan distance between the two pins + shortest distance from the midpoint of the pins to the boundary

[0131] Manhattan distance between the two pins = |X Ai -X Bi |+|Y Ai -Y Bi |

[0132] The shortest distance from the pin midpoint to the boundary = min(X) midi ,Y midi Width-X midi Height-Y midi )

[0133]

[0134] dis indicates the estimated wiring length; X Ai X Bi Y represents the x-coordinate of pin A and pin B of the i-th difference pair; Ai Y Bi X represents the ordinate of pin A and pin B of the i-th differential pair; midi Y represents the x-coordinate of the midpoint between the two pins of the i-th difference pair; midi The ordinate represents the y-coordinate of the midpoint between the two pins of the i-th difference pair; Width represents the width of the pin array, and Height represents the height of the pin array.

[0135] Preferably, in step 3, the difference pair dp i The search for the escape point set SetPEP specifically involves finding the current difference pair dp. i If there are other unrouted pins in the quadrilateral formed by the connection between the two pins and the nearest boundary, then the escape point set SetPEP cannot be found; otherwise, the escape point contained in the projection of the difference pair connection onto the boundary is taken as the current difference pair dp. i The predicted set of legal escape points, SetPEP. Figure 4 As shown, the projection of the line connecting the difference pairs onto the lower boundary, i.e. the escape points in the red box, is used as the set of predicted escape points.

[0136] Preferably, the step of performing the difference pair dp according to the Monte Carlo tree search algorithm is... i and difference pairs dp i The specific steps for routing the escape point set SetPEP include:

[0137] Step 4.1: Use difference pairs for dp i The two pin positions are used to initialize the Monte Carlo tree head node Head and all its legal child nodes, and the Monte Carlo tree search iteration begins;

[0138] Step 4.2: If the iteration ends, proceed to step 4.10; otherwise, continue to the next step.

[0139] Step 4.3: Starting from the head node (Head), select the child node with the largest UCT value each time, until the leaf node LN of the Monte Carlo tree is reached. The UCT calculation formula is as follows:

[0140]

[0141] R k N represents the total reward of node k; k N represents the number of times node k is visited; N represents the number of times the parent node of node k is visited; c represents the exploration parameter, which is used to control the balance between exploration and exploitation.

[0142] Step 4.4: Expand the leaf node LN and select one of its child nodes NELN. k The Q-table is used for Q-learning to obtain the Q-table. Since the Q-table is only related to the endpoint and not to the starting point or node position, the Q-table obtained by Q-learning from any one NELNi can be used to simulate routing for all other nodes.

[0143] Step 4.5: If the Monte Carlo tree already has a Q-table, skip Q-learning and continue to the next step; otherwise, proceed based on the child node NELN. k Q-learning is performed on the pin positions and escape point set SetPEP. If Q-learning is successful, the Q-table is obtained, and the next step is continued. If Q-learning fails, the current child node NELN is deleted. k And with another child node NELN k The pin locations and escape point set SetPEP are used for Q-learning until Q-learning is successful, then the next step is performed; if all child nodes NELN... k If all Q-learning attempts fail, then the current difference pair dp i Wiring failed, proceed to step 4.12;

[0144] Step 4.6: Use the Q-table to simulate routing for all extended child nodes NELN;

[0145] Step 4.7: NELN for each child node. k Calculate the reward value and backtrack to update the reward value and number of visits, child node NELN k The reward value is calculated as follows:

[0146]

[0147]

[0148]

[0149] r indicates child node NELN k The reward value after simulating wiring; D A D represents the length of a single wire in the analog wiring of pin A. B R(v) represents the single-wire length of the simulated routing at pin B; L represents the double-wire length after pins A and B merge; R(v) represents the reward value of node v; N(v) represents the number of visits to node v; Selection Path represents the path from the root node Head to the child node NELN. k The path to choose;

[0150] Step 4.8: If the current simulated cabling scheme SlnN is better than the previous best cabling scheme SlnBest, that is, the reward value r is higher, then update the best cabling scheme SlnBest to the current simulated cabling scheme SlnN.

[0151] Step 4.9: If the optimal routing scheme SlnBest converges, that is, the routing scheme remains unchanged in a certain number of iterations, then proceed to step 4.11; otherwise, proceed to step 4.2.

[0152] Step 4.10: If the wiring scheme SlnBest exists, the wiring is successful, continue to the next step; otherwise, the wiring fails, go to step 4.12.

[0153] Step 4.11: If the optimal wiring scheme requires removing other differential pairs (dp) j If the wiring is incorrect, then remove the other differential pairs dp. j The wiring and the removed differential pairs dp j Add to queue Round 2 to await rewiring;

[0154] Step 4.12: If the routing is successful and the differential pair dp i If it is not popped from queue Round 3, then the difference pair dp i Add to queue Round 3; if routing fails, add differential pair dp. i The right-of-way and the difference pair dp i Add to queue Round2.

[0155] Preferably, the difference pair dp used i Initializing the Monte Carlo tree head node and all its legal child nodes using the two pin positions specifically includes the following steps:

[0156] Step 4.1.1: Number the six wiring areas around the differential pair pins from the top left corner, starting with 1 to 6 in a clockwise direction; for example... Figure 5 As shown;

[0157] Step 4.1.2: Starting from the wiring area position with the two pins having the same odd or even position, 18 matching methods are obtained, including 1-1, 1-3, 1-5, 2-2, 2-4, 2-6, 3-3, 3-5, 3-1, 4-4, 4-6, 4-2, 5-5, 5-1, 5-3, 6-6, 6-2, and 6-4, which respectively form 18 Monte Carlo tree nodes.

[0158] Step 4.1.3: Perform the following checks on all nodes. If all nodes have been checked, end the initialization of the head node.

[0159] Step 4.1.4: If any of the routing areas corresponding to the two pins in the routing area represented by the current node has an obstacle or is occupied by a differential pair with equal or higher path weight, then discard the current node and return to step 4.1.4 to determine the next node; otherwise, continue to the next step.

[0160] Step 4.1.5: If the routing area represented by the current node is occupied by a differential pair dp with a lower priority, then the node can encroach on the routing area of ​​the differential pair dp, disconnect all the differential pairs dp and add them to the queue Round2 to wait for rerouting.

[0161] Step 4.1.6: Make the current node a child node of the head node; return to step 4.1.4 to determine the next node.

[0162] Preferably, in step 4.4, expanding the leaf node LN specifically involves:

[0163] Step 4.4.1: Check the single-wire length of the two pins of the leaf node LN in the previous simulated wiring. If the single-wire lengths of the two pins are the same, proceed to step 4.4.3; otherwise, continue to the next step.

[0164] Step 4.4.2: If one of the two pins has a longer single-wire length and the other has a shorter single-wire length, the pin with the longer single-wire length will only extend in one direction, that is, the current position of the pin with the longer single-wire length is in the direction of the previous simulated routing. The pin with the shorter single-wire length will extend in all legal and feasible directions, that is, directions where there are no obstacles and the routing area is not occupied by differential pairs with equal or higher path weights; proceed to step 4.4.4.

[0165] Step 4.4.3: If the single wire lengths of pins A and B are equal, then pins A and B can be extended in all legal and feasible directions, i.e. directions where there are no obstacles and the wiring area is not occupied by differential pairs with equal or higher right-of-way.

[0166] Step 4.4.4: Combine the directions of pin A and B to form all the child nodes of the leaf node LN.

[0167] Preferably, Q-learning in step 4.5 specifically involves:

[0168] Step 4.5.1: If the current difference pair dp i If the resulting Monte Carlo tree has undergone Q-learning and a Q-table has been obtained, then this step ends; otherwise, continue to the next step.

[0169] Step 4.5.2: Start Q-learning training, with a maximum of nTrain times. After training more than nTrain times, proceed to step 4.5.12.

[0170] Step 4.5.3: Start iterating for each training session, with a maximum of mIteration iterations. After exceeding mIteration iterations, proceed to step 4.5.11.

[0171] Step 4.5.4: For the current difference pair dp i The following strategies are applied to pins A and B respectively. After both pins are completed, proceed to step 4.5.10.

[0172] Step 4.5.5: If the current pin p (p∈{A,B}) position S has reached the escape point set SetPEP, then proceed to step 4.5.4 to calculate the next pin; otherwise, continue to the next step.

[0173] Step 4.5.6: Randomly generate a random number num. If num is less than the preset exploration probability epsilon, then pin p moves one step from position S in a random direction to reach position S'; otherwise, it moves one step in the direction with the largest Q value at position S to reach position S'.

[0174] Step 4.5.7: If position S' is a wiring area of ​​an obstacle or another differential pair with a greater right-of-way, the reward value is -1; if the escape point set SetPEP is reached, the reward value is 1; if the escape point is reached outside the escape point set SetPEP, the reward value is -0.1 to avoid wiring occupying boundary resources and affecting the escape of other differential pairs; otherwise, the reward value is 0.

[0175] Step 4.5.8: Update the Q table;

[0176] Step 4.5.9, Proceed to Step 4.5.4;

[0177] Step 4.5.10: If both pins A and B reach the escape point set SetPEP, proceed to the next step; otherwise, continue iterating and go to step 4.5.3.

[0178] Step 4.5.11: Save the number of iterations. If the standard deviation of the number of iterations in the latest 10 training iterations converges to less than 1, continue; otherwise, decrease epsilon and continue training, then go to step 4.5.2.

[0179] Step 4.5.12: If both pins A and B reach the predicted escape point set SetPEP, then save the Q table as the basis for simulating all nodes of this Monte Carlo tree, and Q learning is successful; otherwise, Q learning of the current node fails.

[0180] Preferably, the Q table is updated according to the following formula:

[0181]

[0182] Q(s t ,a t ) represents the state s at time step t. t Next, take action a t Action value; α represents the learning rate; r t+1 γ represents the reward value; γ represents the discount factor.

[0183] Preferably, the step of simulating routing for all extended child nodes using the Q-table specifically involves:

[0184] Step 4.6.1: For each child node in all expanded child nodes, NELN k Perform the following steps;

[0185] Step 4.6.2, if the child node NELN k If the positions S1 and S2 of the two pins A and B are both escape point sets SetPEP, then the Monte Carlo tree has successfully found the target, and no simulated routing is needed, ending this method; otherwise, perform the following simulated routing, where the routing proceeds from the head node Head to the extended node NELN. k SEP wiring k It is non-repeatable;

[0186] Step 4.6.3: If S1 is in the escape point set SetPEP, then proceed to step 4.6.6; otherwise, pin A moves to the Q table to find the maximum Q value at position S1 and it is not SEP. k Take one step in the direction to reach S1';

[0187] Step 4.6.4: If S1' is the analog routing area for pin B, it means that pins A and B meet at position S1'. Therefore, copy the routing of pin B after this point to pin A.Figure 6 As shown;

[0188] Step 4.6.5: If the analog wiring of the two pins has merged, S2' is directly equal to S1', and proceed to step 4.6.3; otherwise, continue with the analog wiring of pin B.

[0189] Step 4.6.6: If S2 is in the escape point set SetPEP, proceed to step 4.6.8; otherwise, pin B is in the Q table at position S2 with the maximum Q value and is not SEP. k Take one step in the direction to reach S2';

[0190] Step 4.6.7: If S2' is the analog routing area of ​​pin A, it means that pin A and B meet at position S2'. Then, copy the routing of pin A after this point to pin B.

[0191] Step 4.6.8: If S1' or S2' reaches another difference pair dp with a smaller right-of-way... j If the routing area is defined, then the routing of the current differential pair can encroach on this routing area to preserve the routing of other differential pairs (dp). j To node NELN k In the process, if the Monte Carlo tree path of the final wiring scheme passes through node NELN k This will affect the difference pair dp j Remove and re-insert the stitches;

[0192] Step 4.6.9: If both S1' and S2' reach the escape point set SetPEP, then the simulation wiring is complete; otherwise, continue.

[0193] Step 4.6.10: Update S1 to S1' and S2 to S2', then proceed to step 4.6.2.

[0194] Preferably, the current difference pair dp i In the preceding difference pair dpP i escape point epP i and subsequent difference pairs dpN i Escape point epN i The specific determination of whether a set of predicted legal escape points, SetPEP, exists is as follows:

[0195] Step 6.1, Current difference pair dp i The preorder difference pair is dpP i The sequence number is P, and the escape point is epP. i The subsequent difference pairs are dpN i The sequence number is N (N>i>P), and the escape point is epN. i ;

[0196] Step 6.2, if the escape point epP iWith epN i If the number of remaining escape points is less than (NP-1), it means that the number of remaining escape points is insufficient for the difference pair dpP. i and dpN i If the remaining difference pairs escape, return false; otherwise, continue.

[0197] Step 6.3: Divide the escape point interval [epP] i +iP,epN i All escape points between -(Ni)] are treated as difference pairs dp i The predicted set of legal escape points, SetPEP. Figure 7 As shown, in the second round of prediction, the escape point of complex difference pair 37 is between the escape points of the preceding difference pair 35 and the following difference pair 38. The escape points in the red box are left for difference pair 36, and the escape points in the remaining yellow boxes are used as the set of predicted escape points for difference pair 37.

[0198] The above are preferred embodiments of the present invention. Any changes made to the technical solution of the present invention that do not exceed the scope of the technical solution of the present invention shall fall within the protection scope of the present invention.

Claims

1. A method for differential pair ordered escape routing based on improved Monte Carlo tree search, characterized in that, Specifically, the following steps are included: Step 1, for all differential pairs dp i (i∈[1,n]) are sorted in ascending order of the estimated length cost of differential pair escape, and are added to the queue Round1, where the estimated length cost of differential pair escape is taken as the initial path weight PW of the differential pair i ; Step 2, if the queue Roundl has no differential pair, go to Step 5; otherwise pop the first differential pair dp from the queue Roundl i ; Step 3, if the differential pair dp i If the predicted legal escape point set SetPEP is not found, the differential pair dp i is added to the queue Round2, go to Step 2; otherwise, continue to the next step; Step 4, routing the differential pair dp according to the Monte Carlo tree search algorithm i and the differential pair dp i Escape point set SetPEP is routed, if the routing is successful and the differential pair dp i is not popped from the queue Round3, the differential pair dp i is added to the queue Round3, and the routing fails, the differential pair dp i is added to the queue Round2; Step 5, if the queue Round2 has no differential pair, go to Step 8; otherwise pop a differential pair dp from the queue Round2 i as the current differential pair dp i ; Step 6, if the current difference pair dp i there is a predicted legal escape point set SetPEP between the predecessor difference pair dpP i the escape point epP i and the successor difference pair dpN i the escape point epN i , go to Step 4, otherwise continue to next step; Step 7, remove the predecessor differential pair dpP i and the successor differential pair dpN i The wiring of the differential pair with the least right-of-way in the middle road, to ensure the current differential pair dp i There can be a set of escape points SetPEP, increase the right-of-way PW i of the current differential pair dp i and join the queue Round2, go to step 5; Step 8: If there are no difference pairs in queue Round 3, proceed to step 10; Otherwise pop a differential pair dp from the queue Roun3 i As the current differential pair dp i ; Step 9, set the current differential pair dp i the right of way PW i is the minimum, go to step 6; Step 10: Save all differential pair routing paths and end the routing process.

2. The method of claim 1, wherein, The calculation of the estimated escape length cost using the difference pair is as follows: dis = Manhattan distance of two pins + shortest distance of pin midpoint to border Manhattan distance of two pins = |X Ai - X Bi | + |Y Ai - Y Bi | Shortest distance from pin center to border = min(X midi , Y midi , Width-X midi , Height-Y midi ) dis represents the estimated wiring length; X Ai dis represents the estimated wiring length; X Bi dis represents the estimated wiring length; X Ai dis represents the estimated wiring length; X Bi dis represents the estimated wiring length; X midi dis represents the estimated wiring length; X midi dis represents the estimated wiring length; X 3. The method of claim 1, wherein, In step 3, the finding of the escape point set SetPEP of the current differential pair dp i is as follows: if there are other pins that are not routed in the quadrangle formed by the connection of the two pins of the current differential pair dp i and the nearest boundary, the escape point set SetPEP cannot be found; otherwise, the escape points contained by the projection of the connection of the current differential pair on the boundary are taken as the predicted legal escape point set SetPEP of the current differential pair dp i .

4. The method of claim 1, wherein, The differential pair dp is searched according to the Monte Carlo tree search algorithm i and the differential pair dp i The wiring of the escape point set SetPEP specifically includes the following steps: Step 4.1, initialize the Monte Carlo tree head node Head and all its legal child nodes with the two pin positions of the differential pair dp, start a Monte Carlo tree search iteration; i Step 4.1, initialize the Monte Carlo tree head node Head and all its legal child nodes with the two pin positions of the differential pair dp, start a Monte Carlo tree search iteration; Step 4.2: If the iteration ends, proceed to step 4.10; otherwise, continue to the next step. Step 4.3: Starting from the head node (Head), select the child node with the largest UCT value each time, until the leaf node LN of the Monte Carlo tree is reached. The UCT calculation formula is as follows: R k denotes the total reward of node k; N k denotes the number of times node k is visited; N denotes the number of times the parent node of node k is visited; c denotes an exploration parameter for controlling the balance between exploration and exploitation. Step 4.4, expand the leaf node LN and select one of its child nodes NELN k ; Step 4.5, if the Monte Carlo tree has a Q table, skip Q learning, continue to next step; otherwise, perform Q learning according to the pin position and the set of escape points SetPEP of the child node NELN k , if the Q learning succeeds, obtain the Q table, continue to next step, if the Q learning fails, delete the current child node NELN k , and perform Q learning according to the pin position and the set of escape points SetPEP of another child node NELN k , until the Q learning succeeds, continue to next step; if all the Q learning performed by all the child nodes NELN k fails, the current differential pair dp i fails to be routed, go to Step 4.12; Step 4.6: Use the Q-table to simulate routing for all extended child nodes NELN; Step 4.7, respectively, to each sub-node NELN k The reward value is calculated and the reward value and the access times are updated, the sub-node NELN k The reward value is calculated and the reward value and the access times are updated, the sub-node NELN r indicates child node NELN k The reward value after simulating wiring; D A D represents the length of a single wire in the analog wiring of pin A. B R(v) represents the single-wire length of the simulated routing at pin B; L represents the double-wire length after pins A and B merge; R(v) represents the reward value of node v; N(v) represents the number of visits to node v; Selection Path represents the path from the root node Head to the child node NELN. k The path to choose; Step 4.8: If the current simulated cabling scheme SlnN is better than the previous best cabling scheme SlnBest, that is, the reward value r is higher, then update the best cabling scheme SlnBest to the current simulated cabling scheme SlnN. Step 4.9: If the optimal routing scheme SlnBest converges, that is, the routing scheme remains unchanged in a certain number of iterations, then proceed to step 4.11; otherwise, proceed to step 4.

2. Step 4.10: If the wiring scheme SlnBest exists, the wiring is successful, continue to the next step; otherwise, the wiring fails, go to step 4.

12. Step 4.

11. If the optimal wiring scheme requires the removal of wiring for other differential pairs dp j , remove the wiring for other differential pairs dp j and add the removed differential pairs dp j to the queue Round 2 for rewiring; Step 4.12, if the wire-up is successful and the differential pair dp i is not popped from the queue Round3, then the differential pair dp i is added to the queue Round3; if the wire-up fails then the differential pair dp i is given right-of-way and the differential pair dp i is added to the queue Round2.

5. The method of claim 4, wherein, The two pin positions of the differential pair dp i The initialization of the Monte Carlo tree head node Head and all its legal child nodes using the two pin positions of the differential pair dp specifically comprises the following steps: Step 4.1.1: Number the six wiring areas around the differential pair pins from the top left corner, starting from the top left corner, in a clockwise direction, from 1 to 6; Step 4.1.2: Starting from the wiring area position with the two pins having the same odd or even position, 18 matching methods are obtained, including 1-1, 1-3, 1-5, 2-2, 2-4, 2-6, 3-3, 3-5, 3-1, 4-4, 4-6, 4-2, 5-5, 5-1, 5-3, 6-6, 6-2, and 6-4, which respectively form 18 Monte Carlo tree nodes. Step 4.1.3: Perform the following checks on all nodes. If all nodes have been checked, end the initialization of the head node. Step 4.1.4: If any of the routing areas corresponding to the two pins in the routing area represented by the current node has an obstacle or is occupied by a differential pair with equal or higher path weight, then discard the current node and return to step 4.1.4 to determine the next node; otherwise, continue to the next step. Step 4.1.5: If the routing area represented by the current node is occupied by a differential pair dp with a lower priority, then the node can encroach on the routing area of ​​the differential pair dp, disconnect all the differential pairs dp and add them to the queue Round2 to wait for rerouting. Step 4.1.6: Make the current node a child node of the head node; return to step 4.1.4 to determine the next node.

6. The method of claim 4, wherein, In step 4.4, expanding the leaf node LN specifically involves: Step 4.4.1: Check the single-wire length of the two pins of the leaf node LN in the previous simulated wiring. If the single-wire lengths of the two pins are the same, proceed to step 4.4.3; otherwise, continue to the next step. Step 4.4.2, if one of the two pins has a longer single wire length and the other has a shorter single wire length, the pin with the longer single wire length only expands in one direction, i.e. the direction in which the pin with the longer single wire length is currently located in the last simulation wiring, and the pin with the shorter single wire length expands in all feasible and legal directions, i.e. the directions without obstacles and without being occupied by wiring areas of differential pairs with equal or higher road rights; go to step 4.4.4; Step 4.4.3, if the single wire lengths of pins A and B are equal, pins A and B both expand in all feasible and legal directions, i.e. the directions without obstacles and without being occupied by wiring areas of differential pairs with equal or higher road rights; Step 4.4.4, combine the directions expanded by pins A and B to form all child nodes of the leaf node LN.

7. The method of claim 4, wherein, The Q learning in step 4.5 is specifically: Step 4.5.1, if the current difference pair dp i If the Monte Carlo tree formed has been Q-learned and a Q-table obtained, then end this step, otherwise continue with the next step; Step 4.5.2, start Q learning training, at most nTrain times of training, and if the training exceeds nTrain times, go to step 4.5.12; Step 4.5.3, for each training, start iteration, at most mIteration times of iteration, and if the iteration exceeds mIteration times, go to step 4.5.11; Step 4.5.4, apply the following strategy to pins A and B of the current differential pair dp i respectively, and go to Step 4.5.10 when both pins are done. Step 4.5.5, if the current pin p (p∈{A,B}) position S has reached the escape point set SetPEP, go to step 4.5.4 to calculate the next pin, otherwise continue to the next step; Step 4.5.6, randomly generate a random number num, if num is less than the exploration probability epsilon, pin p randomly walks one step in a direction from position S to position S'; otherwise, walk one step in the direction with the maximum Q value of position S to position S'; Step 4.5.7, if position S' is an obstacle or a wiring area of another differential pair with greater road rights, the reward value is -1; if it reaches the escape point set SetPEP, the reward value is 1; if it reaches the boundary escape point outside the escape point set SetPEP, the reward value is -0.1, so as to avoid the influence of wiring occupying boundary resources on the escape of other differential pairs; in other cases, the reward value is 0; Step 4.5.8, update the Q table; Step 4.5.9, go to step 4.5.4; Step 4.5.10, if both pins A and B reach the escape point set SetPEP, continue to the next step; otherwise, continue iteration and go to step 4.5.3; Step 4.5.11, save the number of iterations, if the standard deviation of the number of iterations of the latest 10 training converges to less than 1, continue; otherwise, reduce epsilon and continue training, go to step 4.5.2; Step 4.5.12, if both pins A and B reach the predicted escape point set SetPEP, save the Q table as the basis for simulation of all nodes of the Monte Carlo tree, and the Q learning is successful; otherwise, the current node Q learning fails.

8. The method of claim 7, wherein, The Q table is updated according to the following formula: Q(s t ,a t ) represents the action value of taking action a t at state s t at time step t; a represents a learning rate; r t+1 represents a reward value; and g represents a discount factor.

9. The method of claim 4, wherein, The simulation wiring of all expanded child nodes using the Q table is specifically: Step 4.6.1, for each subnode NELN in all expanded subnodes k The following steps are performed; Step 4.6.2, if the two pins A and B of the sub-node NELN k are both escape point sets SetPEP, the Monte Carlo tree successfully searches the target, without simulating the routing, ending this method; otherwise, the following simulated routing is performed, in which the routing SEP k from the head node Head to the expanded node NELN k is not repeatable routing. Step 4.6.3, if S1 is in the set of escape points SetPEP, go to step 4.6.6; otherwise, move the finger A one step in the direction of the maximum Q value at S1 position in the Q table and not SEP k to S1'; Step 4.6.4, if S1'is the analog routing region of pin B, meaning that pins A and B meet at the location of S1 ', then copy the routing of pin B after this to pin A; Step 4.6.5, if the analog routing of both pins has already merged, then S2' is directly equal to S1 ', go to Step 4.6.3; otherwise continue the analog routing of pin B; Step 4.6.6, if S2 is in the set of escape points SetPEP, then go to Step 4.6.8; Otherwise pin B goes to the Q table at S2 for the largest Q value and not SEP k and goes one step in the direction of S2'; Step 4.6.7, if S2' is the analog routing region of pin A, meaning that pins A and B meet at the location of S2', then copy the routing of pin A after this to pin B; Step 4.6.8, if S1' or S2' reaches a wiring area of other differential pair dp j with less right, then the wiring of current differential pair can invade this wiring area, saving other differential pair dp j to node NELN k , if the Monte Carlo tree path of final wiring scheme passes through node NELN k , then the differential pair dp j will be rewired. Step 4.6.9, if both S1'and S2' have reached the set of escape points SetPEP, then complete the analog routing, otherwise continue Step 4.6.10, update S1 to S1'and S2 to S2', go to Step 4.6.

2.

10. The method of claim 1, wherein, Current difference pair dp i In-preceding difference pair dpP i Escape point epP i And post-sequencing difference pair dpN i Escape point epN i The judgment of whether there is a predicted legal escape point set SetPEP between the preceding difference pair dpP and the post-sequencing difference pair dpN is as follows: Step 6.1, current differential pair dp i preceding differential pair is dpP i , with a sequence number P and an escape point epP i , succeeding differential pair is dpN i , with a sequence number N (N>i>P) and an escape point epN i ; Step 6.2, if the number of escape points remaining between epP i and epN i is less than (N-P-1), it means that the number of escape points remaining is not enough for the differential pair dpP i and dpN i to escape, return false; otherwise continue; Step 6.

3. All escape points between the escape point interval [epP i + i-P, epN i are taken as a differential pair dp i SetPEP.

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