Semiconductor quantum dot quantum bit readout electronics system based on FPGA

Abstract

The invention provides a semiconductor quantum dot and quantum bit readout electronics system based on an FPGA, and relates to signal processing and semiconductor quantum dot and quantum bit measurement and control, and the readout electronics system comprises a signal acquisition module, a control processing module, a signal output module, a communication module and a storage module. The signal acquisition module is used for acquiring and measuring a quantum bit state to obtain a digital signal; the control processing module is connected with the signal acquisition module, and is used for generating waveform data and pulse signals acting on the radio frequency electrode to dynamically drive quantum bits, and processing the digital signals to obtain read-out signal analysis data; the control processing module comprises a central control unit, a digital down-conversion unit, a threshold value processing unit, a spectrum analysis unit, a waveform generation unit and a pulse generation unit.

Description

Technical Field

[0001] The present disclosure relates to the technical fields of signal processing and semiconductor quantum dot qubit measurement and control technology, and in particular to a semiconductor quantum dot qubit readout electronics system based on FPGA. Background Art

[0002] As a new type of computing method, quantum computing is expected to solve problems that are too complex for classical computers and has received extensive attention since it was proposed. Among various physical systems, semiconductor quantum dot qubits have become one of the most promising systems for realizing fault-tolerant quantum computing due to their long coherence time, good controllability, and compatibility with modern advanced integrated circuit manufacturing processes.

[0003] When the existing semiconductor quantum dot qubit chips are working, the used electronics measurement and control system consists of various independent instruments, and each instrument needs to be coordinated and controlled by a host computer. As a result, each instrument needs to communicate with the host computer frequently through a communication bus, leading to problems such as large volume, low integration, poor flexibility, and high data latency in the existing readout electronics system, seriously affecting the experimental efficiency. Moreover, the existing traditional readout electronics system down-converts the radio frequency signal in the quantum system through an analog down-conversion front-end circuit, samples it digitally using a low-speed ADC, and then transmits it to the host computer for data processing. The analog down-conversion front-end circuit includes devices such as a local oscillator, a mixer, and a low-pass filter. Currently, a large number of analog devices in the down-conversion front-end make the system structure complex, and the introduced noise and insertion loss will reduce the system performance. At the same time, for multi-channel semiconductor quantum dot qubit signal readout, different analog down-conversion front-end circuits need to be designed, resulting in high equipment development and maintenance costs, a large amount of energy consumption, and a large amount of equipment installation space occupied. Summary of the Invention

[0004] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a semiconductor quantum dot qubit readout electronics system based on FPGA.

[0005] To achieve the above object, the technical solution of the present disclosure is as follows:

[0006] According to an embodiment of the present disclosure, there is provided a semiconductor quantum dot qubit readout electronics system based on FPGA, including a signal acquisition module, a control and processing module, a signal output module, a communication module, and a storage module.

[0007] The signal acquisition module is used to acquire digital signals obtained by measuring the quantum bit state of semiconductor quantum dots; the control and processing module is connected to the signal acquisition module, and is used to generate waveform data and pulse signals acting on the radio frequency electrodes to dynamically drive the quantum bits of semiconductor quantum dots, and process the digital signals to obtain readout signal analysis data; the control and processing module includes a central control unit, a digital down-conversion unit, a threshold processing unit, a spectrum analysis unit, a waveform generation unit, and a pulse generation unit; the digital down-conversion unit is used to process the digital signals to obtain baseband IQ data with reduced frequency; the threshold processing unit is used to find the threshold data of the baseband IQ data, and accordingly judge whether electrons jump into or out of the quantum dots and perform high and low counting to obtain high and low signal count data; the spectrum analysis unit is used to perform time-domain to frequency-domain conversion on the digital signals output by the signal acquisition module and the baseband IQ data to obtain frequency-domain data and perform frequency analysis; the readout signal analysis data includes the baseband IQ data, the frequency-domain data, the threshold data, and the high and low signal count data; the central control unit is used to control the waveform generation unit to generate the required waveform signals in real time by direct digital synthesis, and control the pulse generation unit to generate the required pulse signals.

[0008] According to an embodiment of the present disclosure, the signal acquisition module includes a front-end preprocessing unit and an analog-to-digital conversion unit. The front-end preprocessing unit uses a balun transformer, and the analog-to-digital conversion unit uses an ADC chip; the signal output module is used to convert the digital-form signals generated by the control and processing module into analog signals and output them to the quantum system after processing; the signal output module includes a digital-to-analog conversion unit and a back-end processing unit; the digital-to-analog conversion unit uses a DAC chip to convert the digital signals output from the FPGA into analog signals; the back-end processing unit performs filtering processing on the analog signals, and uses a filter to filter out the image frequency signals that appear after sampling by the DAC chip.

[0009] According to an embodiment of the present disclosure, the control and processing module is configured and implemented in an FPGA chip.

[0010] According to an embodiment of the present disclosure, the digital down-conversion unit obtains baseband IQ data through digital demodulation and digital filtering processing. During digital demodulation, a quadrature local carrier that is coherent with the carrier of the readout signal in frequency and phase is generated by a direct digital frequency synthesizer, and the two are multiplied by a digital multiplier to complete coherent demodulation; during digital filtering, the IQ data after digital demodulation is processed by a digital low-pass filter to filter out unnecessary frequency components and out-of-band noise to obtain baseband IQ data.

[0011] According to an embodiment of the present disclosure, the threshold processing unit includes a threshold finding and a threshold judging function; the threshold finding is used to find the threshold point when the baseband IQ data waveform changes between high and low signals caused by electrons jumping in and out of the quantum dots; the threshold judging is used to judge the high and low signals of the baseband IQ data waveform and count the high and low signals, so as to judge the situation of electrons jumping in and out of the quantum dots.

[0012] According to an embodiment of the present disclosure, the spectrum analysis unit obtains the bandwidth, carrier frequency, and noise component frequency of the digital signal through frequency analysis; and the frequency distribution and power of the baseband IQ data.

[0013] According to an embodiment of the present disclosure, the waveform generating unit receives the instructions and configuration information sent by the central control unit and generates a waveform with a target frequency, amplitude, and phase in real time; the pulse generating unit receives the instructions and configuration information sent by the central control unit and generates and outputs a pulse signal with corresponding levels, start time, and duration according to the high and low levels, start time, and pulse width specified in the configuration information. The working instructions include a global reset instruction, an input channel gating instruction, an output channel gating instruction, and a unit operation instruction; the configuration information includes the local oscillator frequency parameter and filter passband bandwidth parameter configuration information in the digital down-conversion unit, the parameter configuration information of the number of sampling points of the spectrum analysis unit, the frequency, amplitude, and phase parameter configuration information of the waveform generating unit, the high and low levels, start time, and pulse width parameter configuration information of the pulse generating unit, and the initialization parameter configuration information of the readout electronics system.

[0014] According to an embodiment of the present disclosure, the readout electronics system further includes a storage module, and the storage module includes an on-chip storage unit and an off-chip storage unit of the FPGA, which are used to store the initialization configuration information of the readout electronics system and the readout signal analysis data. The on-chip storage unit of the FPGA is implemented by using the BRAM on the FPGA, and the off-chip storage unit is implemented by using DDR3 SDRAM.

[0015] The FPGA-based semiconductor quantum dot qubit readout electronics system of the present disclosure is based on direct radio frequency sampling technology, and can directly digitally sample and process radio frequency signals that could not be directly digitized before and required a large number of analog devices for front-end processing. By adopting digital demodulation and digital filtering methods, it replaces analog devices such as local oscillators, mixers, and filters in existing traditional readout electronics systems, eliminating the impacts of local oscillator leakage, quadrature mismatch, and poor scalability brought by analog devices, thus avoiding the problems of complex structure and system performance degradation caused by analog down-conversion front-end circuits. It improves the flexibility, scalability, and integration of the readout electronics system, providing a better way for the readout of semiconductor quantum dot qubits. Each unit of the control and processing module in the present disclosure is implemented in the FPGA and can be adjusted through programming, and can be optimized and customized according to the specific requirements of the experiment, improving the flexibility of the present readout electronics system. The present disclosure adopts a method of implementing the core control and processing function in the control and processing module in the FPGA to replace the existing method of implementing the core control and processing function by the host computer, reducing the communication requirements of each module and unit for the host computer, avoiding the additional data delay caused by the frequent communication between the existing traditional readout system and the host computer, and can process the readout signal in real time, significantly improving the experimental efficiency. The readout electronics system of the present disclosure is very suitable for the readout and processing of semiconductor quantum dot qubit signals, providing a technical basis for the subsequent multi-qubit readout and low-latency feedback control. Description of the Drawings

[0016] Through the following description of the embodiments of the present disclosure with reference to the drawings, the above and other objects, features, and advantages of the present disclosure will become clearer. In the drawings:

[0017] Figure 1 It is a schematic diagram of the composition of the FPGA-based semiconductor quantum dot qubit readout electronics system according to an embodiment of the present disclosure.

[0018] Figure 2 It is a schematic diagram of the specific composition architecture of the FPGA-based semiconductor quantum dot qubit readout electronics system according to an embodiment of the present disclosure. Detailed Embodiments

[0019] The present disclosure provides an FPGA-based semiconductor quantum dot qubit readout electronics system, which mainly includes a signal acquisition module, a control and processing module, a storage module, a signal output module, and a communication module, omitting large discrete instruments such as acquisition cards, signal generators, and arbitrary waveform generators compared with existing readout electronics systems. It reduces the number and volume of instruments and improves the integration of the readout electronics system.

[0020] To make the objectives, technical solutions, and advantages of the present disclosure more clear and understandable, the following further describes the present disclosure in detail with reference to specific embodiments and the accompanying drawings.

[0021] In an embodiment of the present disclosure, a semiconductor quantum dot qubit readout electronics system based on an FPGA is provided. Combining Figure 1 and Figure 2 as shown, the readout electronics system includes;

[0022] A signal acquisition module for acquiring digital signals obtained by measuring the state of semiconductor quantum dot qubits;

[0023] A control and processing module connected to the signal acquisition module for generating waveform data and pulse signals acting on the radio frequency electrodes to dynamically drive semiconductor quantum dot qubits, and processing the digital signals to obtain readout signal analysis data;

[0024] The control and processing module includes a central control unit, a digital down-conversion unit, a threshold processing unit, a spectrum analysis unit, a waveform generation unit, and a pulse generation unit; the digital down-conversion unit is used to process the digital signals to obtain baseband IQ data with reduced frequency; the threshold processing unit is used to find the threshold data of the baseband IQ data, and based on this, judge whether electrons jump into or out of the quantum dots and perform high and low counting to obtain high and low signal counting data; the spectrum analysis unit is used to perform a time-domain to frequency-domain conversion on the digital signals output by the signal acquisition module and the baseband IQ data to obtain frequency-domain data and perform frequency analysis; the readout signal analysis data includes the baseband IQ data, the frequency-domain data, the threshold data, and the high and low signal counting data; the central control unit is used to control the waveform generation unit to generate the required waveform signals in real time by direct digital synthesis, and control the pulse generation unit to generate the required pulse signals.

[0025] According to an embodiment of the present disclosure, the digital down-conversion unit obtains baseband IQ data through digital demodulation and digital filtering processing. During digital demodulation, a quadrature local carrier coherent with the carrier frequency and phase of the readout signal is generated by a direct digital frequency synthesizer, and the two are multiplied using a digital multiplier to complete coherent demodulation. During digital filtering, the IQ data after digital demodulation is processed by a digital low-pass filter to filter out unnecessary frequency components and out-of-band noise, obtaining baseband IQ data. The threshold processing unit includes threshold searching and threshold judging functions. Threshold searching is used to search for the threshold point when the waveform of the baseband IQ data changes between high and low signals caused by electrons jumping in and out of quantum dots. Threshold judging is used to judge the high and low signals of the baseband IQ data waveform and count the high and low signals, thereby judging the situation of electrons jumping in and out of quantum dots. The spectrum analysis unit obtains the bandwidth, carrier frequency, and noise component frequency of the digital signal through frequency analysis; and the frequency distribution and power of the baseband IQ data. The waveform generation unit receives the instructions and configuration information sent by the central control unit and generates a waveform with a target frequency, amplitude, and phase in real time. The pulse generation unit receives the instructions and configuration information sent by the central control unit and generates and outputs a pulse signal with corresponding levels, start times, and durations according to the high and low levels, start times, and pulse widths specified in the configuration information. The working instructions include global reset instructions, input channel gating instructions, output channel gating instructions, and unit operation instructions. The configuration information includes local oscillator frequency parameter and filter passband bandwidth parameter configuration information in the digital down-conversion unit, parameter configuration information of the number of sampling points in the spectrum analysis unit, parameter configuration information of frequency, amplitude, and phase in the waveform generation unit, parameter configuration information of high and low levels, start times, and pulse widths in the pulse generation unit, and initialization parameter configuration information of the readout electronics system.

[0026] According to an embodiment of the present disclosure, the control processing module is configured and implemented in an FPGA chip. More specifically, the central control unit, digital down-conversion unit, spectrum analysis unit, threshold processing unit, waveform generation unit, pulse generation unit, on-chip storage unit, and communication processing unit are all implemented in the FPGA and can all be adjusted through programming. They can be optimized and customized according to the specific requirements of experiments or applications, and can be specifically optimized to adapt to different working scenarios of semiconductor quantum dot qubits chips, meeting different needs of users and improving the flexibility of the readout electronics system of the present disclosure.

[0027] According to an embodiment of the present disclosure, the signal acquisition module includes a front-end preprocessing unit and an analog-to-digital conversion unit. The front-end preprocessing unit uses a balun transformer, and the analog-to-digital conversion unit uses an ADC chip; the signal output module is configured to convert the digital-form signal generated by the control processing module into an analog signal and output it to the quantum system after processing; the signal output module includes a digital-to-analog conversion unit and a backend processing unit; the digital-to-analog conversion unit uses a DAC chip to convert the digital signal output from the FPGA into an analog signal; the backend processing unit performs filtering processing on the analog signal, and uses a filter to filter out the image frequency signal that appears after sampling by the DAC chip.

[0028] More specifically, the function of the signal acquisition module is to preprocess the readout signal and convert the read analog data into digital form and send it to the control and processing module. The signal acquisition module includes a front-end preprocessing unit and an analog-to-digital conversion unit. The function of the front-end preprocessing unit is to perform processing such as filtering, amplifying, and conditioning on the received analog signal to make it meet the optimal working range of the analog-to-digital conversion unit, so that the subsequent analog-to-digital conversion process can be more accurate and efficient. The analog-to-digital conversion unit is connected to the front-end preprocessing unit, and it is used to convert the read analog data into digital form and send it to the control and processing module. The function of the control and processing module is to control each module in the readout electronics system and perform signal processing. The control and processing module is connected to the signal acquisition module. The control and processing module includes a central control unit, a digital down-conversion unit, a spectrum analysis unit, a threshold processing unit, a waveform generation unit, and a pulse generation unit. The function of the central control unit is to receive external working instructions and external configuration information to make the readout electronics system enter the working state and configure the parameters of each module and unit in the readout electronics system. The central control unit is also used to parallel control the data interaction between each module and unit in the readout electronics system. The digital down-conversion unit is connected to the signal acquisition module. The function of the digital down-conversion unit is to perform digital demodulation and digital filtering on the high-frequency digital signal input by the signal acquisition module to obtain baseband IQ data with reduced frequency. The spectrum analysis unit is connected to the signal acquisition module and the digital down-conversion unit. The function of the spectrum analysis unit is to convert the time-domain signal into the frequency domain to analyze its frequency information. The threshold processing unit is connected to the digital down-conversion unit. The function of the threshold processing unit is to find the threshold of the baseband IQ data and perform processing and analysis on it. The waveform generation unit, its function is to generate a waveform signal with a target frequency, amplitude, and phase based on the received instructions and configuration information. The pulse generation unit, its function is to generate a pulse signal with corresponding level, start time, and duration based on the received instructions and configuration information. The function of the storage module includes storing the initialization configuration information of the readout electronics system and the readout signal analysis data. The storage module includes an on-chip storage unit and an off-chip storage unit. The on-chip storage unit is used to store the initialization configuration information of the readout electronics system. The off-chip storage unit is used to store the readout signal analysis data of the control and processing module. One end of the communication module is connected to the control and processing module, and the other end is connected to the host computer. The function of the communication module is to realize high-speed data communication between the control and processing module and the host computer. The communication module includes a communication circuit unit and a communication processing unit. The function of the communication circuit unit is to realize high-speed data communication between the communication processing unit and the host computer. The function of the communication processing unit is to process the received data to realize data transmission between the communication circuit unit and the control and processing module. The function of the signal output module is to convert the digital-form signal sent by the control and processing module into an analog signal and perform processing. The signal output module is connected between the control and processing module and the semiconductor quantum dot quantum system.The signal output module includes a digital-to-analog conversion unit and a back-end processing unit. The function of the digital-to-analog conversion unit is to convert a signal in digital form into an analog signal. The back-end processing unit is connected to the digital-to-analog conversion unit. The function of the back-end processing unit is to perform processing such as filtering and amplification on the converted analog signal, and further optimize and adjust the output signal to meet the requirements of practical applications.

[0029] According to the embodiments of the present disclosure, the readout electronics system may include multiple input channels and output channels, for example, four input channels and four output channels. Each channel of the readout electronics system includes a central control unit, a digital down-conversion unit, a spectrum analysis unit, a threshold processing unit, a waveform generation unit, a pulse generation unit, an analog-to-digital conversion unit, a front-end preprocessing unit, a digital-to-analog conversion unit, a back-end processing unit, an on-chip storage unit, an off-chip storage unit, a communication processing unit, and a communication circuit unit. The above-mentioned channels can all operate in parallel.

[0030] In the embodiments of the present disclosure, the signal acquisition module is used to acquire the readout signal generated by receiving and measuring the state of semiconductor quantum dot qubits, and preprocess the readout signal to make it meet the optimal working range of the analog-to-digital conversion unit, and then convert the read analog data into digital form and send it to the control processing module. The signal acquisition module includes a front-end preprocessing unit and an analog-to-digital conversion unit. Since the signal obtained from the quantum system has been processed such as filtered and amplified, the front-end preprocessing unit in the embodiments of the present disclosure only uses a balun transformer. The function of the balun transformer is to convert the received single-ended signal into a differential signal to meet the differential input requirements of the analog-to-digital conversion unit, and at the same time adjust the amplitude to meet the optimal amplitude input range of the analog-to-digital conversion unit. The above-mentioned analog-to-digital conversion unit uses an analog-to-digital converter (i.e., an ADC chip). After converting the received analog signal into a digital signal, the digital signal is sent to the FPGA through a high-speed serial bus for the FPGA to process. The signal acquisition module in the embodiments of the present disclosure can directly perform radio frequency sampling on the radio frequency signal within the bandwidth of the ADC chip, so as to realize the acquisition and processing of the readout signal of semiconductor quantum dot qubits with signal frequencies within the ADC bandwidth.

[0031] In the embodiments of the present disclosure, the above-mentioned control processing module uses a Field-Programmable Gate Array (FPGA) chip to cooperate with and control other modules (signal acquisition module, signal output module, communication module, and storage module) of the readout electronics system and perform signal processing.

[0032] In the embodiments of the present disclosure, the central control unit receives the working instructions and configuration information sent by the host computer to enable the readout electronics system to enter the working state and configure the parameters of each module and unit in the readout electronics system. The central control unit is also used to parallel control the data interaction between each module and unit in the readout electronics system.

[0033] As Figure 2 shown, the central control unit acts as a core controller, and is respectively connected to one end of the analog-to-digital conversion unit, digital-to-analog conversion unit, on-chip storage unit, off-chip storage unit, communication processing unit, communication circuit unit, digital down-conversion unit, spectrum analysis unit, threshold processing unit, waveform generation unit and pulse generation unit to control the operation of each module and unit in the readout electronics system. Compared with the existing method of using the host computer as the core controller in the traditional readout electronics system, the method of using the central control unit implemented in the FPGA as the core controller in the present disclosure can flexibly configure the functions between each module and unit in the readout electronics system, reduce the dependence of each module and unit in the readout electronics system on the external host computer, enable the readout electronics system to not need to frequently obtain data from the host computer and perform data exchange through the communication bus during operation, reduce the data transmission delay, can process the readout signal in real time, and significantly improve the efficiency of the readout electronics system.

[0034] In the disclosed embodiment, the digital down-conversion unit is implemented by digital demodulation and digital filtering. The digital down-conversion unit is connected to the signal acquisition module, and the high-frequency digital signal input by the signal acquisition module is processed by digital demodulation and digital filtering to obtain baseband IQ data with reduced frequency. Compared with the existing traditional readout electronics system that realizes demodulation and filtering functions by analog devices, the digital down-conversion unit eliminates the adverse effects of local oscillator leakage, orthogonal mismatch and poor scalability brought by analog devices, thereby eliminating the technical problems of complex structure and reduced system performance caused by demodulation and filtering by analog devices, and improving the flexibility, scalability and integration of the readout electronics system. When the digital down-conversion unit is working, the digital demodulation is based on the configuration information and related control signals, for example, a direct digital frequency synthesizer can generate an orthogonal local carrier with the same frequency and phase as the carrier of the input semiconductor quantum dot quantum bit readout signal, and then a digital multiplier is used to multiply the two to complete coherent demodulation and obtain IQ data. Among them, IQ data refers to the complex data obtained after demodulation of the input waveform signal, where I represents the real part (In-phase) and Q represents the imaginary part (Quadrature). These IQ data contain the phase and amplitude information of the demodulated signal. Digital filtering is to process the digitally demodulated IQ data through a digital low-pass filter, filter out unnecessary frequency components and out-of-band noise, and obtain baseband IQ data for subsequent processing and analysis. The digital low-pass filter in the embodiment of the present disclosure can, for example, adopt a finite impulse response filter to take advantage of its system stability, easy to achieve linear phase, and allow multi-channel filtering.

[0035] In the disclosed embodiment, the threshold processing unit is used to find the threshold of the baseband IQ data and analyze it, so as to determine whether the electron jumps into or out of the quantum dot and counts the high and low signals to obtain the high and low signal count data for subsequent processing. The threshold processing unit includes threshold finding and threshold judgment functions when working. The threshold finding function is used to find the threshold point when the IQ waveform data caused by the electron jumping into and out of the quantum dot undergoes a high and low signal transition. The threshold judgment function is used to judge the high and low signals of the IQ waveform data and count to obtain the high and low signal count data, so as to judge the situation of the electron jumping into and out of the quantum dot, so as to perform subsequent processing and analysis. Compared with the existing traditional readout electronics system that performs threshold finding and threshold judgment in an external host computer, the readout electronics system disclosed in the present invention performs threshold finding and threshold judgment in the threshold processing unit in the FPGA, which reduces the number of communications with the host computer and the amount of data transmission, thereby reducing communication delays and reducing the operating load of the host computer, making the experimental process more efficient and smooth.

[0036] In the embodiments of the present disclosure, the spectrum analysis unit is connected to the signal acquisition module and the digital down-conversion unit, and performs a parallel conversion from the time domain to the frequency domain on the digital signal obtained by the signal acquisition module and the baseband IQ data obtained by the digital down-conversion unit, so as to analyze the frequency information of the above two. When performing frequency analysis on the digital signal obtained from the signal acquisition module, the function of the spectrum analysis unit is to observe the frequency characteristics of this digital signal, so as to obtain information such as the bandwidth, carrier frequency, and noise component frequency of this digital signal, which is convenient for subsequent local oscillator frequency selection and analysis and processing of noise components, etc.; the spectrum analysis unit is also used to find the resonance frequency. In a specific application or experimental process, since the charge sensor resistance, quantum parasitic capacitance, and inductance will form an RLC resonance circuit, when at the resonance frequency, a significant peak will appear in the frequency domain signal. Measuring the electron jumping in and out of the quantum dot at this resonance frequency is the most sensitive. Therefore, by analyzing the frequency distribution and corresponding power of this digital signal, it can be used to find this resonance frequency, replacing the need to connect the signal to a spectrum analyzer in the traditional readout electronics system for frequency search and analysis, improving the integration of the readout electronics system. When performing spectrum analysis on the baseband IQ data obtained from the digital down-conversion unit, the function of the spectrum analysis unit is to observe the frequency distribution and corresponding power of the baseband IQ data, which is convenient for subsequent processing; the spectrum analysis unit is also used to observe whether abnormalities occur during the signal processing of the digital down-conversion unit, such as whether demodulation errors and filtering errors occur, etc.; at the same time, the spectrum analysis unit can also optimize the design of the filter in the digital down-conversion unit according to the spectrum information of the baseband IQ data. In the embodiments of the present disclosure, the spectrum analysis unit is implemented using the fast Fourier transform algorithm, calculating the Fourier transform of the semiconductor quantum dot qubit readout signal to facilitate the extraction of frequency information. By replacing the traditional discrete Fourier transform algorithm with the fast Fourier transform algorithm, the number of multiplications required can be reduced, thereby reducing resource consumption and delay.

[0037] As Figure 2 shown, one end of the digital down-conversion unit, the spectrum analysis unit, and the threshold processing unit are all connected to one end of the off-chip storage unit and the communication processing unit. The baseband IQ data obtained after passing through the digital down-conversion unit, the frequency domain data obtained after passing through the spectrum analysis unit, the threshold data obtained after passing through the threshold processing unit, and the high and low signal count data will all be sent to the off-chip storage unit for storage and sent to the communication processing unit for data packet encapsulation.

[0038] In an embodiment of the present disclosure, one end of the waveform generation unit is connected to the central control unit, receiving instructions and configuration information sent by the central control unit to output a required digital waveform signal. The other end is connected to the signal output module, outputting the digital waveform signal to the digital-to-analog conversion unit in the signal output module to be converted into an analog signal and output after being processed by the backend processing unit. The waveform generation unit can generate a waveform with a certain frequency, amplitude, and phase in real time according to the instructions and configuration information. The waveform generation unit generates a waveform signal by means of direct digital synthesis, and can realize a waveform signal with high precision and adjustable frequency. One end of the pulse generation unit is connected to the central control unit, receiving instructions and configuration information sent by the central control unit, and the other end is connected to the signal output module. The pulse generation unit generates and outputs a pulse signal with corresponding levels, start time, and duration according to the high and low levels, start time, and pulse width specified in the configuration information. After the waveform signal and the pulse signal are output through the signal output module, they can act on the radio frequency electrode to dynamically drive the semiconductor quantum dot qubit to realize the read excitation function.

[0039] In an embodiment of the present disclosure, one end of the communication module is connected to the control processing module, and the other end is connected to the host computer. The function of the communication module is to realize high-speed data communication between the control processing module and the host computer. The communication module receives the working instructions and configuration information sent by the host computer and sends the working instructions and configuration information to the control processing module. The communication module is also used to receive the readout signal analysis data processed by the control processing module and send it to the host computer for the user to process and analyze in the host computer to obtain information about the semiconductor quantum dot qubit. The function of the communication circuit unit is to receive the data packet containing the working instructions and configuration information sent by the host computer and send it to the communication processing unit, and is also used to receive the readout signal analysis data encapsulated and processed by the communication processing unit and send it to the host computer. The function of the communication processing unit is to unpack the data packet containing the working instructions and configuration information sent by the communication circuit unit and send it to the control processing module, and is also used to encapsulate the readout signal analysis data sent by the control processing module and send it to the communication circuit unit. In an embodiment of the present disclosure, the communication module can be implemented using the gigabit Ethernet communication protocol. Specifically, the communication circuit unit consists of a gigabit Ethernet physical layer transceiver, an RJ45 interface, and a network cable. The communication processing unit is implemented by performing data packet encapsulation algorithms and data packet decapsulation algorithms in the FPGA. The data packet encapsulation algorithm will add necessary flag information (such as headers and tails) to the readout signal analysis data sent by the control processing module according to the requirements of the protocol for data packet encapsulation to meet the protocol standard and perform data transmission; the data packet decapsulation algorithm will unpack and analyze the data packet containing the working instructions and configuration information sent by the host computer, extract the working instructions and configuration information from it, and parse the flag information layer by layer.

[0040] In the embodiments of the present disclosure, the readout signal analysis data that the control processing module needs to send to the host computer specifically refers to the baseband IQ data of the digital down-conversion unit, the frequency-domain data of the spectrum analysis unit, and the threshold data and high-low signal count data of the threshold processing unit. The working instructions specifically refer to the global reset instruction, the input channel gating instruction, the output channel gating instruction, and the unit operation instruction. The configuration information includes the local oscillator frequency parameter and the filter passband bandwidth parameter configuration information in the digital down-conversion unit, the parameter configuration information of the number of sampling points of the spectrum analysis unit, the parameter configuration information of the frequency, amplitude, and phase of the waveform generation unit, the parameter configuration information of the high and low levels, the start time, and the pulse width of the pulse generation unit, as well as the initialization parameter configuration information of the electronics system.

[0041] In the embodiments of the present disclosure, the function of the storage module is to store the initialization configuration information and the readout signal analysis data of the readout electronics system. The storage module is connected to the control processing module. The storage module includes an on-chip storage unit and an off-chip storage unit. The on-chip storage unit is implemented by using the BRAM on the FPGA. Since the storage capacity of the BRAM is small, in the embodiments of the present disclosure, it is only used to store the initialization configuration information of the readout electronics system. The initialization configuration information is the default configuration of the readout electronics system or the operating parameters configured during the previous run. When the readout electronics system is powered on and started, if the initialization configuration information sent by the host computer is not received, the central control unit obtains the initialization configuration information through the on-chip storage unit and configures the initialization parameters. If the central control unit receives new initialization parameter configuration information subsequently, it updates the initialization parameters of each module and unit and stores them in the on-chip storage unit. The off-chip storage unit can be implemented by using DDR3 SDRAM and is used to store the readout signal analysis data obtained in the control processing module, such as the baseband IQ data obtained by the digital down-conversion unit, the frequency-domain data obtained in the spectrum analysis unit, and the threshold data and high-low signal count data obtained by the threshold processing unit, so as to view and process the previous experimental data.

[0042] In the embodiments of the present disclosure, the function of the signal output module is to convert the digital-form signal sent by the control processing module into an analog signal and output it to the quantum system after processing. The signal output module includes a digital-to-analog conversion unit and a backend processing unit. The digital-to-analog conversion unit uses a digital-to-analog converter (i.e., a DAC chip) to convert the digital signal output from the control processing module into an analog signal. In the embodiments of the present disclosure, the backend processing unit only performs filtering processing on the analog signal, and uses a filter to filter out the image frequency signal that appears after sampling by the DAC chip to improve the signal quality to meet the requirements of the quantum system.

[0043] For the readout signals of semiconductor quantum dot qubits with different carrier frequencies and different bandwidths, the readout electronics system of the present disclosure only needs to change the local oscillator frequency parameter used in the digital down-conversion unit and the passband bandwidth parameter configuration information of the digital low-pass filter, ensuring that the readout electronics system of the present disclosure can realize the readout and processing of different semiconductor quantum dot qubit readout signals.

[0044] In the embodiments of the present disclosure, due to the parallel architecture of the FPGA, the operation processes of the units in the above-mentioned control and processing module can all be controlled and run in parallel by the central control unit. For example, during the process of the digital down-conversion unit processing data, the waveform generation unit can generate waveforms simultaneously.

[0045] So far, the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It should be noted that, in the accompanying drawings or the main text of the specification, the implementation manners that are not illustrated or described are all forms known to those of ordinary skill in the art and have not been described in detail. In addition, the definitions of the above-mentioned various elements and methods are not limited to the specific structures, shapes or manners mentioned in the embodiments, and those of ordinary skill in the art can make simple changes or substitutions to them.

[0046] It should be noted that, in this article, unless otherwise specified, an element with "one" does not mean having only one such element, but may have one or more such elements.

[0047] In addition, in this article, unless otherwise specified, ordinal numbers such as "first" and "second" are only used to distinguish multiple elements with the same name, and do not indicate the existence of a rank, level, execution order, or process order between them. A "first" element and a "second" element may appear in the same component together, or in different components respectively. The existence of an element with a larger ordinal number does not necessarily mean the existence of another element with a smaller ordinal number.

[0048] In this article, unless otherwise specified, the so-called feature A "or" (or) or "and / or" (and / or) feature B means that A exists alone, B exists alone, or A and B exist simultaneously; the so-called feature A "and" (and) or "and" (and) or "and" (and) feature B means that A and B exist simultaneously; the so-called "include", "contain", "have", "contain" means including but not limited to this.

[0049] In addition, in this text, terms such as "upper", "lower", "left", "right", "front", "rear", or "between" are only used to describe the relative positions between multiple components, and in the interpretation, it can be extended to include cases of translation, rotation, or mirroring. In addition, in this text, unless specifically specified, the statement "one component is on another component" or a similar statement does not necessarily mean that the component contacts the other component.

[0050] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to those listed above, and can be changed or rearranged according to the required design. And the above embodiments can be used in combination with each other or in combination with other embodiments based on considerations of design and reliability, that is, the technical features in different embodiments can be freely combined to form more embodiments.

[0051] The specific embodiments described above have further elaborated on the purpose, technical solutions, and beneficial effects of the present disclosure. It should be understood that the above are only specific embodiments of the present disclosure and are not used to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A semiconductor quantum dot quantum bit readout electronics system based on FPGA, including a signal acquisition module, a control processing module, a signal output module, a communication module and a storage module; A signal acquisition module is used to acquire and measure the state of semiconductor quantum dot quantum bits to obtain digital signals; A control processing module, connected to the signal acquisition module, for generating waveform data and pulse signals acting on the radio frequency electrodes to dynamically drive the semiconductor quantum dot quantum bits, and processing the digital signals to obtain readout signal analysis data; The control and processing module includes a central control unit, a digital down-conversion unit, a threshold processing unit, a spectrum analysis unit, a waveform generating unit and a pulse generating unit; the digital down-conversion unit is used to process the digital signal to obtain baseband IQ data with reduced frequency; the threshold processing unit is used to find the threshold data of the baseband IQ data, and judge whether the electron jumps into or out of the quantum dot based on it and perform high and low counts to obtain high and low signal count data; the spectrum analysis unit is used to convert the digital signal output by the signal acquisition module and the baseband IQ data from time domain to frequency domain to obtain frequency domain data and perform frequency analysis; the readout signal analysis data includes the baseband IQ data, the frequency domain data, the threshold data, and the high and low signal count data; the central control unit is used to control the waveform generating unit to generate the required waveform signal in real time by direct digital synthesis, and control the pulse generating unit to generate the required pulse signal.

2. According to the system of claim 1, the signal acquisition module includes a front-end preprocessing unit and an analog-to-digital conversion unit, the front-end preprocessing unit adopts a balun transformer, and the analog-to-digital conversion unit adopts an ADC chip; the signal output module is used to convert the digital signal generated by the control processing module into an analog signal and output it to the quantum system after processing; the signal output module includes a digital-to-analog conversion unit and a back-end processing unit; the digital-to-analog conversion unit adopts a DAC chip, which is used to convert the digital signal output from the FPGA into an analog signal; the back-end processing unit performs filtering processing on the analog signal, and uses a filter to filter out the image frequency signal that appears after sampling by the DAC chip.

3. According to the system of claim 1, the control processing module is configured and implemented in an FPGA chip. 4 . The system according to claim 3 , wherein the digital down-conversion unit obtains baseband IQ data through digital demodulation and digital filtering.

5. According to the system of claim 4, during digital demodulation, a direct digital frequency synthesizer generates an orthogonal local carrier with the same frequency and phase as the carrier of the read signal, and a digital multiplier is used to multiply the two to complete coherent demodulation; during digital filtering, a digital low-pass filter is used to process the digitally demodulated IQ data to filter out unnecessary frequency components and out-of-band noise to obtain baseband IQ data.

6. According to the system of claim 3, the threshold processing unit includes threshold finding and threshold judgment functions; the threshold finding is used to find the threshold point when the baseband IQ data waveform undergoes a high-low signal transition caused by electrons jumping in and out of the quantum dot; the threshold judgment is used to judge the high and low signals of the baseband IQ data waveform and count the high and low signals, thereby judging the situation of electrons jumping in and out of the quantum dot.

7. The system according to claim 3, wherein the spectrum analysis unit obtains the bandwidth, carrier frequency, noise component frequency of the digital signal and the frequency distribution and power of the baseband IQ data by performing frequency analysis.

8. According to the system of claim 3, the waveform generating unit receives the instructions and configuration information sent by the central control unit to generate a waveform with a target frequency, amplitude and phase in real time; the pulse generating unit receives the instructions and configuration information sent by the central control unit, and generates and outputs a pulse signal with a corresponding level, start time and duration according to the level, start time and pulse width specified in the configuration information.

9. According to the system of claim 8, the working instructions include global reset instructions, input channel selection instructions, output channel selection instructions and unit operation instructions; the configuration information includes the local oscillator frequency parameter and filter passband bandwidth parameter configuration information in the digital down-conversion unit, the parameter configuration information of the number of sampling points of the spectrum analysis unit, the parameter configuration information of the frequency, amplitude and phase of the waveform generation unit, the parameter configuration information of the level, start time and pulse width of the pulse generation unit, and the initialization parameter configuration information of the readout electronics system.

10. The system according to claim 1 further includes a storage module, which includes an FPGA on-chip storage unit and an off-chip storage unit, and is used to store initialization configuration information of the readout electronics system and readout signal analysis data, wherein the FPGA on-chip storage unit is implemented using BRAM on the FPGA, and the off-chip storage unit is implemented using DDR3 SDRAM.

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