Broadband silicon-based SU-8 dielectric resonant antenna array and preparation method thereof

Abstract

The invention relates to a broadband silicon-based SU-8 dielectric resonant antenna array and a preparation method thereof, the broadband silicon-based SU-8 dielectric resonant antenna array comprises a feed substrate, an SU-8 layer arranged on the feed substrate and a dielectric resonator located in the SU-8 layer, and the dielectric resonator comprises a dielectric main body and a first metal layer; the feed substrate comprises a second metal layer, a dielectric layer and a third metal layer. According to the invention, high-resistance silicon is used as a main body dielectric resonator, a template provided with a cavity is manufactured on a feed substrate by using SU-8 photoresist in a coupling feed mode, high-precision manufacturing and array composition of the dielectric resonant antenna are realized, and rapid assembly and accurate positioning are realized; and meanwhile, the antenna has a wider working frequency band, and has the advantages of simple process steps, low cost and capability of being quickly manufactured in batches.

Description

Technical Field

[0001] The present invention relates to a technology in the field of radio frequency semiconductor devices, specifically a broadband silicon-based SU-8 dielectric resonator antenna array and a preparation method thereof. Background Art

[0002] Dielectric resonator antennas use dielectric resonators as radiation elements, without metal radiation patches, avoiding conductor losses. Compared with printed metal antennas such as patch antennas using printed circuit board technology, they have higher radiation efficiency and have important application value in the millimeter-wave band. After arraying, the dielectric resonator antenna array has higher gain, which will help overcome the atmospheric attenuation in the millimeter-wave band and compensate for path loss. However, the inherent processing accuracy of the existing PCB process and the assembly accuracy of the dielectric resonator are both difficult to meet the technical requirements, resulting in low antenna performance. Summary of the Invention

[0003] Aiming at the many deficiencies of the existing PCB process for dielectric resonator antennas, such as poor processing accuracy in the field, large alignment errors, narrow working bandwidth of the silicon-based semiconductor process, time / size lag effect of the etching process itself resulting in time-consuming process, and poor array uniformity, the present invention proposes a broadband silicon-based SU-8 dielectric resonator antenna array and a preparation method thereof. High-resistance silicon is used as the main dielectric resonator, and a template with a cavity is made on the feeding substrate using SU-8 photoresist by means of coupled feeding to achieve high-precision manufacturing and array composition of the dielectric resonator antenna, and rapid assembly and precise positioning; at the same time, it has a wider working frequency band and has the advantages of simple process steps, low cost, and rapid mass production.

[0004] The present invention is realized through the following technical solutions:

[0005] The present invention relates to a broadband silicon-based SU-8 dielectric resonator antenna array, including: a feeding substrate, an SU-8 layer disposed thereon, and a dielectric resonator located in the SU-8 layer, wherein: the dielectric resonator includes a dielectric body and a first metal layer; the feeding substrate includes: a second metal layer, a dielectric layer, and a third metal layer.

[0006] The dielectric body is located on the second metal layer and is separated from it by the first metal layer.

[0007] The first metal layer is provided with metal slits for adjusting the impedance matching and excitation mode of the dielectric resonator antenna array.

[0008] Metal vias connecting the second metal layer and the third metal layer are provided in the dielectric layer, wherein: the feeding substrate completes feeding in the form of a microstrip line, the third metal layer serves as a conducting band, and the second metal layer is connected to the ground potential. Technical Effects

[0009] The present invention fabricates the SU-8 layer through ultraviolet lithography. The SU-8 material has a low dielectric constant. While a cavity structure is provided on the SU-8 layer, a metal layer with slits is additionally fabricated under the dielectric body of the dielectric resonator. Compared with the prior art, the present invention effectively reduces the equivalent dielectric constant of the dielectric resonator without changing the dielectric resonator body, improves the impedance matching of the antenna array, and increases the efficiency; provides a limitation through the SU-8 cavity structure to achieve rapid and high-precision pasting and assembly of dielectric resonators of various shapes; and an additional metal layer with slits under the dielectric resonator can effectively avoid the influence of air gaps caused by pasting on coupled feeding, and can further reduce the conductive silver paste coating area and coating difficulty. Description of the Drawings

[0010] Figure 1 is a cross-sectional view of the silicon-based SU-8 dielectric resonator antenna array of the present invention;

[0011] Figure 2 is a schematic structural diagram of the silicon-based SU-8 dielectric resonator antenna array of the present invention;

[0012] Figure 3 is a result diagram showing the bandwidth performance and gain performance of the antenna array of the embodiment of the present invention;

[0013] Figure 4 is a result diagram showing the antenna pattern of the embodiment of the present invention;

[0014] Figure 5 is a result diagram showing the effects of different SU-8 thicknesses of the present invention;

[0015] Figure 6 is a process flow chart for the preparation of the present invention;

[0016] Figure 7 is a schematic diagram of the effects of the embodiment;

[0017] In the figure: 1 dielectric body, 2 SU-8 layer, 3 first metal layer, 4 second metal layer, 5 metal through hole, 6 dielectric layer of the feeding substrate, 7 third metal layer. Detailed Embodiments

[0018] As Figure 1 shown, this embodiment relates to a broadband silicon-based SU-8 dielectric resonator antenna array, including: a feeding substrate, an SU-8 layer 2 provided thereon, and a dielectric resonator located in the SU-8 layer 2. The dielectric resonator includes a dielectric body 1 and a first metal layer 3. The feeding substrate includes: a second metal layer 4, a dielectric layer 6, and a third metal layer 7, wherein: the dielectric body 1 is located on the second metal layer 4 and there is a first metal layer 3 between them.

[0019] A metal slot for adjusting the impedance matching and excitation mode of the dielectric resonator antenna array is provided on the first metal layer 3, and the first metal layer 3 is processed on a high-resistivity silicon wafer through the MEMS process.

[0020] Metal vias 5 connecting the second metal layer 4 and the third metal layer 7 are provided in the dielectric layer 6, where: the feeding substrate completes feeding in the form of a microstrip line, the third metal layer 7 serves as a conducting strip, and the second metal layer 4 is connected to the ground potential.

[0021] A number of metal slots are provided on the second metal layer 4, and the metal slot pattern is exactly the same as the metal slots on the first metal layer 3, which are used to adjust the impedance matching and excitation mode of the dielectric resonator antenna array;

[0022] The number of slots on the second metal layer 4 is consistent with the scale of the antenna array. In this embodiment, there are 4 metal slots.

[0023] The metal via 5 is a through-silicon via, processed by the conventional TSV electroplating process, and filled with copper inside. The metal via 5 is used to form a GSG structure, facilitating RF probe feeding, and only providing ground signals, with very high process freedom without affecting the overall impedance matching of the antenna. It can be directly processed using a 200-μm-thick high-resistivity silicon wafer, or made by thinning a thicker silicon wafer.

[0024] The thickness of the dielectric layer 6 is 200 μm, processed using high-resistivity silicon.

[0025] The third metal layer 7 is a one-to-multiple microstrip power divider pattern, used to efficiently transfer the externally fed energy to each radiation unit, and also has an important impact on the overall operating bandwidth of the antenna array; the processing method can adopt the conventional sputtering-lithography-electroplating-degluing-etching steps of the MEMS process; the microstrip power divider pattern can be adjusted accordingly according to actual needs. In this embodiment, it is a one-to-four microstrip power divider, cascaded by a T-shaped network.

[0026] The shape and size of the dielectric body 1 can be adjusted accordingly according to the operating frequency and operating mode. In this embodiment, a quadrangular prism with a thickness of 1 mm and a side length of 3 mm is selected, operating in the TE111 mode, and can be specifically fabricated by cutting a 1-mm-thick high-resistivity silicon wafer.

[0027] The SU-8 layer 2 is made by spin-coating a liquid SU-8 photoresist material, and a cavity structure is processed by ultraviolet lithography technology; the shape of the cavity structure is consistent with the cross-sectional shape of the dielectric body 1, and the number is consistent with the scale of the antenna array; the thickness of the SU-8 photoresist is 400 μm, which is obtained by spin-coating multiple times to ensure the flatness of the SU-8. A thicker SU-8 is beneficial to improving the overall matching of the antenna array.

[0028] The connection between the dielectric body 1 and the first metal layer 3 as a whole and the feeding substrate can be achieved by means such as wafer bonding and manual bonding; the SU-8 layer 2 can assist in assembly and alignment.

[0029] As Figure 6 shown, the method for preparing the above broadband silicon-based SU-8 dielectric resonator antenna array in this embodiment includes:

[0030] Step 1, the feeding substrate preparation stage, specifically includes:

[0031] 1.1 Spin-coat a layer of photoresist on the substrate, prepare a photoresist mask required for deep silicon etching through a lithography process, and use an NMC ICP reactive ion etching machine to perform deep silicon etching on the silicon wafer with the photoresist mask, and the etching thickness is greater than the thickness of the final feeding substrate.

[0032] The substrate used is a 4-inch double-polished high-resistance silicon with a thickness of 445 μm and a resistivity of 10000 Ω·cm.

[0033] 1.2 Process through-silicon vias on the substrate using the damascene through-silicon via process, and grind and polish the surface copper.

[0034] 1.3 Perform back thinning on the silicon wafer to obtain the required thickness of the dielectric substrate and expose the copper.

[0035] 1.4 Prepare a layer of metal pattern with a thickness of 4 μm, that is, the third metal layer 7, by using the process sequence of sputtering-lithography-electroplating-degluing-etching.

[0036] 1.5 Prepare a layer of metal pattern with a thickness of 4 μm, that is, the second metal layer 4, by using the process sequence of sputtering-lithography-electroplating-degluing-etching; the third metal layer 7 needs to be blocked with a protective glue before electroplating.

[0037] 1.6 Complete the processing of the feeding substrate by spin-coating the SU-8 photoresist multiple times and combining ultraviolet lithography.

[0038] Step 2, the dielectric resonator preparation stage, specifically includes:

[0039] 2.1 A metal pattern with a thickness of 4 μm, namely the first metal layer 3, is prepared on a high-resistance silicon with a thickness of 1 mm by the process sequence of sputtering - photolithography - electroplating - degluing - etching.

[0040] 2.2 The separated dielectric resonator is obtained by diamond scribing, specifically including the dielectric body 1 and the first metal layer 3;

[0041] 2.3 The dielectric resonator and the feeding substrate are manually bonded by applying conductive silver paste to complete the production of the overall antenna array.

[0042] In this embodiment, first, the full-wave simulation software HFSS is used to verify that the addition of the first metal layer 3 greatly reduces the influence of the air gap on the slot-coupled feeding. As Figure 7 shown, in a single antenna unit, the dielectric resonator is excited by a typical linear slot coupling; further, the full-wave simulation software HFSS is used to verify the improvement effect of the SU-8 layer 2 on the impedance matching of the antenna array. As Figure 5 shown, it is the reflection coefficient of a 1×4 antenna array excited by a dumbbell-shaped slot coupling under SU-8 layers with different thicknesses.

[0043] As Figure 3 shown, through specific actual experiments, the reflection coefficient is less than -10 dB and the gain is greater than 8.7 dBi in the frequency band of 24 - 33 GHz. Using dumbbell-shaped slot coupling excitation, the normalized radiation pattern of this antenna array is as Figure 4 shown.

[0044] Compared with the prior art, the present invention realizes the high-precision assembly of the dielectric resonator antenna array and the improvement of impedance matching within the frequency band through the SU-8 layer, and the first metal layer avoids the influence of the air gap on the dielectric resonator.

[0045] The above specific implementation can be locally adjusted in different ways by those skilled in the art without departing from the principles and purposes of the present invention. The protection scope of the present invention is subject to the claims and is not limited by the above specific implementation. All implementation solutions within its scope are subject to the present invention.

Claims

1. A broadband silicon-based SU-8 dielectric resonant antenna array, characterized in that: include: A feed substrate, a SU-8 layer disposed thereon, and a dielectric resonator located in the SU-8 layer, wherein: the dielectric resonator comprises a dielectric body and a first metal layer; the feed substrate comprises: a second metal layer, a dielectric layer, and a third metal layer; The dielectric body is located on the first metal layer on the second metal layer and spaced therebetween; The first metal layer is provided with a metal gap for adjusting the impedance matching and excitation mode of the dielectric resonant antenna array.

2. The broadband silicon-based SU-8 dielectric resonant antenna array according to claim 1 is characterized in that: The dielectric layer is provided with metal through holes respectively connecting the second metal layer and the third metal layer, wherein: the feeding substrate uses a microstrip line to complete the feeding, the third metal layer is used as a conducting strip, and the second metal layer is connected to the ground potential.

3. The broadband silicon-based SU-8 dielectric resonant antenna array according to claim 1 is characterized in that: The second metal layer is provided with a plurality of metal slots, the pattern of which is completely consistent with the metal slots on the first metal layer, and the metal slots are used to adjust the impedance matching and excitation mode of the dielectric resonant antenna array.

4. The broadband silicon-based SU-8 dielectric resonant antenna array according to claim 3 is characterized in that: The number of gaps in the second metal layer is consistent with the size of the antenna array.

5. The broadband silicon-based SU-8 dielectric resonant antenna array according to claim 1 is characterized in that: The third metal layer is a one-to-many-path microstrip power divider pattern, which is used to efficiently transfer external feed energy to each radiation unit.

6. The broadband silicon-based SU-8 dielectric resonant antenna array according to claim 1, characterized in that: The connection between the whole consisting of the dielectric body and the first metal layer and the feeding substrate is achieved by wafer bonding or manual bonding.

7. A method for preparing the broadband silicon-based SU-8 dielectric resonant antenna array according to any one of claims 1 to 6, characterized in that: include: Step 1: Feed substrate preparation stage, specifically including: 1.1 Spin-coat a layer of photoresist on the substrate, prepare the photoresist mask required for deep silicon etching by photolithography, and use NMC ICP reactive ion etcher to perform deep silicon etching on the silicon wafer with the photoresist mask, the etching thickness of which is greater than the thickness of the final feed substrate; 1.2 The Damascus through-silicon via process is used to process the through-silicon via on the substrate, and the surface copper is ground and polished; 1.3 Thin the back of the silicon wafer to obtain the required dielectric substrate thickness and expose the copper; 1.4 A layer of metal pattern, i.e., the third metal layer, is prepared by the process sequence of sputtering-photolithography-electroplating-stripping-etching; 1.5 A layer of metal pattern, i.e., the second metal layer, is prepared by the process sequence of sputtering-photolithography-electroplating-stripping-etching; the third metal layer needs to be shielded with a protective glue before electroplating; 1.6 The feed substrate is processed by multiple spin coatings of SU-8 photoresist combined with UV lithography; Step 2, dielectric resonator preparation stage, specifically includes: 2.1 A metal pattern, i.e., the first metal layer, is prepared on high-resistance silicon by using a process sequence of sputtering-photolithography-electroplating-stripping-etching; 2.2 The separated dielectric resonator, i.e. the dielectric body and the first metal layer, is obtained by diamond scribing; 2.3 The dielectric resonator and the feeding substrate are manually bonded by applying conductive silver paste to complete the production of the entire antenna array.

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