A power device driver and parameter correction method thereof

Abstract

The present invention discloses a power device driver and parameter correction method thereof, which are applied to the field of power device driver technology. A data acquisition module collects the gate voltage and peak current of an IGBT during IGBT operation to obtain sampled data. A digital isolation chip implements electrical isolation between the data acquisition module, an MCU, and a gate voltage regulation module. The MCU uses a preset junction temperature calibration formula to calibrate the real-time junction temperature data based on the sampled data and outputs the calibrated junction temperature data. The gate driver chip outputs a gate voltage capable of driving the IGBT in response to a control signal. When a short circuit occurs in the IGBT, a second-order short-circuit protection module sends an abnormal signal to the MCU, causing the MCU to send a gate voltage regulation trigger signal to the gate voltage regulation module. The gate voltage regulation module controls itself to reduce the gate voltage in response to the gate voltage regulation trigger signal. The power device driver and parameter correction method provided by the present invention improve the accuracy and reliability of junction temperature monitoring.

Description

Technical Field

[0001] The present invention belongs to the technical field of power device driving, and in particular relates to a power device driver and a parameter correction method thereof. Background Art

[0002] With the advancement of the global carbon neutrality goal, the rapid development of new energy vehicles, photovoltaic inverters and energy storage systems has brought huge demand for IGBT (Insulated Gate Bipolar Transistor) devices. In these application scenarios, IGBT devices bear the core task of efficient power conversion, and their stability and reliability directly affect the performance and safety of the entire system. With the expansion of IGBT application areas, especially in high-power and high-frequency working environments, the devices will generate a lot of heat during operation. If the operating temperature of the device cannot be monitored and controlled in time, overheating may occur, which in turn affects the electrical characteristics of the device and even causes permanent damage or failure.

[0003] Currently, most power device drivers and their supporting solutions on the market primarily focus on providing drive and protection functions. This limitation prevents many systems from accurately understanding the actual operating temperature of power devices in real time, potentially leading to performance degradation or even device failure. Furthermore, individual differences between power devices can affect the accuracy of junction temperature monitoring, potentially causing monitoring errors.

[0004] Therefore, how to provide a power device driver with a reliable parameter correction method is particularly critical. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a power device driver and a parameter correction method thereof.

[0006] The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0007] In a first aspect, the present invention provides a power device driver, comprising: an MCU, a digital isolation chip, a second-order short-circuit protection module, a gate drive chip, a data acquisition module, and a gate voltage regulation module;

[0008] The data acquisition module is used to collect the gate voltage and peak current of the IGBT during the operation of the IGBT to obtain sampling data;

[0009] The digital isolation chip is used to achieve electrical isolation between the data acquisition module, the MCU and the gate voltage regulation module;

[0010] The MCU is configured to receive the sampled data, calibrate the real-time junction temperature data based on the sampled data using a preset junction temperature calibration formula, and output the calibrated junction temperature data; the preset junction temperature calibration formula is determined based on the initial junction temperature data and the initial peak acquisition voltage of the IGBT; the initial peak acquisition voltage is determined based on the initial peak current;

[0011] The gate drive chip is used to output a gate voltage capable of driving the IGBT according to a control signal; the control signal is generated by the MCU;

[0012] The second-order short-circuit protection module is configured to send an abnormal signal to the MCU when a short circuit occurs in the IGBT, so that the MCU sends a gate voltage regulation trigger signal to the gate voltage regulation module in response to the abnormal signal;

[0013] The gate voltage regulating module is used to control the gate voltage regulating module to reduce the gate voltage of the IGBT in response to the gate voltage regulating trigger signal, thereby realizing IGBT protection.

[0014] Optionally, the second-order short-circuit protection module includes a desaturation protection circuit and a di / dt protection circuit;

[0015] The di / dt protection circuit is configured to send an abnormal signal to the MCU when a short circuit occurs in the IGBT, so that the MCU sends the gate voltage regulation trigger signal to the gate voltage regulation module in response to the abnormal signal;

[0016] The desaturation protection circuit is used to trigger the shutdown response of the gate driver chip when the short circuit time of the IGBT exceeds the blind zone time of the desaturation protection circuit, so that the gate driver chip outputs a low-level gate voltage to turn off the IGBT.

[0017] Optionally, the data acquisition module 8 includes a peak current acquisition module and a gate voltage acquisition module;

[0018] The peak current acquisition module is used to acquire the peak current during the operation of the IGBT;

[0019] The gate voltage acquisition module is used to acquire the gate voltage during the operation of the IGBT.

[0020] Optionally, the peak current acquisition module includes a gate resistor, a first switch, a first differential amplifier, a peak holding circuit and a first ADC;

[0021] The first end of the gate resistor is connected to the inverting input of the first differential amplifier, the second end of the gate resistor is connected to the non-inverting input of the first differential amplifier, the output of the first differential amplifier is connected to the first input of the peak hold circuit, the output of the gate driver chip is connected to the control end of the first switch, the first end of the first switch is grounded, the second end of the first switch is connected to the second input of the peak hold circuit, the output of the peak hold circuit is connected to the first ADC, and the output of the first ADC is connected to the digital isolation chip.

[0022] Optionally, the gate voltage acquisition module includes a second differential amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a third differential amplifier and a second ADC;

[0023] The non-inverting input terminal of the second differential amplifier is connected to the gate of the IGBT, the inverting input terminal of the second differential amplifier is connected to the output terminal of the second differential amplifier, the first end of the first resistor is connected to a reference voltage, the first end of the second resistor is connected to the output terminal of the second differential amplifier, the first end of the third resistor is grounded, the second ends of the first resistor, the second resistor and the third resistor are all connected to the non-inverting input terminal of the third differential amplifier, the first end of the fourth resistor is grounded, the second end of the fourth resistor is connected to the inverting input terminal of the third differential amplifier, the first end of the fifth resistor is connected to the inverting input terminal of the third differential amplifier, the second end of the fifth resistor is connected to the output terminal of the third differential amplifier, the output terminal of the third differential amplifier is connected to the input terminal of the second ADC, and the output terminal of the second ADC is connected to the digital isolation chip.

[0024] Optionally, the power device driver further includes a shell temperature acquisition module;

[0025] The shell temperature acquisition module is used to obtain the junction temperature parameters of the IGBT before operation to provide the MCU with the initial junction temperature data.

[0026] Optionally, the gate voltage regulation module includes an NPN transistor and a PNP transistor;

[0027] The collector of the NPN transistor is connected to the voltage V1, the emitter of the NPN transistor is connected to the first input end of the gate drive chip, the base of the NPN transistor is connected to the output end of the digital isolation chip, the base of the PNP transistor is connected to the output end of the digital isolation chip, the collector of the PNP transistor is connected to the first input end of the gate drive chip, and the emitter of the PNP transistor is connected to the voltage V2.

[0028] In a second aspect, the present invention provides a parameter correction method for a power device driver, which is implemented by the aforementioned power device driver. The parameter correction method includes:

[0029] Use PWM signal to control IGBT operation;

[0030] determining a junction temperature calibration slope according to a gate drive frequency corresponding to the PWM signal;

[0031] Determining a junction temperature calibration coefficient according to initial junction temperature data and initial peak acquisition voltage of the IGBT;

[0032] generating a junction temperature calibration formula according to the junction temperature calibration slope and the junction temperature calibration coefficient;

[0033] During the operation of the IGBT, the power device driver performs the following operations: collecting the gate voltage and peak current of the IGBT to obtain sampling data; calibrating the real-time junction temperature data based on the sampling data using the junction temperature calibration formula, and outputting the calibrated junction temperature data; outputting a gate voltage capable of driving the IGBT according to a control signal; and reducing the gate voltage of the IGBT when a short circuit occurs in the IGBT to achieve IGBT protection.

[0034] Optionally, the junction temperature calibration formula is:

[0035] ;

[0036] in, Indicates the junction temperature data after calibration; Indicates the real-time junction temperature data; represents the junction temperature calibration slope; Represents the junction temperature calibration coefficient.

[0037] The present invention provides a power device driver. Compared with the prior art power device driver that uses the same calibration formula to calibrate the parameters of real-time junction temperature data for different IGBTs, the MCU in the present invention determines different junction temperature calibration formulas according to the pre-operation states of different IGBTs to calibrate the real-time junction temperature data. This improvement effectively avoids the problem of inaccurate junction temperature measurement due to individual differences in IGBTs, thereby improving the accuracy of junction temperature monitoring. In addition, through the second-order short-circuit protection module, the power device driver can be monitored in a timely manner, effectively preventing device damage caused by short circuits, and improving the reliability of the power device driver. At the same time, the application of digital isolation chips can achieve electrical isolation, effectively avoid interference between different modules, and further enhance the stability of the power device driver.

[0038] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a schematic structural diagram of a power device driver provided by an embodiment of the present invention;

[0040] Figure 2 1 is a schematic structural diagram of a peak current acquisition module provided by an embodiment of the present invention;

[0041] Figure 3 Schematic diagram of the structure of the gate voltage acquisition module provided by an embodiment of the present invention;

[0042] Figure 4 1 is a schematic structural diagram of a gate voltage regulation module provided by an embodiment of the present invention;

[0043] Figure 5 The present invention provides a flow chart of a parameter correction method for a power device driver. DETAILED DESCRIPTION

[0044] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0045] In order to solve the problem that the existing power device driver is difficult to accurately detect the junction temperature of the IGBT, which may cause the IGBT to experience performance degradation due to overheating, the embodiment of the present invention provides a power device driver, see Figure 1 , Figure 1 This is a structural diagram of a power device driver provided by an embodiment of the present invention, which includes an MCU5 (Microcontroller Unit), a digital isolation chip 6, a second-order short-circuit protection module 4, a gate drive chip 7, a data acquisition module 8 and a gate voltage regulation module 3.

[0046] Among them, the first end of MCU5 is connected to the first end of gate drive chip 7, the second end of MCU5 is connected to the first end of digital isolation chip 6, the first input end of gate drive chip 7 is connected to the output end of gate voltage regulation module 3, the second input end of gate drive chip 7 is connected to the first output end of second-order short-circuit protection module 4, the output end of gate drive chip 7 is connected to the gate of IGBT9, the second input end of gate voltage regulation module 3 is connected to the output end of digital isolation chip 6, the first input end of digital isolation chip 6 is connected to the first output end of data acquisition module 8, the second input end of digital isolation chip 6 is connected to the second output end of data acquisition module 8, the third input end of digital isolation chip 6 is connected to the second output end of second-order short-circuit protection module 4, the first input end of second-order short-circuit protection module 4 is connected to the collector of IGBT9, the second input end of second-order short-circuit protection module 4 is connected to the emitter of IGBT9, and the first input end and the second input end of data acquisition module 8 are both connected to the output end of gate drive chip 7.

[0047] The following describes the various modules in the power device driver:

[0048] The power device driver may further include a power supply module 2 for supplying power to the power device driver, wherein an output terminal of the power supply module 2 is connected to a first input terminal of the gate voltage regulating module 3 .

[0049] Specifically, the power module 2 may include a primary power circuit, an isolated power module and a secondary power circuit.

[0050] The primary power supply circuit primarily provides power for the primary side of the MCU 5, gate driver chip 7, and digital isolation chip 6. The isolated power module achieves energy isolation through a transformer, transferring primary energy to the secondary side via electromagnetic induction to power subsequent circuits. The secondary power supply circuit primarily provides stable power for the data acquisition module 8 and the second-order short-circuit protection module 4. The isolated power module also electrically isolates the high- and low-voltage sides of the driver, preventing damage to upstream and downstream circuits due to relative voltage increases and effectively protecting low-voltage components.

[0051] The data acquisition module 8 is used to collect the gate voltage and peak current of the IGBT 9 during the operation of the IGBT to obtain sampling data.

[0052] In an embodiment of the present invention, the data acquisition module 8 may further include a peak current acquisition module and a gate voltage acquisition module. The peak current acquisition module is used to acquire the peak current of the IGBT 9 during the operation of the IGBT, and the gate voltage acquisition module is used to acquire the gate voltage of the IGBT 9 during the operation of the IGBT.

[0053] The data acquisition module 8 uses a combination of a gate peak current acquisition module and a gate voltage acquisition module to acquire the gate voltage in real time, thereby avoiding acquisition errors caused by gate voltage fluctuations and greatly improving the junction temperature acquisition accuracy.

[0054] The digital isolation chip 6 is used to achieve electrical isolation between the data acquisition module 8 , the MCU 5 and the gate voltage regulation module 3 .

[0055] MCU5 is used to receive the sampled data, and use a preset junction temperature calibration formula to calibrate the real-time junction temperature data based on the sampled data, and output the calibrated junction temperature data; the preset junction temperature calibration formula is determined based on the initial junction temperature data and the initial peak acquisition voltage of IGBT9; the initial peak acquisition voltage is determined based on the initial peak current.

[0056] In the embodiment of the present invention, the calibrated junction temperature data can be output through a serial port or a Bluetooth module.

[0057] In the embodiment of the present invention, the power device driver further includes a shell temperature acquisition module 1;

[0058] The shell temperature acquisition module 1 is used to obtain the junction temperature parameters of the IGBT 9 before operation to provide the MCU 5 with initial junction temperature data.

[0059] In the embodiment of the present invention, the output end of the shell temperature acquisition module 1 is connected to the first input end of the MCU 5 .

[0060] Specifically, the shell temperature acquisition module 1 may be composed of a thermocouple, an ADC, and some resistors and capacitors.

[0061] In the embodiment of the present invention, the preset junction temperature calibration formula is determined according to the initial junction temperature data and the initial peak acquisition voltage of the IGBT 9; and the initial peak acquisition voltage is determined according to the initial peak current.

[0062] Specifically, the junction temperature calibration coefficient in the junction temperature calibration formula is determined based on the initial junction temperature data and initial peak acquisition voltage of the IGBT 9 before operation. The junction temperature calibration slope in the junction temperature calibration formula is determined based on the gate drive frequency of the IGBT 9, that is, the actual operating frequency. After obtaining the junction temperature calibration coefficient and junction temperature calibration slope in the junction temperature calibration formula, MCU5 can generate the junction temperature calibration formula based on the junction temperature calibration coefficient and junction temperature calibration slope.

[0063] The gate drive chip 7 is used to output a gate voltage capable of driving the IGBT 9 according to a control signal; the control signal is generated by the MCU 5 .

[0064] In this embodiment of the present invention, gate driver chip 7 is the core of the power device driver. It outputs the gate voltage capable of driving IGBT 9 based on the control signal generated by MCU 5, ensuring normal switching operation of the device. It also provides electrical isolation, ensuring safe isolation between high-voltage and low-voltage circuits, protecting the low-voltage control circuit from the high-voltage side and preventing noise interference.

[0065] The second-order short-circuit protection module 4 is configured to send an abnormal signal to the MCU 5 when a short circuit occurs in the IGBT 9 , so that the MCU 5 sends a gate voltage regulation trigger signal to the gate voltage regulation module 3 in response to the abnormal signal.

[0066] Specifically, when a short circuit occurs in the IGBT 9 , the second-order short-circuit protection module 4 sends an abnormal signal according to the collector-emitter voltage and collector current change rate of the IGBT 9 .

[0067] In the embodiment of the present invention, the second-order short-circuit protection module 4 includes a desaturation protection circuit and a di / dt protection circuit.

[0068] The di / dt protection circuit is used to send an abnormal signal to the MCU5 when a short circuit occurs in the IGBT9, so that the MCU5 responds to the abnormal signal and sends a gate voltage adjustment trigger signal to the gate voltage adjustment module 3;

[0069] The desaturation protection circuit is used to trigger the shutdown response of the gate driver chip 7 when the short circuit time of the IGBT9 exceeds the blind time of the desaturation protection circuit, so that the gate driver chip 7 outputs a low-level gate voltage to turn off the IGBT9.

[0070] In this embodiment of the present invention, an inductor Ls is further connected between the di / dt protection circuit and the emitter of IGBT 9. A first end of the inductor Ls is connected to the emitter of IGBT 9 and a first input of the di / dt protection circuit, a second end of the inductor Ls is connected to a second input of the di / dt protection circuit, and an output of the di / dt protection circuit is connected to a second input of the digital isolation chip 6. The input of the desaturation protection circuit is connected to the collector of IGBT 9, and the output of the desaturation protection circuit is connected to a second input of the gate driver chip 7.

[0071] Because the desaturation protection circuit has a blind time, protection cannot be implemented until a certain period of time has passed after a short circuit occurs in the IGBT 9, which reduces the device's service life. The di / dt short-circuit protection circuit, on the other hand, does not have a blind time and can respond immediately at the moment a short circuit occurs, but it has the disadvantage of being prone to false triggering. Therefore, the second-order short-circuit protection module 4 provided in this embodiment of the present invention combines a desaturation protection circuit with a di / dt protection circuit to avoid compromising the device's service life and the risk of false triggering.

[0072] Specifically, the working process based on the second-order short-circuit protection module 4 is as follows:

[0073] When a short circuit occurs in IGBT 9, the current rises rapidly, triggering the di / dt protection circuit. This circuit then sends an abnormality signal to MCU 5 via digital isolation chip 6. Upon receiving the abnormality signal, MCU 5 sends a gate voltage regulation trigger signal to gate voltage regulator module 3 via digital isolation chip 6, controlling gate voltage regulator module 3 to lower the gate voltage, thereby reducing the short-circuit current. After the desaturation protection circuit's dead zone expires, the desaturation protection circuit triggers a shutdown response from gate driver chip 7, causing it to output a low-level gate voltage, shutting down IGBT 9.

[0074] Through the second-order short-circuit protection module 4, if the di / dt protection circuit is triggered by mistake, the gate voltage will only be reduced in a very short time and will not affect the normal operation of the power device driver.

[0075] In this embodiment of the present invention, the combined use of the desaturation protection circuit and the di / dt protection circuit in the second-order short-circuit protection module 4 provides a more comprehensive and efficient short-circuit protection solution. The di / dt protection circuit quickly limits the current at the initial stage of a short circuit, providing the desaturation protection circuit with sufficient response time. The desaturation protection circuit acts as a redundant checkpoint, accurately determining the operating state of the IGBT 9, preventing false triggering and improving the reliability of the power device driver.

[0076] The gate voltage regulating module 3 is used to control the gate voltage regulating module 3 to reduce the gate voltage of the IGBT 9 in response to the gate voltage regulating trigger signal, thereby protecting the IGBT 9 .

[0077] Compared to the prior art, in which the power device driver uses the same junction temperature calibration formula for different IGBT9s to perform real-time junction temperature data parameter calibration, in an embodiment of the present invention, the MCU5 determines different junction temperature calibration formulas based on the pre-operation state of different IGBT9s to calibrate the real-time junction temperature data. This improvement effectively avoids the problem of inaccurate junction temperature measurement due to individual differences in IGBT9s, thereby improving the accuracy of junction temperature monitoring. In addition, through the second-order short-circuit protection module 4, the power device driver can be monitored in a timely manner, effectively preventing device damage caused by short circuits, and improving the reliability of the power device driver. At the same time, the application of the digital isolation chip 6 can achieve electrical isolation, effectively avoiding interference between different modules, and further enhancing the stability of the power device driver.

[0078] In one implementation, the data acquisition module 8 includes a peak current acquisition module and a gate voltage acquisition module.

[0079] In the embodiment of the present invention, the peak current acquisition module is used to acquire the peak current, specifically as follows:

[0080] See also Figure 2 , Figure 2 This is a schematic diagram of the structure of the peak current acquisition module provided by an embodiment of the present invention. The peak current acquisition module includes a gate resistor , first switch K1, first differential amplifier , a peak hold circuit and a first ADC (Analog-to-digital converter).

[0081] Among them, the first end of the gate resistor is connected to the inverting input end of the first differential amplifier, the second end of the gate resistor is connected to the non-inverting input end of the first differential amplifier, the output end of the differential amplifier is connected to the first input end of the peak holding circuit, the output end of the gate drive chip 7 is connected to the control end of the first switch, the first end of the first switch is grounded, the second end of the first switch is connected to the second input end of the peak holding circuit, the output end of the peak holding circuit is connected to the input end of the first ADC, and the output end of the first ADC is connected to the digital isolation chip 6.

[0082] The second end of the gate resistor is also connected to the output end of the gate driving chip 7 , and the first end of the gate resistor is also connected to the gate of the IGBT 9 .

[0083] In the peak current acquisition module, the gate driver chip 7 controls the discharge of the first switch K1 based on the control signal, and the current flows through the gate resistor, generating a peak voltage on both sides of the gate resistor. By collecting the peak voltage, the peak current can be calculated. The first differential amplifier collects the differential signal on both sides of the gate resistor, that is, the peak voltage, and converts the differential signal into a single-ended signal and inputs it into the peak hold circuit for holding. The narrow pulse signal is converted into a square wave signal. The peak hold circuit uses the gate signal as the input signal of the control end, and charges and discharges the peak hold circuit capacitor in each cycle. The first ADC is used to convert the square wave signal into a digital signal and input the peak current into the digital isolation chip 6.

[0084] In one implementation, the gate voltage acquisition module is used to acquire the gate voltage of the IGBT 9, specifically as follows:

[0085] See also Figure 3 , Figure 3 : is a structural diagram of a gate voltage acquisition module provided in an embodiment of the present invention. The gate voltage acquisition module includes a second differential amplifier U2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a third differential amplifier U3 and a second ADC.

[0086] The non-inverting input terminal of the second differential amplifier is connected to the power device, that is, the gate of IGBT9, the inverting input terminal of the second differential amplifier is connected to the output terminal of the second differential amplifier, and the first end of the first resistor is connected to the reference voltage. , the first end of the second resistor is connected to the output end of the second differential amplifier, the first end of the third resistor is grounded, the second ends of the first resistor, the second resistor and the third resistor are all connected to the non-inverting input end of the third differential amplifier, the first end of the fourth resistor is grounded, the second end of the fourth resistor is connected to the inverting input end of the third differential amplifier, the first end of the fifth resistor is connected to the inverting input end of the third differential amplifier, the second end of the fifth resistor is connected to the output end of the third differential amplifier, the output end of the third differential amplifier is connected to the input end of the second ADC, and the output end of the second ADC is connected to the digital isolation chip 6.

[0087] In the gate voltage acquisition module, multiple resistors are connected in parallel and high-precision, low-temperature drift resistors are used to greatly reduce the temperature-sensitive electrical parameter acquisition errors caused by gate resistor accuracy and temperature drift during driving.

[0088] In the gate voltage acquisition module, the gate voltage of IGBT 9 is typically a square wave signal ranging from -9V to +15V, making it difficult for the second ADC to acquire. The amplitude must be adjusted to fit within the second ADC's input range. The gate signal passes through a second differential amplifier, increasing the input impedance of the gate voltage acquisition module. The first, second, third, fourth, and fifth resistors, along with the second differential amplifier, form an in-phase proportional addition circuit. This proportional addition operation performs a proportional addition operation on the gate voltage signal and a reference voltage, converting the gate signal into a signal within a range of 0V to 3.3V. This facilitates processing by the second ADC to obtain the gate voltage of IGBT 9.

[0089] In one implementation, the gate voltage regulating module 3 includes an NPN transistor Q1 and a PNP transistor Q2, and the gate voltage regulating module 3 can be used to switch between two different gate voltages. Figure 4 , Figure 4 3 is a schematic structural diagram of the gate voltage regulation module 3 provided in an embodiment of the present invention.

[0090] The collector of the NPN transistor is connected to the voltage V1, the emitter of the NPN transistor is connected to the first input terminal of the gate driver chip 7, the base of the NPN transistor is connected to the output terminal of the digital isolation chip 6, the base of the PNP transistor is connected to the output terminal of the digital isolation chip 6, the collector of the PNP transistor is connected to the first input terminal of the gate driver chip 7, and the emitter of the PNP transistor is connected to the voltage V2.

[0091] The voltage V1 and the voltage V2 are both generated by the power module 2 .

[0092] In an embodiment of the present invention, the power supply voltage VCC of the gate driver chip is adjusted by adjusting the input voltage of the base of the NPN transistor and the base of the PNP transistor, thereby adjusting the gate voltage of the IGBT. When the input voltage of the base of the NPN transistor and the base of the PNP transistor is high, the NPN transistor Q1 is turned on, and the power supply voltage of the gate driver chip 7 is voltage V1. When the input voltage of the base of the NPN transistor and the base of the PNP transistor is low, the PNP transistor Q2 is turned on, and the power supply voltage of the gate driver chip 7 is voltage V2.

[0093] Based on the same inventive concept, the embodiment of the present invention also provides a parameter correction method for a power device driver, see Figure 5 , Figure 5 1 is a flow chart of a parameter correction method for a power device driver provided by an embodiment of the present invention. The parameter correction method is implemented based on the power device driver provided by an embodiment of the present invention and specifically includes the following steps:

[0094] Step S501 : Using a PWM (Pulse Width Modulation) signal to control the operation of the IGBT 9 .

[0095] The MCU 5 transmits the gate drive frequency corresponding to the PWM signal to the gate drive chip 7 to control the IGBT 9 to turn on.

[0096] Step S502 : determining a junction temperature calibration slope according to a gate drive frequency corresponding to a PWM signal.

[0097] Based on the gate drive frequency of IGBT 9, MCU 5 determines the junction temperature calibration slope of the junction temperature calibration formula by looking up the table according to the relationship table between frequency and junction temperature calibration slope. The relationship table between frequency and junction temperature calibration slope can be obtained in advance by fitting experimental data.

[0098] Step S503 : determining a junction temperature calibration coefficient according to the initial junction temperature data and the initial peak acquisition voltage of the IGBT 9 .

[0099] In this embodiment of the present invention, after the IGBT 9 is turned on, data acquisition module 8 and case temperature acquisition module 1 begin operation. Data acquisition module 8 obtains an initial peak current by collecting the initial peak voltage. Case temperature acquisition module 1 can approximate the junction temperature parameters of the IGBT 9 before operation, providing initial junction temperature data to MCU 5. MCU 5 can then determine the junction temperature calibration coefficient based on the initial junction temperature data and the initial peak voltage.

[0100] Step S504 : generating a junction temperature calibration formula according to the junction temperature calibration slope and the junction temperature calibration coefficient.

[0101] In an embodiment of the present invention, the junction temperature calibration formula is:

[0102] ;

[0103] in, Indicates the junction temperature data after calibration; Indicates real-time junction temperature data; Indicates the junction temperature calibration slope; Represents the junction temperature calibration coefficient.

[0104] Step S505, during the operation of IGBT9, the following operations are performed through the power device driver: the gate voltage and peak current of IGBT9 are collected to obtain sampling data; the real-time junction temperature data is calibrated based on the sampling data using the junction temperature calibration formula, and the calibrated junction temperature data is output; the gate voltage capable of driving IGBT9 is output according to the control signal; and the gate voltage of IGBT9 is reduced when a short circuit occurs in IGBT9 to protect IGBT9.

[0105] The specific working process is as described above and will not be repeated here.

[0106] In addition, in the embodiment of the present invention, the junction temperature and case temperature of the IGBT 9 and various fault signals in the power device driver can be sent to the host computer through the MCU 5 so that technicians can monitor the power device driver.

[0107] In the embodiment of the present invention, the junction temperature is monitored online by collecting the peak current, which is related to the gate internal resistance of the IGBT9 and the driving frequency. The gate internal resistance of different devices of the same model varies, and the driving frequency is also different in different applications. Therefore, if the same junction temperature calibration formula is used , which will inevitably introduce a large error. Therefore, it is necessary to calibrate the parameters of IGBT9 before it works. Because the peak current is related to the gate drive frequency, the junction temperature calibration slope of the junction temperature calibration formula is determined according to the gate drive frequency of IGBT9 in the embodiment of the present invention, wherein the relationship between the frequency and the junction temperature calibration slope can be obtained by fitting the experimental data and determined by the table lookup method. This method can greatly reduce the junction temperature acquisition error caused by different operating frequencies. The junction temperature parameters of IGBT9 before work can be approximately obtained by the shell temperature acquisition module 1 to obtain the initial junction temperature data, and the junction temperature calibration coefficient of the junction temperature calibration formula can be determined by the initial junction temperature data and the initial peak acquisition voltage. The parameter correction method of the power device driver provided by the embodiment of the present invention has a simple calibration process, a short time consumption, a simple control logic, and does not require additional circuit board area, which can greatly improve the accuracy of online monitoring of junction temperature.

[0108] It should be noted that the terms "first," "second," and the like are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in sequences other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0109] In the description of this specification, the reference terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" mean that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0110] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art can understand and implement other variations of the disclosed embodiments by viewing the drawings and the disclosed content. In the description of the present invention, the word "comprising" does not exclude other components or steps, "one" or "a" does not exclude multiple situations, and "multiple" means two or more, unless otherwise clearly and specifically defined. In addition, certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0111] In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connect," "fixed," etc. should be understood broadly. For example, they may refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0112] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A power device driver, characterized in that: include: Shell temperature acquisition module, MCU, digital isolation chip, second-order short-circuit protection module, gate drive chip, data acquisition module and gate voltage regulation module; The shell temperature acquisition module is used to obtain the junction temperature parameters of the IGBT before operation to provide initial junction temperature data for the MCU; The data acquisition module is used to collect the gate voltage and peak current of the IGBT during the operation of the IGBT to obtain sampling data; The digital isolation chip is used to achieve electrical isolation between the data acquisition module, the MCU and the gate voltage regulation module; The MCU is configured to receive the sampled data, calibrate the real-time junction temperature data based on the sampled data using a preset junction temperature calibration formula, and output the calibrated junction temperature data; The junction temperature calibration slope in the preset junction temperature calibration formula is determined according to the gate drive frequency of the IGBT; the junction temperature calibration coefficient in the preset junction temperature calibration formula is determined according to the initial junction temperature data and the initial peak acquisition voltage of the IGBT; the initial peak acquisition voltage is determined according to the initial peak current; The junction temperature calibration formula is: ； in, Indicates the junction temperature data after calibration; Indicates the real-time junction temperature data; represents the junction temperature calibration slope; represents the junction temperature calibration coefficient; The gate drive chip is used to output a gate voltage capable of driving the IGBT according to a control signal; the control signal is generated by the MCU; The second-order short-circuit protection module is configured to send an abnormal signal to the MCU when a short circuit occurs in the IGBT, so that the MCU sends a gate voltage regulation trigger signal to the gate voltage regulation module in response to the abnormal signal; The gate voltage regulating module is used to control the gate voltage regulating module to reduce the gate voltage of the IGBT in response to the gate voltage regulating trigger signal, thereby realizing IGBT protection.

2. The power device driver according to claim 1, wherein: The second-order short-circuit protection module includes a desaturation protection circuit and a di / dt protection circuit; The di / dt protection circuit is configured to send an abnormal signal to the MCU when a short circuit occurs in the IGBT, so that the MCU sends the gate voltage regulation trigger signal to the gate voltage regulation module in response to the abnormal signal; The desaturation protection circuit is used to trigger the shutdown response of the gate driver chip when the short circuit time of the IGBT exceeds the blind zone time of the desaturation protection circuit, so that the gate driver chip outputs a low-level gate voltage to turn off the IGBT.

3. The power device driver according to claim 1, wherein: The data acquisition module includes a peak current acquisition module and a gate voltage acquisition module; The peak current acquisition module is used to acquire the peak current during the operation of the IGBT; The gate voltage acquisition module is used to acquire the gate voltage during the operation of the IGBT.

4. The power device driver according to claim 3, wherein: The peak current acquisition module includes a gate resistor, a first switch, a first differential amplifier, a peak holding circuit and a first ADC; The first end of the gate resistor is connected to the inverting input of the first differential amplifier, the second end of the gate resistor is connected to the non-inverting input of the first differential amplifier, the output of the first differential amplifier is connected to the first input of the peak hold circuit, the output of the gate driver chip is connected to the control end of the first switch, the first end of the first switch is grounded, the second end of the first switch is connected to the second input of the peak hold circuit, the output of the peak hold circuit is connected to the first ADC, and the output of the first ADC is connected to the digital isolation chip.

5. The power device driver according to claim 3, wherein: The gate voltage acquisition module includes a second differential amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a third differential amplifier and a second ADC; The non-inverting input terminal of the second differential amplifier is connected to the gate of the IGBT, the inverting input terminal of the second differential amplifier is connected to the output terminal of the second differential amplifier, the first end of the first resistor is connected to a reference voltage, the first end of the second resistor is connected to the output terminal of the second differential amplifier, the first end of the third resistor is grounded, the second ends of the first resistor, the second resistor and the third resistor are all connected to the non-inverting input terminal of the third differential amplifier, the first end of the fourth resistor is grounded, the second end of the fourth resistor is connected to the inverting input terminal of the third differential amplifier, the first end of the fifth resistor is connected to the inverting input terminal of the third differential amplifier, the second end of the fifth resistor is connected to the output terminal of the third differential amplifier, the output terminal of the third differential amplifier is connected to the input terminal of the second ADC, and the output terminal of the second ADC is connected to the digital isolation chip.

6. The power device driver according to claim 1, wherein: The gate voltage regulation module includes an NPN transistor and a PNP transistor; The collector of the NPN transistor is connected to the voltage V1, the emitter of the NPN transistor is connected to the first input end of the gate drive chip, the base of the NPN transistor is connected to the output end of the digital isolation chip, the base of the PNP transistor is connected to the output end of the digital isolation chip, the collector of the PNP transistor is connected to the first input end of the gate drive chip, and the emitter of the PNP transistor is connected to the voltage V2.

7. A parameter correction method for a power device driver, characterized in that: Based on the power device driver according to claim 1, the parameter correction method includes: Use PWM signal to control IGBT operation; determining a junction temperature calibration slope according to a gate drive frequency corresponding to the PWM signal; Determining a junction temperature calibration coefficient according to initial junction temperature data and initial peak acquisition voltage of the IGBT; generating a junction temperature calibration formula according to the junction temperature calibration slope and the junction temperature calibration coefficient; During the operation of the IGBT, the power device driver performs the following operations: collecting the gate voltage and peak current of the IGBT to obtain sampling data; calibrating the real-time junction temperature data based on the sampling data using the junction temperature calibration formula, and outputting the calibrated junction temperature data; outputting a gate voltage capable of driving the IGBT according to a control signal; and reducing the gate voltage of the IGBT when a short circuit occurs in the IGBT to achieve IGBT protection.

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