Power amplifier circuit, chip and transmitter

Abstract

The invention provides a power amplifier circuit, a chip and a transmitter. The power amplifier circuit comprises a splitter, a control branch, a first balance branch, a second balance branch and a first directional coupler, the control branch comprises a third power amplifier; the first balance branch comprises a first power amplifier, the second balance branch comprises a second power amplifier and a first phase shifter, and the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier can be adjusted; the splitter is used for distributing the first signal to three branches; the first balance branch, the second balance branch and the control branch are respectively used for inputting amplification signals to a first port, a fourth port and a second port of the first directional coupler; and the first directional coupler is used for coupling the amplified signals from the three ports and outputting the amplified signals to a load from the third port. Through the technical scheme provided by the embodiment of the invention, different load impedance mismatch conditions can be applied, and the efficiency under the load impedance mismatch condition is improved.

Description

Technical Field

[0001] The present application relates to the field of communications, and more particularly, to a power amplifier circuit, a chip, and a transmitter. Background Art

[0002] A power amplifier (PA) is an electronic device that amplifies the power of a signal. In the field of communications, PAs can be widely used to amplify the power of information to be transmitted, such as mobile communication base stations and communication systems.

[0003] A Doherty power amplifier can improve the efficiency of a power amplifier in a power back-off state, but a Doherty power amplifier is only applicable to load mismatches in specific cases and has limited load mismatch resistance. Summary of the Invention

[0004] The present application provides a power amplifier circuit, a chip, and a transmitter, which can be applied to different load impedance mismatch situations and improve the efficiency under load impedance mismatch.

[0005] In a first aspect, a power amplifier circuit is provided, including: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch includes a third power amplifier; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier and a first phase shifter, the first phase shifter is configured to change the phase of the second balanced branch, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier is adjustable, the bias voltage of the first power amplifier and the bias voltage of the second power amplifier are respectively the drain voltage or the collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is configured to distribute a first signal input to the splitter to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively configured to input amplified signals to a first port, a fourth port, and a second port of the first directional coupler, the second port being the isolation port of the first directional coupler; the first directional coupler is configured to couple the amplified signals from the first port, the fourth port, and the second port, and output the coupled signals to a load from a third port of the first directional coupler.

[0006] Alternatively, the power amplifier circuit may include: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch includes a third power amplifier and a second phase shifter; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier, the bias voltages of the first power amplifier and / or the second power amplifier are adjustable, and the bias voltages of the first power amplifier and the second power amplifier are the drain voltages or collector voltages of the transistors of the first power amplifier and the second power amplifier respectively; the splitter is configured to divide a first signal input to the splitter into three paths and input them to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively configured to input amplified signals to a first port, a fourth port, and a second port of the first directional coupler, and the second port is the isolation port of the first directional coupler; the first directional coupler is configured to couple the signals from the first port, the fourth port, and the second port and output them from a third port of the first directional coupler to a load.

[0007] In this embodiment, a phase shifter may be provided in the control branch or the second balanced branch, and the bias voltage of the power amplifier in at least one of the two balanced branches is adjustable. Thus, when the load impedance is mismatched, the influence of the impedance mismatch on the output efficiency can be reduced by adjusting the phase shifter and the bias voltage of the power amplifier.

[0008] Combined with the first aspect, in some implementation manners of the first aspect, the power amplifier circuit further includes an impedance detector; the impedance detector is configured to detect the impedance of the load, so that the bias voltages of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter are adjusted according to the impedance of the load.

[0009] In this embodiment, the impedance detector can detect the load impedance, so that the adjustable parameters can be adjusted according to the load impedance, and the adjustment speed is improved.

[0010] Combined with the first aspect, in some implementation manners of the first aspect, the input power differences between the control branch, the first balanced branch, and the second balanced branch are less than 20 percentage points.

[0011] Taking the total input power of the three branches as 1, the input power differences between the three branches being less than 20 percentage points means that the difference between the percentages of any two input powers in the total input power is less than 20 percentage points. For example, the input powers of the three branches may be equal.

[0012] In combination with the first aspect, in some implementation manners of the first aspect, the splitter includes a first power splitter, and the first power splitter is configured to distribute the first signal to the control branch, the first balanced branch, and the second balanced branch.

[0013] The first power splitter may be a three-way power splitter, so as to divide the input signal into three paths.

[0014] In combination with the first aspect, in some implementation manners of the first aspect, the splitter includes a second power splitter and a second directional coupler. The second power splitter is configured to divide the first signal into two paths, one path is for inputting to the control branch, and the other path is for inputting to the second directional coupler, and is output to the first balanced branch and the second balanced branch through two ports of the second directional coupler.

[0015] The second power splitter may be a two-way power splitter, which divides the input signal into two paths, and one of the paths is further divided into two paths by the second directional coupler, so that the input signal can be divided into three paths.

[0016] In combination with the first aspect, in some implementation manners of the first aspect, the control branch includes a second phase shifter, and the second phase shifter is located at the input end or the output end of the third power amplifier.

[0017] The position of the phase shifter can be set at the input end or the output end of the power amplifier, and both can adjust the phase (current and voltage phases) of the signal input to the port of the first directional coupler in this branch.

[0018] In combination with the first aspect, in some implementation manners of the first aspect, the first phase shifter is located at the input end or the output end of the second power amplifier.

[0019] In combination with the first aspect, in some implementation manners of the first aspect, the first balanced branch includes a third phase shifter, and the third phase shifter is located at the input end or the output end of the first power amplifier.

[0020] In combination with the first aspect, in some implementation manners of the first aspect, the first port is the coupling port of the first directional coupler.

[0021] In combination with the first aspect, in some implementation manners of the first aspect, the first power amplifier, the second power amplifier, and the third power amplifier are class B power amplifiers.

[0022] Any one of the three power amplifiers may also be a class AB power amplifier, and the present application does not make a limitation thereto.

[0023] In combination with the first aspect, in some implementation manners of the first aspect, the bias voltage of the third power amplifier is adjustable, and the bias voltage of the third power amplifier is the drain voltage or the collector voltage of the transistor of the third power amplifier.

[0024] The bias voltage of the power amplifier can adjust the current amplitude of this branch, so as to reduce the influence of impedance mismatch.

[0025] In combination with the first aspect, in some implementation manners of the first aspect, the power amplifier circuit includes a controller, and the controller is configured to: obtain a first mapping relationship, where the first mapping relationship is used to indicate the target bias voltage of the first power amplifier and / or the target bias voltage of the second power amplifier and the target phase of the first phase shifter corresponding to different load impedances; and adjust the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter according to the first mapping relationship.

[0026] In a second aspect, a power amplifier circuit is provided, which includes: a splitter, a first amplification circuit, and a combiner; the first amplification circuit, the first amplification circuit includes a main power amplifier branch and an auxiliary power amplifier branch, the main power amplifier branch and the auxiliary power amplifier branch respectively include a main power amplifier and an auxiliary power amplifier, the bias voltage of the main power amplifier is adjustable, the bias voltage of the main power amplifier is the drain voltage or the collector voltage of the transistor of the main power amplifier, and the main power amplifier branch and / or the auxiliary power amplifier branch includes a phase shifter; the main power amplifier branch is configured to output an amplified signal to the output end of the main power amplifier branch; the auxiliary power amplifier branch is configured to output an amplified signal to the output end of the auxiliary power amplifier branch when the output power of the main power amplifier reaches a threshold; the splitter is configured to distribute the signal input to the splitter to the main power amplifier branch and the auxiliary power amplifier branch; the combiner, the combiner is configured to perform impedance transformation on the first amplification circuit and couple the output ends of the main power amplifier branch and the auxiliary power amplifier branch to a load.

[0027] In combination with the second aspect, in some implementation manners of the second aspect, the power amplifier circuit may further include an impedance detector, so as to facilitate purposeful adjustment of each adjustable parameter in the circuit according to the impedance mismatch situation.

[0028] In combination with the second aspect, in some implementation manners of the second aspect, the first amplification circuit further includes more levels of auxiliary power amplifier branches, for example, including a second auxiliary power amplifier branch, which is configured to output an amplified signal to the output end of the second auxiliary power amplifier branch when the output power of the main power amplifier reaches a second threshold. It may further include a third auxiliary power amplifier branch, a fourth auxiliary power amplifier branch, etc., which are respectively configured to output an amplified signal to the output end of this branch when the output power of the main power amplifier reaches the corresponding threshold.

[0029] In combination with the second aspect, in some implementation manners of the second aspect, the bias voltage of at least one stage of the auxiliary power amplifier branch is also adjustable, so that there are more adjustment parameters when impedance mismatch occurs, and the adjustment speed is increased.

[0030] In a third aspect, a chip is provided, including: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch includes a third power amplifier; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier and a first phase shifter, the first phase shifter is configured to change the phase of the second balanced branch, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier is adjustable, and the bias voltages of the first power amplifier and the second power amplifier are respectively the drain voltage or the collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is configured to distribute a first signal input to the splitter to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively configured to input amplified signals to a first port, a fourth port, and a second port of the first directional coupler, and the second port is the isolation port of the first directional coupler; the first directional coupler is configured to couple the amplified signals from the first port, the fourth port, and the second port, and output the coupled signals from a third port of the first directional coupler to a load.

[0031] Alternatively, the chip may include: a splitter, a control branch, a first balanced branch, a second balanced branch, and a first directional coupler; the control branch includes a third power amplifier and a second phase shifter; the first balanced branch includes a first power amplifier, the second balanced branch includes a second power amplifier, the bias voltage of the first power amplifier and / or the bias voltage of the second power amplifier is adjustable, and the bias voltages of the first power amplifier and the second power amplifier are respectively the drain voltage or the collector voltage of the transistors of the first power amplifier and the second power amplifier; the splitter is configured to divide a first signal input to the splitter into three paths and input the divided signals to the control branch, the first balanced branch, and the second balanced branch; the first balanced branch, the second balanced branch, and the control branch are respectively configured to input amplified signals to a first port, a fourth port, and a second port of the first directional coupler, and the second port is the isolation port of the first directional coupler; the first directional coupler is configured to couple the signals from the first port, the fourth port, and the second port, and output the coupled signals from a third port of the first directional coupler to a load.

[0032] In combination with the third aspect, in some implementation manners of the third aspect, the chip further includes an impedance detector; the impedance detector is configured to detect the impedance of the load, so that the bias voltages of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter are adjusted according to the impedance of the load.

[0033] In combination with the third aspect, in some implementation manners of the third aspect, the input power differences among the control branch, the first balanced branch, and the second balanced branch are less than 20 percentage points.

[0034] In combination with the third aspect, in some implementation manners of the third aspect, the splitter includes a first power divider, and the first power divider is configured to distribute the first signal to the control branch, the first balanced branch, and the second balanced branch.

[0035] In combination with the third aspect, in some implementation manners of the third aspect, the splitter includes a second power divider and a second directional coupler. The second power divider is configured to divide the first signal into two paths, one path is for inputting to the control branch, and the other path is for inputting to the second directional coupler, and is output to the first balanced branch and the second balanced branch through two ports of the second directional coupler.

[0036] In combination with the third aspect, in some implementation manners of the third aspect, the control branch includes a second phase shifter, and the second phase shifter is located at the input end or the output end of the third power amplifier.

[0037] In combination with the third aspect, in some implementation manners of the third aspect, the first phase shifter is located at the input end or the output end of the second power amplifier.

[0038] In combination with the third aspect, in some implementation manners of the third aspect, the first balanced branch includes a third phase shifter, and the third phase shifter is located at the input end or the output end of the first power amplifier.

[0039] In combination with the third aspect, in some implementation manners of the third aspect, the first port is the coupling port of the first directional coupler.

[0040] In combination with the third aspect, in some implementation manners of the third aspect, the first power amplifier, the second power amplifier, and the third power amplifier are class B power amplifiers.

[0041] In combination with the third aspect, in some implementation manners of the third aspect, the bias voltage of the third power amplifier is adjustable, and the bias voltage of the third power amplifier is the drain voltage or the collector voltage of the transistor of the third power amplifier.

[0042] In combination with the third aspect, in some implementation manners of the third aspect, the chip includes a controller, and the controller is configured to: obtain a first mapping relationship, where the first mapping relationship is used to indicate the target bias voltage of the first power amplifier and / or the target bias voltage of the second power amplifier and the target phase of the first phase shifter corresponding to different load impedances; and adjust the bias voltage of the first power amplifier and / or the second power amplifier and the phase of the first phase shifter according to the first mapping relationship.

[0043] In a fourth aspect, a transmitter is provided, and the transmitter includes a power amplifier circuit as described in the first aspect or any implementation manner of the first aspect, or the second aspect or any implementation manner of the second aspect, or a chip as described in the third aspect or any implementation manner of the third aspect. Description of the Drawings

[0044] Figure 1 is a schematic block diagram of a radio frequency front-end module.

[0045] Figure 2 is a schematic structural diagram of a Doherty power amplifier circuit.

[0046] Figure 3 is a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application.

[0047] Figure 4 is a schematic structural diagram of a splitter provided by an embodiment of the present application.

[0048] Figure 5 is a schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application.

[0049] Figure 6 is a schematic diagram of port current and voltage of a directional coupler.

[0050] Figure 7 is Figure 5 the efficiency heat map of the power amplifier circuit shown.

[0051] Figure 8 is Figure 5 the efficiency and gain simulation diagrams of the power amplifier circuit shown under different mismatch phases.

[0052] Figure 9 is a schematic structural diagram of another power amplifier circuit provided by an embodiment of the present application. Detailed Embodiments

[0053] Next, the technical solutions in the present application will be described with reference to the accompanying drawings.

[0054] Embodiments of the present application will be described in detail below. Examples of the embodiments of the present application are shown in the accompanying drawings. In the drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and should not be construed as a limitation of the present application.

[0055] In the description of the present application, it should be understood that the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first", "second", and "third" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless otherwise specifically defined.

[0056] The power amplifier circuit provided by the embodiments of the present application can be applied to a radio frequency front-end module for power amplification of radio frequency signals. Figure 1 A schematic block diagram of the radio frequency front-end module is shown. As Figure 1 shown, the radio frequency front-end module can be provided on a terminal device such as a mobile phone. The radio frequency front-end module includes a PA, a low-noise amplifier (LNA), a filter, a duplexer, a radio frequency switch, and an antenna. The radio frequency front-end module is coupled to a transceiver and a baseband. The baseband is used for baseband processing of data, and the transceiver is used for signal frequency conversion and channel selection. The PA and the LNA are respectively components of the transmit channel and the receive channel. The PA is used to amplify the radio frequency signal after frequency conversion by the transceiver, the LNA is used to amplify the signal of the receive channel, the filter is used to filter the signal, the duplexer is used for duplex switching of a frequency-division duplex system and radio frequency signal filtering of the receive / transmit channel, the radio frequency switch is used for switching of the receive / transmit channel, and the antenna is used to transmit or receive radio frequency signals.

[0057] Signal modulation techniques such as multiplexing techniques, multi-carrier aggregation techniques, and multiple-input multiple-output techniques implemented by using frequency, time, and coding sequence differences have improved the spectrum utilization rate, increased the system bandwidth, and expanded the communication capacity. However, the envelope of the modulated signal fluctuates violently, resulting in a large difference between the peak power and the average power of the signal. In order to improve the efficiency of the power amplifier in the power back-off state, the Doherty power amplifier has been proposed.

[0058] Figure 2 A schematic structural diagram of a Doherty power amplifier circuit is shown. As Figure 2As shown in the figure, the Doherty power amplifier includes bridge 1, amplifier 1, amplifier 2, corresponding quarter-wavelength transmission lines, bridge 2, a switch, and an impedance detector. Among them, amplifier 1 and the quarter-wavelength transmission line connected to the output end of amplifier 1 form the main power amplifier branch, and amplifier 2 and the quarter-wavelength transmission line connected to the output end of amplifier 2 form the auxiliary power amplifier branch, which can also be called the peak power amplifier branch. When the power of the input signal is small, only the main power amplifier branch is turned on. When the power of the input signal reaches the threshold, the auxiliary power amplifier branch is turned on and plays an active load pulling role on the main power amplifier branch. The switch can switch the state of the isolation port of bridge 2 according to the impedance detection result of the impedance detector, so that the isolation port connected to the switch is short-circuited or open-circuited, thereby reducing the impact of impedance mismatch.

[0059] However, short-circuiting or opening the isolation port of the bridge at the output end can only cope with impedance mismatch in specific situations, and the ability to resist impedance mismatch is limited.

[0060] The embodiment of the present application provides a power amplifier circuit that can be applied to different load impedance mismatch situations and improve the efficiency under load impedance mismatch.

[0061] Figure 3 The schematic structural diagram of a power amplifier circuit provided by the embodiment of the present application is shown. As Figure 3 shown, the power amplifier circuit includes: splitter 1, control branch 2, first balanced branch 3, second balanced branch 4, and first directional coupler 5. The control branch 2 includes a third power amplifier 21; the first balanced branch 3 includes a first power amplifier 31, the second balanced branch 4 includes a second power amplifier 41 and a first phase shifter 42, the bias voltage of the first power amplifier 31 and / or the bias voltage of the second power amplifier 41 are adjustable, and the bias voltages of the first power amplifier 31 and the second power amplifier 41 are the drain voltages or collector voltages of the transistors of the first power amplifier 31 and the second power amplifier 41 respectively. The splitter 1 is used to distribute the first signal input to the splitter 1 to the control branch 2, the first balanced branch 3, and the second balanced branch 4. The first balanced branch 3, the second balanced branch 4, and the control branch 2 are respectively used to input amplified signals to the first port 51, the fourth port 54, and the second port 52 of the first directional coupler 5, and the second port 52 is the isolation port of the first directional coupler 5. The first directional coupler 5 is used to couple the amplified signals from the first port 51, the fourth port 54, and the second port 52, and output them to the load from the third port 53 of the first directional coupler 5.

[0062] The control branch 2, the first balancing branch 3, and the second balancing branch 4 together form the amplifying circuit of the power amplifier circuit, where the first balancing branch 3 and the second balancing branch 4 form a balanced path. The amplifying circuit amplifies the signals distributed to the three branches by the splitter 1 according to power. The amplified signals are input to the first directional coupler 5, and the amplified signal of the control branch 2 is input to the isolation port 52 of the first directional coupler 5, which is used for active load modulation of the signals of the balanced path, thereby changing the impedance presented to the balanced path transistors, so that the balanced path can achieve the effect of impedance matching without a matching network.

[0063] The first directional coupler 5 is a directional coupler. For example, it can be a 3dB directional coupler or other widely used couplers or other types of couplers. A directional coupler is a power coupling element with directionality, usually composed of two transmission lines called the through line (main line) and the coupled line (secondary line). The through line and the coupled line couple part or all of the power of the through line to the coupled line through a certain coupling mechanism (such as slits, holes, coupled line segments, etc.). The directional coupler has four ports, namely the input port (corresponding to Figure 3 the fourth port 54), the coupled port (corresponding to Figure 3 the first port 51), the through port (corresponding to Figure 3 the third port 53), and the isolation port (corresponding to Figure 3 the second port 52).

[0064] Figure 3 The shown power amplifier circuit uses an active load modulation balanced power amplifier (LMBA) type architecture to modulate the two balanced branches through the control branch.

[0065] In the second balancing branch 4, the first phase shifter 42 can be set at the input end of the second power amplifier 41 or at the output end of the second power amplifier 41, so as to adjust the phase of the signal before it is input to the second power amplifier 41 or the signal output from the second power amplifier 41.

[0066] The power amplifiers of the control branch 2, the first balancing branch 3, and the second balancing branch 4 can each include at least one transistor. The transistor can be a bipolar transistor or a field effect transistor. The bipolar transistor and the field effect transistor can be respectively connected to a DC power supply at the collector and the drain for power supply.

[0067] It should be understood that Figure 3The branch connected to the first port 51 of the first directional coupler is referred to as the first balanced branch, and the branch connected to the fourth port 54 is referred to as the second balanced branch; in some embodiments, the branch connected to the fourth port 54 may also be referred to as the first balanced branch, and the branch connected to the first port 51 may be referred to as the second balanced branch. In this way, the first phase shifter 42 can be disposed on the branch connected to the input port 54 or the coupling port 51 of the first directional coupler 5, and the present application does not limit this.

[0068] In the embodiment of the present application, the bias voltage of the power amplifier in at least one of the two balanced branches is adjustable. In this way, the voltage drop across the transistor in at least one of the power amplifiers in the first balanced branch 3 and the second balanced branch 4 is adjustable, so that the output current (drain current or collector current) of at least one of the first balanced branch 3 and the second balanced branch 4 is adjustable, and the output power of the first balanced branch 3 and the second balanced branch 4 will also change accordingly. In addition, the second balanced branch 4 includes a first phase shifter 42, so as to adjust the current and voltage phases on the second balanced branch 4. When the load impedance is mismatched, the influence of the impedance mismatch on the output efficiency of the entire power amplifier circuit can be reduced through the adjustment of these parameters.

[0069] In the embodiment of the present application, the power amplifier circuit may further include an impedance detector 6 for detecting the impedance of the load connected to the output end of the third port 53, so that the bias voltage of the first power amplifier 31 and / or the second power amplifier 41 and the phase of the first phase shifter 42 can be adjusted according to the impedance of the load. The adjustment of each parameter can be executed by the controller of the power amplifier circuit.

[0070] The load impedance can be represented by a complex number, such as a + bj, where a represents the resistance and bj represents the reactance; it can also be represented by the amplitude and phase, such as where A is the amplitude of the load impedance, is the phase of the load impedance, and it can also be represented by, for example, the reflection coefficient and other means. The impedance detector can detect the load impedance in the above different forms, and the present application does not limit this.

[0071] In this way, if there is no impedance detector 6, when there is an impedance mismatch (for example, it is determined whether there is an impedance mismatch state by the output efficiency), appropriate parameter values can be selected through the blind sweep of the adjustable parameters (bias voltage and phase), so as to improve the output efficiency of the entire circuit.

[0072] If there is an impedance detector 6, the values of each adjustable parameter can be adjusted directionally according to the current impedance mismatch situation, so as to improve the output efficiency of the entire circuit.

[0073] Of course, the power amplifier circuit can also be pre-tested to obtain the optimal parameter values (the optimal bias voltages of the first power amplifier 31 and / or the second power amplifier and the optimal phase of the first phase shifter 42) under different impedance mismatches. The optimal parameter values can be the parameter values that maximize the efficiency of the entire power amplifier circuit or the efficiency is higher than a certain threshold under a certain impedance mismatch. For example, the corresponding mapping relationship can be pre-stored, and the mapping relationship can be represented in the form of a table, a function, a formula, etc. When there is an impedance mismatch, directly according to the mapping relationship, the optimal parameter values are used as the target parameter values to adjust the bias voltage and the phase, thereby improving the output efficiency of the circuit. Or, obtain the optimal current phase values of each port of the first directional coupler 5 under different impedance mismatches. When there is an impedance mismatch, adjust each parameter so that the current phases of each port of the first directional coupler 5 reach the optimal current phase values.

[0074] The splitter 1 can also be referred to as a splitting module or unit, and can be a power splitter. The power splitter can be in the form of a Wilson gold splitter, a hybrid bridge, a ring bridge or a directional coupler.

[0075] In the embodiment of the present application, among the signals distributed by the splitter 1 to the three branches, the difference in the power distributed between any two branches can be less than a certain threshold. For example, it is less than 20 percentage points; or, the power distributed between any two branches among the three branches can be equal.

[0076] Or, the power distributed to the two balanced branches can be greater than the power distributed to the control branch.

[0077] Or, the power distributed to different branches can also be set according to the actual situation, and the present application does not limit this.

[0078] Taking the input powers of the three branches as equal as an example, the splitter 1 can include a first power splitter, and the first power splitter is an equal-power splitter, so as to equally distribute the input signal input to the power splitter to the control branch 2, the first balanced branch 3 and the second balanced branch 4 according to the power.

[0079] The splitter 1 can also include a power splitter and a directional coupler. The power splitter can be in the form of the above-mentioned Wilson gold power splitter, hybrid bridge, ring bridge or directional coupler, etc., and is used to divide the input first signal into two paths, and then the directional coupler divides one of the paths into two paths, thereby forming three paths of signals. Figure 4As shown, the splitter 1 includes a second power splitter 12 and a second directional coupler 13. The second power splitter 12 divides the input signal into two paths. One path is input to the control branch 2, and the other path is input to the port of the second directional coupler 13 and output to the first balanced branch 3 and the second balanced branch 4 from the two ports respectively. To make the power distributed to the three branches equal or approximately equal, the second power splitter 12 can distribute the power to the control branch 2 and the other path in a ratio of 1:2. Thus, after being input from the other path of the power splitter to the second directional coupler 13, it can be evenly distributed to the first balanced branch 3 and the second balanced branch 4, making the input power of the three branches equal or approximately equal.

[0080] In some embodiments, the control branch 2 further includes a second phase shifter. The second phase shifter can be disposed at the input end of the third power amplifier 21 or at the output end of the third power amplifier 21. Thus, in addition to the second balanced branch 4, the voltage phase and current phase of the control branch 2 can also be adjusted, increasing the number of adjustable parameters when there is impedance mismatch, so as to cope with more impedance mismatch situations.

[0081] In some embodiments, a phase shifter can also be disposed in the first balanced branch 3, and the phase shifter can be disposed at the input end or the output end of the first power amplifier 31, thereby increasing the number of adjustable parameters, so that after impedance mismatch, the efficiency can be adjusted to a value close to that before the mismatch.

[0082] In some embodiments, the bias voltage of the third power amplifier 21 in the control branch 2 can also be set to be adjustable, thereby further increasing the number of adjustable parameters.

[0083] In the embodiments of the present application, any one of the power amplifiers used in the control branch 2, the first balanced branch 3, and the second balanced branch 4 can be a class B power amplifier or a class AB power amplifier.

[0084] Amplifiers mainly include class A power amplifiers, class B power amplifiers, class AB power amplifiers, and other types of power amplifiers.

[0085] Among them, the class A power amplifier can also be called a class A power amplifier, which is fully conducting throughout the cycle. The class A power amplifier has good linearity, but the static operating point is relatively high, and the theoretical maximum efficiency is 50%.

[0086] Class B power amplifiers can also be called Class B power amplifiers. They are amplifiers with a conduction angle of 180°. The operating point of the Class B power amplifier is set so that the static current of the power amplifier is zero. Usually, two complementary transistors can be used and the two transistors amplify the positive half cycle and negative half cycle of the input signal respectively, thus forming a push-pull structure. The theoretical maximum efficiency of the Class B power amplifier is 78.5%, but because the static operating point is 0, the transistor cannot be turned on when the signal is small, and there is crossover distortion.

[0087] Class AB power amplifiers, also known as Class AB power amplifiers, have a conduction angle between Class A power amplifiers and Class B power amplifiers. The conduction time of any of the two complementary transistors is between 50% and 100%, and the operating point is set so that the quiescent current of the power amplifier is slightly greater than 0, so that the transistor is always in the on state, avoiding the crossover distortion problem of Class B power amplifiers. The theoretical maximum efficiency of Class AB power amplifiers is between the theoretical maximum efficiency of Class A and Class B.

[0088] Figure 3 In the embodiment, the second balanced branch 4 includes a first phase shifter 42. In some embodiments, a phase shifter may be provided only in the control branch 2 without providing a phase shifter in the second balanced branch 4, and at least one bias voltage of the power amplifiers of the two balanced branches may be adjustable, so that when there is an impedance mismatch, the influence of the impedance mismatch can be reduced by adjusting the bias voltage and the phase of the phase shifter.

[0089] Optionally, an impedance detector 6 may be provided so that the adjustable parameter can be directionally adjusted according to the impedance phase detected by the impedance detector 6, or a mapping relationship may be pre-stored and the adjustable parameter may be directly adjusted through the mapping relationship.

[0090] Optionally, the bias voltage of the control branch may also be set to be adjustable, thereby increasing the number of adjustable parameters.

[0091] Optionally, a phase shifter may be provided in the first balancing branch 3 to increase the number of adjustable parameters.

[0092] For specific details, please refer to the previous introduction and will not be repeated here.

[0093] based on Figure 3 , Figure 5 A schematic structural diagram of a power amplifier circuit provided by an embodiment of the present application is shown. The splitter 1 includes a first power splitter 11, the control branch 2 includes a second phase shifter 22, and the bias voltages of the first balanced branch 3 and the second balanced branch 4 are adjustable, so that when the impedance detector 6 detects a load impedance mismatch, the bias voltages of the first phase shifter 42, the second phase shifter 22, the first power amplifier 31 and the second power amplifier 41 can be adjusted to reduce the influence of the impedance mismatch on the output efficiency of the entire power amplifier circuit.

[0094] Taking Figure 5 the power amplifier circuit shown as an example, in order to further illustrate that the technical solution of the embodiment of the present application can adjust the efficiency by adjusting the phase of the phase shifter and the bias voltage of the power amplifier when there is impedance mismatch, the following calculates and illustrates the technical principle of the embodiment of the present application.

[0095] As Figure 6 shown, assuming that the equivalent voltages of the first port 51, the second port 52, the third port 53 and the fourth port 54 are respectively: V b1 , V c , V o and V b2 , and the equivalent currents are respectively: I b1 , I c , I o and I b2 , Z 0 is the characteristic impedance of the first directional coupler 5, j is the imaginary part symbol, and the scattering parameter matrix of the first directional coupler 5 is:

[0096]

[0097] The following assumes that each power amplifier in the circuit is a class B power amplifier, and assumes that x, r, are respectively the normalized current amplitudes or current coefficients of the first balanced branch 3, the second balanced branch 4 and the control branch 2, is the fundamental wave maximum current under a certain drain voltage (or collector voltage), and x, r, are related to the bias voltages of the first balanced branch, the second balanced branch 4 and the control branch. Ω and θ are respectively the current phase differences of I b2 and I c relative to I b1 , and Ω and θ are respectively determined by the phases of the first phase shifter 42 and the second phase shifter 22 (affected by the phase of the phase shifter and the power amplifier). The currents of the first port 51, the second port 52 and the fourth port 54 satisfy the following formulas:

[0098]

[0099]

[0100]

[0101] Assuming that the amplitude and phase of the load impedance are A and respectively, the equivalent current and equivalent voltage of the third port 53 satisfy the following formulas:

[0102]

[0103] Substituting the above formulas (2) to (4) into the above formula (1), and combining with Euler's formula and formula (5), the power of each port of this architecture can be calculated to satisfy the following formula:

[0104]

[0105]

[0106]

[0107]

[0108] Taking the first balance branch 3 reaching voltage saturation to define the back-off point, assuming x = β at the back-off point, according to the above formula (1) and substituting formulas (2) to (4), we can get:

[0109]

[0110] For the convenience of calculation and simplification, assume that Ω and θ are equal.

[0111] The above formula (10) can be simplified to:

[0112]

[0113] That is to say, the normalized current amplitude of the control branch 2 needs to satisfy:

[0114]

[0115] Substituting the above formula (12) into formulas (6) to (9), the power expressions in the low-power region and the back-off region can be obtained:

[0116]

[0117]

[0118]

[0119]

[0120] According to the above formula, it can be seen that in the low-power region, the control branch 2 has no output power, that is, the control branch 2 can be turned on after the power of the circuit reaches the threshold, so as to modulate the power amplifier of the balance path.

[0121] According to formula (16), the output power back-off amount OBO can be calculated by the following formula:

[0122]

[0123] rmax is the normalized current amplitude of the second balanced branch 4 when the maximum output power of the entire power amplifier circuit, r OBO is the normalized current amplitude of the second balanced branch 4 when the entire power amplifier circuit is at the back-off point.

[0124] Assume Let the ratio of the normalized current amplitudes of the two balanced branches and the load impedance mismatch amplitude A satisfy the following relationship:

[0125] A = m 2 (18)

[0126] Substituting the above formula (18) into formula (16), the output power of the entire power amplifier circuit can be expressed as:

[0127]

[0128] In formula (19), let A = 1 and obtain the non-mismatched power P 1 as:

[0129]

[0130] Dividing formula (19) by the non-mismatched power formula (20) and normalizing gives:

[0131]

[0132] For the convenience of calculation and to reduce the influence of load impedance mismatch, let I c relative to I b1 the current phase difference θ and the load impedance phase satisfy the following relationship:

[0133]

[0134] The DC voltage amplitude in the load modulation interval is as follows:

[0135]

[0136]

[0137]

[0138] Then the DC power consumption in the load modulation interval is as follows:

[0139]

[0140] Combining with the output power to obtain the efficiency expression:

[0141]

[0142] As can be seen from Equation (27), the efficiency η is related to m, where m is the ratio of the normalized current amplitudes of the two balanced branches (i.e., the current ratio of the two balanced branches), and can be varied by adjusting the bias voltage.

[0143] In addition, the above Equation 27 is obtained under the assumption that θ and the phase of the load impedance differ by . When the two do not differ by , the obtained output efficiency expression will change. Therefore, the phase of the current can be adjusted by a phase shifter to change the value of the output efficiency.

[0144] For the sake of simplicity in calculation, various assumptions have been adopted above. However, those skilled in the art can know that when the power amplifier does not operate in Class B and the ratio of the normalized current amplitudes of the two balanced branches is not equal to the mismatch amplitude A of the load impedance, it is also possible to reduce the influence of impedance mismatch on the output efficiency by adjusting the phase and bias voltage in the power amplifier circuit having Figure 3 or Figure 5 or other structures described above.

[0145] Figure 7 Shows Figure 5 a heat map of the output efficiency of the power amplifier circuit of the structure shown at the saturation point and the 6 dB back-off point. The phase deviation value can refer to the difference between the phase of the signals input to the second port 52 and the fourth port 54 of the first directional coupler 5 and the optimal signal phase, or it can also refer to the deviation value of the phase shifter phase of the second balanced branch 4 and the control branch 2 from the optimal phase shifter phase. Still assuming that the phases of the signals input to the first directional coupler 5 by the second balanced branch 4 and the control branch 2 are equal, when the phase of the load impedance mismatch changes, the signals input to the first directional coupler 5 by the control branch 2 and the second balanced branch 4 have corresponding optimal phases, that is, the phase shifters of the two branches have optimal phases. As can be seen from Figure 7 (a), at the output power saturation point, as the phase deviation value changes and the current in the balanced branch changes, the output efficiency changes significantly. Then, the current ratio of the balanced branch can be changed by adjusting the bias voltage of the first balanced branch 3 and / or the second balanced branch 4, and the phase deviation value can be changed by adjusting the phase of the first phase shifter 42 of the second balanced branch 4 to change the phase of the second phase shifter 22 of the control branch 2, so that the output efficiency of the power amplifier circuit can be improved. Similarly, according to Figure 7 (b) of the heat map of the output efficiency shown, at the 6 dB back-off point, the output efficiency can also be adjusted by adjusting the bias voltage of the balanced branch and the phase of the phase shifter.

[0146] Figure 8 The simulation diagram shows the efficiency (DE) and gain varying with the output power (Pout) under different load mismatch phases when the voltage standing wave ratio (VSWR) is constant (the amplitude of load mismatch is constant). From Figure 8 It can be seen that when the load mismatch phase changes from 0° to 315° in steps of 45°, after debugging with the technical solution provided by the embodiments of the present application after load mismatch, the efficiency is basically significantly improved. Among them, when the load mismatch phase is 0°, the efficiency improvement is not obvious, but under other load mismatch phases, after debugging, the output efficiency is significantly improved. Before debugging at the 6 dB back-off point under each load mismatch phase, the average efficiency drops by 11% after load mismatch, while after debugging, the average efficiency at the 6 dB back-off point drops by 3.5% - 10%. After debugging, the efficiency drop is significantly improved.

[0147] In addition, the debugging scheme provided by the embodiments of the present application has no obvious impact on the gain.

[0148] It has been introduced above that the preferred parameter values under different impedance mismatch conditions can be obtained through pre-tests. Still taking the example where the current phases of the second port 52 and the fourth port 54 are equal (there is a corresponding relationship between the phases of the first phase shifter 42 and the second phase shifter 22), Table 1 shows Figure 5 an example of the preferred parameter values under different load mismatch phases for the shown power amplifier circuit when the VSVR is constant.

[0149] Table 1

[0150]

[0151] It can be seen from Table 1 that when the impedance mismatch phase is 45°, the preferred bias voltages of the first power amplifier 31 and the second power amplifier 41 are 20V and 28V respectively, and the preferred phase of the second phase shifter 22 is 80°. Thus, when there is impedance mismatch, the values of the bias voltage and the phase shifter can be directly adjusted according to the mismatch phase in the table, thereby improving the regulation speed under impedance mismatch conditions.

[0152] Alternatively, according to the calculation formula, each parameter can be purposefully adjusted according to the impedance mismatch situation, thereby improving the adjustment speed.

[0153] Figure 9 The structural diagram of another power amplifier circuit provided by the embodiments of the present application is shown. As Figure 9As shown, the power amplifier circuit includes a splitter 91, an amplification circuit, and a combiner 94. The amplification circuit includes a main power amplifier branch 92 and a secondary power amplifier branch 93. The main power amplifier branch 92 and the secondary power amplifier branch 93 respectively include a main power amplifier 921 and a secondary power amplifier branch 931, and the bias voltage of the main power amplifier 921 is adjustable. The main power amplifier branch 92 and / or the secondary power amplifier branch 93 include a phase shifter 922 and / or 932. The main power amplifier branch 92 is used to output an amplified signal to the output end of the main power amplifier branch; the secondary power amplifier branch 93 is used to output an amplified signal to the output end of the secondary power amplifier branch when the output power of the main power amplifier 921 reaches a threshold; the splitter 91 is used to distribute the signal input to the splitter 91 to the main power amplifier branch 92 and the secondary power amplifier branch 93; the combiner 94 is used to perform impedance transformation on the first amplification circuit and couple the output ends of the main power amplifier branch and the secondary power amplifier branch to the load.

[0154] Figure 9 The power amplifier circuit shown is a Doherty type amplification circuit.

[0155] As described above, the splitter can be a Wilkinson power splitter, a hybrid coupler, a directional coupler, or other devices capable of power distribution.

[0156] In some embodiments, the power amplifier circuit may further include an impedance detector, so as to facilitate purposeful adjustment of various adjustable parameters in the circuit according to the impedance mismatch situation.

[0157] In some embodiments, the amplification circuit further includes more levels of secondary power amplifier branches. For example, it includes a second secondary power amplifier branch, which is used to output an amplified signal to the output end of the second secondary power amplifier branch when the output power of the main power amplifier 921 reaches a second threshold. It may also include a third secondary power amplifier branch, a fourth secondary power amplifier branch, etc., which are respectively used to output an amplified signal to the output end of the corresponding branch when the output power of the main power amplifier 921 reaches the corresponding threshold.

[0158] In some embodiments, the bias voltage of at least one level of secondary power amplifier branch is also adjustable, so that there are more adjustment parameters when there is impedance mismatch, and the adjustment speed is improved.

[0159] For specific details, reference can be made to the foregoing introduction, and details will not be elaborated here.

[0160] The technical solution of adjusting under impedance mismatch by changing the bias voltage of the power amplifier and the current phase of each branch in the embodiments of the present application can not only be applied to the foregoing active LMBA type amplifier or Doherty amplifier circuit, but also be applied to other types of amplifier circuits. The present application does not make any limitation in this regard.

[0161] The embodiments of the present application also provide a chip, including the foregoing Figure 3 、 Figure 5or Figure 9 The power amplifier circuit introduced above.

[0162] An embodiment of the present application further provides a transmitter, including the power amplifier circuit introduced above Figure 3 、 Figure 5 or Figure 9 the power amplifier circuit introduced above or including the above-mentioned chip.

[0163] As mentioned above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A power amplifier circuit, characterized in that, it includes: a splitter (1), a control branch (2), a first balanced branch (3), a second balanced branch (4) and a first directional coupler (5); the control branch (2) includes a third power amplifier (21); the first balanced branch (3) includes a first power amplifier (31), the second balanced branch (4) includes a second power amplifier (41) and a first phase shifter (42), the first phase shifter (42) is used to change the phase of the second balanced branch (4), the bias voltage of the first power amplifier (31) and / or the bias voltage of the second power amplifier (41) is adjustable, and the bias voltages of the first power amplifier (31) and the second power amplifier (41) are respectively the drain voltage or the collector voltage of the transistors of the first power amplifier (31) and the second power amplifier (32); the splitter (1) is used to distribute the first signal input to the splitter (1) to the control branch (2), the first balanced branch (3) and the second balanced branch (4); the first balanced branch (3), the second balanced branch (4) and the control branch (2) are respectively used to input amplified signals to the first port (51), the fourth port (54) and the second port (52) of the first directional coupler (5), and the second port (52) is the isolation port of the first directional coupler (5); the first directional coupler (5) is used to couple the amplified signals from the first port (51), the fourth port (54) and the second port (52), and output to the load from the third port (53) of the first directional coupler (5).

2. The power amplifier circuit according to claim 1, characterized in that: the power amplifier circuit further includes an impedance detector (6); the impedance detector (6) is used to detect the impedance of the load, so that the bias voltages of the first power amplifier (31) and / or the second power amplifier (41) and the phase of the first phase shifter (42) are adjusted according to the impedance of the load.

3. The power amplifier circuit according to claim 1 or 2, characterized in that: the input power difference between the control branch (2), the first balanced branch (3) and the second balanced branch (4) is less than 20 percentage points.

4. The power amplifier circuit according to any one of claims 1 to 3, characterized in that: the splitter (1) includes a first power divider (11), and the first power divider (11) is used to distribute the first signal to the control branch (2), the first balanced branch (3) and the second balanced branch (4).

5. The power amplifier circuit according to any one of claims 1 to 3, characterized in that: The splitter (1) includes a second power splitter (12) and a second directional coupler (13). The second power splitter (12) is configured to divide the first signal into two paths, one path is for inputting to the control branch (2), and the other path is for inputting to the second directional coupler (13), and is output to the first balanced branch (3) and the second balanced branch (4) through two ports of the second directional coupler (13).

6. The power amplifier circuit according to any one of claims 1 to 5, wherein: The control branch (2) includes a second phase shifter (22), and the second phase shifter (22) is located at the input end or the output end of the third power amplifier (21).

7. The power amplifier circuit according to any one of claims 1 to 6, wherein: The first phase shifter (42) is located at the input end or the output end of the second power amplifier (41).

8. The power amplifier circuit according to any one of claims 1 to 7, wherein: The first balanced branch (3) includes a third phase shifter (32), and the third phase shifter (32) is located at the input end or the output end of the first power amplifier (31).

9. The power amplifier circuit according to any one of claims 1 to 8, wherein: The first port (51) is the coupling port of the first directional coupler (5).

10. The power amplifier circuit according to any one of claims 1 to 9, wherein: The first power amplifier (31), the second power amplifier (41), and the third power amplifier (21) are class B power amplifiers.

11. The power amplifier circuit according to any one of claims 1 to 10, wherein: The bias voltage of the third power amplifier (21) is adjustable, and the bias voltage of the third power amplifier is the drain voltage or the collector voltage of the transistor of the third power amplifier.

12. The power amplifier circuit according to any one of claims 1 to 11, wherein: The power amplifier circuit includes a controller, and the controller is configured to: Obtain a first mapping relationship, where the first mapping relationship is used to indicate the target bias voltage of the first power amplifier (31) and / or the target bias voltage of the second power amplifier and the target phase of the first phase shifter corresponding to different load impedances; Adjust the bias voltage of the first power amplifier (31) and / or the second power amplifier (41) and the phase of the first phase shifter (42) according to the first mapping relationship.

13. A power amplifier circuit, wherein, comprising: Splitter (1), control branch (2), first balanced branch (3), second balanced branch (4) and first directional coupler (5); the control branch (2) includes a third power amplifier (21) and a second phase shifter (22); the first balanced branch (3) includes a first power amplifier (31), the second balanced branch (4) includes a second power amplifier (41), the bias voltages of the first power amplifier (31) and / or the second power amplifier (41) are adjustable, and the bias voltages of the first power amplifier (31) and the second power amplifier (41) are respectively the drain voltages or collector voltages of the transistors of the first power amplifier (31) and the second power amplifier (41); The splitter (1) is configured to divide a first signal input to the splitter (1) into three paths and input them to the control branch (2), the first balanced branch (3) and the second balanced branch (4); The first balanced branch (3), the second balanced branch (4) and the control branch (2) are respectively configured to input amplified signals to the first port (51), the fourth port (54), and the second port (52) of the first directional coupler (5), and the second port (52) is the isolation port of the first directional coupler (5); The first directional coupler (5) is configured to couple signals from the first port (51), the fourth port (54) and the second port (52), and output the signals to a load from the third port (53) of the first directional coupler (5).

14. A chip, comprising the power amplifier circuit according to any one of claims 1 to 13.

15. A transmitter, the transmitter comprising the power amplifier circuit according to any one of claims 1 to 13, or comprising the chip according to claim 14.

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