LED driving circuit and LED driving chip

Abstract

The embodiment of the invention provides an LED driving circuit and an LED driving chip. The circuit comprises a voltage control module and a driving module, the voltage control module generates a stable first driving voltage when a PWM signal is at a low level, and adjusts the first driving voltage according to a driving current sampling signal to output a stable second driving voltage when the PWM signal is at a high level. The voltage difference between the first driving voltage and the second driving voltage is smaller than a preset voltage value, and the driving module receives the first driving voltage when the PWM signal is turned from a low level to a high level, generates a driving current according to the first driving voltage, and adjusts the driving current according to the second driving voltage so as to provide a stable driving current for the LED load. The circuit can improve the transient response of the LED load and the control precision of the LED load under the condition that the PWM signal is small in duty ratio.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of integrated circuit technologies, and in particular, to an LED driving circuit and an LED driving chip. Background Art

[0002] There are two mainstream dimming schemes for light-emitting diodes (LEDs). One is direct current (DC) dimming, which specifically means that the LED is in a constant-on state, and the luminous brightness of the LED is adjusted by adjusting the magnitude of the current flowing through the LED. The other is pulse width modulation (PWM) dimming, which specifically means that the LED is in a state of alternating on and off, and the average value of the current flowing through the LED is changed by adjusting the duty cycle of the PWM signal, thereby realizing the adjustment of the luminous brightness of the LED. Since the human eye can only perceive a relatively low on-off frequency of the LED, when the frequency of the PWM signal reaches a certain value, the human eye can only recognize the average brightness of the LED within a certain period of time.

[0003] In the prior art, when the PWM signal is at a low level, the driving circuit stops working. When the PWM signal flips to a high level, the driving circuit needs to re-establish a steady-state driving current to drive the LED. However, during the flipping process of the PWM signal from a low level to a high level, the time required to re-establish the steady-state driving current is relatively long, resulting in a slow transient response speed of the LED. Summary of the Invention

[0004] Embodiments of the present disclosure provide an LED driving circuit and an LED driving chip, which can improve the transient response speed of the LED load and also improve the control accuracy of the LED load under a small duty cycle of the PWM signal.

[0005] In a first aspect, the present disclosure provides an LED driving circuit, including: a voltage control module and a driving module.

[0006] The voltage control module is configured to generate a stable first driving voltage when the PWM signal is at a low level; when the PWM signal is at a high level, adjust the first driving voltage according to a driving current sampling signal to output a stable second driving voltage.

[0007] The driving module is configured to receive the first driving voltage when the PWM signal flips from a low level to a high level, generate a driving current according to the first driving voltage, and adjust the driving current according to the second driving voltage to provide the stable driving current to the LED load.

[0008] In some embodiments of the present disclosure, the voltage control module has a first negative feedback loop and a second negative feedback loop, and a driving voltage generation node for providing a driving voltage to the driving module. The driving module is connected to the second negative feedback loop to provide the driving current sampling signal when the second negative feedback loop is turned on.

[0009] When the PWM signal is at a low level under PWM dimming, the connection between the driving voltage generation node and the driving module is disconnected, the second negative feedback loop is turned off, and the first negative feedback loop is turned on, so as to generate the first driving voltage at the driving voltage generation node by using the first negative feedback loop.

[0010] When the PWM signal flips from a low level to a high level under the PWM dimming, the connection between the driving voltage generation node and the driving module is connected to supply the first driving voltage to the driving module. The first negative feedback loop is turned off, and the second negative feedback loop is turned on, so as to adjust the driving voltage at the driving voltage generation node by using the second negative feedback loop to generate the second driving voltage.

[0011] In some embodiments of the present disclosure, under DC dimming, the connection between the driving voltage generation node and the driving module is connected to supply the first driving voltage to the driving module. The first negative feedback loop remains off, and the second negative feedback loop remains on.

[0012] In some embodiments of the present disclosure, the voltage control module includes an error amplifier, a first pull-up resistor, a first power transistor, a feedback resistor, and a control unit. The positive input terminal of the error amplifier receives a reference voltage. The negative input terminal of the error amplifier is connected to the first terminal of the control unit. The second terminal of the control unit is connected to the first terminal of the first power transistor and the first terminal of the feedback resistor. The output terminal of the error amplifier is connected to the control terminal of the first power transistor. The second terminal of the first power transistor is connected to the power supply voltage through the first pull-up resistor. The second terminal of the feedback resistor is grounded.

[0013] The third terminal of the control unit is connected to the sampling terminal of the driving module. The fourth terminal of the control unit is connected to the output terminal of the error amplifier and the control terminal of the first power transistor. The fifth terminal of the control unit is connected to the control terminal of the driving module. The control terminal of the control unit is connected to the PWM signal.

[0014] The error amplifier is configured to receive a feedback voltage when the PWM signal is at a low level, and output the stable first driving voltage according to the feedback voltage and the reference voltage.

[0015] The control unit is configured to connect the feedback resistor to the inverting input terminal of the error amplifier when the PWM signal is at a low level; and connect the sampling terminal of the driving module to the inverting input terminal of the error amplifier and the control terminal of the driving module to the output terminal of the error amplifier when the PWM signal is at a high level.

[0016] In some embodiments of the present disclosure, the driving module includes a second power transistor and a sampling resistor. The third terminal of the control unit is connected to the first terminal of the second power transistor and the first terminal of the sampling resistor. The fifth terminal of the control unit is connected to the control terminal of the second power transistor. The second terminal of the second power transistor is connected to the negative power supply terminal of the LED load, and the second terminal of the sampling resistor is grounded.

[0017] The error amplifier is further configured to receive the driving current sampling signal when the PWM signal is at a high level, and output the stable second driving voltage according to the driving current sampling signal and the reference voltage.

[0018] In some embodiments of the present disclosure, the ratio of the width-to-length ratio of the first power transistor to the width-to-length ratio of the second power transistor is 1:M, and the ratio of the resistance value of the feedback resistor to the resistance value of the sampling resistor is M:1, where M is an integer greater than 1.

[0019] In some embodiments of the present disclosure, the error amplifier includes an operational amplifier, a second pull-up resistor, an amplifying transistor, and a current source. The non-inverting input terminal of the operational amplifier receives the reference voltage. The inverting input terminal of the operational amplifier is connected to the first terminal of the first power transistor, the first terminal of the second power transistor, the first terminal of the sampling resistor, and the first terminal of the feedback resistor. The output terminal of the operational amplifier is connected to the control terminal of the amplifying transistor. The first terminal of the amplifying transistor is grounded through the current source, and the second terminal of the amplifying transistor is connected to the power supply voltage through the second pull-up resistor. The first terminal of the amplifying transistor is connected to the control terminal of the first power transistor and the control terminal of the second power transistor.

[0020] In some embodiments of the present disclosure, the control unit includes a first switching transistor, a second switching transistor, and a third switching transistor. The first terminal of the first switching transistor is connected to the first terminal of the first power transistor and the first terminal of the feedback resistor. The first terminal of the second switching transistor is connected to the first terminal of the second power transistor and the first terminal of the sampling resistor. The second terminals of the first switching transistor and the second switching transistor are connected to the inverting input terminal of the error amplifier. The first terminal of the third switching transistor is connected to the control terminal of the second power transistor, and the second terminal of the third switching transistor is connected to the output terminal of the error amplifier and the control terminal of the first power transistor.

[0021] In some embodiments of the present disclosure, the LED driving circuit further includes a pull-down module. The control terminal of the second power transistor is grounded through the pull-down module, and the control terminal of the pull-down module is connected to the PWM signal.

[0022] The pull-down module is configured to pull the control terminal of the second power transistor to ground when the PWM signal is at a low level.

[0023] In a second aspect, the present disclosure provides an LED driving chip, including any of the LED driving circuits provided in the first aspect.

[0024] In the technical solution of the embodiments of the present disclosure, the LED driving circuit includes a voltage control module and a driving module. The voltage control module generates a stable first driving voltage when the PWM signal is at a low level, and adjusts the first driving voltage according to the driving current sampling signal when the PWM signal is at a high level to output a stable second driving voltage. The driving module receives the first driving voltage when the PWM signal flips from a low level to a high level, generates a driving current according to the first driving voltage, and adjusts the driving current according to the second driving voltage to provide a stable driving current to the LED load. Since the voltage difference between the first driving voltage and the second driving voltage is less than a preset voltage value, during the process of the PWM signal flipping from a low level to a high level under PWM dimming, the time required to establish a steady-state driving current is shorter, which can improve the transient response speed of the LED driving circuit, and thus can improve the transient response speed of the LED load. In addition, during the transient response process of the LED driving circuit, the rising slope of the driving current is larger, the driving current is easier to control and closer to an ideal square wave, and thus the control accuracy of the LED load under a small duty cycle of the PWM signal can be improved.

[0025] The above description is only an overview of the technical solutions of the embodiments of the present application. In order to be able to understand the technical means of the embodiments of the present application more clearly, it can be implemented according to the content of the description. And in order to make the above and other purposes, features and advantages of the embodiments of the present application more obvious and understandable, the following specifically gives the specific implementation manners of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 FIG. is a schematic structural diagram of an LED driving circuit provided for an embodiment of the present disclosure.

[0028] Figure 2A circuit schematic diagram of an LED driving circuit provided by an embodiment of the present disclosure.

[0029] Figure 3 A working timing diagram of an LED driving circuit provided by an embodiment of the present disclosure.

[0030] Figure 4 A circuit schematic diagram of an error amplifier provided by an embodiment of the present disclosure.

[0031] Figure 5 A circuit schematic diagram of another LED driving circuit provided by an embodiment of the present disclosure. Detailed implementation manners

[0032] In order to make the objectives, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those skilled in the art without creative efforts based on the described embodiments of the present disclosure also fall within the scope of protection of the present disclosure.

[0033] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the subject matter of the present disclosure belongs. Further, it will be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless expressly defined herein. As used herein, the statement of connecting two or more parts together shall mean that these parts are directly combined together or combined through one or more intermediate components.

[0034] Referring to "embodiments" in the present disclosure means that specific features, structures or characteristics described in connection with the embodiments may be included in at least one embodiment of the present application. The phrase "embodiment" appearing in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described in the present disclosure may be combined with other embodiments.

[0035] In addition, terms such as "first", "second", etc. in the specification and claims of the present disclosure or in the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order, and may explicitly or implicitly include one or more of such features.

[0036] In the present disclosure, the term "and / or" is merely a description of the association relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: the existence of A, the simultaneous existence of A and B, and the existence of B. Additionally, in this text, the character " / " generally indicates an "or" relationship between the associated objects before and after.

[0037] In the description of the present disclosure, unless otherwise specified, the meanings of "multiple" and "at least two" refer to more than two (including two). Similarly, "multiple groups" and "at least two groups" refer to more than two groups (including two groups).

[0038] To enable those skilled in the art of this technology to better understand the solution of this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings.

[0039] Figure 1 The following is a schematic structural diagram of an LED driving circuit provided for an embodiment of the present disclosure, as Figure 1 shown, the LED driving circuit 100 includes a voltage control module 110 and a driving module 120. The first input terminal of the voltage control module 110 receives a reference voltage Vref. The output terminal of the voltage control module 110 is connected to the control terminal of the driving module 120. The second input terminal of the voltage control module 110 is connected to the sampling terminal of the driving module 120. The output terminal of the driving module 120 is connected to the negative power supply terminal of the LED load 20, and the positive power supply terminal of the LED load 20 is connected to a stable voltage Vhigh.

[0040] The voltage control module 110 is configured to generate a stable first driving voltage Vgate1 when the PWM signal is at a low level; when the PWM signal is at a high level, adjust the first driving voltage Vgate1 according to the driving current sampling signal Vs_Idrv to output a stable second driving voltage Vgate2, and the voltage difference between the first driving voltage Vgate1 and the second driving voltage Vgate2 is less than a preset voltage value Vpre.

[0041] The driving module 120 is configured to receive the first driving voltage Vgate1 when the PWM signal flips from a low level to a high level, generate a driving current Idrv according to the first driving voltage Vgate1, and adjust the driving current Idrv according to the second driving voltage Vgate2 to provide a stable driving current Idrv to the LED load 20.

[0042] Exemplarily, Figure 2 The following is a circuit schematic diagram of an LED driving circuit provided for an embodiment of the present disclosure, as Figure 2 shown, the voltage control module 110 includes an error amplifier EA, a first pull-up resistor Ru1, a first power transistor M1, and a feedback resistor Rf.

[0043] The positive input terminal of the error amplifier EA receives the reference voltage Vref. The negative input terminal of the error amplifier EA is connected to the first terminal of the first power transistor M1 and the first terminal of the feedback resistor Rf. The output terminal of the error amplifier EA is connected to the control terminal of the first power transistor M1. The second terminal of the first power transistor M1 is connected to the power supply voltage VDD through the first pull-up resistor Ru1, and the second terminal of the feedback resistor Rf is grounded.

[0044] Specifically, the first power transistor M1 can be an NMOS. The gate of the first power transistor M1 is connected to the output terminal of the error amplifier EA. The source of the first power transistor M1 and the first terminal of the feedback resistor Rf are connected to the negative input terminal of the error amplifier EA. The drain of the first power transistor M1 is connected to the power supply voltage VDD through the first pull-up resistor Ru1.

[0045] The reference voltage Vref can be linearly transformed from the input current I_DIM of the LED driving circuit 100 by the voltage control module 110. For example, as Figure 2 shown, the voltage control module 110 further includes an input resistor Rin. The positive input terminal of the error amplifier EA is grounded through the input resistor Rin. After the input current I_DIM flows through the input resistor Rin, a voltage difference is generated across the input resistor Rin, and the voltage across the input resistor Rin is the reference voltage Vref.

[0046] The error amplifier EA, the first power transistor M1, the first pull-up resistor Ru1, and the feedback resistor Rf form a first negative feedback loop. During the stage when the PWM dimming is in effect and the PWM signal is at a low level, the source of the first power transistor M1 and the first terminal of the feedback resistor Rf are connected to the negative input terminal of the error amplifier EA, and then the first negative feedback loop is turned on.

[0047] The negative input voltage of the error amplifier EA is the feedback voltage Vf, and the feedback voltage Vf is linearly related to the gate voltage of the first power transistor M1. The first negative feedback loop can adjust the gate voltage of the first power transistor M1 according to the feedback voltage Vf and the reference voltage Vref, so that the feedback voltage Vf finally equals the voltage value of the reference voltage Vref. That is, when the first feedback loop is turned on, the steady-state voltage value of the feedback voltage Vf is equal to the voltage value of the reference voltage Vref.

[0048] At this time, the output terminal of the error amplifier EA serves as the driving voltage generation node and can output a stable first driving voltage Vgate1. Therefore, the first driving voltage Vgate1 can be understood as the steady-state gate voltage of the first power transistor M1. The current Ids flowing through the first power transistor M1 can be expressed as:

[0049] Ids = I_DIM * R 1 / R 2 (1)

[0050] Among them, R 1 is the resistance value of the input resistor Rin, and R 2 is the resistance value of the feedback resistor Rf.

[0051] During the stage when the PWM signal is at a high level under PWM dimming, the source of the first power transistor M1 and the first end of the feedback resistor Rf are not connected to the inverting input terminal of the error amplifier EA, so the first negative feedback loop is closed. Under DC dimming, the PWM signal remains at a high level, and the source of the first power transistor M1 and the first end of the feedback resistor Rf remain in a state of not being connected to the inverting input terminal of the error amplifier EA, and the first negative feedback loop is closed.

[0052] In other embodiments, the reference voltage Vref may also be the input voltage of the LED driving circuit 100 directly received by the voltage control module 110, and the present disclosure does not make specific limitations thereon.

[0053] Continue to refer to Figure 2 , the driving module 120 includes a second power transistor M2 and a sampling resistor Rs. The inverting input terminal of the error amplifier EA is also connected to the first end of the second power transistor M2 and the first end of the sampling resistor Rs. The output terminal of the error amplifier EA is also connected to the control terminal of the second power transistor M2. The second end of the second power transistor M2 is connected to the negative power supply terminal of the LED load 20, and the second end of the sampling resistor Rs is grounded.

[0054] Specifically, the second power transistor M2 may be an NMOS. The gate of the second power transistor M2 is connected to the output terminal of the error amplifier EA. The source of the second power transistor M2 and the first end of the sampling resistor Rs are connected to the inverting input terminal of the error amplifier EA. The drain of the second power transistor M2 is connected to the negative power supply terminal of the LED load 20.

[0055] During PWM dimming and at the moment when the PWM signal flips from a low level to a high level, the gate of the second power transistor M2 is connected to the driving voltage generation node to receive the first driving voltage Vgate1. Then, the first driving voltage Vgate1 can be understood as the transient gate voltage of the second power transistor M2, that is, the steady-state driving voltage of the driving module 120. Under the action of the first driving voltage Vgate1, the second power transistor M2 conducts to generate a negative pull-down current at the negative electrode of the LED load 20, that is, the driving current Idrv.

[0056] The error amplifier EA, the second power transistor M2, the LED load 20, and the sampling resistor Rs form a second negative feedback loop. When the PWM signal flips to a high level, the source of the second power transistor M2 and the first end of the sampling resistor Rs are connected to the inverting input terminal of the error amplifier EA, and then the second negative feedback loop is opened.

[0057] The inverting input voltage of the error amplifier EA is the drive current sampling signal Vs_Idrv, and the drive current sampling signal Vs_Idrv is linearly related to the drive current Idrv. For example, Vs_Idrv = Idrv * R 3 , where R 3 is the resistance value of the sampling resistor Rs. The second negative feedback loop can adjust the first drive voltage Vgate1 according to the drive current sampling signal Vs_Idrv and the reference voltage Vref, so that the drive current sampling signal Vs_Idrv is finally equal to the voltage value of the reference voltage Vref, that is, when the second negative feedback loop is turned on, the steady-state voltage value of the drive current sampling signal Vs_Idrv is equal to the voltage value of the reference voltage Vref.

[0058] At this time, the drive voltage generation node can output a stable second drive voltage Vgate2, so the second drive voltage Vgate2 can be understood as the steady-state gate voltage of the second power transistor M2, that is, the steady-state drive voltage of the drive module 120. The current flowing through the second power transistor M2 is the drive current Idrv, and the drive current Idrv can be expressed as:

[0059] Idrv = I_DIM * R 1 / R 3 (2)

[0060] In the stage where the PWM signal is at a low level under PWM dimming, the source of the second power transistor M2 and the first end of the sampling resistor Rs are not connected to the inverting input terminal of the error amplifier EA, so the second negative feedback loop is turned off, and the connection between the gate of the second power transistor M2 and the drive voltage generation node is disconnected.

[0061] Exemplarily, Figure 3 is a working timing diagram of an LED driving circuit provided by an embodiment of the present disclosure. As Figure 3 shown, the high-level width of the PWM signal is T1, and the period of the PWM signal is T2. Then the duty cycle of the PWM signal duty = T1 / T2. Combining formula (2), the drive average current Idrv_avg can be determined as:

[0062] Idrv_avg = I_DIM * duty * R 1 / R 3 = I_DIM * T1 * R 1 / T2 * R 3 (3)

[0063] Among them, when the input current I_DIM remains unchanged, under PWM dimming, by changing the duty cycle duty of the PWM signal, the drive average current Idrv_avg can be changed, thereby changing the brightness of the LED load 20.

[0064] Under DC dimming, the PWM signal remains high, and the second negative feedback loop remains continuously open. At this time, the driving current Idrv is as shown in Equation (2). Therefore, under DC dimming, by adjusting the input current I_DIM, the driving current Idrv can be changed, thereby changing the brightness of the LED load 20.

[0065] In summary, when the LED driving circuit 100 operates under DC dimming, the first negative feedback loop remains closed, the second negative feedback loop remains open, the connection between the driving voltage generation node and the driving module 120 is established to supply the first driving voltage Vgate1 to the driving module 120, the LED load 20 remains constantly on, and the constant input current I_DIM determines the brightness of the LED load 20.

[0066] When the LED driving circuit 100 operates under PWM dimming, during the low-level stage of the PWM signal, the first negative feedback loop is open, a stable first driving voltage Vgate1 is generated at the driving voltage generation node, the connection between the driving voltage generation node and the driving module 120 is disconnected, the second negative feedback loop is closed, and the driving current Idrv drops to zero, and the LED load 20 appears to be off. At the moment when the PWM signal flips from low level to high level, the connection between the driving voltage generation node and the driving module 120 is established to supply the first driving voltage Vgate1 to the driving module 120. During the high-level stage of the PWM signal, the first negative feedback loop is closed, the second negative feedback loop is open, and the driving voltage at the driving voltage generation node is adjusted from the first driving voltage Vgate1 to a stable second driving voltage Vgate2. The driving current Idrv pulls down the LED load 20 to a set voltage, and this voltage value needs to satisfy that the driving module 120 can pull down a normal driving current, and the LED load 20 appears to be on.

[0067] In this way, under PWM dimming, during the process of the PWM signal flipping from low level to high level, the process of the LED driving circuit 100 establishing a steady-state driving current is the process of adjusting the first driving voltage Vgate1 to the second driving voltage Vgate2. Since the voltage difference between the first driving voltage Vgate1 and the second driving voltage Vgate2 is less than the preset voltage value Vpre, that is, the voltage values of the first driving voltage Vgate1 and the second driving voltage Vgate2 are very close, the time required to establish a steady-state driving current is short, which can improve the transient response speed of the LED load 20. In addition, during the transient response process, the rising slope of the driving current Idrv is large, so the driving current Idrv is easier to control and closer to an ideal square wave, which is beneficial to improving the control accuracy of the LED load 20 under a small duty cycle of the PWM signal.

[0068] In some embodiments, the ratio of the aspect ratio W1 / L1 of the first power transistor M1 to the aspect ratio W2 / L2 of the second power transistor M2 is 1:M, and the resistance value R 2 of the feedback resistor Rf and the resistance value R 3 of the sampling resistor Rs have a ratio of M:1, where M is an integer greater than 1.

[0069] Exemplarily, since W1 / L1:W2 / L2 = 1:M and R 2 :R 3 = M:1, the steady-state current value of the drive current Idrv when the second negative feedback loop is turned on is M times the steady-state current value of the current Ids flowing through the first power transistor M1 when the first negative feedback loop is turned on. The steady-state voltage value of the feedback voltage Vf when the first negative feedback loop is turned on is equal to the steady-state voltage value of the drive current sampling signal Vs_Idrv when the second negative feedback loop is turned on, that is, the first drive voltage Vgate1 is equal to the second drive voltage Vgate2. That is to say, the transient drive voltage of the drive module 120 is equal to the steady-state drive voltage.

[0070] Thus, under PWM dimming and when the PWM signal flips from low level to high level, the LED driving circuit 100 can directly enter the steady state, which can further improve the transient response speed of the LED load 20 and the control accuracy of the LED load 20 at a small duty cycle of the PWM signal.

[0071] In some embodiments, Figure 4 is a circuit schematic diagram of an error amplifier provided by an embodiment of the present disclosure. As Figure 4 shown, the error amplifier EA includes an operational amplifier OP, a second pull-up resistor Ru2, an amplification transistor Ma, and a current source IB.

[0072] Combined with Figure 2 and Figure 4 shown, the non-inverting input terminal of the operational amplifier OP receives a reference voltage Vref. The inverting input terminal of the operational amplifier OP is connected to the first terminal of the first power transistor M1, the first terminal of the second power transistor M2, the first terminal of the sampling resistor Rs, and the first terminal of the feedback resistor Rf. The output terminal of the operational amplifier OP is connected to the control terminal of the amplification transistor Ma. The first terminal of the amplification transistor Ma is grounded through the current source IB. The second terminal of the amplification transistor Ma is connected to the power supply voltage VDD through the second pull-up resistor Ru2. The first terminal of the amplification transistor Ma is connected to the control terminals of the first power transistor M1 and the second power transistor M2.

[0073] Exemplarily, the amplifying transistor Ma is an NMOS. The source of the amplifying transistor Ma is connected to the input end of the current source IB, the gate of the first power transistor M1, and the gate of the second power transistor M2. The drain of the amplifying transistor Ma is connected to the power supply voltage VDD through the second pull-up resistor Ru. Among them, the second power transistor M2 usually has a relatively large size, so the second power transistor M2 has a relatively large parasitic gate capacitance.

[0074] When the second negative feedback loop is turned on, before the amplifying transistor Ma is turned on, the source voltage of the amplifying transistor Ma is pulled down by the parasitic gate capacitance of the second power transistor M2. Then, the gate-source voltage of the amplifying transistor Ma is relatively large. Therefore, when the amplifying transistor Ma is turned on, the gate-source voltage of the amplifying transistor Ma can be instantaneously pulled up, enabling the parasitic gate capacitance of the second power transistor M2 to be quickly charged and the second power transistor M2 to be quickly turned on.

[0075] As the second power transistor M2 is turned on, the LED driving circuit 100 reaches a steady state. At this time, the output voltage Vop_out of the operational amplifier OP is the sum of the gate-source voltage of the amplifying transistor Ma and the source voltage of the amplifying transistor, that is, the sum of the gate-source voltage of the amplifying transistor Ma and the second driving voltage Vgate2.

[0076] Since the second negative feedback loop and the first negative feedback loop share the same error amplifier EA, when the error amplifier EA is in a steady state, the current flowing through the amplifying transistor Ma is the same, and the gate-source voltage of the amplifying transistor Ma is the same. When the second negative feedback loop is turned on and the LED driving circuit 100 reaches a steady state, the output voltage Vop_out of the operational amplifier OP is the sum of the gate-source voltage of the amplifying transistor Ma and the first driving voltage Vgate1. Therefore, when the first driving voltage Vgate1 is equal to the second driving voltage Vgate2, the steady-state voltage values of the output voltage Vop_out of the operational amplifier OP when the second negative feedback loop is turned on and when the first negative feedback loop is turned on are equal.

[0077] In summary, the error amplifier EA includes the amplifying transistor Ma and the operational amplifier OP. The amplifying transistor Ma can quickly turn on the second power transistor M2 to enable the LED driving circuit 100 to quickly reach a steady state. The operational amplifier OP can provide the same and steady output voltage Vop_out when the second negative feedback loop is turned on and when the first negative feedback loop is turned on, so that the error amplifier EA can quickly enter a steady state, that is, the LED driving circuit 100 can quickly reach a steady state, further improving the transient response speed of the LED load 20 and the control accuracy of the LED load 20 under a small duty cycle of the PWM signal.

[0078] In some embodiments, continue to refer to Figure 4, the error amplifier EA further includes a compensation resistor Rc and a compensation capacitor Cc, and the output terminal of the operational amplifier OP is grounded through the compensation resistor Rc and the compensation capacitor Cc.

[0079] Exemplarily, the compensation resistor Rc and the compensation capacitor Cc cooperate to perform loop compensation on the first negative feedback loop and the second negative feedback loop, ensuring the stability of the first negative feedback loop and the second negative feedback loop.

[0080] In some embodiments, as Figure 2 shown, the voltage control module 110 further includes a control unit 111. Among them, the first end of the control unit 111 is connected to the inverting input terminal of the error amplifier EA, the second end of the control unit 111 is connected to the first end of the first power transistor M1 and the first end of the feedback resistor Rf, the third end of the control unit 111 is connected to the first end of the second power transistor M2 and the first end of the sampling resistor Rs, that is, the sampling terminal of the driving module 120, the fourth end of the control unit 111 is connected to the output terminal of the error amplifier EA and the control terminal of the first power transistor M1, the fifth end of the control unit 111 is connected to the control terminal of the second power transistor M2, that is, the control terminal of the driving module 120, and the control terminal of the control unit 111 is connected to the PWM signal.

[0081] Exemplarily, as Figure 2 shown, the control unit 111 includes a first switching transistor Q1. The first end of the first switching transistor Q1 is the second end of the control unit 111, so the first end of the first switching transistor Q1 is connected to the first end of the first power transistor M1 and the first end of the feedback resistor Rf. The second end of the first switching transistor Q1 is the first end of the control unit 111, so the second end of the first switching transistor Q1 is connected to the inverting input terminal of the error amplifier EA. The control terminal of the first switching transistor Q1 is the control terminal of the control unit 111, and the control signal of the first switching transistor Q1 is the inverted signal of the PWM signal.

[0082] Specifically, the first switching transistor Q1 is an NMOS. The gate of the first switching transistor Q1 receives the inverted signal of the PWM signal. The source of the first switching transistor Q1 is connected to the source of the first power transistor M1 and the first end of the feedback resistor Rf, and the drain of the first switching transistor Q1 is connected to the inverting input terminal of the error amplifier EA.

[0083] When the PWM control signal is at a low level, the inverted signal of the PWM control signal is at a high level, and the first switching transistor Q1 is in a conducting state, and the feedback resistor Rf can be connected to the inverting input terminal of the error amplifier EA to turn on the first negative feedback loop. When the PWM control signal is at a high level, the inverted signal of the PWM control signal is at a low level, and the first switching transistor Q1 is in a cut-off state, and the feedback resistor Rf will not be connected to the inverting input terminal of the error amplifier EA, thereby turning off the first negative feedback loop.

[0084] Continue to refer toFigure 5 In addition, the control unit 111 further includes a second switching transistor Q2 and a third switching transistor Q3. The first end of the second switching transistor Q2 is the third end of the control unit 111. Then, the first end of the second switching transistor Q2 is connected to the first end of the second power transistor M2 and the first end of the sampling resistor Rs. The second end of the second switching transistor Q2 is the first end of the control unit 111. Then, the second end of the second switching transistor Q2 is connected to the inverting input terminal of the error amplifier EA. The control end of the second switching transistor Q2 is the control end of the control unit 111, and the control signal of the second switching transistor Q2 is a PWM signal.

[0085] The first end of the third switching transistor Q3 is the fifth end of the control unit 111. Then, the first end of the third switching transistor Q3 is connected to the control end of the second power transistor M2. The second end of the third switching transistor Q3 is the fourth end of the control unit 111. Then, the second end of the third switching transistor Q3 is connected to the output terminal of the error amplifier EA and the control end of the first power transistor M1. The control end of the third switching transistor Q3 is the control end of the control unit 111, and the control signal of the third switching transistor Q3 is a PWM signal.

[0086] Specifically, the second switching transistor Q2 and the third switching transistor Q3 are NMOS. The gates of the second switching transistor Q2 and the third switching transistor Q3 receive the PWM signal. The source of the second switching transistor Q2 is connected to the source of the second power transistor M2 and the first end of the sampling resistor Rs. The drain of the second switching transistor Q2 is connected to the inverting input terminal of the error amplifier EA. The source of the third switching transistor Q3 is connected to the gate of the second power transistor M2. The drain of the third switching transistor Q3 is connected to the output terminal of the error amplifier EA and the gate of the first power transistor M1.

[0087] When the PWM control signal is at a high level, the second switching transistor Q2 and the third switching transistor Q3 are in a conducting state. The sampling resistor Rs can be connected to the inverting input terminal of the error amplifier EA to turn on the second negative feedback loop. The gate of the second power transistor M2 is connected to the output terminal of the error amplifier EA to connect the driving voltage generation node to the driving module 120. When the PWM control signal is at a low level, the second switching transistor Q2 and the third switching transistor Q3 are in a non-conducting state. The sampling resistor Rs will not be connected to the inverting input terminal of the error amplifier EA, thereby turning off the second negative feedback loop. At the same time, the gate of the second power transistor M2 will not be connected to the output terminal of the error amplifier EA to disconnect the driving voltage generation node from the driving module 120.

[0088] In some embodiments, Figure 5 As shown in Figure 5 is a circuit schematic diagram of another LED driving circuit provided by an embodiment of the present disclosure. The LED driving circuit 100 further includes a pull-down module 130. The control end of the second power transistor M2 is grounded through the pull-down module 130, and the control end of the pull-down module 130 is connected to the PWM signal.

[0089] Exemplarily, as Figure 5 shown, the pull - down module 130 includes a pull - down transistor Md and a current - limiting resistor R. The first end of the pull - down transistor Md is grounded, the control end of the second power transistor M2 is connected to the second end of the pull - down transistor Md through the current - limiting resistor R, and the control end of the pull - down transistor Md receives the inverted signal of the PWM signal.

[0090] Specifically, the pull - down transistor Md is an NMOS. The gate of the pull - down transistor Md receives the inverted signal of the PWM signal, the source of the pull - down transistor Md is grounded, and the drain of the pull - down transistor Md is connected to the gate of the second power transistor M2 through the current - limiting resistor R.

[0091] When the PWM signal is at a low level, the inverted signal of the PWM signal is at a high level, and the pull - down transistor Md is in an on state, which can pull down the gate of the second power transistor M2 to the ground, that is, the gate voltage of the second power transistor M2 is pulled down to zero to turn off the second power transistor M2. At this time, the current - limiting resistor R can limit the current flowing through the pull - down transistor Md to prevent the impact caused by the too - fast discharge of the parasitic gate capacitance of the second power transistor M2.

[0092] In some embodiments, during the high - level stage of the PWM signal, it is necessary to set the drain voltage VLED of the second power transistor M2 to be greater than the first voltage threshold Vth1 and less than the second voltage threshold Vth2, where Vth2 > Vth1, so that the second power transistor M2 operates in the saturation region to ensure the normal operation of the LED driving circuit 100, and at the same time, the power consumption of the second power transistor M2 can be reduced to improve the efficiency of the LED driving circuit 100.

[0093] The embodiments of the present disclosure also provide an LED driving chip, including the LED driving circuit 100 provided in any of the above - mentioned embodiments.

[0094] The LED driving chip provided by the embodiments of the present disclosure includes the LED driving circuit 100 provided in any of the above - mentioned embodiments, and has the same functional modules and beneficial effects as the LED driving circuit 100, which will not be elaborated here.

[0095] Unless the context clearly indicates otherwise, the singular forms of the words used in this specification and the appended claims include the plural, and vice versa. Thus, when referring to the singular, the corresponding plural is usually included. Similarly, the terms "comprising" and "including" will be interpreted as inclusive rather than exclusive. Likewise, the term "including" and "or" should be interpreted as inclusive, unless such an interpretation is clearly prohibited in this specification. Where the term "example" is used in this specification, especially when it is located after a group of terms, the "example" is merely exemplary and explanatory, and should not be considered exclusive or extensive.

[0096] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that the various aspects of the present application can be implemented alone or in combination with one or more other aspects. It should also be understood that the description herein and the specific embodiments are for illustrative purposes only and are not intended to limit the scope of the present application.

[0097] The above has described in detail several embodiments of the present disclosure. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the appended claims.

Claims

1. An LED driving circuit, characterized in that: It includes a voltage control module and a drive module; The voltage control module is configured to generate a stable first driving voltage when the PWM signal is at a low level; and to adjust the first driving voltage according to the driving current sampling signal to output a stable second driving voltage when the PWM signal is at a high level; The driving module is configured to receive the first driving voltage, generate a driving current according to the first driving voltage, and adjust the driving current according to the second driving voltage to provide a stable driving current to the LED load when the PWM signal flips from a low level to a high level.

2. The LED driving circuit according to claim 1, characterized in that: The voltage control module has a first negative feedback loop and a second negative feedback loop and a driving voltage generating node for providing a driving voltage to the driving module, and the driving module is connected to the second negative feedback loop to provide the driving current sampling signal when the second negative feedback loop is turned on; When the PWM signal is at a low level under PWM dimming, the driving voltage generating node is disconnected from the driving module, the second negative feedback loop is closed, and the first negative feedback loop is opened, so that the first driving voltage is generated on the driving voltage generating node by using the first negative feedback loop; When the PWM signal flips from a low level to a high level under the PWM dimming, the driving voltage generating node is connected to the driving module to provide the first driving voltage to the driving module, the first negative feedback loop is closed, and the second negative feedback loop is opened, so that the driving voltage on the driving voltage generating node is regulated by the second negative feedback loop to generate the second driving voltage.

3. The LED driving circuit according to claim 2, characterized in that: Under DC dimming, the driving voltage generating node is connected to the driving module to provide the first driving voltage to the driving module, the first negative feedback loop remains closed, and the second negative feedback loop remains open.

4. The LED driving circuit according to claim 1 or 2, characterized in that: The voltage control module includes an error amplifier, a first pull-up resistor, a first power tube, a feedback resistor and a control unit; The non-inverting input terminal of the error amplifier receives a reference voltage, the inverting input terminal of the error amplifier is connected to the first terminal of the control unit, the second terminal of the control unit is connected to the first terminal of the first power tube and the first terminal of the feedback resistor, the output terminal of the error amplifier is connected to the control terminal of the first power tube, the second terminal of the first power tube is connected to the power supply voltage through the first pull-up resistor, and the second terminal of the feedback resistor is grounded; The third end of the control unit is connected to the sampling end of the driving module, the fourth end of the control unit is connected to the output end of the error amplifier and the control end of the first power tube, the fifth end of the control unit is connected to the control end of the driving module, and the control end of the control unit is connected to the PWM signal; The error amplifier is configured to receive a feedback voltage when the PWM signal is at a low level, and output a stable first driving voltage according to the feedback voltage and the reference voltage; The control unit is configured to connect the feedback resistor to the inverting input terminal of the error amplifier when the PWM signal is at a low level; and connect the sampling terminal of the driving module to the inverting input terminal of the error amplifier and the control terminal of the driving module to the output terminal of the error amplifier when the PWM signal is at a high level.

5. The LED driving circuit according to claim 4, characterized in that: The driving module includes a second power tube and a sampling resistor; The third end of the control unit is connected to the first end of the second power tube and the first end of the sampling resistor, the fifth end of the control unit is connected to the control end of the second power tube, the second end of the second power tube is connected to the negative power supply end of the LED load, and the second end of the sampling resistor is grounded; The error amplifier is further configured to receive the driving current sampling signal when the PWM signal is at a high level, and output the second stable driving voltage according to the driving current sampling signal and the reference voltage.

6. The LED driving circuit according to claim 5, characterized in that: The ratio of the width to length ratio of the first power tube to the width to length ratio of the second power tube is 1:M, the ratio of the resistance value of the feedback resistor to the resistance value of the sampling resistor is M:1, and M is an integer greater than 1.

7. The LED driving circuit according to claim 5, characterized in that: The error amplifier includes an operational amplifier, a second pull-up resistor, an amplifying transistor and a current source; The non-inverting input terminal of the operational amplifier receives the reference voltage, the inverting input terminal of the operational amplifier is connected to the first end of the first power tube, the first end of the second power tube, the first end of the sampling resistor and the first end of the feedback resistor, the output terminal of the operational amplifier is connected to the control end of the amplifying transistor, the first end of the amplifying transistor is grounded through the current source, and the second end of the amplifying transistor is connected to the power supply voltage through the second pull-up resistor; the first end of the amplifying transistor is connected to the control end of the first power and the control end of the second power tube.

8. The LED driving circuit according to claim 5, characterized in that: The control unit includes a first switch tube, a second switch tube and a third switch tube; The first end of the first switch tube is connected to the first end of the first power tube and the first end of the feedback resistor, the first end of the second switch tube is connected to the first end of the second power tube and the first end of the sampling resistor, the second end of the first switch tube and the second end of the second switch tube are connected to the inverting input end of the error amplifier, the first end of the third switch tube is connected to the control end of the second power tube, and the second end of the third switch tube is connected to the output end of the error amplifier and the control end of the first power tube.

9. The LED driving circuit according to claim 5, characterized in that: The LED driving circuit further includes a pull-down module, the control end of the second power tube is grounded through the pull-down module, and the control end of the pull-down module is connected to the PWM signal; The pull-down module is configured to pull the control end of the second power tube to the ground when the PWM signal is at a low level.

10. An LED driver chip, characterized in that: The LED driving circuit comprises the LED driving circuit according to any one of claims 1 to 9.

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