Back contact solar cell, manufacturing method thereof and photovoltaic module
By using a barrier layer during the back contact solar cell manufacturing process, the damage to the film layer is avoided by cleaning, and the problem of the destruction of the passivation of the doped semiconductor layer and the tunneling layer is solved, and the efficiency and double-sided rate of the solar cell are improved.
Patent Information
- Application Number
- CN202510319642.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-18
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2045-03-18
AI Technical Summary
During the manufacturing of back contact solar cells, the passivation of the doped semiconductor layer and the tunneling layer is destroyed, resulting in a decrease in solar cell efficiency and double-sided ratio.
By using a barrier layer during the manufacturing process, damage to the film layer is avoided by alkaline washing and hydrofluoric acid washing, and an appropriate amount of holes is formed to ensure the passivation of the film layer.
It effectively improves the efficiency and double-sided rate of solar cells, and ensures the passivation of the tunneling layer and the doped semiconductor layer.
Smart Images

Figure CN120129307A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of the manufacture of solar cells, and in particular, to a back-contact solar cell, a manufacturing method thereof, and a photovoltaic module. Background Art
[0002] A back-contact solar cell (BC cell) refers to a back-junction back-contact solar cell structure in which positive and negative metal electrodes are arranged in an interdigitated manner on the backlight side of the cell. The BC cell is based on single-crystalline silicon, and the PN junction and metal electrodes are both located on the back of the cell. There is no metal electrode shading on the front, so a higher short-circuit current and conversion efficiency can be obtained. Summary of the Invention
[0003] Based on this, in view of the problem that the passivation effect of the doped semiconductor layer and the tunneling layer is damaged during the manufacturing process of the back-contact solar cell in the related art, it is necessary to provide a back-contact solar cell, a manufacturing method thereof, and a photovoltaic module.
[0004] In a first aspect, the present application provides a back-contact solar cell, comprising:
[0005] a substrate having a front surface and a back surface disposed opposite to each other, and the back surface is provided with alternately arranged first doping regions and second doping regions;
[0006] a first doping functional layer located on the corresponding first doping region, the first doping functional layer includes a first sub-doped semiconductor layer and at least one blocking layer stacked in sequence along a direction away from the substrate, and the first sub-doped semiconductor layer has a first doping element therein;
[0007] a second doped semiconductor layer located on the corresponding second doping region, and the second doped semiconductor layer has a second doping element with a conductivity type different from that of the first doping element;
[0008] a transparent conductive layer including a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portions are disposed on a side of the first doping functional layer away from the substrate, and the second conductive portions are disposed on a side of the second doped semiconductor layer away from the substrate;
[0009] a first electrode located in the first doping region and disposed on a side of the first conductive portion away from the substrate;
[0010] a second electrode located in the second doping region and disposed on a side of the second conductive portion away from the substrate;
[0011] wherein, a plurality of first holes are provided in the at least one blocking layer, and a part of the first conductive portion is located in the first holes and is electrically connected to the first sub-doped semiconductor layer.
[0012] In some embodiments, the first doped functional layer further includes a second sub-doped semiconductor layer disposed on a side of the at least one barrier layer away from the substrate;
[0013] A plurality of second holes are provided in the second sub-doped semiconductor layer; the first holes are in one-to-one communication with the second holes;
[0014] A part of the first conductive portion is located in the first hole and the corresponding second hole respectively, and is electrically connected to the first sub-doped semiconductor layer.
[0015] In some embodiments, the thickness of the first sub-doped semiconductor layer is 30 nanometers to 150 nanometers; and / or,
[0016] The thickness of the at least one barrier layer is 0.5 nanometers to 3 nanometers; and / or,
[0017] The thickness of the second sub-doped semiconductor layer is 10 nanometers to 60 nanometers.
[0018] In some embodiments, the concentration of the first doping element in the first sub-doped semiconductor layer is 3×10 19 atom / cm 3 -5×10 20 atom / cm 3 ; and / or
[0019] The concentration of the first doping element in the second sub-doped semiconductor layer is 4×10 19 atom / cm 3 -5×10 20 atom / cm 3 .
[0020] In some embodiments, the material of the barrier layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.
[0021] In some embodiments, it further includes:
[0022] A tunneling layer, located between the substrate and the first doped functional layer;
[0023] An intrinsic microcrystalline silicon layer, located between the substrate and the second doped semiconductor layer.
[0024] In some embodiments, the thickness of the first doped functional layer is greater than the thickness of the second doped semiconductor layer; and / or,
[0025] The thickness of the tunneling layer is 0.5 nanometers to 1.5 nanometers; and / or,
[0026] The thickness of the intrinsic microcrystalline silicon layer is 4 nanometers to 14 nanometers.
[0027] In some embodiments, the first doping element is an N-type doping element, and the second doping element is a P-type doping element.
[0028] In some embodiments, a spacer region is further provided on the back surface between the first doping region and the second doping region;
[0029] The first doping functional layer and the adjacent second doping semiconductor layer are spaced apart in the spacer region, and the first conductive portion and the adjacent second conductive portion are spaced apart in the spacer region.
[0030] In a second aspect, based on the same inventive concept, the present application further provides a manufacturing method of a back-contact solar cell, including:
[0031] Providing a substrate having a front surface and a back surface disposed opposite to each other, and the back surface is provided with alternately arranged first doping regions and second doping regions;
[0032] Forming a first doping functional layer in the first doping region, the first doping functional layer includes a first sub-doping semiconductor layer and at least one barrier layer stacked in sequence along a direction away from the substrate, and the first sub-doping semiconductor layer contains a first doping element;
[0033] Forming a second doping semiconductor layer in the second doping region, and the second doping semiconductor layer contains a second doping element having a different conductivity type from that of the first doping element;
[0034] Forming a transparent conductive layer on a side of the first doping functional layer and the second doping semiconductor layer away from the substrate, the transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portions are disposed on a side of the first doping functional layer away from the substrate, and the second conductive portions are disposed on a side of the second doping semiconductor layer away from the substrate;
[0035] Forming a first electrode on a side of the first conductive portion away from the substrate;
[0036] Forming a second electrode on a side of the second conductive portion away from the substrate;
[0037] Wherein, a plurality of first holes are provided in the at least one barrier layer, and a part of the first conductive portion is located in the first holes and is electrically connected to the first sub-doping semiconductor layer.
[0038] In some embodiments, before the step of forming the second doping semiconductor layer in the second doping region, it further includes:
[0039] Clean the first doped functional layer with an alkaline solution first and then with an acidic solution to form a plurality of first holes penetrating through the at least one barrier layer.
[0040] In some embodiments, the step of forming the first doped functional layer in the first doped region includes:
[0041] Form a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer in sequence on the back surface of the substrate;
[0042] Remove the portions of the first initial sub-doped semiconductor layer, the at least one initial barrier layer, and the second initial sub-doped semiconductor layer corresponding to the second doped region to form the first doped functional layer.
[0043] In a third aspect, based on the same inventive concept, the present application further provides a photovoltaic module, including:
[0044] A battery string formed by connecting a plurality of the back-contact solar cells described in any one of the above or the back-contact solar cells manufactured by the manufacturing method described in any one of the above;
[0045] A connecting component for electrically connecting two adjacent back-contact solar cells;
[0046] An encapsulation adhesive film for covering the surface of the battery string;
[0047] A cover plate for covering the surface of the encapsulation adhesive film facing away from the battery string.
[0048] In the embodiments of the present application, the first doped functional layer includes a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked in a direction away from the substrate. The barrier layer can prevent damage caused by alkaline cleaning and hydrofluoric acid cleaning. 1) In the first aspect, before forming the film layer on the second doped region, it is necessary to perform alkaline cleaning (cleaning with an alkaline solution) on the film layer on the already formed first doped region. The barrier layer can prevent excessive voids from forming in the film layer on the first doped region during alkaline cleaning, and only a certain number of first holes are formed. The first holes mainly extend in the thickness direction (the second direction) perpendicular to the substrate, avoiding the formation of large-area voids in the plane parallel to the substrate plane, thereby ensuring the passivation effect of the tunneling layer and the first sub-doped semiconductor layer, and improving the efficiency and bifaciality of the solar cell; 2) In the second aspect, before forming the film layer on the second doped region, it is necessary to perform hydrofluoric acid cleaning on the film layer on the already formed first doped region. The barrier layer reduces the depth of the voids extending in the thickness direction (the second direction) perpendicular to the substrate, that is, it prevents the tunneling layer from being etched away by hydrofluoric acid cleaning, improving the passivation effect of the tunneling layer, and improving the efficiency and bifaciality of the solar cell. 3) In the third aspect, the depth of the first holes extending in the thickness direction (the second direction) perpendicular to the substrate can be controlled by controlling the thickness of the barrier layer, that is, preventing the first holes from damaging the tunneling layer, improving the passivation effect of the tunneling layer, and improving the efficiency and bifaciality of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present application or exemplary embodiments, the following will briefly introduce the drawings required for describing the embodiments or exemplary embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0050] Figure 1 FIG. 1 is a schematic cross-sectional structure diagram of a first type of back-contact solar cell provided by an embodiment of the present application.
[0051] Figure 2 FIG. 2 is a schematic cross-sectional structure diagram of a second type of back-contact solar cell provided by an embodiment of the present application.
[0052] Figure 3 FIG. 3 is a schematic cross-sectional structure diagram of a third type of back-contact solar cell provided by an embodiment of the present application.
[0053] Figure 4 FIG. 4 is a schematic flowchart of a first type of manufacturing method of a back-contact solar cell provided by an embodiment of the present application.
[0054] Figure 5Schematic diagram of the second process step of a manufacturing method of a back-contact solar cell provided by an embodiment of the present application.
[0055] Reference numerals:
[0056] Back-contact solar cell 100; substrate 11; first doped functional layer 31; second doped semiconductor layer 32; transparent conductive layer 40; first electrode 51; second electrode 52; front surface 111; back surface 112; first sub-doped semiconductor layer 311; blocking layer 312; second sub-doped semiconductor layer 313; first conductive portion 41; second conductive portion 42; tunneling layer 21; intrinsic microcrystalline silicon layer 22; passivation layer 12; antireflection layer 13;
[0057] First doped region 112a; second doped region 112b; spacer region 112c; first hole 31k1; first direction X; second direction Y; second hole 31k2. Detailed implementation manners
[0058] To make the above objects, features, and advantages of the present application more obvious and understandable, the following describes the detailed implementation manners of the present application with reference to the accompanying drawings. Many specific details are set forth in the following description to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.
[0059] In the description of the present application, it should be understood that if there are terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., the orientation or positional relationship indicated by these terms is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.
[0060] In addition, if there are terms such as "first" and "second", these terms are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present application, if there is a term "plurality", the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.
[0061] In this application, unless otherwise clearly specified or limited, if terms such as "installed", "connected", "linked", "fixed", etc. appear, these terms shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0062] In this application, unless otherwise clearly specified or limited, if there is a description such as a first feature being "on" or "under" a second feature, its meaning can be that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature can be that the first feature is directly above or obliquely above the second feature, or simply means that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature can be that the first feature is directly below or obliquely below the second feature, or simply means that the first feature has a lower horizontal height than the second feature.
[0063] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or there can also be an intermediate element. If an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. If so, the terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used in this application are only for the purpose of illustration and do not represent the only implementation.
[0064] Refer to Figures 1 to 3 。 Figure 1 FIG. Figure 2 is a schematic cross-sectional structure diagram of a first type of back-contact solar cell provided by an embodiment of the present application. Figure 3 FIG.
[0065] In a first aspect, the present application provides a back-contact solar cell 100, which includes a substrate 11, a first doped functional layer 31, a second doped semiconductor layer 32, a transparent conductive layer 40, a first electrode 51, and a second electrode 52. The substrate 11 has a front surface 111 and a back surface 112 that are opposite to each other, and the back surface 112 is provided with alternately arranged first doped regions 112a and second doped regions 112b; the first doped functional layer 31 is located on the corresponding first doped region 112a, and the first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one blocking layer 312 that are sequentially stacked in a direction away from the substrate 11, and the first sub-doped semiconductor layer 311 has a first doping element; the second doped semiconductor layer 32 is located on the corresponding second doped region 112b, and the second doped semiconductor layer 32 has a second doping element with a conductivity type different from that of the first doping element; the transparent conductive layer 40 includes a plurality of first conductive portions 41 and a plurality of second conductive portions 42, the first conductive portions 41 are provided on a side of the first doped functional layer 31 away from the substrate 11, and the second conductive portions 42 are provided on a side of the second doped semiconductor layer 32 away from the substrate 11; the first electrode 51 is located in the first doped region 112a and is provided on a side of the first conductive portion 41 away from the substrate 11; the second electrode 52 is located in the second doped region 112b and is provided on a side of the second conductive portion 42 away from the substrate 11; wherein, a plurality of first holes 31k1 are provided on at least one blocking layer 312, and a part of the first conductive portion 41 is located in the first holes 31k1 and is electrically connected to the first sub-doped semiconductor layer 311.
[0066] Exemplarily, the substrate 11 may have a doping element, and the type of the doping element is N-type or P-type. The N-type element may be a Group V element such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As), and the P-type element may be a Group III element such as boron (B), aluminum (Al), gallium (Ga), or indium (In). For example, when the substrate 11 is a P-type substrate, the type of the doping element inside it is P-type. Again, for example, when the substrate 11 is an N-type substrate, the type of the doping element inside it is N-type.
[0067] Exemplarily, the substrate 11 has a front surface 111 and a back surface 112 that are opposite to each other. The front surface 111 and the back surface 112 are opposite to each other along the thickness direction of the substrate 11. Both the front surface 111 and the back surface 112 can be used to receive incident light. In the embodiments of the present application, the front surface 111 of the substrate 11 is the main light-receiving surface, and the back surface 112 of the substrate 11 is the secondary light-receiving surface. It can be understood that the light-receiving surface and the light-back surface are relative. The light-receiving surface is specifically the surface on the substrate 11 where sunlight is mainly irradiated in the back-contact solar cell or in the photovoltaic module. With the development of solar cell technology, the light-back surface will also receive the energy of sunlight, mainly from the reflected light or scattered light in the surrounding environment.
[0068] Exemplarily, the back surface 112 includes first doped regions 112a and second doped regions 112b arranged alternately, and both the first doped regions 112a and the second doped regions 112b may include a first sub-region and a second sub-region. The first sub-region may be a region corresponding to the setting of the first electrode 51 or the second electrode 52, and the first sub-region may be understood as a metal contact region. The second sub-region may be a region other than the first sub-region, and the second sub-region may be understood as a non-metal contact region.
[0069] Exemplarily, in some embodiments, as Figure 1 shown, the first direction X is parallel to the plane of the substrate 11, and the first doped regions 112a and the second doped regions 112b are arranged alternately at least in the first direction X.
[0070] Exemplarily, in some embodiments, as Figure 1 shown, in the first direction X, the width of the metal contact region is greater than the width of the corresponding first electrode 51, and / or the width of the metal contact region is greater than the width of the corresponding second electrode 52, but is not limited thereto. For example, due to manufacturing process errors, it can be set that the width of the metal contact region is greater than the width of the corresponding first electrode 51, and the width of the metal contact region is greater than the width of the corresponding second electrode 52, which can ensure that the first electrode 51 is located within the corresponding metal contact region, and can ensure that the second electrode 52 is located within the corresponding metal contact region.
[0071] Exemplarily, in Figure 1 , on the back surface 112, on the first doped region 112a, the first sub-doped semiconductor layer 311, at least one barrier layer 312, the first conductive part 41, and the first electrode 51 are sequentially stacked.
[0072] Exemplarily, in Figure 1 , on the back surface 112, on the second doped region 112b, the second doped semiconductor layer 32, the second conductive part 42, and the second electrode 52 are sequentially stacked.
[0073] Exemplarily, the first sub-doped semiconductor layer 311 has a first doping element, the second doped semiconductor layer 32 has a second doping element with a conductive type different from that of the first doping element, and one of the first doping element and the second doping element is an N-type doping element, and the other is a P-type doping element. This application takes the first doping element as an N-type doping element and the second doping element as a P-type doping element as an example for illustration.
[0074] Exemplarily, a plurality of first holes 31k1 are provided in at least one blocking layer 312, and a part of the first conductive portion 41 is located in the first holes 31k1 and is electrically connected to the first sub-doped semiconductor layer 311. That is, although at least one blocking layer 312 is provided, a plurality of first holes 31k1 are provided in the blocking layer 312, and the first conductive portion 41 can be electrically connected to the first sub-doped semiconductor layer 311 through the first holes 31k1.
[0075] Exemplarily, the material of the transparent conductive layer 40 includes at least one of indium tin oxide, indium tungsten oxide, aluminum zinc oxide, titanium-doped indium oxide, and tin oxide doped with fluorine.
[0076] Exemplarily, in the prior art, the bifaciality and light utilization rate of back-contact solar cells still need to be improved. In the manufacturing process of solar cells, there is a problem that the passivation effect of the doped semiconductor layer and the tunneling layer is damaged. The inventors found that the reasons include: 1) It is necessary to first prepare the film layer of one of the first doping region 112a and the second doping region 112b, and then prepare the film layer of the other of the first doping region 112a and the second doping region 112b. For example, it is necessary to first prepare the film layer of the first doping region 112a and then prepare the film layer of the second doping region 112b. For example, it is necessary to first prepare the film layer of the first sub-doped semiconductor layer 311 and then prepare the film layer of the second doped semiconductor layer 32. Before preparing the film layer of the second doping region 112b, it is necessary to perform alkali washing (cleaning with an alkaline solution) on the already prepared film layer of the first doping region 112a. Alkali washing easily causes a large number of voids to form in the film layer of the first doping region 112a. For example, a large number of voids are formed in the tunneling layer 21 and the first sub-doped semiconductor layer 311. The large number of voids reduces the passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311, resulting in a decrease in the efficiency and bifaciality of the solar cell; 2) Before preparing the film layer of the second doping region 112b, it is necessary to perform hydrofluoric acid cleaning on the already prepared film layer of the first doping region 112a. Hydrofluoric acid cleaning easily etches away part of the tunneling layer 21, reducing the passivation effect of the tunneling layer 21, resulting in a decrease in the efficiency and bifaciality of the solar cell.
[0077] In an embodiment of the present application, the first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 that are sequentially stacked in a direction away from the substrate 11. The barrier layer 312 can prevent damage caused by alkaline cleaning and hydrofluoric acid cleaning. 1) In a first aspect, before forming a film layer on the second doped region 112b, it is necessary to perform alkaline cleaning (cleaning with an alkaline solution) on the film layer on the already formed first doped region 112a. The barrier layer 312 can prevent the film layer on the first doped region 112a from forming an excessive number of voids during alkaline cleaning, and only a certain number of first holes 31k1 are formed. The first holes 31k1 mainly extend in the thickness direction (the second direction Y) perpendicular to the substrate 11, avoiding the formation of large-area voids in the plane parallel to the substrate 11, thereby ensuring the passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311, and improving the efficiency and bifaciality of the solar cell; 2) In a second aspect, before forming a film layer on the second doped region 112b, it is necessary to perform hydrofluoric acid cleaning on the film layer on the already formed first doped region 112a. The barrier layer 312 reduces the depth of the voids extending in the thickness direction (the second direction Y) perpendicular to the substrate 11, that is, it prevents the tunneling layer 21 from being etched by hydrofluoric acid cleaning, improves the passivation effect of the tunneling layer 21, and improves the efficiency and bifaciality of the solar cell. 3) In a third aspect, the depth of the first holes 31k1 extending in the thickness direction (the second direction Y) perpendicular to the substrate 11 can be controlled by controlling the thickness of the barrier layer 312, that is, it prevents the first holes 31k1 from damaging the tunneling layer 21, improves the passivation effect of the tunneling layer 21, and improves the efficiency and bifaciality of the solar cell.
[0078] In some embodiments, as Figure 2 shown, the first doped functional layer 31 further includes a second sub-doped semiconductor layer 313 provided on the side of at least one barrier layer 312 away from the substrate 11; a plurality of second holes 31k2 are provided on the second sub-doped semiconductor layer 313; the first holes 31k1 are in one-to-one correspondence with the second holes 31k2 and are connected; a part of the first conductive portion 41 is respectively located in the first holes 31k1 and the corresponding second holes 31k2 and is electrically connected to the first sub-doped semiconductor layer 311.
[0079] Exemplarily, as Figure 2 shown, on the back surface 112, on the first doped region 112a, the first sub-doped semiconductor layer 311, at least one barrier layer 312, the second sub-doped semiconductor layer 313, the first conductive portion 41, and the first electrode 51 are sequentially stacked.
[0080] Exemplarily, as Figure 2As shown, the type of doping element in the second sub-doped semiconductor layer 313 is the same as that in the first sub-doped semiconductor layer 311; for example, the first doping element is doped in both the second sub-doped semiconductor layer 313 and the first sub-doped semiconductor layer 311; for example, the materials in the second sub-doped semiconductor layer 313 and the first sub-doped semiconductor layer 311 are the same, that is, the matrix materials and the doping elements are both the same.
[0081] Exemplarily, as Figure 2 shown, the first holes 31k1 are in one-to-one communication with the second holes 31k2, and the first conductive part 41 is electrically connected to the first sub-doped semiconductor layer 311 through the mutually communicating first holes 31k1 and second holes 31k2.
[0082] Exemplarily, as Figure 2 shown, due to the arrangement of the second sub-doped semiconductor layer 313, the second sub-doped semiconductor layer 313 can be well electrically connected to the first conductive part 41, and the second sub-doped semiconductor layer 313 can also play a role in blocking the extension of the voids, that is, the arrangement of the second sub-doped semiconductor layer 313 improves the electrical connection performance of the film layer in the first doping region 112a, and can also play a role in blocking the extension of the voids, enhancing the passivation effect of the first doping functional layer 31 and the tunneling layer 21, and enhancing the efficiency and bifaciality of the solar cell.
[0083] In some embodiments, the thickness of the first sub-doped semiconductor layer 311 is 30 nanometers to 150 nanometers; and / or, the thickness of at least one barrier layer 312 is 0.5 nanometers to 3 nanometers; and / or, the thickness of the second sub-doped semiconductor layer 313 is 10 nanometers to 60 nanometers.
[0084] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the first sub-doped semiconductor layer 311 can be any value among 30 nanometers, 50 nanometers, 70 nanometers, 90 nanometers, 100 nanometers, 120 nanometers, 140 nanometers, and 150 nanometers.
[0085] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the barrier layer 312 can be any value among 0.5 nanometers, 1 nanometers, 1.5 nanometers, 2 nanometers, 2.5 nanometers, and 3 nanometers.
[0086] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the second sub-doped semiconductor layer 313 can be any value among 10 nanometers, 20 nanometers, 30 nanometers, 40 nanometers, 50 nanometers, and 60 nanometers.
[0087] Exemplarily, the thickness of at least one barrier layer 312 is set to be relatively thin to avoid the inability to form the first hole 31k1 and / or the second hole 31k2.
[0088] Exemplarily, in some embodiments, a thicker first sub-doped semiconductor layer 311 is set relative to the second sub-doped semiconductor layer 313, which can enhance the passivation effect of the first sub-doped semiconductor layer 311.
[0089] In some embodiments, the concentration of the first doping element in the first sub-doped semiconductor layer 311 is 3×10 19 atom / cm 3 -5×10 20 atom / cm 3 ; and / or the concentration of the first doping element in the second sub-doped semiconductor layer 313 is 4×10 19 atom / cm 3 -5×10 20 atom / cm 3 .
[0090] Exemplarily, in some embodiments, the doping concentrations in the first sub-doped semiconductor layer 311 and the second sub-doped semiconductor layer 313 can be similar, and the thickness of at least one barrier layer 312 is set to be relatively thin, such that the first doping functional layer 31 is an integral semiconductor structure.
[0091] In some embodiments, the material of the barrier layer 312 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.
[0092] Exemplarily, the material of the barrier layer 312 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride, which can well block the etching of alkaline solutions and acidic solutions.
[0093] In some embodiments, as Figures 1 to 3 shown, the back-contact solar cell 100 further includes a tunneling layer 21 and an intrinsic microcrystalline silicon layer 22. The tunneling layer 21 is located between the substrate 11 and the first doping functional layer 31; the intrinsic microcrystalline silicon layer 22 is located between the substrate 11 and the second doped semiconductor layer 32.
[0094] Exemplarily, as Figure 2 shown, on the back surface 112, on the first doping region 112a, the tunneling layer 21, the first sub-doped semiconductor layer 311, at least one barrier layer 312, the second sub-doped semiconductor layer 313, the first conductive portion 41, and the first electrode 51 are sequentially stacked.
[0095] Exemplarily, in Figure 2In the [description], on the back surface 112, on the second doped region 112b, an intrinsic microcrystalline silicon layer 22, a second doped semiconductor layer 32, a second conductive portion 42, and a second electrode 52 are sequentially stacked.
[0096] Exemplarily, the material of the first tunneling layer 21 may include silicon oxide, but is not limited thereto.
[0097] Exemplarily, as Figures 1 to 3 shown, the back-contact solar cell 100 of the present application is a heterostructure. An intrinsic microcrystalline silicon layer 22 and a second doped semiconductor layer 32 are sequentially provided in the second doped region 112b, and the second doped semiconductor layer 32 may be a P-type amorphous silicon.
[0098] In some embodiments, the thickness of the first doped functional layer 31 is greater than the thickness of the second doped semiconductor layer 32; and / or, the thickness of the tunneling layer 21 is 0.5 nanometers to 1.5 nanometers; and / or, the thickness of the intrinsic microcrystalline silicon layer 22 is 4 nanometers to 14 nanometers.
[0099] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the first doped functional layer 31 is greater than the thickness of the second doped semiconductor layer 32.
[0100] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the tunneling layer 21 may be any value among 0.5 nanometers, 0.8 nanometers, 1 nanometer, 1.2 nanometers, and 1.5 nanometers.
[0101] Exemplarily, in the direction perpendicular to the plane where the substrate 11 is located, that is, in the second direction Y, the thickness of the intrinsic microcrystalline silicon layer 22 may be any value among 4 nanometers, 6 nanometers, 8 nanometers, 10 nanometers, 12 nanometers, and 14 nanometers.
[0102] In some embodiments, the first doping element is an N-type doping element, and the second doping element is a P-type doping element.
[0103] Exemplarily, in some embodiments, both the first sub-doped semiconductor layer 311 and the second sub-doped semiconductor layer 313 are N-type doped polysilicon. The second doped semiconductor layer 32 is P-type doped amorphous silicon.
[0104] In some embodiments, as Figure 3 shown, the back surface 112 is further provided with a spacer region 112c located between the first doped region 112a and the second doped region 112b; the first doped functional layer 31 and the adjacent second doped semiconductor layer 32 are spaced apart in the spacer region 112c, and the first conductive portion 41 and the adjacent second conductive portion 42 are spaced apart in the spacer region 112c.
[0105] Exemplarily, the spacer 112c is used to space at least a part of the film layer of the first doped region 112a from at least a part of the film layer of the second doped region 112b, avoiding short circuits and improving the battery conversion efficiency.
[0106] It should be noted that, as Figures 1 to 3 shown, the back contact solar cell 100 further includes a passivation layer 12 and an antireflection layer 13 that are sequentially stacked on the front surface 111. The material of the passivation layer 12 can be at least one of AlOx (aluminum oxide), SiOx (silicon oxide), a-Si:H(i) (amorphous silicon), etc.; the material of the antireflection layer 13 can be at least one of SiNxOy (silicon oxynitride), SiNx (silicon nitride).
[0107] Please refer to Figure 4 and Figure 5 . Figure 4 FIG. 14 is a schematic diagram of the first process step of a manufacturing method of a back contact solar cell provided by an embodiment of the present application. Figure 5 FIG. 15 is a schematic diagram of the second process step of a manufacturing method of a back contact solar cell provided by an embodiment of the present application.
[0108] Second, based on the same inventive concept, the present application further provides a manufacturing method of a back contact solar cell, and any one of the above-mentioned back contact solar cells 100 can be manufactured by using this manufacturing method of the back contact solar cell. As Figure 4 shown, the manufacturing method of the back contact solar cell includes: step S100, step S200, step S300, step S400, step S500, step S600.
[0109] Step S100: Provide a substrate, the substrate having a front surface and a back surface disposed opposite to each other, and the back surface being provided with alternately arranged first doped regions and second doped regions.
[0110] Exemplarily, provide a substrate 11, the substrate 11 having a front surface 111 and a back surface 112 disposed opposite to each other, and the back surface 112 being provided with alternately arranged first doped regions 112a and second doped regions 112b.
[0111] Step S200: Form a first doped functional layer in the first doped region, the first doped functional layer including a first sub-doped semiconductor layer and at least one barrier layer that are sequentially stacked in a direction away from the substrate, and the first sub-doped semiconductor layer having a first doping element therein.
[0112] Exemplarily, form a first doped functional layer 31 in the first doped region 112a, the first doped functional layer 31 including a first sub-doped semiconductor layer 311 and at least one barrier layer 312 that are sequentially stacked in a direction away from the substrate 11, and the first sub-doped semiconductor layer 311 having a first doping element therein.
[0113] Step S300, form a second doped semiconductor layer in the second doped region, and the second doped semiconductor layer has a second doping element with a conductivity type different from that of the first doping element.
[0114] Exemplarily, form a second doped semiconductor layer 32 in the second doped region 112b, and the second doped semiconductor layer 32 has a second doping element with a conductivity type different from that of the first doping element.
[0115] Step S400, form a transparent conductive layer on a side of the first doped functional layer and the second doped semiconductor layer facing away from the substrate. The transparent conductive layer includes a plurality of first conductive portions and a plurality of second conductive portions. The first conductive portions are disposed on a side of the first doped functional layer away from the substrate, and the second conductive portions are disposed on a side of the second doped semiconductor layer away from the substrate.
[0116] Exemplarily, form a transparent conductive layer 40 on a side of the first doped functional layer 31 and the second doped semiconductor layer 32 facing away from the substrate 11. The transparent conductive layer 40 includes a plurality of first conductive portions 41 and a plurality of second conductive portions 42. The first conductive portions 41 are disposed on a side of the first doped functional layer 31 away from the substrate 11, and the second conductive portions 42 are disposed on a side of the second doped semiconductor layer 32 away from the substrate 11.
[0117] Step S500, form a first electrode on a side of the first conductive portion away from the substrate.
[0118] Exemplarily, form a first electrode 51 on a side of the first conductive portion 41 away from the substrate 11.
[0119] Step S600, form a second electrode on a side of the second conductive portion away from the substrate.
[0120] Wherein, a plurality of first holes are provided in the at least one blocking layer, and a part of the first conductive portion is located in the first holes and is electrically connected to the first sub-doped semiconductor layer.
[0121] Exemplarily, form a second electrode 52 on a side of the second conductive portion 42 away from the substrate 11.
[0122] Wherein, a plurality of first holes 31k1 are provided in at least one blocking layer 312, and a part of the first conductive portion 41 is located in the first holes 31k1 and is electrically connected to the first sub-doped semiconductor layer 311.
[0123] In some embodiments, such as Figure 5As shown, before the step of forming the second doped semiconductor layer 32 (step S300) in the second doped region 112b, the following steps are further included: step S230, first cleaning the first doped functional layer 31 with an alkaline solution and then with an acidic solution to form a plurality of first holes 31k1 penetrating at least one barrier layer 312.
[0124] Exemplarily, as Figure 5 shown, in combination with Figure 2 and Figure 3 shown, before the step of forming the second doped semiconductor layer 32 (step S300) in the second doped region 112b, the following steps are further included: step S230, first cleaning the first doped functional layer 31 with an alkaline solution and then with an acidic solution to form a plurality of first holes 31k1 and a plurality of second holes 31k2.
[0125] Exemplarily, the first doped functional layer 31 includes a first sub-doped semiconductor layer 311 and at least one barrier layer 312 stacked in sequence along the direction away from the substrate 11, and the barrier layer 312 can prevent damage caused by alkaline cleaning and hydrofluoric acid cleaning. 1) In the first aspect, before preparing the film layer on the second doped region 112b, it is necessary to perform alkaline cleaning (cleaning with an alkaline solution) on the film layer on the already prepared first doped region 112a. The barrier layer 312 can prevent the film layer on the first doped region 112a from forming an excessive number of voids during alkaline cleaning, and only form a certain number of first holes 31k1. The first holes 31k1 mainly extend in the thickness direction (second direction Y) perpendicular to the substrate 11, avoiding the formation of large-area voids in the plane parallel to the substrate 11, thereby ensuring the passivation effect of the tunneling layer 21 and the first sub-doped semiconductor layer 311, and improving the efficiency and bifaciality of the solar cell; 2) In the second aspect, before preparing the film layer on the second doped region 112b, it is necessary to perform hydrofluoric acid cleaning on the film layer on the already prepared first doped region 112a. The barrier layer 312 reduces the depth of the voids extending in the thickness direction (second direction Y) perpendicular to the substrate 11, that is, it avoids the tunneling layer 21 being etched away by hydrofluoric acid cleaning, improves the passivation effect of the tunneling layer 21, and improves the efficiency and bifaciality of the solar cell. 3) In the third aspect, the depth of the first holes 31k1 extending in the thickness direction (second direction Y) perpendicular to the substrate 11 can be controlled by controlling the thickness of the barrier layer 312, that is, it avoids the first holes 31k1 damaging the tunneling layer 21, improves the passivation effect of the tunneling layer 21, and improves the efficiency and bifaciality of the solar cell.
[0126] In some embodiments, the step of forming the first doped functional layer 31 in the first doped region 112a (step S200) includes: step 210 of sequentially forming a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer on the back surface 112 of the substrate 11; and step 220 of removing portions of the first initial sub-doped semiconductor layer, at least one initial barrier layer, and the second initial sub-doped semiconductor layer corresponding to the second doped region 112b to form the first doped functional layer 31.
[0127] Exemplarily, as shown in Figure 1 In some embodiments, different gas materials are sequentially introduced to sequentially form a first initial sub-doped semiconductor layer and at least one initial barrier layer on the back surface 112 of the substrate 11; then, through the same patterning process / mask, the first sub-doped semiconductor layer 311 and at least one barrier layer 312 of the first doped functional layer 31 are formed, which can simplify the manufacturing process.
[0128] Exemplarily, as shown in Figure 2 and Figure 3 In some embodiments, different gas materials are sequentially introduced to sequentially form a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer on the back surface 112 of the substrate 11; then, through the same patterning process / mask, the first sub-doped semiconductor layer 311, at least one barrier layer 312, and the second sub-doped semiconductor layer 313 of the first doped functional layer 31 are formed, which can simplify the manufacturing process.
[0129] Exemplarily, in combination with multiple steps of the manufacturing method of the back-contact solar cell described above, the specific process of a manufacturing method of the back-contact solar cell is further described in detail, including the following steps 1)-17):
[0130] 1) (step S100), providing a substrate 11 and cleaning and polishing the substrate 11;
[0131] 2) forming a preset material film layer of the first tunneling layer 21 (for example, a tunneling layer of SiOx material, i.e., the initial tunneling layer) on the back surface 112;
[0132] 3) (step S200), sequentially forming a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer on the back surface 112 of the substrate 11 and performing N-type doping;
[0133] 4) (Step S200), remove the portions of the first initial sub-doped semiconductor layer, at least one initial barrier layer, and the second initial sub-doped semiconductor layer corresponding to the second doping region 112b to form a first doped functional layer 31, that is, pattern the film layer on the back surface 112. First, a SiOx / SiNx mask can be formed and then the film layer on the back surface 112 can be patterned, and the mask pattern is removed;
[0134] 5), remove the phosphosilicate glass layer (PSG) on the front surface 111 by hydrofluoric acid on one side;
[0135] 6), perform double-sided etching and texturing;
[0136] 7), remove the phosphosilicate glass layer (PSG) on the back surface of the first doping region 112a by hydrofluoric acid and clean;
[0137] 8), form a passivation layer 12 on the front surface 111 (the material of the passivation layer 12 can be at least one of AlOx, SiOx, a-Si:H(i), etc.);
[0138] 9), form an antireflection layer 13 on the front surface 111 (the material of the antireflection layer 13 can be at least one of SiNxOy, SiNx);
[0139] 10), perform chain backside stripping to remove the materials of the passivation layer 12 and the antireflection layer 13 on the back surface 112;
[0140] 11) (Step S230), clean (for example, clean the surface of the second doping region 112b). First, alkali cleaning can be performed. The cleaning agent for alkali cleaning includes an alkaline solvent and hydrogen peroxide, and the alkaline solvent includes any one of potassium hydroxide, sodium hydroxide, or ammonia water. Then, acid cleaning can be performed. The cleaning agent for acid cleaning includes hydrofluoric acid. In this cleaning step, a first hole 31k1 and a second hole 31k2 are also formed.
[0141] 12), form a preset material film layer of the intrinsic microcrystalline silicon layer 22 on the entire back surface 112 (for example, deposit an amorphous silicon layer under a temperature condition below 250 o °C to form an initial intrinsic microcrystalline silicon layer);
[0142] 13) (Step S300), form a preset material film layer of the second doped semiconductor layer 32 on the entire back surface 112 (for example, deposit a P-type doped silicon thin film layer under a temperature condition below 250 o °C, which can be one or several superpositions of a-Si:H(p), nc-Si:H(p), nc-SiOx:H(p), etc. to form a second initial doped semiconductor layer);
[0143] 14) (Step S300), pattern the preset material film layers of the intrinsic microcrystalline silicon layer 22 and the second doped semiconductor layer 32 on the back surface 112, and only retain the intrinsic microcrystalline silicon layer 22 and the second doped semiconductor layer 32 in the second doped region 112b;
[0144] 15) (Step S400), form a preset film layer of the transparent conductive layer 40 on the entire back surface 112;
[0145] 16) (Step S400), pattern the transparent conductive layer 40 to form a plurality of first conductive portions 41 and a plurality of second conductive portions 42. For example, a plurality of first conductive portions 41 and a plurality of second conductive portions 42 can be formed by ink etching or laser patterning processes;
[0146] 17) (Steps S500 and S600), form a first electrode 51 and a second electrode 52 on the back surface and perform a photo-injection process. For example, the first electrode 51 and the second electrode 52 are formed by screen printing processes.
[0147] In a third aspect, based on the same inventive concept, the present application also provides a photovoltaic module. The photovoltaic module includes a battery string, a connecting component, an encapsulation adhesive film, and a cover plate. The battery string is formed by connecting a plurality of back-contact solar cells 100 according to any one of the above, or the battery string is formed by connecting back-contact solar cells 100 manufactured by the manufacturing method of the back-contact solar cell according to any one of the above; the connecting component is used to electrically connect two adjacent back-contact solar cells 100; the encapsulation adhesive film is used to cover the surface of the battery string; the cover plate is used to cover the surface of the encapsulation adhesive film facing away from the battery string.
[0148] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.
[0149] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the inventive concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.
Claims
1. A back contact solar cell, characterized in that: include: A substrate having a front side and a back side arranged opposite to each other, wherein the back side is provided with first doping regions and second doping regions arranged alternately; A first doped functional layer, located on the corresponding first doped region, the first doped functional layer comprising a first sub-doped semiconductor layer and at least one barrier layer sequentially stacked in a direction away from the substrate, the first sub-doped semiconductor layer having a first doping element; A second doped semiconductor layer is located on the corresponding second doped region, and the second doped semiconductor layer contains a second doping element having a conductivity type different from that of the first doping element; a transparent conductive layer, comprising a plurality of first conductive portions and a plurality of second conductive portions, wherein the first conductive portions are arranged on a side of the first doped functional layer away from the substrate, and the second conductive portions are arranged on a side of the second doped semiconductor layer away from the substrate; A first electrode, located in the first doping region and disposed on a side of the first conductive portion away from the substrate; A second electrode is located in the second doping region and is disposed on a side of the second conductive portion away from the substrate; Wherein, a plurality of first holes are disposed on the at least one blocking layer, and a portion of the first conductive portion is located in the first hole and is electrically connected to the first sub-doped semiconductor layer.
2. The back contact solar cell according to claim 1, characterized in that: The first doped functional layer further comprises a second sub-doped semiconductor layer disposed on a side of the at least one barrier layer away from the substrate; A plurality of second holes are provided on the second sub-doped semiconductor layer; the first holes are connected to the second holes one by one; A portion of the first conductive portion is respectively located in the first hole and the corresponding second hole, and is electrically connected to the first sub-doped semiconductor layer.
3. The back contact solar cell according to claim 2, characterized in that: The thickness of the first sub-doped semiconductor layer is 30 nanometers to 150 nanometers; and / or, The thickness of the at least one barrier layer is 0.5 nm to 3 nm; and / or, The thickness of the second sub-doped semiconductor layer is 10 nanometers to 60 nanometers.
4. The back contact solar cell according to claim 2, characterized in that: The concentration of the first doping element in the first sub-doped semiconductor layer is 3×10 19 atom / cm 3 -5×10 20 atom / cm 3 and / or, The concentration of the first doping element in the second sub-doped semiconductor layer is 4×10 19 atom / cm 3 -5×10 20 atom / cm 3 .
5. The back contact solar cell according to claim 1, characterized in that: The material of the barrier layer includes at least one of silicon oxide, silicon nitride and silicon oxynitride.
6. The back contact solar cell according to claim 1, characterized in that: Also includes: A tunneling layer, located between the substrate and the first doped functional layer; The intrinsic microcrystalline silicon layer is located between the substrate and the second doped semiconductor layer.
7. The back contact solar cell according to claim 6, characterized in that: The thickness of the first doped functional layer is greater than the thickness of the second doped semiconductor layer; and / or, The thickness of the tunneling layer is 0.5 nanometers to 1.5 nanometers; and / or, The thickness of the intrinsic microcrystalline silicon layer is 4 nanometers to 14 nanometers.
8. The back contact solar cell according to claim 1, characterized in that: The first doping element is an N-type doping element, and the second doping element is a P-type doping element.
9. The back contact solar cell according to claim 1, characterized in that: The back surface is also provided with a spacer region between the first doping region and the second doping region; The first doped functional layer and the adjacent second doped semiconductor layer are spaced apart in the spacer region, and the first conductive portion and the adjacent second conductive portion are spaced apart in the spacer region.
10. A method for manufacturing a back contact solar cell, characterized in that: include: Providing a substrate, wherein the substrate has a front side and a back side disposed opposite to each other, and the back side is provided with first doping regions and second doping regions arranged alternately; forming a first doped functional layer in the first doped region, the first doped functional layer comprising a first sub-doped semiconductor layer and at least one barrier layer sequentially stacked in a direction away from the substrate, the first sub-doped semiconductor layer having a first doping element; forming a second doped semiconductor layer in the second doped region, wherein the second doped semiconductor layer has a second doping element having a conductivity type different from that of the first doping element; forming a transparent conductive layer on a side of the first doped functional layer and the second doped semiconductor layer away from the substrate, the transparent conductive layer comprising a plurality of first conductive portions and a plurality of second conductive portions, the first conductive portions being arranged on a side of the first doped functional layer away from the substrate, and the second conductive portions being arranged on a side of the second doped semiconductor layer away from the substrate; forming a first electrode on a side of the first conductive portion away from the substrate; forming a second electrode on a side of the second conductive portion away from the substrate; Wherein, a plurality of first holes are disposed on the at least one blocking layer, and a portion of the first conductive portion is located in the first hole and is electrically connected to the first sub-doped semiconductor layer.
11. The method for manufacturing a back contact solar cell according to claim 10, characterized in that: Before the step of forming a second doped semiconductor layer in the second doped region, the method further includes: The first doped functional layer is cleaned with an alkaline solution and then with an acidic solution to form a plurality of first holes penetrating through at least one of the barrier layers.
12. The method for manufacturing a back contact solar cell according to claim 10, characterized in that: The step of forming a first doped functional layer in the first doped region includes: Forming a first initial sub-doped semiconductor layer, at least one initial barrier layer, and a second initial sub-doped semiconductor layer in sequence on the back side of the substrate; The first initial sub-doped semiconductor layer, the at least one initial barrier layer, and a portion of the second initial sub-doped semiconductor layer corresponding to the second doping region are removed to form the first doped functional layer.
13. A photovoltaic module, characterized in that: include: A cell string formed by connecting a plurality of back-contact solar cells according to any one of claims 1 to 9 or a back-contact solar cell manufactured by the manufacturing method according to any one of claims 10 to 12; A connecting component, used for electrically connecting two adjacent back-contact solar cells; A packaging film, used to cover the surface of the battery string; The cover plate is used to cover the surface of the packaging film facing away from the battery string.
Citation Information
Patent Citations
Back contact battery and manufacturing method thereof
CN117133812A
IBC solar cell and preparation method thereof
CN117410384A
Solar cell and photovoltaic module
US20240266460A1
Cited By
Solar cell and preparation method thereof
CN122180192A