Temperature protection circuit

Abstract

The invention relates to the technical field of electronic circuit temperature protection, in particular to a temperature protection circuit. The temperature protection circuit is composed of a current mirror module, a hysteresis control module, an over-temperature protection module and an output shaping module. The current mirror module provides stable reference current for the system, the over-temperature protection module adopts a triode Q0 with a negative temperature coefficient to directly sense temperature change and replaces a traditional NTC thermistor to eliminate installation delay and measurement deviation, and signal holding or delayed triggering is achieved through charging and discharging control of an M0S tube and a capacitor C0 to prevent temperature fluctuation misoperation. The hysteresis control module uses an NMOS tube and a resistor to form a hysteresis difference, and ensures that the protection circuit only acts in an effective temperature interval. The output shaping module converts an analog signal into a digital signal with a steep edge through a Schmitt trigger and a phase inverter, and the digital signal is output through an OTP to drive an external circuit. The temperature protection circuit solves the problems that a traditional NTC scheme is complex in process, large in area and large in detection error.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuit temperature protection, and particularly to a temperature protection circuit. Background Art

[0002] In the existing power module technical solutions, traditional temperature monitoring methods usually rely on NTC thermistors connected inside the module. Such thermistors achieve real-time sampling and monitoring of the module temperature through the characteristic that their resistance values change with temperature. Although this method is relatively mature technically, it has limitations in practical applications; Connecting an NTC thermistor inside the module will significantly increase the complexity of the manufacturing process. Since the thermistor needs to be precisely welded at a specific position inside the module, this process not only requires high-precision welding technology but also increases the risk of solder joint voids. The solder joint voids problem will not only affect the accuracy of temperature monitoring but also may lead to a decrease in the overall reliability of the module, thereby affecting its long-term stable operation; The connection of the thermistor will cause an increase in the design area. In power modules, the space layout is usually very compact, and any additional components will have a greater impact on the overall design. The introduction of the thermistor not only increases the physical size of the module but also may affect the layout of other key components, thereby affecting the thermal management and electrical performance of the module; The complexity of the internal wiring of the module will also increase due to the introduction of the thermistor. To lead out the signal of the thermistor, additional wires need to be arranged inside the module, which not only increases the difficulty of wiring but also may introduce additional electromagnetic interference and noise, affecting the accuracy and stability of the signal. Especially in high-power applications, the electromagnetic environment inside the module is complex, and the interference problem is particularly prominent; The thermistor usually cannot be directly placed near the heat source, resulting in a large error in temperature measurement. Since there is a certain distance between the thermistor and the heat source, the thermal resistance and heat capacity on the heat conduction path will cause delays and inaccuracies in temperature response. This lag and deviation in temperature measurement may affect the thermal protection mechanism of the module, resulting in untimely or false triggering of overheat protection, thereby affecting the safety and reliability of the module. Summary of the Invention

[0003] (I) Technical Problems to be Solved The present invention provides a temperature protection circuit to overcome the problems in the prior art that using an NTC thermistor for temperature detection leads to complex module processes, increased design area, increased interference conditions inside the module, and errors in temperature measurement due to the remote installation of the NTC thermistor from the heat source.

[0004] (II) Technical Solutions To achieve the above object, the present invention provides a temperature protection circuit, characterized in that it includes: a current mirror module, a hysteresis control module, an over-temperature protection module and an output shaping module; The current mirror module is connected to the voltage source VCC, and the current mirror module is used to provide a stable current source for the hysteresis control module, the over-temperature protection module and the output shaping module; The hysteresis control module includes: an NMOS tube NM1, wherein the NMOS tube NM1 is used to form a hysteresis difference when the temperature changes, so as to prevent the circuit from frequently triggering protection and releasing protection near the temperature critical value; The over-temperature protection module includes: a temperature detection unit and a charge-discharge control unit. The semiconductor element with a negative temperature coefficient characteristic in the temperature detection unit directly senses the temperature change of the circuit. The charge-discharge control unit controls the charge and discharge of the capacitor according to the on and off state of the temperature detection unit to trigger or release the over-temperature protection. The output shaping module is used to convert the analog signal output by the over-temperature protection module into a digital signal and output it through OTP; The output shaping module comprises: a Schmitt trigger and an inverter, wherein the output end of the Schmitt trigger is connected to the input end of the inverter, and the output end of the inverter is provided with an OTP, and the OTP is used to output a temperature protection signal to drive an external circuit.

[0005] Preferably, the charge and discharge control unit includes: a capacitor C0 and an NMOS tube NM0, and the temperature detection unit includes: a transistor Q0 and a resistor R1. The negative temperature coefficient characteristic of the turn-on threshold voltage of the transistor Q0 is utilized to control the conduction and cutoff of the NMOS tube NM0 to realize the charging and discharging of the capacitor C0, so as to trigger or release the over-temperature protection.

[0006] Preferably, the current mirror module comprises: a PMOS tube PM3, a PMOS tube PM0, a PMOS tube PM1, a PMOS tube PM2 and a PMOS tube PM4; The gates of the PMOS transistor PM3, the PMOS transistor PM0, the PMOS transistor PM1, the PMOS transistor PM2 and the PMOS transistor PM4 are interconnected, and the sources of the PMOS transistor PM3, the PMOS transistor PM0, the PMOS transistor PM1, the PMOS transistor PM2 and the PMOS transistor PM4 are respectively connected to the voltage source VCC; The PMOS tube PM3 in the current mirror module serves as an input tube to receive current. The function of the current mirror module is to provide a stable current source.

[0007] Preferably, the Schmitt trigger includes: a PMOS tube PM5, an NMOS tube NM2, an NMOS tube NM3 and an NMOS tube NM5; The source of the PMOS transistor PM5 is connected to the voltage source VCC. The gate of the PMOS transistor PM5 is connected to the gates of the NMOS transistors NM2 and NM3. The drain of the PMOS transistor PM5 is connected to the drain of the NMOS transistor NM2 and the gate of the NMOS transistor NM5. The source of the NMOS transistor NM2 is connected to the drain of the NMOS transistor NM3. The NMOS transistor NM5 is connected to the input terminal of the inverter. The inverter includes: a PMOS transistor PM6 and an NMOS transistor NM4. The gate of the PMOS transistor PM6 is connected to the gate of the NMOS transistor NM4. The drain of the PMOS transistor PM6 is connected to the drain of the NMOS transistor NM4. The drain of the NMOS transistor NM5 is connected to the voltage source VCC. The gate of the NMOS transistor NM5 is connected to the gates of the PMOS transistor PM6 and the NMOS transistor NM4.

[0008] Preferably, the drain of the PMOS transistor PM0 is respectively connected to the capacitor C0 and the NMOS transistor NMO. The gate of the NMOS transistor NMO is connected to the drain of the PMOS transistor PM1 and the collector of the triode Q0. The turn-on threshold voltage of the triode Q0 has a negative temperature coefficient.

[0009] Preferably, the triode Q0 is in the cut-off state at normal temperature, and the NMOS transistor NMO is in the on state, so that the capacitor CO is in the short-circuit state.

[0010] Preferably, the drain of the PMOS transistor PM1 is connected to the triode Q0. The turn-on threshold voltage of the triode Q0 in the over-temperature protection module decreases as the temperature increases.

[0011] Preferably, when the temperature reaches the set threshold of the triode Q0, the triode Q0 changes from the cut-off state to the on state, the NMOS transistor NMO becomes the cut-off state, the PMOS transistor PM0 and the capacitor CO are turned on, and the PMOS transistor PM0 charges the capacitor CO.

[0012] Preferably, one end of the resistor R1 is connected to the source of the NMOS transistor NM1 and the drain of the PMOS transistor PM2, and the other end is connected to the emitter of the triode Q0, the capacitor C0, and the source of the NMOS transistor NM0. When the temperature drops, the NMOS transistor NM1 is turned on, and the node voltage threshold is changed by increasing the current on the resistor R1.

[0013] (III) Beneficial effects The present invention provides a temperature protection circuit, which can directly sense the temperature change through the negative temperature coefficient characteristic of the triode Q0, avoids the installation process of the traditional NTC thermistor, simplifies the module design process, and eliminates the temperature conduction delay and measurement deviation caused by the remote installation of the traditional NTC thermistor. The temperature protection circuit is composed of MOS transistors, bipolar transistors, capacitors, and resistive integrated components, eliminating the need for external discrete components, significantly reducing the module volume, and lowering the complexity of PCB layout; The current mirror module, hysteresis control, over-temperature protection module, and output shaping module all achieve their functions through internal interconnections, avoiding the extra wiring and space required by NTC thermistors; In the temperature protection circuit, the current mirror module provides a reference current, reducing the impact of power supply fluctuations on temperature detection, enhancing the circuit's power supply noise immunity. The output shaping module suppresses the noise interference of the input signal through a Schmitt trigger, ensuring the steep edges and clear logic of the OTP output signal, and reducing the risk of false triggering; The turn-on threshold of the bipolar transistor Q0 decreases as the temperature rises, enabling accurate temperature threshold detection and avoiding triggering deviations caused by the non-linear characteristics of NTCs. When over-temperature occurs, PM0 charges C0 to form signal holding or delayed triggering, preventing false protection caused by short-term temperature fluctuations and enhancing system stability. Through the cooperative action of NMOS transistor NM1 and resistor R1, when the temperature drops, NMOS transistor NM1 conducts to increase the current through resistor R1, forming a hysteresis difference between the "temperature rise trigger threshold" and the "temperature drop recovery threshold", ensuring that the protection circuit operates only in the effective temperature range and preventing frequent switching; Thus, the problems of complex processes, large area, many interferences, and detection errors in traditional NTC thermistor solutions are solved. Brief Description of the Drawings

[0014] Figure 1 Shows a schematic structural diagram of a temperature protection circuit according to the present invention. Detailed Description of the Embodiments

[0015] The present invention will be described in detail below with reference to the drawings and embodiments. The technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0016] In the description of the present invention, it is necessary to understand that the orientation or positional relationships indicated by "upper", "lower", "left", "right", "inner", "outer", "top", "bottom", etc. are all based on the orientation or positional relationships shown in the drawings. The purpose is only to facilitate the description of the present invention and simplify the description, rather than indicating or implying that the components referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention.

[0017] As Figure 1As shown, the present invention provides a temperature protection circuit, comprising: a current mirror module, a hysteresis control module, an over-temperature protection module and an output shaping module; The current mirror module is connected to a voltage source VCC, and includes: a PMOS tube PM3, a PMOS tube PM0, a PMOS tube PM1, a PMOS tube PM2, and a PMOS tube PM4; From the circuit structure, the gates of the PMOS tube PM3, PMOS tube PM0, PMOS tube PM1, PMOS tube PM2 and PMOS tube PM4 are interconnected to form a unified control node, and the sources of the PMOS tube PM3, PMOS tube PM0, PMOS tube PM1, PMOS tube PM2 and PMOS tube PM4 are respectively connected to the voltage source VCC to build a stable power input path; In terms of working mechanism, the current mirror module relies on the current mirror characteristics of the MOS tube to achieve precise current output. The PMOS tube PM3, as the input tube, is the first to receive the external input current. Since the gates of the PMOS tubes PM3, PM0, PM1, PM2 and PM4 are interconnected, their gate-source voltages remain consistent. Under the premise of matching semiconductor process parameters, the PMOS tubes PM0, PM1, PM2 and PM4 will accurately copy the current of the PMOS tube PM3 according to their own width-to-length ratio. This way of generating mirror current enables the current mirror module to provide stable and precise current signals for subsequent hysteresis control modules, over-temperature protection modules, etc., to avoid circuit misjudgment caused by current fluctuations.

[0018] The hysteresis control module includes: an NMOS tube NM1, whose core function is to construct the hysteresis characteristics of temperature protection to avoid the unstable state of frequent triggering and releasing protection of the circuit near the temperature critical value. The NMOS tube NM1 works with the resistor R1, and is turned on during the temperature drop process, changing the current size on the resistor R1, and then adjusting the circuit node voltage threshold, so that the opening threshold (T+) and the closing threshold (T-) of the temperature protection form a difference, thereby realizing the hysteresis function.

[0019] The over-temperature protection module is composed of capacitor C0, NMOS tube NM0, transistor Q0 and resistor R1. Each component realizes temperature detection and response through precise coordination: The drain of the PMOS tube PM0 is used as a key node, and is connected to the capacitor C0 and the NMOS tube NM0 respectively, so as to construct a signal transmission and charge storage path. The gate of the NMOS tube NM0 is connected to the transistor Q0, and receives the control signal of the transistor state change. One end of the resistor R1 is connected to the source of the NMOS tube NM1 and the drain of the PMOS tube PM2, and the other end is connected to the emitter of the transistor Q0, the capacitor C0 and the source of the NMOS tube NM0, so as to form a network of current and voltage interaction. The transistor Q0 has a negative temperature coefficient and is relatively high at room temperature. At normal temperature, the transistor Q0 is cut off because it does not reach the turn-on threshold voltage. At this time, the gate of the NMOS tube NM0 has no driving signal and NM0 is turned on. Since the on-resistance of NM0 is extremely small, the two ends of the capacitor C0 are almost short-circuited and cannot accumulate charge, and the circuit maintains normal operation. When the temperature rises, the turn-on threshold voltage of transistor Q0 decreases with the temperature. When the temperature reaches the set threshold (T+), the base-emitter voltage of Q0 meets the conduction condition and Q0 is turned on. The gate voltage of NMOS tube NM0 is pulled down and NM0 is turned off. The PMOS tube PM0 and capacitor C0 are turned on, and the voltage of PM0 charging capacitor C0 rises, triggering the over-temperature protection. When the temperature drops, the NMOS tube NM1 of the hysteresis control module is turned on, and the additional current flows through R1, increasing its current and changing the node voltage threshold. Even if the temperature drops below T+, Q0 is still turned on due to the node voltage until the temperature drops to the negative protection point (T-). The turn-on threshold voltage of Q0 increases due to the temperature, and the current source current decreases. The voltage drop of R1 is insufficient to keep Q0 turned on, NM0 turns on again, C0 discharges, and the circuit releases the over-temperature protection.

[0020] The output shaping module is the last level processing unit of the temperature protection circuit. Through the coordinated design of Schmitt trigger and inverter, it converts the analog signal output by the over-temperature protection module into a digital signal with clear logic and strong anti-interference ability, and finally outputs it through the OTP interface. The Schmitt trigger is composed of PMOS tube PM5, NMOS tubes NM2, NM3 and NM5. Its core function is to convert the analog voltage signal of capacitor C0 into a digital signal with hysteresis characteristics to avoid false triggering caused by noise or voltage fluctuations. The gate of PM5, the gate of NM2 and the gate of NM3 are interconnected to receive the voltage signal of capacitor C0 together. The NM3 and NM5 form a positive feedback loop. The drain of NM3 is connected to the source of NM2, and the gate of NM5 is connected to the drain node of PM5 and NM2. When the input voltage exceeds the positive threshold (V+), the conduction of NM2 is enhanced, and the drain voltage of NM3 decreases. The conduction of NM5 is accelerated by positive feedback, so that the output quickly jumps to a high level. On the contrary, when the input voltage is lower than the negative threshold (V-), the positive feedback mechanism accelerates the output to jump to a low level to form a hysteresis characteristic. The drain of NM5 is connected to VCC as the output end of the Schmitt trigger, directly driving the input of the inverter. The inverter is composed of a PMOS tube PM6 and an NMOS tube NM4, and its function is to further shape the digital signal output by the Schmitt trigger to ensure that the logic level of the OTP output is clear; The gates of PM6 and NM4 are interconnected to receive the output signal of the Schmitt trigger, and the drains are interconnected to form an output node. When a high level is input, PM6 is turned off, NM4 is turned on and outputs a low level; conversely, when a low level is input, PM6 is turned on, NM4 is turned off and outputs a high level. The inverter shortens the signal rise / fall time through strong driving capability, suppresses signal ringing and noise interference, and makes the final output signal conform to digital logic standards. The output of the inverter is directly connected to the OTP interface, which is the final output of the temperature protection signal for driving the external circuit; When the voltage of capacitor C0 exceeds the positive threshold V+ of the Schmitt trigger, the trigger outputs a high level, and the inverter converts it to a low level, and outputs an "overtemperature protection" signal through OTP. When the temperature drops to the negative threshold V-, the trigger output jumps to a low level, the inverter outputs a high level, and the OTP signal releases the protection. The hysteresis characteristic of the Schmitt trigger (V+>V-) makes the circuit immune to noise, and the strong driving capability of the inverter further enhances the signal's anti-interference ability to ensure stable and reliable OTP output.

[0021] In the actual working process, the working state of the temperature protection circuit includes: At normal temperature: PMOS tube PM3 receives external input current. Since the gates of PM3, PM0, PM1, PM2, and PM4 are interconnected and the gate-source voltages are consistent, when the semiconductor process parameters are matched, PM0, PM1, PM2, and PM4 accurately replicate the current of PM3 based on their own width-to-length ratios, providing a stable and accurate current signal for the subsequent hysteresis control module and over-temperature protection module. The NMOS tube NM1 is in the cut-off state, and at this time it has no effect on the current on the resistor R1; The turn-on threshold voltage of transistor Q0 is relatively high at room temperature, and its base-emitter voltage does not reach the conduction condition, so transistor Q0 is turned off. Since transistor Q0 is turned off, the gate of NMOS tube NM0 has no driving signal, and NM0 is turned on. Since the conduction resistance of NM0 is extremely small, the two ends of capacitor C0 are approximately short-circuited, and the charge circuit cannot be accumulated to maintain normal operation; The voltage of capacitor C0 is very low, far below the positive threshold V+ of the Schmitt trigger. The Schmitt trigger outputs a low level, and the inverter receives the low level input of the Schmitt trigger. PM6 is turned on, NM4 is turned off, and a high level is output. The "normal operation" signal is output through the OTP interface, indicating that the temperature of the drive circuit is normal and the over-temperature protection is not triggered. When the temperature reaches or exceeds the over-temperature protection threshold T+: As the temperature rises, the turn-on threshold voltage of the triode Q0 decreases with temperature. When the temperature reaches the set threshold T+, the base-emitter voltage of Q0 meets the conduction condition, and Q0 conducts. After Q0 conducts, the gate voltage of the NMOS transistor NM0 is pulled down, and NM0 is cut off. At this time, the path of the PMOS transistor PM0 and the capacitor C0 conducts, and PM0 starts to charge C0, and the voltage of the capacitor C0 rises; When the voltage of the capacitor C0 exceeds the positive threshold V+ of the Schmidt trigger, the conduction of NM2 is enhanced, the drain voltage of NM3 drops, and the conduction of NM5 is accelerated through positive feedback. The Schmidt trigger outputs a high level. The inverter receives the high-level input of the Schmidt trigger, PM6 is cut off, NM4 conducts and outputs a low level, and a "thermal protection" signal is output through the OTP interface, indicating that the temperature of the drive circuit is too high and triggers thermal protection at this time.

[0022] When the temperature is lower than T+ but higher than the thermal protection release threshold T−: When the temperature starts to drop, the NMOS transistor NM1 conducts. After NM1 conducts, an additional current flows through the resistor R1, increasing its current and changing the circuit node voltage threshold; Although the temperature has dropped below T+, due to the increase in the current on the resistor R1, the node voltage maintains the conduction of the triode Q0, NM0 is still cut off, and PM0 continues to charge C0 or maintain the voltage of C0, and the circuit is still in the thermal protection state; The voltage of the capacitor C0 is still higher than the positive threshold V+ of the Schmidt trigger. The Schmidt trigger keeps outputting a high level, the inverter outputs a low level, and the OTP interface continuously outputs a "thermal protection" signal.

[0023] When the temperature reaches or is lower than the thermal protection release threshold T−: The NMOS transistor NM1 remains conductive and continues to affect the current on the resistor R1; As the temperature continues to drop, the turn-on threshold voltage of the triode Q0 increases due to the increase in temperature. At the same time, the current of the current source decreases, and the voltage drop on the resistor R1 is not enough to maintain the conduction of Q0, and Q0 is cut off. After Q0 is cut off, the NMOS transistor NM0 conducts again, and the capacitor C0 starts to discharge, and its voltage drops; When the voltage of the capacitor C0 is lower than the negative threshold V− of the Schmidt trigger, the positive feedback mechanism accelerates the output of the Schmidt trigger to jump to a low level. The inverter receives the low-level input of the Schmidt trigger, PM6 conducts, NM4 is cut off, outputs a high level, and a "protection release" signal is output through the OTP interface, indicating that the temperature of the drive circuit has returned to normal and the thermal protection state has been released.

[0024] It can be understood that the above-mentioned various embodiments mentioned in the present invention can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present invention will not be elaborated further.

[0025] Those skilled in the art can understand that in the above methods of the specific embodiments, the writing order of each step does not mean a strict execution order and does not impose any limitation on the implementation process. The specific execution order of each step should be determined according to its function and possible internal logic.

[0026] A temperature protection circuit provided by the present invention directly senses temperature changes through the negative temperature coefficient characteristic of the triode Q0, avoids the installation process of traditional NTC thermistors, simplifies the module design process, and eliminates the temperature conduction delay and measurement deviation caused by the remote installation of traditional NTC thermistors; This temperature protection circuit is composed of MOS transistors, triodes, capacitors, and resistor integrated components, without external discrete components, significantly reducing the module volume and the complexity of PCB layout; The current mirror module, hysteresis control, over-temperature protection module, and output shaping module all achieve their functions through internal interconnection, avoiding the extra wiring and space required for NTC thermistors; In this temperature protection circuit, the current mirror module provides a reference current, reduces the influence of power supply fluctuations on temperature detection, improves the power supply noise resistance of the circuit, and the output shaping module suppresses the noise interference of the input signal through a Schmitt trigger, ensuring the steep edge and logical clarity of the OTP output signal and reducing the risk of false triggering; The turn-on threshold of the triode Q0 decreases as the temperature increases, achieving accurate temperature threshold detection, avoiding trigger deviation caused by the non-linear characteristics of NTCs. When over-temperature occurs, PM0 charges C0 to form signal holding or delayed triggering, preventing false protection caused by short-term temperature fluctuations and enhancing system stability. Through the cooperation of the NMOS transistor NM1 and the resistor R1, when the temperature drops, the NMOS transistor NM1 conducts to increase the current of the resistor R1, forming a hysteresis difference between the "temperature rise trigger threshold" and the "temperature drop recovery threshold", ensuring that the protection circuit operates only in the effective temperature range and preventing frequent switching; Thus, the problems of complex processes, large area, many interferences, and detection errors in the traditional NTC thermistor solution are solved.

[0027] The embodiments of the present invention have been described above. The above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art in the technical field without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to technologies in the market, or to enable other ordinary skilled persons in the technical field to understand the disclosed embodiments.

Claims

1. A temperature protection circuit, characterized in that: include: Current mirror module, hysteresis control module, over-temperature protection module and output shaping module; The current mirror module is connected to the voltage source VCC, and the current mirror module is used to provide a stable current source for the hysteresis control module, the over-temperature protection module and the output shaping module; The hysteresis control module includes: an NMOS tube NM1, wherein the NMOS tube NM1 is used to form a hysteresis difference when the temperature changes, so as to prevent the circuit from frequently triggering protection and releasing protection near the temperature critical value; The over-temperature protection module includes: a temperature detection unit and a charge-discharge control unit. The semiconductor element with a negative temperature coefficient characteristic in the temperature detection unit directly senses the temperature change of the circuit. The charge-discharge control unit controls the charge and discharge of the capacitor according to the on and off state of the temperature detection unit to trigger or release the over-temperature protection. The output shaping module is used to convert the analog signal output by the over-temperature protection module into a digital signal and output it through OTP; The output shaping module comprises: a Schmitt trigger and an inverter, wherein the output end of the Schmitt trigger is connected to the input end of the inverter, and the output end of the inverter is provided with an OTP, and the OTP is used to output a temperature protection signal to drive an external circuit.

2. The temperature protection circuit according to claim 1, characterized in that: The charge and discharge control unit includes: a capacitor C0 and an NMOS tube NM0, and the temperature detection unit includes: a transistor Q0 and a resistor R1. The negative temperature coefficient characteristic of the turn-on threshold voltage of the transistor Q0 is utilized to control the conduction and cut-off of the NMOS tube NM0 to realize the charge and discharge of the capacitor C0, so as to trigger or release the over-temperature protection.

3. The temperature protection circuit according to claim 2, characterized in that: The current mirror module includes: a PMOS tube PM3, a PMOS tube PM0, a PMOS tube PM1, a PMOS tube PM2 and a PMOS tube PM4; The gates of the PMOS transistor PM3, the PMOS transistor PM0, the PMOS transistor PM1, the PMOS transistor PM2 and the PMOS transistor PM4 are interconnected, and the sources of the PMOS transistor PM3, the PMOS transistor PM0, the PMOS transistor PM1, the PMOS transistor PM2 and the PMOS transistor PM4 are respectively connected to the voltage source VCC; The PMOS tube PM3 in the current mirror module serves as an input tube to receive current, and the function of the current mirror module is to provide a stable current source.

4. The temperature protection circuit according to claim 3, characterized in that: The Schmitt trigger includes: a PMOS tube PM5, an NMOS tube NM2, an NMOS tube NM3 and an NMOS tube NM5; The source of the PMOS tube PM5 is connected to the voltage source VCC, the gate of the PMOS tube PM5 is connected to the gates of the NMOS tubes NM2 and NM3, the drain of the PMOS tube PM5 is connected to the drain of the NMOS tube NM2 and the gate of the NMOS tube NM5, the source of the NMOS tube NM2 is connected to the drain of the NMOS tube NM3, and the NMOS tube NM5 is connected to the input end of the inverter; The inverter comprises: a PMOS tube PM6 and an NMOS tube NM4, wherein the gate of the PMOS tube PM6 is connected to the gate of the NMOS tube NM4, and the drain of the PMOS tube PM6 is connected to the drain of the NMOS tube NM4; The drain of the NMOS transistor NM5 is connected to the voltage source VCC, and the gate of the NMOS transistor NM5 is connected to the gates of the PMOS transistor PM6 and the NMOS transistor NM4.

5. The temperature protection circuit according to claim 4, characterized in that: The drain of the PMOS transistor PM0 is connected to the capacitor C0 and the NMOS transistor NMO respectively, the gate of the NMOS transistor NMO is connected to the drain of the PMOS transistor PM1 and the collector of the transistor Q0, and the turn-on threshold voltage of the transistor Q0 has a negative temperature coefficient.

6. The temperature protection circuit according to claim 5, characterized in that: The transistor Q0 is in a cut-off state at normal temperature, and the NMOS transistor NMO is in a conducting state, so that the capacitor CO is in a short-circuit state.

7. The temperature protection circuit according to claim 6, characterized in that: The drain of the PMOS tube PM1 is connected to the transistor Q0 , and the turn-on threshold voltage of the transistor Q0 in the over-temperature protection module decreases as the temperature increases.

8. The temperature protection circuit according to claim 7, characterized in that: When the temperature reaches the set threshold of the transistor Q0, the transistor Q0 changes from the cut-off state to the on state, the NMOS transistor NMO changes to the cut-off state, the PMOS transistor PM0 and the capacitor CO are turned on, and the PMOS transistor PM0 charges the capacitor CO.

9. The temperature protection circuit according to claim 8, characterized in that: One end of the resistor R1 is connected to the source of the NMOS tube NM1 and the drain of the PMOS tube PM2, and the other end is connected to the emitter of the transistor Q0, the capacitor C0 and the source of the NMOS tube NM0. When the temperature drops, the NMOS tube NM1 is turned on, and the node voltage threshold is changed by increasing the current on the resistor R1.

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