Flash memory restoration system and method

Abstract

The invention provides a flash memory restoration system and method, and the method comprises the steps: reading a backup power-on setting corresponding to a flash memory from a static random access memory powered by a battery when the flash memory is powered on and the pre-stored power-on setting cannot be read from the flash memory through a substrate management controller, and updating the flash memory according to the backup power-on setting, and reading the updated flash memory to execute a power-on program.

Description

Technical Field

[0001] The present invention relates to a flash memory restoration system and method. Background Art

[0002] Before a computer is powered on, a baseboard software controller needs to read a boot firmware file in a serial peripheral interface (SPI) flash memory and execute a boot program based on the boot firmware file.

[0003] However, if the flash memory is damaged, resulting in the boot firmware file being damaged or even lost, the boot program cannot be executed normally, and the administrator needs to operate the computer to reset the boot firmware file, which is quite inconvenient in terms of operation and maintenance. Summary of the Invention

[0004] In view of the above, the present invention provides a flash memory restoration system and method to solve the above problems.

[0005] A flash memory restoration method according to an embodiment of the present invention includes executing by a baseboard management controller: when booting up and the pre-stored boot settings cannot be read from the flash memory, reading a backup boot setting corresponding to the flash memory from a static random access memory powered by a battery; updating the flash memory according to the backup boot setting; and reading the updated flash memory to execute the boot program.

[0006] A flash memory restoration system according to an embodiment of the present invention includes: a flash memory for storing pre-stored boot settings, a battery, and a baseboard management controller. The baseboard management controller includes a static random access memory and an arithmetic element. The static random access memory is connected to the battery and is used to store the backup boot setting of the flash memory. The arithmetic element is connected to the flash memory and the static random access memory. The arithmetic element is used to, when booting up and the pre-stored boot settings cannot be read from the flash memory, read the backup boot setting from the static random access memory, update the flash memory according to the backup boot setting, and read the updated flash memory to execute the boot program.

[0007] In summary, according to one or more embodiments of the present invention, the flash memory restoration system and method can still execute the boot program normally even if the flash memory is damaged, and there is no need for the administrator to reset the boot firmware file, which is quite convenient in terms of operation and maintenance.

[0008] To further understand the technologies, means, and effects adopted by the present application to achieve the predetermined purpose, please refer to the following detailed description and drawings of the present application. It is believed that the purpose, features, and characteristics of the present application can be deeply and specifically understood therefrom. However, the attached drawings are only for reference and illustration purposes and are not used to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 FIG. Figure 1 is a block diagram of a flash memory restoration system according to an embodiment of the present invention;

[0010] Figure 2 FIG. Figure 2 is a flowchart of a flash memory restoration method according to an embodiment of the present invention;

[0011] Figure 3 FIG. Figure 3 is a block diagram of a flash memory restoration system according to another embodiment of the present invention;

[0012] Figure 4 FIG. Figure 4 is a flowchart of generating a backup boot setting according to an embodiment of the present invention;

[0013] Figure 5 FIG. Figure 5 is a flowchart of binary conversion according to an embodiment of the present invention;

[0014] Figure 6 FIG. Figure 6 is a flowchart of updating a flash memory according to an embodiment of the present invention;

[0015] Figure 7 FIG. Figure 7 is a flowchart of monitoring battery power according to an embodiment of the present invention.

[0016] Wherein, reference numerals:

[0017] 1, 2: Flash memory restoration system

[0018] 11, 21: Flash memory

[0019] 12, 22: Battery

[0020] 13, 23: Baseboard Management Controller

[0021] 131, 231, 24: Arithmetic element

[0022] 132, 232: Static Random Access Memory

[0023] S101, S103, S105, S201, S203, S301, S303, S401, S403, S405, S501, S503, S505: Steps. DETAILED DESCRIPTION OF THE INVENTION

[0024] The technical content and detailed description of the present application are described below in conjunction with the drawings:

[0025] Various embodiments are presented below for detailed description. However, the embodiments are only used as examples for illustration and will not limit the scope of protection of the present invention. In addition, some elements are omitted in the drawings of the embodiments to clearly show the technical features of the present invention. The same reference numerals will be used to represent the same or similar elements in all the drawings.

[0026] Please refer to Figure 1 , wherein Figure 1 is a block diagram of a flash memory restoration system according to an embodiment of the present invention. As Figure 1 shown, the flash memory restoration system 1 includes a flash memory 11, a battery 12, and a baseboard management controller 13. The baseboard management controller 13 includes an arithmetic element 131 and a static random access memory 132. The arithmetic element 131 of the baseboard management controller 13 is connected to the flash memory 11 and the static random access memory 132, wherein the arithmetic element 131 may be connected to the flash memory 11 through a serial peripheral interface (SPI) interface. The battery 12 is connected to the static random access memory 132 of the baseboard management controller 13.

[0027] The flash memory 11 is used to store the pre-stored boot settings used by the baseboard management controller 13 to execute the boot program. The battery 12 can be a lithium battery and is used to supply power to the static random access memory 132 of the baseboard management controller 13. The baseboard management controller 13 can be a system on chip (SOC). The static random access memory 132 can be a built-in component of the baseboard management controller 13 and is used to store a backup of the boot settings. It should be noted that Figure 1 the battery 12 is drawn as an external component of the baseboard management controller 13, but the battery 12 can also be jointly provided in the baseboard management controller 13 with the static random access memory 132.

[0028] In addition, the flash memory 11, the arithmetic element 131, and the static random access memory 132 can have their own power sources, and the power sources are, for example, direct current. The arithmetic element 131 of the baseboard management controller 13 can include one or more processors and / or microcontrollers. The arithmetic element 131 is used to read the boot settings to execute the boot program.

[0029] To more specifically describe the operation mode of the flash memory restoration system 1, please also refer to Figure 1 and Figure 2 , wherein Figure 2 is a flowchart of a flash memory restoration method according to an embodiment of the present invention. As Figure 2As shown, the flash memory restoration method includes the following steps executed by the baseboard management controller 13: Step S101: When powering on and the pre-stored power-on setting cannot be read from the flash memory, read the backup power-on setting corresponding to the flash memory from the static random access memory powered by the battery; Step S103: Update the flash memory according to the backup power-on setting; and Step S105: Read the updated flash memory to execute the power-on program.

[0030] In Step S101, when the arithmetic element 131 is triggered by the power-on signal to execute the power-on program, the arithmetic element 131 first reads the pre-stored power-on setting stored in the flash memory 11. For example, the arithmetic element 131 can read the pre-stored power-on setting by using the mount instruction of Linux to read the file system. When the arithmetic element 131 cannot read the pre-stored power-on setting, it means that the block in the flash memory 11 used to store the pre-stored power-on setting may be damaged. Therefore, the arithmetic element 131 reads the corresponding backup power-on setting from the static random access memory 132 powered by the battery 12.

[0031] In Step S103, the arithmetic element 131 updates the backup power-on setting to the flash memory 11. For example, the arithmetic element 131 stores the backup power-on setting into the flash memory 11.

[0032] In Step S105, the arithmetic element 131 reads the power-on setting in the flash memory 11 updated as above and executes the power-on program accordingly.

[0033] Through the above embodiments, even if the flash memory is damaged, the power-on program can still be normally executed, and there is no need for the administrator to reset the power-on firmware file, which is quite convenient in operation and maintenance.

[0034] In addition, at any time point after the arithmetic element 131 is triggered by the power-on signal, the arithmetic element 131 can receive user settings and apply the user settings to the flash memory 11 and the static random access memory 132. Specifically, the user settings can be used to change the pre-stored power-on setting stored in the flash memory 11. The arithmetic element 131 can change the pre-stored power-on setting according to the user settings and back up the changed pre-stored power-on setting to the static random access memory 132 to update the backup power-on setting.

[0035] In addition, the user setting can also be used to change the backup boot settings stored in the static random access memory 132. The computing element 131 can change the backup boot settings according to the user setting, store the changed backup boot settings as the pre-stored boot settings in the flash memory 11, and replace the backup boot settings originally stored in the static random access memory 132 with the changed backup boot settings. The computing element 131 can execute the boot procedure based on the changed backup boot settings.

[0036] Moreover, as described above, when the computing element 131 fails to read the pre-stored boot settings, it indicates that the block in the flash memory 11 used to store the pre-stored boot settings may be damaged. Therefore, after step S101 and before step S103, the computing element 131 can reconstruct the partition of the flash memory 11 and erase the damaged block of the flash memory 11.

[0037] Please refer to Figure 3 , in which Figure 3 is a block diagram of a flash memory restoration system according to another embodiment of the present invention. As Figure 3 shown, the flash memory restoration system 2 includes a flash memory 21, a battery 22, and a baseboard management controller 23. The baseboard management controller 23 includes a first computing element 231 and a static random access memory 232. Moreover, the flash memory restoration system 2 can further include a second computing element 24.

[0038] The flash memory 21, the battery 22, the baseboard management controller 23, the first computing element 231, and the static random access memory 232 of the flash memory restoration system 2 can be the same as those of the flash memory restoration system 1 of Figure 1 respectively, and thus will not be elaborated herein. Among them, the first computing element 231 can be further connected to the battery 22 and the static random access memory 232, and the first computing element 231 can be connected to the battery 22 through a line of an analog-to-digital converter.

[0039] The second computing element 24 can include one or more processors and / or microcontrollers. The second computing element 24 is connected to the flash memory 21. The first computing element 231 or the second computing element 24 can be used to periodically or aperiodically back up the pre-stored boot settings stored in the flash memory 21 to the static random access memory 232 as the aforementioned backup boot settings.

[0040] To illustrate the operation mode of the flash memory restoration system 2 in more detail, please refer to Figure 3 and Figure 4 together, in which Figure 4is a flowchart showing the generation of a backup boot setting according to an embodiment of the present invention. As Figure 4 shown, generating the backup boot setting may include: Step S201: performing a base conversion on the pre-stored boot setting to generate a backup boot setting; and Step S203: storing the backup boot setting in a static random access memory. Figure 4 The steps shown may be executed by the first arithmetic element 231 or the second arithmetic element 24. The following uses the first arithmetic element 231 to illustrate Figure 4 the steps. In addition, as described above, Figure 4 the steps may be executed periodically or aperiodically.

[0041] In step S201, the first arithmetic element 231 performs a base conversion on the pre-stored boot setting stored in the flash memory 21 to generate a backup boot setting. The base conversion may be to convert the pre-stored boot setting into a binary format. In other words, the data size of the backup boot setting obtained through the base conversion may be smaller than that of the pre-stored boot setting. In step S203, the first arithmetic element 231 stores the backup boot setting obtained through the base conversion in the static random access memory 232. Through the above base conversion, the space occupied by the backup boot setting in the static random access memory 232 can be reduced.

[0042] Please also refer to Figure 3 and Figure 5 , where Figure 5 is a flowchart showing the base conversion according to an embodiment of the present invention. Figure 5 can be regarded as Figure 4 a detailed flowchart of an embodiment of step S201 of Figure 5 . In the embodiment of Figure 5 , the boot setting may include multiple pieces of boot data. As Figure 5 shown, the base conversion may include: Step S301: converting the multiple pieces of boot data into multiple pieces of binary data, where each piece of binary data is a bit; and Step S303: using the multiple pieces of binary data as the backup boot setting. Figure 5 The steps shown may be executed by the first arithmetic element 231 or the second arithmetic element 24. The following uses the first arithmetic element 231 to illustrate

[0043] In step S301, taking the aforementioned binary base conversion as an example, the first arithmetic element 231 performs a base conversion on the boot data to obtain binary data, and each piece of binary data may be a bit. In step S303, the first arithmetic element 231 uses the converted binary data as the backup boot setting stored in the static random access memory 232.

[0044] For example, the power-on setting is time zone configuration and includes first power-on data, second power-on data, and third power-on data. The first power-on data is "timezone=America / New York", the second power-on data is "timezone=America / Los Angeles", and the third power-on data is "timezone=America / Denver". In step S301, the first arithmetic element 231 converts the first power-on data, the second power-on data, and the third power-on data into first binary data "0x01", second binary data "0x02", and third binary data "0x03" respectively, with one bit representing one time zone. In step S303, the first arithmetic element 231 uses the binary data "0x01", "0x02", and "0x03" in bit format as the backup power-on setting stored in the static random access memory 232.

[0045] Please also refer to Figure 3 and Figure 6 where Figure 6 is a flowchart for updating a flash memory shown according to an embodiment of the present invention. Figure 6 can be regarded as Figure 2 a detailed flowchart of an embodiment of step S103 of Figure 6 In the embodiment of Figure 6 , the flash memory 21 stores a comparison table, where the comparison table includes the correspondence between multiple pieces of power-on data and multiple pieces of binary data. As Figure 6 shown, updating the flash memory includes: step S401: determining target binary data existing in the backup power-on setting among the multiple pieces of binary data; step S403: determining target power-on data corresponding to the target binary data among the multiple pieces of power-on data according to the correspondence; and step S405: using the target power-on data as at least a part of the backup power-on setting. Figure 6 The steps shown in

[0046] can be executed by the first arithmetic element 231. The backup power-on setting can be binary data in bit format. In step S401, the first arithmetic element 231 compares the binary data in the backup power-on setting with the comparison table to determine the target binary data that is the same as the binary data in the backup power-on setting, where the number of binary data in the backup power-on setting can be the same as the number of target binary data.

[0047] In step S403, the first arithmetic element 231 determines the power-on data corresponding to the target binary data as the target power-on data according to the correspondence in the comparison table, where the number of target binary data can be the same as the number of target power-on data.

[0048] In step S405, the first arithmetic element 231 uses the target power-on data obtained according to the correspondence of the comparison table as the backup power-on setting.

[0049] Continuing with the above example where the power-on setting is for time zone configuration, the pseudo code of the look-up table can be as shown in Table 1 below. The look-up table can record the correspondence between the first power-on data, the second power-on data, and the third power-on data and the first binary data, the second binary data, and the third binary data respectively.

[0050] Table 1

[0051] 0x01 timezone.conf America / New York 0x02 timezone.conf America / Los Angeles 0x03 timezone.conf America / Denver

[0052] Therefore, assuming that the binary data in the backup power-on setting is "0x02", in step S401, the first arithmetic element 231 determines that the binary data of the backup power-on setting is the same as the binary data "0x02" in the look-up table, and takes the binary data "0x02" as the target binary data. In step S403, the first arithmetic element 231 determines that in the look-up table, the target binary data "0x02" corresponds to the second power-on data "timezone=America / LosAngeles", and takes the second power-on data "timezone=America / LosAngeles" as the target power-on data. In step S405, the first arithmetic element 231 uses the target power-on data as the backup power-on setting for updating the flash memory 21.

[0053] Please also refer to Figure 3 and Figure 7 where Figure 7 is a flowchart showing the monitoring of battery power according to an embodiment of the present invention. As Figure 7 shown, monitoring the battery power includes: step S501: detecting the power of the battery supplying power to the static random access memory; step S503: determining whether the power of the battery is lower than a preset power; if the determination result of step S503 is "yes", execute step S505: output a prompt message; and if the determination result of step S503 is "no", execute step S501, or end the process. Figure 7 The steps shown can be executed at any point in time. Figure 7 The steps shown can be executed by the first arithmetic element 231.

[0054] In step S501, the first arithmetic element 231 detects the power of the battery 22. In step S503, the first arithmetic element 231 determines whether the power of the battery 22 is lower than the preset power. The preset power is, for example, 5 volts, but the present invention is not limited thereto.

[0055] If the first arithmetic element 231 determines that the power level of the battery 22 is lower than the preset power level, then in step S505, the first arithmetic element 231 can output a prompt message to the user interface connected to the baseboard management controller 23 to remind the user to replace the battery 22.

[0056] Figures 4 to 7 The steps of Figure 3 are described with the first arithmetic element 231 of Figures 4 to 6 However, the steps of Figure 1 can also be executed by the arithmetic element 131 of Figure 1 and if the arithmetic element 131 is connected to the battery 12, then Figure 7 the arithmetic element 131 of

[0057] In addition, the steps described above are all executed in the pre-boot period of the baseboard management controller, for example, before starting the service of the baseboard management controller. Compared with determining whether the flash memory is damaged after starting the service, by executing the steps of one or more of the above embodiments before executing the boot program, the problem of extended boot time caused by the need to restart the service can be avoided.

[0058] In summary, according to the flash memory restoration system and method of one or more embodiments of the present invention, even if the flash memory is damaged, the boot program can still be executed normally, and there is no need for the administrator to reset the boot firmware file, which is quite convenient in operation and maintenance. Moreover, through binary conversion, the space occupied by backing up the boot settings in the static random access memory can be reduced.

[0059] The above is only a preferred embodiment of the present application, and it cannot limit the scope of implementation of the present application. That is, all equivalent changes and modifications made according to the present application should still fall within the scope intended to be protected by the patent scope of the present application. The present application can also have other various embodiments. Without departing from the spirit and essence of the present application, those skilled in the art can make various corresponding changes and deformations according to the present application, but these corresponding changes and deformations should all fall within the protection scope of the appended claims of the present application.

Claims

1. A flash memory restoration method, characterized in that, it includes a baseboard management controller to execute: When powering on and a pre-stored power-on setting cannot be read from a flash memory, read a backup power-on setting corresponding to the flash memory from a static random access memory powered by a battery; Update the flash memory according to the backup power-on setting; and Read the updated flash memory to execute the power-on procedure.

2. The flash memory restoration method according to claim 1, characterized in that, it further includes a baseboard management controller or another computing element to execute: Perform a number system conversion on the pre-stored power-on setting to generate the backup power-on setting; and Store the backup power-on setting in the static random access memory.

3. The flash memory restoration method according to claim 2, characterized in that, The power-on setting includes multiple pieces of power-on data. Performing a number system conversion on the pre-stored power-on setting to generate the backup power-on setting includes: Converting multiple pieces of power-on data into multiple pieces of binary data, where each piece of binary data is a bit; and Using the multiple pieces of binary data as the backup power-on setting.

4. The flash memory restoration method according to claim 1, characterized in that, The flash memory stores a look-up table, and the look-up table includes the correspondence between multiple pieces of power-on data and multiple pieces of binary data. Updating the flash memory according to the backup power-on setting includes: Judging a target binary data existing in the multiple pieces of binary data in the backup power-on setting; Judging a target power-on data corresponding to the target binary data in the multiple pieces of power-on data according to the correspondence; and Using the target power-on data as at least a part of the backup power-on setting.

5. The flash memory restoration method according to claim 1, characterized in that, it further includes a baseboard management controller to execute: Receiving a user setting; and Applying the user setting to the static random access memory and the flash memory.

6. The flash memory restoration method according to claim 1, characterized in that, it further includes a baseboard management controller to execute: Detecting the power level of the battery supplying power to the static random access memory; and When the power level of the battery is lower than a preset power level, outputting a prompt message.

7. A flash memory restoration system, characterized in that, it includes: A flash memory for storing a pre-stored power-on setting; A battery; and A baseboard management controller, including: A static random access memory connected to the battery for storing a backup power-on setting of the flash memory; and A computing element connected to the flash memory and the static random access memory. The computing element is used to, when powering on and the pre-stored power-on setting cannot be read from the flash memory, read the backup power-on setting from the static random access memory, update the flash memory according to the backup power-on setting, and read the updated flash memory to execute the power-on procedure.

8. The flash memory restoration system according to claim 7, characterized in that, The arithmetic element is also used to perform a base conversion on the pre-stored boot settings to generate the backup boot settings, and store the backup boot settings in the static random access memory.

9. The flash memory restoration system according to claim 8, wherein, the boot settings include multiple pieces of boot data, the arithmetic element converts the multiple pieces of boot data into multiple pieces of binary data, and uses the multiple pieces of binary data as the backup boot settings, wherein each piece of binary data is a bit.

10. The flash memory restoration system according to claim 7, wherein, it further includes another arithmetic element connected to the flash memory and the static random access memory, and the another arithmetic element is used to perform a base conversion on the pre-stored boot settings to generate the backup boot settings, and store the backup boot settings in the static random access memory.

11. The flash memory restoration system according to claim 10, wherein, the boot settings include multiple pieces of boot data, the another arithmetic element converts the multiple pieces of boot data into multiple pieces of binary data, and uses the multiple pieces of binary data as the backup boot settings, wherein each piece of binary data is a bit.

12. The flash memory restoration system according to claim 7, wherein, the flash memory stores a look-up table, the look-up table includes the correspondence between multiple pieces of boot data and multiple pieces of binary data, the arithmetic element determines a target binary data existing in the backup boot settings among the multiple pieces of binary data, determines a target boot data corresponding to the target binary data among the multiple pieces of boot data according to the correspondence, and uses the target boot data as at least a part of the backup boot settings.

13. The flash memory restoration system according to claim 7, wherein, the arithmetic element is also used to receive a user setting, and apply the user setting to the static random access memory and the flash memory.

14. The flash memory restoration system according to claim 7, wherein, the arithmetic element is also used to detect the power of the battery supplying power to the static random access memory, and output a prompt message when the power of the battery is lower than a preset power.

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