TGV / TSV low parasitic inductance and capacitance structure and manufacturing method thereof

Abstract

The invention discloses a TGV / TSV low parasitic inductance and capacitance structure and a manufacturing method thereof, and belongs to the technical field of TGV / TSV. Through the innovative structural design and manufacturing method, the parasitic inductance and capacitance of the TGV and the TSV are effectively reduced, the signal transmission quality and efficiency are improved, and the requirements of high-speed and high-performance chips for the interconnection technology are met.

Description

Technical Field

[0001] The present invention relates to the technical field of TGV / TSV, and particularly relates to a TGV / TSV low parasitic inductance and capacitance structure and a manufacturing method thereof. Background Art

[0002] With the continuous progress and innovation of integrated circuit technology, the integration density of chips has reached an unprecedented level. This high integration density not only means that more transistors and functional modules are encapsulated in a limited chip space, but also brings higher requirements for chip interconnection technology. Interconnection technology, as the bridge connecting the inside of the chip and between chips, its performance is directly related to the operating efficiency and stability of the entire system.

[0003] Among many interconnection technologies, TSV (Through-Silicon Via) and TGV (Through-Glass Via) technologies have attracted much attention due to their unique advantages. These two technologies achieve vertical interconnection between chips by drilling holes in silicon or glass substrates and filling them with conductive materials, greatly shortening the length of the interconnection lines and reducing the signal transmission delay. However, with the increase in frequency and the acceleration of transmission speed, the influence of the parasitic inductance (L) and capacitance (C) of TSV / TGV on signal integrity becomes more and more significant.

[0004] The parasitic inductance mainly comes from the geometric shape of the interconnection line and the magnetic permeability of the conductive material, while the parasitic capacitance is related to the dielectric material between the interconnection lines and its dielectric constant. These parasitic parameters will introduce additional impedance during high-speed signal transmission, resulting in problems such as signal delay, reflection, and crosstalk. Signal delay will reduce the response speed of the system, reflection will cause signal distortion and energy loss, and crosstalk will cause interference between adjacent signal lines, further deteriorating the signal quality.

[0005] The existence of these problems seriously affects the performance of the chip and the operating efficiency of the overall system. For example, in the fields of high-speed data communication, high-performance computing, and advanced packaging, the deterioration of signal integrity may lead to data transmission errors, a decrease in computing accuracy, and a reduction in system stability. Therefore, how to effectively control and manage the parasitic inductance and capacitance of TSV / TGV has become an important challenge in current integrated circuit design. Summary of the Invention

[0006] The technical problem to be solved by the present invention is: to overcome the deficiencies of the prior art, and provide a TGV / TSV low parasitic inductance and capacitance structure and a manufacturing method thereof. Through innovative structural design and manufacturing methods, the parasitic inductance and capacitance of TGV and TSV are effectively reduced, the quality and efficiency of signal transmission are improved, and the requirements of high-speed and high-performance chips for interconnection technology are met.

[0007] The technical solution of the present invention is as follows:

[0008] On the one hand, the present invention provides a manufacturing method for a TGV / TSV low parasitic inductance and capacitance structure, comprising the following steps:

[0009] S1 Coating a composite material layer: A mixture of nickel-zinc ferrite ceramic particles and polyimide is spin-coated on the surface of a substrate and cured to form a composite material layer; wherein, the nickel-zinc ferrite ceramic particles have high magnetic permeability characteristics, which can effectively inhibit the diffusion of magnetic fields, thereby reducing parasitic inductance; while polyimide has a low dielectric constant, which can reduce parasitic capacitance;

[0010] S2 Forming TGV or TSV: Lithography technology is used to define the position and size of TGV / TSV on the substrate, and the required channels are formed on the substrate in step S1 through a deep reactive ion etching process (DRIE);

[0011] S3 Depositing an insulating layer: The substrate in step S2 is placed in a chemical vapor deposition device, and a precursor gas of a fluoride glass material is introduced. The precursor gas includes ammonium hexafluorozirconate, barium trifluoroacetate, and lanthanum trifluoroacetate vapors. Under the conditions of 300 - 350 °C, 10 - 20 Pa, and 100 - 150 W, a fluoride glass material insulating layer is deposited on the inner wall of the TGV or TSV; the precursor gas undergoes a series of physical and chemical processes such as decomposition, reaction, and deposition under the conditions of temperature, pressure, and radio frequency power provided by the chemical vapor deposition (CVD) device. Gas molecules are activated, and active atoms or groups are decomposed. These active species adsorb, react, and gradually deposit on the substrate surface to form a continuous fluoride glass thin film. Its low dielectric constant characteristics can effectively reduce parasitic capacitance, and its good insulation performance can prevent leakage and ensure the stability of signal transmission;

[0012] S4 Filling a metal alloy: A titanium layer is deposited on the surface of the substrate in step S3, and then the substrate is placed in an electroplating solution. The electroplating solution is a mixed solution of copper sulfate, silver sulfate, and manganese sulfate. Under the conditions of a current density of 1 - 2 A / dm 2 ² and a voltage of 1 - 2 V, the copper-silver-manganese metal alloy gradually fills the channels until the entire channels are filled. This metal alloy can further reduce signal loss and parasitic parameters caused by resistance while ensuring good electrical conductivity; finally, the substrate is cleaned and polished to remove the excess metal and composite material on the surface, obtaining a TGV / TSV low parasitic inductance and capacitance structure.

[0013] Preferably, in step S1, the preparation method of nickel-zinc ferrite ceramic particles is as follows: dissolve nickel salt, zinc salt, and iron salt in deionized water, add the precipitant ammonia water, react at 70-80 °C for 2-3 h to form hydroxide precipitates, then after filtration, washing, and drying, calcine at 800-900 °C for 2-3 h to obtain nickel-zinc ferrite ceramic particles NiZnFe 2 O 4 .

[0014] Preferably, the nickel salt is nickel sulfate (NiSO 4 ), nickel nitrate (Ni(NO 3 ), 2 ) or nickel chloride (NiCl 2 ); the zinc salt is zinc nitrate (Zn(NO 3 ), 2 ) zinc sulfate (ZnSO 4 ) or zinc chloride (ZnCl 2 ); the iron salt is iron nitrate (Fe(NO 3 ), 3 ) iron sulfate (Fe 2 (SO 4 ), 3 ) or iron chloride (FeCl 3 ); the addition amounts of nickel salt, zinc salt, and iron salt are calculated according to the chemical formula of NiZnFe 2 O 4 ; ammonia water is used as the precipitant, and its relationship with the addition amounts of nickel salt, zinc salt, and iron salt is mainly calculated based on the stoichiometric ratio of the chemical reaction: taking NiSO 4 , Zn(NO 3 ), 2 , Fe(NO 3 ) 3 as an example, the reaction formula for its reaction with ammonia water to form hydroxide precipitates is as follows:

[0015] NiSO 4 + 2NH 3 ·H 2 O = Ni(OH) 2 ↓ + (NH 4 ) 2 SO 4

[0016] Zn(NO 3 ) + 2NH 3 ·H 2 O = Zn(OH) 2 ↓ + 2NH 4 NO 3

[0017] Fe(NO 3 )3 +3NH 3 ·H 2 O=Fe(OH) 3 ↓+3NH 4 NO 3

[0018] From the reaction equation, theoretically, when Ni(OH) 2 is formed, the molar ratio of NiSO 4 to ammonia water is 1:2; when Zn(OH) 2 is formed, the molar ratio of Zn(NO 3 ) 2 to ammonia water is 1:2; when Fe(OH) 3 is formed, the molar ratio of Fe(NO 3 ) 3 to ammonia water is 1:3; however, in actual operation, due to the complexity of the reaction system and to ensure that metal ions are precipitated as completely as possible, ammonia water is usually in excess; generally, when nickel salt, zinc salt, and iron salt are prepared according to the stoichiometric ratio of NiZnFe 2 O 4 (prepared by mixing salt solutions according to the molar ratio of nickel, zinc, and iron of 1:1:2), ammonia water is slowly added dropwise with stirring, and the addition amount of ammonia water is controlled by monitoring the pH value of the solution. Usually, when the pH value of the solution reaches 8-9, the metal ions are basically completely precipitated, and the amount of ammonia water consumed at this time will exceed the theoretically calculated amount (usually 1.2-1.5 times the theoretical amount to ensure complete precipitation of metal ions); the particle size of the NiZnFe ferrite ceramic particles is 50-100 nm.

[0019] Preferably, in step S1, the preparation method of polyimide is as follows: Pyromellitic dianhydride (PMDA) and diamine (ODA) are dissolved in NMP according to a molar ratio of (0.95-1.05):1, and stirred and reacted at room temperature for 4-6 h to obtain a polyamic acid (PAA) solution, and then cured at 150-250 °C for 2-3 h to obtain polyimide.

[0020] Preferably, in step S1, the mass ratio of NiZnFe ferrite ceramic particles to polyimide is (2-6):(4-8); the rotation speed of the spin coater is 3000-4000 r / min; the curing temperature is 200-250 °C, and the curing time is 1-2 h; the thickness of the composite material layer is 2-5 μm.

[0021] Preferably, in step S2, the diameter of the pore is 5-10 μm, and the depth is 50-100 μm.

[0022] Preferably, in step S3, the mass ratio of ammonium hexafluorozirconate, barium trifluoroacetate, and lanthanum trifluoroacetate vapors is (0.8 - 1.2):(0.6 - 1):(1.2 - 1.8); the thickness of the insulating layer is 50 - 100 nm.

[0023] Preferably, in step S4, in the metal alloy, the copper content is 80 - 90 wt.%, the silver content is 5 - 15 wt.%, and the manganese content is 3 - 8 wt.%; the method for preparing the metal alloy is: putting copper, silver, and manganese raw materials into a vacuum induction melting furnace, melting at 1500 - 1600 °C for 1 - 2 h, and then casting into a mold to obtain the metal alloy.

[0024] Preferably, in step S4, the thickness of the titanium layer is 30 - 80 nm; the concentration of copper sulfate solution in the electroplating solution is 150 - 250 g / L, the concentration of silver sulfate solution is 5 - 15 g / L, and the concentration of manganese sulfate solution is 20 - 40 g / L.

[0025] On the other hand, the present invention also provides a TGV / TSV low parasitic inductance and capacitance structure manufactured by the above manufacturing method.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] Compared with the traditional TGV / TSV structure, the manufacturing method of the present invention can significantly reduce the parasitic inductance and capacitance, effectively improve the signal transmission speed and stability, reduce the signal transmission delay and signal integrity problems, reduce the power consumption, and provide strong technical support for the development of high-speed and high-performance chips. Detailed Embodiments

[0028] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention.

[0029] Embodiment 1

[0030] The manufacturing method of the TSV low parasitic inductance and capacitance structure in this embodiment includes the following steps:

[0031] S1 Coating the composite material layer

[0032] (1) Preparing nickel-zinc ferrite ceramic particles by chemical coprecipitation method: putting NiSO 4 , Zn(NO 3 ) 2 , Fe(NO 3 ) 3Dissolve in deionized water according to the molar ratio of 1:1:2, add ammonia water which is 1.3 times the theoretical amount, react at 75 °C for 2.5 h to form hydroxide precipitate. After filtration, washing and drying, calcine at 850 °C for 2.5 h to obtain nickel-zinc ferrite ceramic particles NiZnFe 2 O 4 ;

[0033] (2) Prepare polyimide: Dissolve pyromellitic dianhydride (PMDA) and diamine (ODA) in NMP according to the molar ratio of 1:1, stir and react at room temperature for 5 h to obtain polyamic acid (PAA) solution; then through thermal imidization method, cure at 200 °C for 2.5 h to convert PAA into polyimide (PI);

[0034] (3) Coat the composite material layer: Uniformly drop the mixture of nickel-zinc ferrite ceramic particles and polyimide with a mass ratio of 3:7 on the surface of the substrate, and then spin-coat it with a spin coater at a speed of 3500 r / min to make the mixture evenly cover the surface of the substrate, obtaining a 3-μm-thick composite material layer; put the coated substrate into a high-temperature furnace and carry out curing treatment at 225 °C for 1.5 h to make the composite material layer tightly combined with the substrate;

[0035] S2 Form TSV: Use photolithography technology to define the position and size of TSV on the substrate in step S1, and then form a channel with a diameter of 8 μm and a depth of 80 μm on the substrate through deep reactive ion etching process (DRIE): First, clean the substrate to remove surface impurities; then coat a photoresist on the surface of the substrate, and through photolithography exposure and development processes, form a pattern corresponding to the position and size of TSV on the photoresist; then put the substrate into the DRIE equipment, introduce etching gas O 2 , etch under the conditions of radio frequency power of 120 W, gas pressure of 15 mTorr and temperature of 20 °C; finally remove the photoresist;

[0036] S3 Deposit the insulating layer: Put the substrate in step S2 into a chemical vapor deposition equipment, introduce precursor gases, and the precursor gases include ammonium hexafluorozirconate, barium trifluoroacetate and lanthanum trifluoroacetate vapors with a mass ratio of 1:0.8:1.5. Deposit a fluoride glass material insulating layer with a thickness of 80 nm on the inner wall of TSV under the conditions of 320 °C, 15 Pa and 120 W;

[0037] S4 Fill the metal alloy

[0038] (1) Prepare the metal alloy by vacuum melting method: Put raw materials of 85 wt.% copper, 10 wt.% silver and 5 wt.% manganese into a vacuum induction melting furnace, melt at 1550 °C for 1.5 h, and then cast into a mold to obtain the metal alloy;

[0039] (2) Filling metal alloy: Deposit a titanium layer with a thickness of 50 nm on the substrate surface in step S3, then place the substrate in an electroplating solution. The electroplating solution is a mixed solution of 200 g / L copper sulfate solution, 10 g / L silver sulfate solution, and 30 g / L manganese sulfate solution. Under the conditions of a current density of 1.5 A / dm 2 ² and a voltage of 1.5 V, gradually fill the copper-silver-manganese metal alloy in the channels until the entire channels are filled; finally, clean and polish the substrate to remove the excess metal and composite materials on the surface, obtaining a TSV low parasitic inductance and capacitance structure

[0040] Example 2

[0041] The manufacturing method of the TGV low parasitic inductance and capacitance structure in this example includes the following steps:

[0042] S1 Coating a composite material layer

[0043] (1) Prepare nickel-zinc ferrite ceramic particles by chemical coprecipitation method: Dissolve NiSO 4 , Zn(NO 3 ) 2 , Fe(NO 3 ) 3 in deionized water according to the molar ratio of 1:1:2, add ammonia water 1.2 times the theoretical amount, react at 70 °C for 2 h to form hydroxide precipitates, and then after filtration, washing, and drying, calcine at 800 °C for 2 h to obtain nickel-zinc ferrite ceramic particles NiZnFe 2 O 4 ₄;

[0044] (2) Prepare polyimide: Dissolve pyromellitic dianhydride (PMDA) and diamine (ODA) in NMP according to the molar ratio of 1:1, stir and react at room temperature for 4 h to obtain a polyamic acid (PAA) solution; then through thermal imidization method, cure at 150 °C for 2 h to convert PAA into polyimide (PI);

[0045] (3) Coating a composite material layer: Drop a mixture of nickel-zinc ferrite ceramic particles and polyimide with a mass ratio of 3:7 evenly on the substrate surface, and then spin-coat it with a spin coater at a speed of 3000 r / min to make the mixture evenly cover the substrate surface, obtaining a composite material layer with a thickness of 2 μm; Place the coated substrate in a high-temperature furnace, cure at 200 °C for 1 h to make the composite material layer tightly combined with the substrate;

[0046] S2 Formation of TGV: Use photolithography technology to define the position and size of TGV or TSV on the substrate in step S1, and then form channels with a diameter of 5 μm and a depth of 50 μm on the substrate through deep reactive ion etching (DRIE) process: First, clean the substrate to remove surface impurities; then coat a photoresist on the substrate surface, and through photolithography exposure and development processes, form a pattern corresponding to the position and size of TGV on the photoresist; then place the substrate into the DRIE equipment, introduce etching gas O 2 , and perform etching under the conditions of a radio frequency power of 100 W, a gas pressure of 10 mTorr, and a temperature of 15 °C; finally, remove the photoresist;

[0047] S3 Deposition of insulating layer: Place the substrate in step S2 into a chemical vapor deposition equipment, introduce precursor gases. The precursor gases include ammonium hexafluorozirconate, barium trifluoroacetate, and lanthanum trifluoroacetate vapors with a mass ratio of 1:0.8:1.5. Under the conditions of 300 °C, 10 Pa, and 100 W, deposit a fluoride glass material insulating layer with a thickness of 50 nm on the inner wall of the TGV;

[0048] S4 Filling of metal alloy

[0049] (1) Preparation of metal alloy by vacuum melting method: Put raw materials of 85 wt.% copper, 10 wt.% silver, and 5 wt.% manganese into a vacuum induction melting furnace, melt at 1500 °C for 1 h, and then cast into a mold to obtain the metal alloy;

[0050] (2) Filling of metal alloy: Deposit a titanium layer with a thickness of 30 nm on the surface of the substrate in step S3, and then place the substrate into an electroplating solution. The electroplating solution is a mixed solution of 150 g / L copper sulfate solution, 5 g / L silver sulfate solution, and 20 g / L manganese sulfate solution. Under the conditions of a current density of 1 A / dm 2 , and a voltage of 1 V, gradually fill the copper-silver-manganese metal alloy in the channels until the entire channels are filled; finally, clean and polish the substrate to remove the excess metal and composite materials on the surface, and obtain a TGV structure with low parasitic inductance and capacitance.

[0051] Example 3

[0052] The manufacturing method of the TSV structure with low parasitic inductance and capacitance in this example includes the following steps:

[0053] S1 Coating of composite material layer

[0054] (1) Preparation of nickel-zinc ferrite ceramic particles by chemical co-precipitation method: Mix NiSO 4 , Zn(NO 3 ) 2 , Fe(NO 3 ) 3Dissolve in deionized water in a molar ratio of 1:1:2, add ammonia water 1.4 times the theoretical amount, react at 80 °C for 3 h to form a hydroxide precipitate, then filter, wash, dry, and calcine at 900 °C for 3 h to obtain nickel-zinc ferrite ceramic particles NiZnFe with a particle size of 100 nm 2 O 4 ;

[0055] (2) Prepare polyimide: Dissolve pyromellitic dianhydride (PMDA) and diamine (ODA) in NMP in a molar ratio of 1:1, stir and react at room temperature for 6 h to obtain a polyamic acid (PAA) solution; then, through thermal imidization, cure at 250 °C for 3 h to convert PAA into polyimide (PI);

[0056] (3) Coat the composite material layer: Uniformly drop a mixture of nickel-zinc ferrite ceramic particles and polyimide with a mass ratio of 3:7 on the surface of the substrate, and then spin-coat it with a spin coater at a speed of 4000 r / min to evenly cover the mixture on the surface of the substrate to obtain a 5-μm composite material layer; place the coated substrate in a high-temperature furnace and cure it at 250 °C for 2 h to tightly bond the composite material layer to the substrate;

[0057] S2 Form TSV: Use photolithography technology to define the position and size of the TSV on the substrate in step S1, and then form a channel with a diameter of 10 μm and a depth of 100 μm on the substrate through deep reactive ion etching (DRIE) process: First, clean the substrate to remove surface impurities; then coat a photoresist on the surface of the substrate, and through photolithography exposure and development processes, form a pattern corresponding to the position and size of the TSV on the photoresist; then place the substrate in the DRIE equipment, introduce etching gas O 2 , and etch under the conditions of a radio frequency power of 150 W, a gas pressure of 20 mTorr, and a temperature of 25 °C; finally, remove the photoresist;

[0058] S3 Deposit the insulating layer: Place the substrate in step S2 into a chemical vapor deposition equipment, introduce precursor gases, and the precursor gases include ammonium hexafluorozirconate, barium trifluoroacetate, and lanthanum trifluoroacetate vapors with a mass ratio of 1:0.8:1.5. Deposit a fluoride glass material insulating layer with a thickness of 100 nm on the inner wall of the TSV under the conditions of 350 °C, 20 Pa, and 150 W;

[0059] S4 Fill the metal alloy

[0060] (1) Prepare the metal alloy by vacuum melting method: Put raw materials of 85 wt.% copper, 10 wt.% silver, and 5 wt.% manganese into a vacuum induction melting furnace, melt at 1600 °C for 2 h, and then cast into a mold to obtain the metal alloy;

[0061] (2) Filling metal alloy: Deposit a titanium layer with a thickness of 80 nm on the substrate surface in step S3, and then place the substrate in an electroplating solution. The electroplating solution is a mixed solution of 250 g / L copper sulfate solution, 15 g / L silver sulfate solution, and 40 g / L manganese sulfate solution. Under the conditions of a current density of 2 A / dm 2 ² and a voltage of 2 V, gradually fill the copper-silver-manganese metal alloy in the pores until the entire pores are filled; finally, clean and polish the substrate to remove the excess metal and composite materials on the surface, and obtain a TSV low parasitic inductance and capacitance structure.

[0062] Example 4

[0063] The manufacturing method of the TGV low parasitic inductance and capacitance structure in this example includes the following steps:

[0064] S1 Coating composite material layer

[0065] (1) Prepare nickel-zinc ferrite ceramic particles by chemical coprecipitation method: Dissolve NiSO 4 , Zn(NO 3 ) 2 , Fe(NO 3 ) 3 in deionized water according to the molar ratio of 1:1:2, add ammonia water 1.5 times the theoretical amount, react at 78 °C for 2.8 h to form hydroxide precipitates, and then after filtration, washing, and drying, calcine at 880 °C for 2.8 h to obtain nickel-zinc ferrite ceramic particles NiZnFe 2 O 4 with a particle size of 90 nm;

[0066] (2) Prepare polyimide: Dissolve pyromellitic dianhydride (PMDA) and diamine (ODA) in NMP according to the molar ratio of 1:1, stir and react at room temperature for 5.5 h to obtain a polyamic acid (PAA) solution; then through thermal imidization method, cure at 230 °C for 2.8 h to convert PAA into polyimide (PI);

[0067] (3) Coating composite material layer: Drop a mixture of nickel-zinc ferrite ceramic particles and polyimide with a mass ratio of 3:7 evenly on the substrate surface, and then spin-coat it with a spin coater at a speed of 3800 r / min to make the mixture evenly cover the substrate surface, obtaining a composite material layer with a thickness of 4 μm; Place the coated substrate in a high-temperature furnace, and carry out curing treatment at 240 °C for 1.8 h to make the composite material layer tightly combined with the substrate;

[0068] S2 Formation of TGV: Use photolithography technology to define the position and size of TGV or TSV on the substrate in step S1, and then form channels with a diameter of 7 μm and a depth of 70 μm on the substrate through deep reactive ion etching (DRIE) process: First, clean the substrate to remove surface impurities; then coat a photoresist on the substrate surface, and through photolithography exposure and development processes, form a pattern corresponding to the position and size of TSV on the photoresist; then place the substrate into the DRIE equipment, introduce etching gas O 2 , and perform etching under the conditions of a radio frequency power of 130 W, a gas pressure of 17 mTorr, and a temperature of 22 °C; finally, remove the photoresist;

[0069] S3 Deposition of insulating layer: Place the substrate in step S2 into a chemical vapor deposition equipment, introduce precursor gases, and the precursor gases include ammonium hexafluorozirconate, barium trifluoroacetate, and lanthanum trifluoroacetate vapors with a mass ratio of 1.2:1:1.8. Under the conditions of 330 °C, 17 Pa, and 130 W, deposit a fluoride glass material insulating layer with a thickness of 90 nm on the inner wall of the TGV;

[0070] S4 Filling of metal alloy

[0071] (1) Preparation of metal alloy by vacuum melting method: Put raw materials of 85 wt.% copper, 10 wt.% silver, and 5 wt.% manganese into a vacuum induction melting furnace, melt at 1580 °C for 1.8 h, and then cast into a mold to obtain the metal alloy;

[0072] (2) Filling of metal alloy: Deposit a titanium layer with a thickness of 60 nm on the surface of the substrate in step S3, and then place the substrate into an electroplating solution, which is a mixed solution of 220 g / L copper sulfate solution, 12 g / L silver sulfate solution, and 35 g / L manganese sulfate solution. Under the conditions of a current density of 1.8 A / dm 2 , and a voltage of 1.8 V, gradually fill the copper-silver-manganese metal alloy in the channels until the entire channels are filled; finally, clean and polish the substrate to remove the excess metal and composite materials on the surface, and obtain a TGV low parasitic inductance and capacitance structure.

[0073] Example 5

[0074] The manufacturing method of the TSV low parasitic inductance and capacitance structure in this example includes the following steps:

[0075] S1 Coating of composite material layer

[0076] (1) Preparation of nickel-zinc ferrite ceramic particles by chemical co-precipitation method: Mix NiSO 4 , Zn(NO 3 ) 2 , Fe(NO 3 )3 Dissolve them in deionized water according to the molar ratio of 1:1:2, add ammonia water which is 1.35 times the theoretical amount, react at 72 °C for 2.2 h to form hydroxide precipitation, then after filtration, washing and drying, calcine at 820 °C for 2.2 h to obtain nickel-zinc ferrite ceramic particles NiZnFe 2 O 4 ;

[0077] (2) Prepare polyimide: Dissolve pyromellitic dianhydride (PMDA) and diamine (ODA) in NMP according to the molar ratio of 1:1, stir and react at room temperature for 4.5 h to obtain a polyamic acid (PAA) solution; then through thermal imidization method, cure at 180 °C for 2.2 h to convert PAA into polyimide (PI);

[0078] (3) Coat the composite material layer: Drop evenly a mixture composed of nickel-zinc ferrite ceramic particles and polyimide with a mass ratio of 3:7 on the surface of the substrate, and then spin-coat it with a spin coater at a speed of 3200 r / min to make the mixture evenly cover the surface of the substrate, obtaining a composite material layer with a thickness of 2.5 μm; Put the coated substrate into a high-temperature furnace, carry out curing treatment at 210 °C for 1.2 h to make the composite material layer tightly combine with the substrate;

[0079] S2 Form TSV: Use photolithography technology to define the position and size of TGV or TSV on the substrate in step S1, and then form a channel with a diameter of 6 μm and a depth of 60 μm on the substrate through deep reactive ion etching process (DRIE): First, clean the substrate to remove surface impurities; then coat a photoresist on the surface of the substrate, and through photolithography exposure and development processes, form a pattern corresponding to the position and size of TSV on the photoresist; Next, put the substrate into the DRIE equipment, introduce etching gas O 2 , and carry out etching under the conditions of a radio frequency power of 110 W, a gas pressure of 13 mTorr, and a temperature of 18 °C; Finally, remove the photoresist;

[0080] S3 Deposit the insulating layer: Put the substrate in step S2 into a chemical vapor deposition equipment, introduce precursor gases, and the precursor gases include ammonium hexafluorozirconate, barium trifluoroacetate and lanthanum trifluoroacetate vapors with a mass ratio of 0.8:0.6:1.2, and deposit a fluoride glass material insulating layer with a thickness of 60 nm on the inner wall of the TSV under the conditions of 310 °C, 13 Pa, and 110 W;

[0081] S4 Fill the metal alloy

[0082] (1) Preparation of metal alloy by vacuum melting method: Put raw materials of 85 wt.% copper, 10 wt.% silver, and 5 wt.% manganese into a vacuum induction melting furnace, melt at 1520 °C for 1.2 h, and then cast into a mold to obtain the metal alloy;

[0083] (2) Filling the metal alloy: Deposit a 40-nm-thick metal seed layer of titanium on the surface of the substrate in step S3, and then put the substrate into the electroplating solution. The electroplating solution is a mixed solution of 180 g / L copper sulfate solution, 8 g / L silver sulfate solution, and 25 g / L manganese sulfate solution. Under the conditions of a current density of 1.2 A / dm 2 and a voltage of 1.2 V, gradually fill the copper-silver-manganese metal alloy in the pores until the entire pores are filled; Finally, clean and polish the substrate to remove the excess metal and composite materials on the surface to obtain the TSV low parasitic inductance and capacitance structure.

[0084] Comparative Example 1

[0085] The difference from Example 1 is that step S1 is not carried out; in step S3, silicon dioxide (SiO 2 ) is used instead of the fluoride glass material as the insulating layer; in step S4, pure copper is used instead of the metal alloy.

[0086] Comparative Example 2

[0087] The difference from Example 1 is that step S1 is not carried out.

[0088] Comparative Example 3

[0089] The difference from Example 1 is that in step S3, silicon dioxide (SiO 2 ) is used instead of the fluoride glass material as the insulating layer.

[0090] Comparative Example 4

[0091] The difference from Example 1 is that in step S4, pure copper is used instead of the metal alloy.

[0092] Comparative Example 5

[0093] The difference from Example 1 is that in step S1, nickel-zinc ferrite ceramic particles are not added to the composite material layer.

[0094] Comparative Example 6

[0095] The difference from Example 1 is that in step S1, polyimide is not added to the composite material layer.

[0096] Comparative Example 7

[0097] The difference from Example 1 is that in step S3, the precursor gas includes barium trifluoroacetate and lanthanum trifluoroacetate vapors with a mass ratio of 0.8:1.5.

[0098] Comparative Example 8

[0099] The difference from Example 1 is that in step S3, the precursor gas includes ammonium hexafluorozirconate and lanthanum trifluoroacetate vapors with a ratio of 1:1.5.

[0100] Comparative Example 9

[0101] The difference from Example 1 is that in step S3, the precursor gas includes ammonium hexafluorozirconate and barium trifluoroacetate vapors with a ratio of 1:0.8.

[0102] Comparative Example 10

[0103] The difference from Example 1 is that the metal alloy includes 85 wt.% copper and 15 wt.% manganese.

[0104] Comparative Example 11

[0105] The difference from Example 1 is that the metal alloy includes 85 wt.% copper and 15 wt.% silver.

[0106] The parasitic inductance and capacitance of the TGV / TSV low parasitic inductance and capacitance structures of Examples 1 - 5 and Comparative Examples 1 - 11 were tested using a high-precision impedance analyzer in the frequency range of 1 - 10 GHz, and the test results are shown in Table 1:

[0107] Table 1 Test Results of Parasitic Inductance and Capacitance of Examples 1 - 5 and Comparative Examples 1 - 11

[0108]

[0109]

[0110] Comparing Example 1 with Comparative Example 1, since Example 1 uses a special composite material layer, fluoride glass material as the insulating layer, and a metal alloy with low resistance and low temperature coefficient as the filling material, the parasitic inductance of the prepared TGV / TSV low parasitic inductance and capacitance structure is reduced by 71.4%, and the parasitic capacitance is reduced by 75%, proving the effectiveness of the structure and materials of Example 1.

[0111] Comparing Example 1 with Comparative Examples 2 - 4, in Comparative Example 2, no composite material layer was formed, and the parasitic inductance and capacitance increased significantly, indicating that the composite material layer is crucial for suppressing parasitic parameters. In Comparative Example 3, the parasitic capacitance increased after replacing the insulating layer material, showing the obvious advantage of the fluoride glass material in reducing the parasitic capacitance. In Comparative Example 4, using pure copper instead of the metal alloy led to an increase in parasitic parameters, demonstrating the superiority of the copper - silver - manganese alloy in reducing signal loss and parasitic parameters.

[0112] Comparing Example 1 with Comparative Examples 5-6 shows that the synergistic effect of nickel-zinc ferrite ceramic particles and polyimide is crucial for reducing parasitic inductance and capacitance, and using only one of the materials alone cannot achieve the best results. In the composite material layer of Comparative Example 5, only polyimide is used, and the parasitic inductance and capacitance increase by 150% and 140% respectively compared with Example 1; in the composite material layer of Comparative Example 6, only nickel-zinc ferrite ceramic particles are used, and the parasitic inductance and capacitance increase by 200% and 260% respectively compared with Example 1.

[0113] Comparing Example 1 with Comparative Examples 7-9, the change in the precursor gas composition in Comparative Examples 7-9 leads to changes in the performance of the insulating layer and fluctuations in parasitic inductance and capacitance, indicating that the precursor gas composition in Example 1 is of great significance for forming an insulating layer with good performance and reducing parasitic parameters. Comparing Example 1 with Comparative Examples 10-11, the change in the metal alloy composition in Comparative Examples 10-11 causes an increase in parasitic inductance and capacitance, proving the rationality of the copper-silver-manganese alloy composition ratio in Example 1 in optimizing the structural performance.

[0114] Compared with each example, different material parameters and process parameters within the scope defined in the present invention have little effect on parasitic inductance and capacitance, indicating that the method of the present invention has a certain degree of flexibility and stability. In summary, compared with the traditional TGV / TSV structure, the manufacturing method of the present invention can significantly reduce parasitic inductance and capacitance, effectively improve the speed and stability of signal transmission, reduce signal transmission delay and signal integrity problems, reduce power consumption, and provide strong technical support for the development of high-speed and high-performance chips.

Claims

1. A method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure, characterized in that: The following steps are involved: S1 coating a composite material layer: spin coating a mixture of nickel-zinc ferrite ceramic particles and polyimide on the surface of the substrate, and forming a composite material layer after curing; S2 forming TGV or TSV: forming a desired channel on the substrate in step S1 by a deep reactive ion etching process; S3: depositing an insulating layer: placing the substrate of step S2 into a chemical vapor deposition device, introducing a precursor gas, wherein the precursor gas includes ammonium hexafluorozirconate, barium trifluoroacetate and lanthanum trifluoroacetate vapor, and depositing an insulating layer on the inner wall of the TGV or TSV under the conditions of 300-350° C., 10-20 Pa, and 100-150 W; S4: deposit a titanium layer on the surface of the substrate in step S3, and then place the substrate in an electroplating solution, the electroplating solution is a mixed solution of copper sulfate, silver sulfate and manganese sulfate, and the current density is 1-2A / dm 2 Under the condition of 1-2V voltage, the copper-silver-manganese metal alloy is gradually filled in the channel until the entire channel is filled; finally, the substrate is cleaned and polished to obtain a TGV / TSV low parasitic inductance and capacitance structure.

2. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S1, the preparation method of nickel-zinc ferrite ceramic particles is as follows: dissolve nickel salt, zinc salt and iron salt in deionized water, add precipitant ammonia water, react at 70-80°C for 2-3h to generate hydroxide precipitate, and then filter, wash and dry, and calcine at 800-900°C for 2-3h to obtain nickel-zinc ferrite ceramic particles NiZnFe2O4.

3. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 2, wherein: The nickel salt is nickel sulfate, nickel nitrate or nickel chloride; the zinc salt is zinc nitrate, zinc sulfate or zinc chloride; the iron salt is iron nitrate, iron sulfate or iron chloride; and the particle size of the nickel-zinc ferrite ceramic particles is 50-100 nm.

4. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S1, the preparation method of polyimide is: dissolving pyromellitic dianhydride and diamine in NMP at a molar ratio of (0.95-1.05):1, stirring and reacting at room temperature for 4-6 hours to obtain a polyamic acid solution, and then curing at 150-250° C. for 2-3 hours to obtain polyimide.

5. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S1, the mass ratio of nickel-zinc ferrite ceramic particles to polyimide is (2-6):(4-8); the rotation speed of the spin coater is 3000-4000 r / min; the curing temperature is 200-250°C, and the curing time is 1-2h; the thickness of the composite material layer is 2-5μm.

6. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S2, the diameter of the pore is 5-10 μm and the depth is 50-100 μm.

7. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S3, the mass ratio of ammonium hexafluorozirconate, barium trifluoroacetate and lanthanum trifluoroacetate vapor is (0.8-1.2):(0.6-1):(1.2-1.8); and the thickness of the insulating layer is 50-100 nm.

8. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S4, the metal alloy has a copper content of 80-90wt.%, a silver content of 5-15wt.%, and a manganese content of 3-8wt.%; the preparation method of the metal alloy is: putting copper, silver, and manganese raw materials into a vacuum induction melting furnace, smelting at 1500-1600°C for 1-2h, and then casting to obtain the metal alloy.

9. The method for manufacturing a TGV / TSV low parasitic inductance and capacitance structure according to claim 1, wherein: In step S4, the thickness of the titanium layer is 30-80 nm; the concentration of the copper sulfate solution in the electroplating solution is 150-250 g / L, the concentration of the silver sulfate solution is 5-15 g / L, and the concentration of the manganese sulfate solution is 20-40 g / L.

10. A TGV / TSV low parasitic inductance and capacitance structure manufactured by the manufacturing method according to any one of claims 1 to 9.

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