Polarization code decoding method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a polar code decoding method and device, electronic equipment and a storage medium, and the method comprises the steps: determining the positions of special nodes in a binary tree graph corresponding to a to-be-decoded polar code based on an information bit position parameter and a code length parameter of the to-be-decoded polar code, and determining the type of each special node from a pre-stored first mapping relation; inputting a channel soft bit sequence of a polarization code to be decoded into a root node of the binary tree graph, and performing recursive decoding processing from the root node according to a sequence of accessing the root node of the binary tree graph, traversing the left sub-tree and traversing the right sub-tree to obtain a codeword sequence of the root node; and in the recursive decoding processing process, when the currently processed target node is a special node, determining a decoding strategy of the target node from a pre-stored second mapping relationship according to the type of the target node, decoding the target node based on the decoding strategy, and giving up decoding processing on the child node of the target node.

Description

Technical Field

[0001] The present invention relates to the field of decoding technologies, and in particular, to a polar code decoding method, apparatus, electronic device, and storage medium. Background Art

[0002] A polar code is a forward error correction coding method. The core of its construction is to perform channel polarization processing. On the encoding side, a method is used to make each sub-channel exhibit different reliabilities. When the code length continuously increases, some channels will tend to perfect channels with a capacity close to 1 (error-free), and the other part of the channels will tend to pure noise channels with a capacity close to 0. Selecting to directly transmit information on channels with a capacity close to 1 to approach the channel capacity is the only method that can be strictly proven to reach the Shannon limit. Therefore, the polar code encoding technology has been specified by 3GPP as the signal encoding technology for 5G physical control channels and broadcast channels.

[0003] For the decoding of polar codes, currently, the SCL (Successive Cancellation List) algorithm is generally used to implement. The SCL algorithm is an improvement on the traditional serial decoding algorithm, which can maintain multiple decoding links simultaneously and improve the error correction performance of decoding. However, it still adopts the idea of serial decoding. Its decoding process can be represented by a complete binary tree diagram. Starting from the root node, in the order from top to bottom, from left to right, all leaf nodes are completely traversed. Therefore, the decoding delay of the SCL algorithm is very large, and the computational complexity is relatively high. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a polar code decoding method, apparatus, electronic device, and storage medium.

[0005] To achieve the above purpose, the technical solutions adopted in the embodiments of the present invention are as follows:

[0006] In the first aspect of the embodiments of the present invention, a polar code decoding method is provided, including:

[0007] Based on the information bit position parameter and code length parameter of the polar code to be decoded, determine the positions of special nodes in the binary tree diagram corresponding to the polar code to be decoded, and determine the type of each special node from the pre-stored first mapping relationship;

[0008] Input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree diagram, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree diagram, traversing the left subtree, and traversing the right subtree to obtain the codeword sequence of the root node;

[0009] Output the information sequence of the polar code to be decoded based on the codeword sequence of the root node;

[0010] Among them, in the process of recursive decoding processing, when the target node being currently processed is a special node, determine the decoding strategy of the target node from the pre-stored second mapping relationship according to the type of the target node, perform decoding on the target node based on the decoding strategy, and abandon the decoding processing of the children nodes of the target node.

[0011] In a second aspect of the embodiments of the present invention, a polar code decoding device is provided, including:

[0012] A determination module, configured to: based on the information bit position parameter and the code length parameter of the polar code to be decoded, determine the positions of special nodes in the binary tree diagram corresponding to the polar code to be decoded, and determine the type of each special node from the pre-stored first mapping relationship;

[0013] A decoding module, configured to: input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree diagram, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree diagram, traversing the left subtree, and traversing the right subtree, so as to obtain the codeword sequence of the root node;

[0014] An output module, configured to: output the information sequence of the polar code to be decoded based on the codeword sequence of the root node;

[0015] Among them, in the process of the decoding module performing recursive decoding processing, when the target node being currently processed is a special node, determine the decoding strategy of the target node from the pre-stored second mapping relationship according to the type of the target node, perform decoding on the target node based on the decoding strategy, and abandon the decoding processing of the children nodes of the target node.

[0016] In a third aspect of the embodiments of the present invention, an electronic device is provided, including a processor and a memory, where the memory stores machine-executable instructions that can be executed by the processor, and the processor can execute the machine-executable instructions to implement the polar code decoding method provided in the first aspect above.

[0017] In a fourth aspect of the embodiments of the present invention, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the polar code decoding method provided in the first aspect above is implemented.

[0018] The polar code decoding method, device, electronic device, and storage medium provided by the embodiments of the present invention establish a first mapping relationship for distinguishing the types of special nodes in the binary tree diagram corresponding to the polar code and a second mapping relationship for distinguishing the decoding strategies of different types of special nodes in advance. During the process of decoding the to-be-decoded polar code, the corresponding special nodes can be directly decoded with the set decoding strategies. Even if the length of the codeword sequence or soft bit sequence input to the special node is very long, it can be ensured that a special node decodes the input data sequence through the corresponding decoding strategy, without the need to distribute the data sequence to multiple different nodes for decoding. This can reduce the number of decoding nodes in the decoding binary tree diagram, shorten the traversal process between nodes, reduce the consumption of hardware resources, and improve the decoding efficiency. Especially for special nodes with longer lengths, their parallel decoding degree is higher and the decoding delay is lower.

[0019] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0021] Figure 1 Shows a structural block diagram of an electronic device provided by an embodiment of the present invention;

[0022] Figure 2 Shows a flowchart of a polar code decoding method provided by an embodiment of the present invention;

[0023] Figure 3 Shows a schematic diagram of the decoding rule between a parent node and its left and right nodes during the process of recursively decoding a polar code using a binary tree diagram;

[0024] Figure 4 Shows a flowchart of the process of decoding a high code rate node by a polar code decoding method provided by an embodiment of the present invention;

[0025] Figure 5 Shows a flowchart of the process of decoding a low code rate node by a polar code decoding method provided by an embodiment of the present invention;

[0026] Figure 6The flowchart shows the process of decoding the Rate0-NodeX node by a polar code decoding method provided by an embodiment of the present invention;

[0027] Figure 7 The flowchart shows the process of decoding the Rep-NodeX node by a polar code decoding method provided by an embodiment of the present invention;

[0028] Figure 8 The functional module diagram of a polar code decoding device provided by an embodiment of the present invention is shown. Detailed implementation manners

[0029] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Usually, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations.

[0030] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0031] It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0032] Please refer to Figure 1 , which is a structural block diagram of an electronic device. The electronic device 100 includes a memory 110, a processor 120, and a communication module 130. The memory 110, the processor 120, and the communication module 130 are electrically connected to each other directly or indirectly to achieve data transmission or interaction. For example, these elements can be electrically connected to each other through one or more communication buses or signal lines.

[0033] Among them, the memory is used to store programs or data. The memory can be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electric Erasable Programmable Read-Only Memory (EEPROM), etc.

[0034] The processor is used to read / write the data or programs stored in the memory and perform corresponding functions.

[0035] The communication module is used to establish a communication connection between the electronic device and other communication terminals through a network, and is used to transmit and receive data through the network.

[0036] It should be understood that Figure 1 The structure shown is only a schematic diagram of the structure of the electronic device, and the electronic device may further include more or fewer components than those shown Figure 1 shown, or have a different configuration from that shown Figure 1 shown. Figure 1 Each component shown can be implemented by hardware, software, or a combination thereof.

[0037] The electronic device can be used to execute the polar code decoding method provided by the embodiments of the present invention to achieve fast decoding of polar codes.

[0038] The following Figure 2 is used to illustrate the polar code decoding method provided by the embodiments of the present invention. Figure 2 is a flowchart of a polar code decoding method provided by the embodiments of the present invention. The polar code decoding method includes:

[0039] In step S201, based on the information bit position parameter and the code length parameter of the polar code to be decoded, determine the positions of the special nodes in the binary tree diagram corresponding to the polar code to be decoded, and determine the type of each special node from the pre-stored first mapping relationship;

[0040] In step S202, input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree diagram, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree diagram, traversing the left subtree, and traversing the right subtree to obtain the codeword sequence of the root node;

[0041] In step S203, an information sequence of the polar code to be translated is output based on the codeword sequence of the root node;

[0042] Among them, in step S202, during the recursive decoding process, when the target node being currently processed is a special node, a decoding strategy for the target node is determined from a pre-stored second mapping relationship according to the type of the target node, and the target node is decoded based on the decoding strategy, and the decoding process for the child nodes of the target node is abandoned. The recursive decoding process can be understood in combination with Figure 3 the related art. Specifically, for each parent node with left and right nodes, first, the soft bit sequence of its left node is calculated through the f operation, that is Figure 3 in the process of (1) below. The calculation formula of the f operation is shown in the following formula 1. In formula 1, i represents the serial number of the i-th variable in the soft bit sequence of the left node, N / 2 represents the length of the soft bit sequence of the left node, represents the i-th variable in the soft bit sequence of the left node, N represents the length of the soft bit sequence of the polar code to be translated input, represents the i-th variable in the soft bit sequence of the polar code to be translated, represents the -th variable in the soft bit sequence of the polar code to be translated, represents based on the variable and performing the f operation to obtain sign() is the sign function, and min() is the minimum value function. After obtaining the soft bit sequence of the left node, if the left node is a special node, the decoding process can be directly performed based on the soft bit sequence of the left node, that is Figure 3 in the process of (2) below. If the left node is not a special node, the soft bit sequence of the left node is calculated through the f operation, and the lower-layer nodes of the left node are traversed until the currently traversed node is a special node. After completing the decoding of the left node, the codeword sequence of the left node can be obtained. Then, the soft bit sequence of the right node is calculated through the g operation, that is Figure 3 in the process of (3) below. The calculation formula of the g operation is shown in the following formula 2. In formula 2, represents the serial number of the i-th variable in the soft bit sequence of the right node, N / 2 represents the length of the soft bit sequence of the right node, represents the i-th variable in the soft bit sequence of the right node, represents the i-th code element in the codeword sequence of the left node, represents based on the code element and the variable and in the soft bit sequence of the polar code to be translated performing the g operation to obtain After obtaining the soft bit sequence of the right node, if the right node is a special node, the decoding process can be directly performed based on the soft bit sequence of the right node, that is Figure 3 In the process (4), if the right node is not a special node, traverse the lower-level nodes of the right node and perform corresponding f operations or g operations based on the attributes of the lower-level nodes (such as the left node or the right node) until the currently traversed node is a special node. After completing the decoding of the right node, the codeword sequence of the right node can be obtained. Then, the codeword sequence of the parent node can be obtained according to the codeword sequences of the left node and the right node. See the following formula 3. In formula 3, represents the i-th symbol in the codeword sequence of the parent node, represents the i-th symbol in the codeword sequence of the left node, represents the i-th symbol in the codeword sequence of the right node, represents the exclusive OR operation. After obtaining the codeword sequence of the parent node, if the parent node is the left node of another node, the right node of the other node can be decoded according to the relevant records above to obtain the corresponding codeword sequence. Similarly, if the parent node is the right node of another node, the codeword sequence of the other node can be obtained according to the relevant records above. Decode recursively in this way to obtain the information sequence of the root node. It can be understood that if the above parent node is the root node, the final information sequence can be obtained according to the codeword sequence of the parent node, that is, select the decoding path with the smallest path metric value as the output of the final information sequence, and the decoding ends.

[0043]

[0044]

[0045]

[0046] Before implementing the decoding of the polar code to be decoded through the polar code decoding method provided by the embodiments of the present invention, to simplify the decoding process of special nodes and improve the decoding efficiency, the embodiments of the present invention first define the types of various special nodes and establish the correspondence between the code pattern structure of special nodes and the node types to obtain the above first mapping relationship. The first mapping relationship is shown in Table 1:

[0047] Table 1 First mapping relationship table

[0048] Node type Node code pattern structure Remarks Rate1 node <![CDATA[A c ={}]]> The length cannot be 2 Spc node <![CDATA[A c ={0}]]> The minimum length is 8 Spc2 node <![CDATA[A c ={0,1}]]> The minimum length is 8 Spc4 node <![CDATA[A c ={0, 1, 2}]]> The minimum length is 8 Rate0 node A＝{} Unrestricted Rep node A = {N - 1} The minimum length is 2 Rep2 node A = {N - 2, N - 1} The minimum length is 2 Rep4 node A = {N - 3, N - 2, N - 1} The minimum length is 4 Rep8 node A = {N - 5, N - 3, N - 2, N - 1} The minimum length is 8 Rate0-NodeX node See the definition The minimum length is 16 Rep-NodeX node See the definition Unrestricted

[0049] In Table 1, A c represents the set of node frozen bit positions. A c ={} indicates that the set of node frozen bit positions is an empty set, that is, there is no node frozen bit. A c= {0} indicates that the position of the node freeze bit is 0; A represents the set of information bit positions of the node, and A = {} indicates that the set of information bit positions is an empty set, that is, there is no information bit; N is the node code length, where A c or A ∈ {0, 1, 2, …, N - 1}; The explanations in the remarks column of the table are to ensure that nodes are not redefined, and each node corresponds to only one type of node. In addition, the relevant definitions of RATE0-NodeX and REP-NodeX in Table 1 and the corresponding node code patterns are as follows:

[0050] Definition of Rate0-NodeX node: Also known as the Rate0 fusion node, for a polar code of length N, N = 2 T ≥ 16, the input codeword sequence is (u 0 , u 1 ,..., u N-1 ). If the positions of (u 0 , u 1 ,..., u N-n-1 ) are all freeze bits, then the node with this codeword sequence as the input at this time is called a Rate0-NodeX node; The remaining sequence (u N-n , u N-n+1 ,..., u N-1 ) constitutes a NodeX node. The NodeX node is a high code rate or low code rate node, that is, it can be any one of the Rate1 node, Spc node, Spc2 node, Spc4 node, Rate0 node, Rep node, Rep2 node, Rep4 node, and Rep8 node in Table 1, and its length n = 2 t , t < T.

[0051] Definition of Rep-NodeX node: Also known as the Rep fusion node, for a polar code of length N, N = 2 T ≥ 1, the input codeword sequence is (u 0 , u 1 ,..., u N-1 ). If the positions of (u 0 , u 1 ,..., u N-n-2 ) are all freeze bits and the position of u N-n-1 is an information bit, then the node with this codeword sequence as the input at this time is called a Rep-NodeX node; Among them, the last n values in the sequence (u 0 , u 1 ,..., u N-1 ) constitute a NodeX node.

[0052] In addition, the Rate1 node, Spc node, Spc2 node, and Spc4 node in Table 1 are all high code rate nodes, and the Rate0 node, Rep node, Rep2 node, Rep4 node, and Rep8 node are all low code rate nodes.

[0053] As can be seen from the above, in the embodiments of the present invention, not only 11 special nodes are predefined, but also the special nodes are divided into four categories - high code rate nodes, low code rate nodes, Rate0-NodeX nodes, and Rep-NodeX nodes. Based on this, in some embodiments, a search index can be established for the decoding strategies corresponding to the special nodes according to the major categories of the special nodes. In this way, compared with querying the corresponding decoding strategies under the same search index, the reading speed of the decoding strategies can be improved to a certain extent.

[0054] Correspondingly, the embodiments of the present invention also pre-construct the decoding strategies corresponding to various special nodes to obtain a second mapping relationship for characterizing the correspondence between the types of special nodes and the decoding strategies. The decoding strategies recorded in the second mapping relationship will be described below:

[0055] First, the decoding strategy for high code rate special nodes:

[0056] Since the number of information bits contained in high code rate nodes is too large, in order to simplify the calculation and save the computing resources for node decoding, the decoding strategies for high code rate nodes proposed in the embodiments of the present invention only consider the four most reliable decoding paths. The decoding algorithms for the high code rate special nodes corresponding to these four decoding paths are shown in Tables 2-5 below. In Tables 2-5, (β 1 , β 2 , β 3 , …, β N ) is the hard decision of the soft bit sequence (α 1 , α 2 ,..., α N ), ΔPM represents the path metric increment of the decoding path, is the exclusive OR operator. In some embodiments, the hard decision of the soft bit sequence input to the high code rate special node can be calculated based on Formula 4 to obtain the initial codeword sequence (β 1 , β 2 , β 3 , …, β N ); where Formula 4 is as follows:

[0057]

[0058] Table 2 Rate1 node decoding strategy

[0059]

[0060]

[0061] In Table 2, i 1 , i 2 are the subscripts of the first two variables sorted in ascending order of absolute value in the sequence (α 1 , α 2 ,..., α N ), that is, the subscripts of the two variables with the smallest absolute value in the soft bit sequence (α 1 , α 2 ,..., α N ).

[0062] Table 3 Spc Node Decoding Strategy

[0063]

[0064] In Table 3, the codeword sequence of the Spc node needs to satisfy even parity, and i 1 , i 2 , i 3 are the subscripts of the first three variables sorted in ascending order of absolute value in the sequence (α 1 , α 2 ,..., α N ), that is, the subscripts of the three variables with the smallest absolute value in the soft bit sequence (α 1 , α 2 ,..., α N ); the parity check value i.e., q is the value after

[0065] Table 4 Spc2 Node Decoding Strategy

[0066]

[0067]

[0068] In Table 4, the odd sequence and the even sequence of the codeword sequence of the Spc2 node need to satisfy even parity respectively, and i 1 , i 2 are respectively the subscripts of the variables with the smallest absolute value in the even sequence and the odd sequence in the sequence (α 1 , α 2 ,..., α N ); i 3 , i 4 are respectively the subscripts of the variables with the smallest absolute value in the sequence (α 1 , α 2 ,..., α N ) except and ; the parity check value i.e., q1 is the value after; odd parity value can be based on q 1 to understand q 2 's calculation formula, which will not be elaborated here; j 1 = i 3 mod 2 + 1, k 1 = 1, 2, k 1 ≠ j 1 ; j 2 = i 4 mod 2 + 1, k 2 = 1, 2, k 2 ≠ j 2 ; where, mod 2 is modulo-two operation, j 1 and j 2 are used to judge and whether both are in the odd sequence or the even sequence. If and are both in the odd sequence or the even sequence, then select path 4-1 to decode to obtain the corresponding codeword sequence and calculate the corresponding ΔPM. If and one of them is in the odd sequence and the other is in the even sequence, then select path 4-2 to decode to obtain the corresponding codeword sequence and calculate the corresponding ΔPM to ensure the accuracy of the decoded codeword sequence.

[0069] Table 5 Spc4 Node Decoding Strategy

[0070]

[0071]

[0072] In Table 5, for the decoding of the Spc4 node, in the embodiments of the present invention, the soft bit sequence is divided into four groups of subsequences according to the result of the index modulo 4, and each group of subsequences should satisfy the parity check. i 1 、i 2 、i 3 、i 4 are the subscripts of the four variables with the smallest absolute value of the soft bits in the four groups of subsequences with results of 0, 1, 2, and 3 respectively; i 5 is the subscript of the variable with the smallest absolute value among all other soft bits except ; to make each group of subsequences satisfy the parity check, the corresponding parity check values q 1 ~q 4 are set respectively; where, j = i 5 mod 4 + 1, k 1 = 1, 2, 3, 4, k1 ≠ j; where, mod4 is the modulo-four operation, and j is used to determine which two values among those based on the value of i mod4 + 1 are selected 5 for processing in paths 3 and 4 respectively to obtain the codeword sequences for the corresponding paths, so as to ensure the reliability of the obtained codeword sequences.

[0073] Second, the decoding strategy for low code rate special nodes

[0074] Since the number of information bits contained in the low code rate nodes is small, in the embodiments of the present invention, the low code rate nodes can be directly decoded by means of traversal. The decoding algorithms for the low code rate nodes are shown in Tables 6 to 10 below. In Tables 6 to 10, ΔPM represents the path metric increment of the decoding path, and Δ represents the path metric increment of the all-zero codeword sequence. The codeword sequence is represented by (β 1 , β 2 , β 3 , …, β n ), and the calculation method of Δ is shown in Formula 6:

[0075]

[0076] where,

[0077] In the above, α k is the k-th soft bit value in the soft bit sequence (α 1 , α 2 ,..., α N ) input to the low code rate special node.

[0078] Table 6 Rate0 node decoding strategy

[0079] Codeword sequence ΔPM All 0 Δ

[0080] Table 7 REP node decoding strategy

[0081]

[0082] Table 8 REP2 node decoding strategy

[0083] <![CDATA[β 1 ,β 2 > ΔPM 00 Δ 01 <![CDATA[Δ+Δ 1 > 10 <![CDATA[Δ+Δ 0 > 11 <![CDATA[Δ+Δ 0 +Δ 1 >

[0084] In Table 8, all the code elements of the codeword sequence of the REP2 node can be understood to be arranged according to the following rule - β 1 , β 2 , β 3 , …, β N = {β 1 , β 2 , β 1 , β 2..., β 1 , β 2}, for the convenience of understanding, an example is given to illustrate. Suppose the codeword sequence length of the REP2 node is 4, then its codeword sequence {β 1 , β 2 , β 3 , β 4} can be any repeated combination of a set of {β 1 , β 2} in Table 8. For example, {β 1 , β 2 , β 3 , β 4} = {0, 0, 0, 0}, or {β 1 , β 2 , β 3 , β 4} = {0, 1, 0, 1}, or, {β 1 , β 2 , β 3 , β 4} = {1, 0, 1, 0}, or {β 1 , β 2 , β 3 , β 4} = {1, 1, 1, 1}. After obtaining the codeword sequence of the REP2 node, the codeword sequence can be divided into multiple subsequences with a length of 2 and the same code elements according to the code element combination in Table 8, and according to the decoding strategy in Table 8 and the calculation method of ΔPM corresponding to the subsequence, the path metric increment of the codeword sequence can be obtained. For example, suppose the codeword sequence {β 1 , β 2 , β 3 , β 4} = {0, 0, 0, 0}, then any one of its subsequences is {0, 0}. Thus, the ΔPM corresponding to 00 can be found in Table 8, which is Δ, and then the value of Δ is calculated through the above formula 6, which is the path metric increment of the codeword sequence {β 1 , β 2 , β 3 , β 4}. In addition, in Table 8, Δ can be calculated through the formula 0 or Δ 1 .

[0085] Table 9 REP4 Node Decoding Strategy

[0086] <![CDATA[β 1 ,β 2 ,β 3 ,β 4 > ΔPM 0000 Δ 1001 <![CDATA[Δ+Δ 0 +Δ 3 > 1010 <![CDATA[Δ+Δ 0 +Δ 2 > 0011 <![CDATA[Δ+Δ 2 +Δ 3 > 1100 <![CDATA[Δ+Δ 0 +Δ 1 > 0101 <![CDATA[Δ+Δ 1 +Δ 3 > 0110 <![CDATA[Δ+Δ 1 +Δ 2 > 1111 <![CDATA[Δ+Δ 0 +Δ 1 +Δ 2 +Δ 3 >

[0087] In Table 9, all the code elements of the codeword sequence of the REP4 node can be understood as being arranged according to the following rule - β 1, β 2 , β 3 ,..., β N = {β 1 , β 2 , β 3 , β 4 ..., β 1 , β 2 , β 3 , β 4}, for ease of understanding, an example is given. Suppose the codeword sequence length of the REP4 node is 8, then its codeword sequence {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8} can be any set of {β 1 , β 2 , β 3 , β 4} in Table 9 repeated combinations. For example:

[0088] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8} = {0, 0, 0, 0, 0, 0, 0, 0}, or

[0089] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8} = {1, 0, 0, 1, 1, 0, 0, 1}, or

[0090] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8} = {1, 0, 1, 0, 1, 0, 1, 0}, or

[0091] {β 1 , β 2 , β 3 , β 4, β 5 , β 6 , β 7 , β 8 [[ID=8}} = {1, 0, 0, 1, 1, 0, 0, 1}, or

[0092] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 [[ID=27}} = {0, 0, 1, 1, 0, 0, 1, 1}, or

[0093] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 [[ID=46}} = {1, 1, 0, 0, 1, 1, 0, 0}, or

[0094] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 [[ID=65}} = {0, 1, 0, 1, 0, 1, 0, 1}, or

[0095] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 [[ID=84}} = {0, 1, 1, 0, 0, 1, 1, 0}, or

[0096] {β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 [[ID=103}} = {1, 1, 1, 1, 1, 1, 1, 1}

[0097] After obtaining the codeword sequence of the REP4 node, the codeword sequence can be divided into multiple subsequences of length 4 according to the combination method of code elements in Table 9, and the ΔPM of the subsequences can be calculated according to the decoding strategy in Table 8. The calculated ΔPM is the path metric increment of the codeword sequence corresponding to the subsequence. For the relevant content in Table 8, it will not be elaborated here. In addition, in Table 9, Δ can be calculated through the formula to obtain Δ 0 or Δ 1 or Δ 2 or Δ 3 .

[0098] Table 10 Decoding Strategy of REP8 Node

[0099]

[0100]

[0101] In Table 10, all the code elements of the codeword sequence of the REP8 node can be understood to be arranged according to the following rules:

[0102] β 1 , β 2 , β 3 ,..., β N ={β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8 ,..., β 1 , β 2 , β 3 , β 4 , β 5 , β 6 , β 7 , β 8};

[0103] For the understanding of the above arrangement rules and the calculation method of the path metric increment of the codeword sequence of the REP8 node, refer to the relevant descriptions in Table 8 or Table 9 above, and it will not be elaborated here.

[0104] In addition, in Table 10, The meaning of Δ i can also refer to the relevant descriptions in Table 8 or Table 9 above, and it will not be elaborated here.

[0105] Third, the decoding strategy of the Rate0-NodeX node

[0106] The decoding steps of this node are carried out in two steps:

[0107] Step 1: Perform soft bit value merging. Let the node length relationship be N = mn. It can be understood that the soft bit sequence input to the Rate0-NodeX node is divided into m subsequences, each with a length of n. Assume the sequence numbers of these m subsequences are 0, 1... m-1. The soft bit values with corresponding sequence numbers in different subsequences are accumulated through Formula 7 to obtain the soft bit merge value after merging the m subsequences, thereby forming the soft bit sequence of the NodeX node. Thus, the decoding of the Rate0-NodeX node is converted into the decoding of the NodeX node, so that the path metric value obtained by subsequent decoding according to the NodeX node is the path metric value of the entire Rate0-NodeX node, and there is no need to separately process the Rate0 node. At this time, the length of the soft bit sequence of the NodeX node is n. The calculation of the soft bit merge value of the NodeX node is shown in Formula 7 below:

[0108]

[0109] In Formula 7, is the k-th soft bit value in the soft bit sequence (α 1 , α 2 ,..., α n ) input to the NodeX node; α jn+k represents the k-th soft bit value in the j-th numbered subsequence. The subscript label (sequence number) of this k-th soft bit value in the soft bit sequence input to the Rate0-NodeX node is: jn + k.

[0110] Step 2: Decode the NodeX node. Its node codeword sequence A is a column vector with a length of n. The codeword sequence {β 1 , β 2 ,..., β N} of the Rate0-NodeX node is a repetition of the NodeX node sequence, as shown in Formula 8 below:

[0111] {β 1 , β 2 ,..., β N} = {A, A,..., A} (Formula 8)

[0112] Thus, the decoding of the Rate0-NodeX node can be completed. At this time, the target codeword sequence obtained by decoding is shown in Formula 8, and the path metric value of the decoding path can be obtained in the following way: Since the NodeX node is any one of the Rate1 node, Spc node, Spc2 node, Spc4 node, Rate0 node, Rep node, Rep2 node, Rep4 node, and Rep8 node in Table 1, the type of the NodeX node can be determined from Table 1 based on the code pattern construction of the NodeX node. Then, the corresponding decoding strategy can be determined from Tables 2 to 9 according to the type of the NodeX node. Then, according to the calculation method of the path metric increment in the determined decoding strategy, the corresponding path metric increment can be calculated based on the codeword sequence of the NodeX node, and added to the path metric value carried by the original decoding path, and the path metric value of the decoding path can be obtained.

[0113] Fourth, the decoding strategy of the Rep-NodeX node

[0114] The decoding of this node is carried out in three steps:

[0115] The first step: perform soft bit value merging. Let the node length relationship be N v = 2mn. It can be understood that the soft bit sequence input to the Rep-NodeX node is divided into m subsequences, and the length of each subsequence is 2n. Suppose the sequence numbers of these m subsequences are 0, 1... m-1 respectively. The soft bit values of the first n corresponding sequence numbers in different subsequences are accumulated through Formula 9. For example, the first values in the subsequences with sequence numbers 0, 1... m-1 are accumulated to obtain the soft bit merge value with sequence number 1, the second values are accumulated to obtain the soft bit merge value with sequence number 2,... the nth values are accumulated to obtain the soft bit merge value with sequence number n, so as to obtain the first soft bit merge sequence with a length of n; similarly, the soft bit values of the last n corresponding sequence numbers in different subsequences are accumulated through Formula 10 to obtain the second soft bit merge sequence with a length of n. Based on the values of the corresponding sequence numbers in the first soft bit merge sequence and the second soft bit merge sequence, f operation is performed through Formula 11, and the input soft bit value of the Rep node can be obtained. This is conducive to converting the decoding of the Rep-NodeX node into the decoding of the NodeX node later, without the need to process the Rep node separately. The involved Formulas 9 to 11 are as follows:

[0116]

[0117]

[0118]

[0119] In Formulas 9 to 11, represents the k-th value in the first soft bit combination sequence, represents the k-th value in the second soft bit combination sequence, a 2jn+k represents the k-th soft bit value in the subsequence of sequence number j, a 2jn+n+k represents the (n + k)-th soft bit value in the subsequence of sequence number j, represents the soft bit sequence input to the Rep node (α 1 , α 2 ,..., α n ).

[0120] Step 2: REP node splitting. Let the information bit of the REP node be 0. The soft bit sequence and the soft bit path metric increment of the NodeX node are shown in Formulas 12 and 13; let the information bit of the REP node be 1. The soft bit sequence and the soft bit path metric increment of the NodeX node are shown in Formulas 14 and 15;

[0121]

[0122]

[0123]

[0124]

[0125] In Formulas 12 to 15, represents the k-th value in the soft bit sequence of the NodeX node when the information bit of the REP node is 0; ΔPM Rep＝0 represents the soft bit path metric increment when the information bit of the REP node is 0; represents the k-th value in the soft bit sequence of the NodeX node when the information bit of the REP node is 1; ΔPM Rep＝1 represents the soft bit path metric increment when the information bit of the REP node is 1; the h() function is the function shown in Formula 5 above.

[0126] Step 3: Decode the NodeX node. The codeword sequence A of the node is a column vector of length n. When the information bit of the REP node is 0, the codeword sequence of the REP-NodeX node is a repetition of the codeword sequence of the NodeX node, as shown in Formula 16; when the information bit of the REP node is 1, the codeword sequence of the REP-NodeX node is a repetition of the combination of the codeword sequence A of the NodeX node and , as shown in Formula 17; where is the opposite vector of the A vector.

[0127] β 1 , β 2 ,..., βN = {A, A,..., A} (Formula 16)

[0128]

[0129] ΔPM 0 = ΔPM Rep＝0 + ΔPM Nodex0 (Formula 18)

[0130] ΔPM 1 = ΔPM Rep＝1 + ΔPM Nodex1 (Formula 19)

[0131] Thus, the decoding of the REP-NodeX node can be completed. When the REP node information bit is 0, the path metric increment ΔPM of the REP-NodeX node is calculated through Formula 18 0 , ΔPM Nodex0 represents the path metric increment of the decoding path corresponding to the codeword sequence of the NodeX node when the REP node information bit is 0; when the REP node information bit is 1, the path metric increment ΔPM of the REP-NodeX node is calculated through Formula 19 1 , ΔPM Nodex1 represents the path metric increment of the decoding path corresponding to the codeword sequence of the NodeX node when the REP node information bit is 1.

[0132] In the above, ΔPM Nodex0 or ΔPM Nodex1 can be obtained in the following way: Since the NodeX node is any one of the Rate1 node, Spc node, Spc2 node, Spc4 node, Rate0 node, Rep node, Rep2 node, Rep4 node, and Rep8 node in Table 1, the type of the NodeX node can be determined from Table 1 based on the code pattern construction of the NodeX node. Then, according to the type of the NodeX node, the corresponding decoding strategy is determined from Tables 2 to 9. Then, according to the calculation method of the path metric increment in the determined decoding strategy, the corresponding path metric increment is calculated based on the codeword sequence of the NodeX node and added to the path metric value carried by the original decoding path, and the path metric value of the decoding path of the NodeX node can be obtained.

[0133] In summary, through the above solutions, the embodiments of the present invention can achieve the type distinction of special nodes in the binary tree diagram corresponding to the polar code and the configuration of the corresponding decoding strategy. Based on this, during the application of the special node decoding strategy, the above first mapping relationship and second mapping relationship can be called by executing the above steps S201 to S203 to achieve the fast decoding of special nodes in the binary tree diagram corresponding to the polar code to be decoded. The polar code decoding method provided by the embodiments of the present invention will be described below in conjunction with the above first mapping relationship and second mapping relationship:

[0134] When it is necessary to decode a polar code, since the code length parameter N and the information bit position parameter K of the polar code are both known, when the polar code to be decoded is received, the binary tree diagram of the polar code and the positions of special nodes in the binary tree diagram and their node code type structures can be determined based on the code length parameter N and the information bit position parameter of the polar code to be decoded. After obtaining the node code type structures of the special nodes, the node type of each special node can be determined according to the first mapping relationship table, and the node type of each node can be one of the following: Rate1 node, Spc node, Spc2 node, Spc4 node, Rate0 node, Rep node, Rep2 node, Rep4 node, Rep8 node, Rate0-NodeX, and Rep-NodeX nodes. After determining the types of each special node, they can be stored. The special node position is used to indicate which nodes in the binary tree diagram are special nodes, so that during subsequent recursive decoding, it can be known whether the currently traversed or the next traversed node is a special node based on the special node position.

[0135] Next, input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree diagram, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree diagram, traversing the left subtree, and traversing the right subtree to obtain the codeword sequence of the root node; finally, the information sequence of the polar code to be decoded can be output based on the codeword sequence of the root node. Among them, the principles of f operation, g operation, and the order of node processing involved in the recursive decoding processing of each node of the binary tree based on the channel soft bit sequence are the same as those involved in the f operation, g operation, and the order of node processing in the related art, and the principle of outputting the information sequence of the polar code to be decoded based on the codeword sequence of the root node can also be referred to the related art. Therefore, the embodiments of the present invention do not elaborate on these technologies. The following focuses on the important differences between the polar code decoding method provided by the embodiments of the present invention and the related art during the recursive decoding processing:

[0136] During the recursive decoding process, if the current target node to be processed is a special node, the decoding strategy for the target node is determined from the pre-stored second mapping relationship according to the type of the target node, and the target node is decoded based on the decoding strategy. After the decoding of the target node is completed, it is not necessary to decode the child nodes of the target node, but directly jump to the upper-level node or the sibling node of the target node to continue the processing. For example, when the target node is a left node, after the decoding of the target node is completed, the soft bit sequence of the right node can be calculated based on the codeword sequence of the target node, that is, at this time, jump to the right node of the target node for processing; when the target node is a right node, after the decoding of the target node is completed, the codeword sequence of its parent node can be obtained based on the codeword sequence of the target node and the codeword sequence of the left node of the target node, that is, at this time, jump to the parent node of the target node for processing.

[0137] Next, the decoding processes of different types of special nodes will be described in combination with the decoding strategies mentioned above:

[0138] 1) Decoding process of high code rate special nodes:

[0139] See Figure 4 , Figure 4 which shows a flowchart of the process of decoding a high code rate node by a polarization code decoding method provided by an embodiment of the present invention. When the type of the target node is a high code rate node, in step S202, the step of decoding the target node based on the decoding strategy includes:

[0140] In step S2021, an initial codeword sequence of the target node is processed based on the soft bit sequence input to the target node;

[0141] In step S2022, the values of the first set number of code elements corresponding to the first set number of variables with the smallest absolute values in the soft bit sequence corresponding to the target node in the initial codeword sequence are processed to generate the second set number of target codeword sequences;

[0142] In step S2023, based on the variables corresponding to the processed code elements in each target codeword sequence, the path metric increment corresponding to each target codeword sequence is determined.

[0143] In the step S2021, a corresponding initial codeword sequence can be obtained by processing the soft bit sequence of the target node through a hard decision processing method; in the step S2022, by processing the values of the first set number of code elements corresponding to the first set number of variables with the smallest absolute values in the soft bit sequence in the initial codeword sequence, the code elements corresponding to the unreliable variables are adjusted to avoid adversely affecting the accuracy of the second set number of groups of target codeword sequences obtained by decoding. Thus, the second set number of groups of target codeword sequences are obtained, and the path metric increment of each group of target codeword sequences is calculated through the corresponding decoding strategy, so as to realize the decoding output of the target node. For example, the decoding output of the target node may include the second set number of groups of target codeword sequences and the path metric increments corresponding to the respective target codeword sequences. After outputting the path metric increment, the node to be processed next can add the path metric increment to the initial path metric value to obtain the path metric value of each path.

[0144] In the above, the first set number and the second set number can be set according to actual requirements, where the first set number is used to ensure that the second set number of groups of target codeword sequences can be successfully generated.

[0145] Specifically, in some embodiments, the high code rate node includes a Rate1 node; when the type of the target node is a Rate1 node, in order to simplify the calculation and save the computing resources for node decoding, the first set number is 2 and the second set number is 4. Based on this, in the step S2022, the process of processing the initial codeword sequence may include:

[0146] In the step S202211, the code elements corresponding to one of the variables in the initial codeword sequence are respectively inverted, the code elements corresponding to another variable are inverted, and the code elements corresponding to two variables are both inverted to respectively obtain three groups of target codeword sequences; and the initial codeword sequence is used as one group of target codeword sequences to obtain four groups of target codeword sequences.

[0147] Among them, for the decoding implementation process in the step S202211, its basic principle is the same as that recorded in the Rate1 node decoding strategy and related content in the above Table 2. For a brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content in the above Rate1 node decoding strategy and will not be elaborated here.

[0148] In some other embodiments, the high code rate node includes a Spc node; when the type of the target node is a Spc node, in order to simplify the calculation and save the computing resources for node decoding, the first set number is 3 and the second set number is 4. Based on this, in the step S2022, the process of processing the initial codeword sequence includes:

[0149] In step S202221, the symbol corresponding to the first variable in the initial codeword sequence is subjected to exclusive OR processing of the parity check value to obtain a first target codeword sequence;

[0150] In step S202222, the symbol corresponding to the first variable in the initial codeword sequence is subjected to exclusive OR processing of the parity check value and then inverted, and the symbol corresponding to the second variable is inverted to obtain a second target codeword sequence;

[0151] In step S202223, the symbol corresponding to the first variable in the initial codeword sequence is subjected to exclusive OR processing of the parity check value and then inverted, and the symbol corresponding to the third variable is inverted to obtain a third target codeword sequence;

[0152] In step S202224, the symbol corresponding to the first variable in the initial codeword sequence is subjected to exclusive OR processing of the parity check value, and the two symbols corresponding to the other two variables are both inverted to obtain a fourth target codeword sequence.

[0153] Wherein, the parity check value is q in Table 3. For the decoding implementation processes in steps S202221 to S202224, its basic principle is the same as the Spc node decoding strategy and related content recorded in the above Table 3. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content in the above Spc node decoding strategy, which will not be elaborated here.

[0154] Based on the corresponding content in the Spc node decoding strategy recorded above, assuming the initial codeword sequence is (β 1 , β 2 , β 3 ,..., β N ), then the corresponding first target codeword sequence is The corresponding path metric increment is The second target codeword sequence is The corresponding path metric increment is The third target codeword sequence is The corresponding path metric increment is The fourth target codeword sequence is The corresponding path metric increment is

[0155] In still other embodiments, the high code rate node includes a Spc2 node; when the type of the target node is a Spc2 node, in order to simplify the calculation and save the computing resources for node decoding, the first set number is 4, and the second set number is 4. Based on this, in the step S2022, the process of processing the initial codeword sequence includes:

[0156] In step S202231, an odd parity value and an even parity value are respectively obtained based on the odd sequence and the even sequence of the initial codeword sequence; among them, the odd parity value is q in Table 4 2 , and the even parity value is q in Table 4 1 ;

[0157] In step S202232, the two code elements corresponding to the two variables with the smallest absolute values in the initial codeword sequence are respectively subjected to exclusive OR processing with the odd parity value and the even parity value to obtain a first target codeword sequence;

[0158] In step S202233, among the four variables, when the serial number of the variable with the second largest absolute value is odd, the three code elements corresponding to the three variables with the smallest absolute values in the initial codeword sequence are respectively subjected to exclusive OR processing with the even parity value, exclusive OR processing with the odd parity value after inversion processing, and inversion processing to obtain a second target codeword sequence; when the serial number of the variable with the second largest absolute value is even, the three code elements corresponding to the three variables with the smallest absolute values in the initial codeword sequence are respectively subjected to exclusive OR processing with the even parity value after inversion processing, exclusive OR processing with the odd parity value, and inversion processing to obtain a second target codeword sequence;

[0159] In step S202234, among the four variables, when the serial number of the variable with the largest absolute value is odd, the three code elements corresponding to the two variables with the smallest absolute values and the one variable with the largest absolute value in the initial codeword sequence are respectively subjected to exclusive OR processing with the even parity value, exclusive OR processing with the odd parity value after inversion processing, and inversion processing to obtain a third target codeword sequence; when the serial number of the variable with the largest absolute value is even, the three code elements corresponding to the two variables with the smallest absolute values and the one variable with the largest absolute value in the initial codeword sequence are respectively subjected to exclusive OR processing with the even parity value after inversion processing, exclusive OR processing with the odd parity value, and inversion processing to obtain a third target codeword sequence;

[0160] In step S202235, when the sequence numbers of the two variables with the largest absolute values are both odd or both even, perform exclusive OR processing on the even parity values, exclusive OR processing on the odd parity values, inversion processing, and inversion processing on the four code elements corresponding to the four variables in the initial codeword sequence respectively to obtain a fourth target codeword sequence; when one of the sequence numbers of the two variables with the largest absolute values is odd and the other is even, perform inversion processing after performing exclusive OR processing on the even parity values, perform inversion processing after performing exclusive OR processing on the odd parity values, perform inversion processing, and perform inversion processing on the four code elements corresponding to the four variables in the initial codeword sequence respectively to obtain a fourth target codeword sequence.

[0161] Among them, for the decoding implementation process in steps S202231 to S202235, its basic principle is the same as the Spc2 node decoding strategy and related content recorded in Table 4 above. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content in the above Spc2 node decoding strategy, and details will not be elaborated here.

[0162] In some other embodiments, the high code rate node includes an Spc4 node; when the type of the target node is an Spc4 node, in order to simplify the calculation and save the computing resources for node decoding, the first set number is 4 and the second set number is 4. Based on this, in step S2022, the process of processing the initial codeword sequence includes:

[0163] In step S202241, divide the soft bit sequence input to the target node into four groups of subsequences that all satisfy parity check, and respectively determine the one variable with the smallest absolute value in each group of subsequences to obtain four variables, and determine the fifth variable with the smallest absolute value in the soft bit sequence except for the four variables.

[0164] In step S202242, obtain the parity check values corresponding to each group of subsequences, where the parity check values are q 1 ~q 4 ;

[0165] In step S202243, perform exclusive OR processing on the four code elements corresponding to the four variables in the initial codeword sequence with their respective corresponding parity check values to obtain a first target codeword sequence.

[0166] In step S202244, perform exclusive OR processing on the four code elements corresponding to the four variables in the initial codeword sequence with their respective corresponding parity check values and then perform inversion processing to obtain a second target codeword sequence.

[0167] In step S202245, for the three code elements corresponding to two of the four variables and the fifth variable in the initial codeword sequence, perform exclusive OR processing with the corresponding parity check value, perform exclusive OR processing with the corresponding parity check value and then perform inversion processing, and perform inversion processing respectively, to obtain a third target codeword sequence;

[0168] In step S202246, for the three code elements corresponding to two of the four variables and the fifth variable in the initial codeword sequence, perform inversion processing after performing exclusive OR processing with the corresponding parity check value, perform exclusive OR processing with the corresponding parity check value, and perform inversion processing respectively, to obtain a fourth target codeword sequence.

[0169] Among them, for the decoding implementation process in steps S202241 to S2022465, its basic principle is the same as the Spc4 node decoding strategy and related content recorded in Table 5 above. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content in the above Spc4 node decoding strategy, and details are not described here.

[0170] 2) Decoding process of low code rate special nodes:

[0171] The second mapping relationship includes the correspondence between the codeword sequence and the path metric increment; refer to Figure 5 , Figure 5 FIG. shows a flowchart of the process of decoding a low code rate node by a polar code decoding method provided by an embodiment of the present invention. When the type of the target node is a low code rate node, in step S202, the step of decoding the target node based on the decoding strategy includes:

[0172] In step S202a, process the soft bit sequence input to the target node to obtain the target codeword sequence of the target node;

[0173] In step S202b, determine the path metric increment corresponding to the target codeword sequence from the second mapping relationship.

[0174] Among them, for steps S202a to S202b, for the decoding implementation processes of different types of nodes under low code rate special nodes - Rate0 node, REP node, REP2 node, REP4 node, and REP8 node, their basic principles are the same as the relevant content in Tables 6 to 10 above. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content in Tables 6 to 10 above, and details are not described here.

[0175] 3) Decoding process of Rate0-NodeX node:

[0176] Refer toFigure 6 , Figure 6 shows a flowchart of the process of decoding a Rate0-NodeX node by a polar code decoding method provided by an embodiment of the present invention. When the type of the target node is a Rate0-NodeX node, in step S202, the step of decoding the target node based on the decoding strategy includes:

[0177] In step S202A, perform soft bit value merging processing on the soft bit sequence input to the target node to obtain a target soft bit sequence of the NodeX node with reduced length;

[0178] In step S202B, process the target soft bit sequence to obtain a codeword sequence of the NodeX node, and process the codeword sequence of the NodeX node to obtain a target codeword sequence of the target node;

[0179] In step S202C, determine the corresponding decoding strategy from the second mapping relationship according to the node type of the NodeX node, and determine the path metric value of the decoding path corresponding to the target codeword sequence according to the decoding strategy of the NodeX node and the codeword sequence of the NodeX node.

[0180] Among them, for the decoding implementation process of the Rate0-NodeX node in steps S202A to S202C, its basic principle is the same as the relevant content of the decoding strategy of the Rate0-NodeX node described above. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content of the decoding strategy of the Rate0-NodeX node, and details are not described herein.

[0181] 4) Decoding process of Rep-NodeX node:

[0182] See Figure 7 , Figure 7 shows a flowchart of the process of decoding a Rep-NodeX node by a polar code decoding method provided by an embodiment of the present invention. When the type of the target node is a Rep-NodeX node, in step S202, the step of decoding the target node based on the decoding strategy includes:

[0183] In step S202D, perform soft bit value merging processing on the soft bit sequence input to the target node to obtain a soft bit merged sequence, and process the soft bit merged sequence to obtain a soft bit sequence of the Rep node;

[0184] In step S202E, a soft bit sequence of the NodeX node is processed according to the soft bit combination sequence, and a soft bit path metric increment of the NodeX node is processed according to the soft bit sequence of the Rep node;

[0185] In step S202F, a codeword sequence of the NodeX node is processed according to the soft bit sequence of the NodeX node, and a target codeword sequence of the target node is processed based on the codeword sequence of the NodeX node;

[0186] In step S202G, a corresponding decoding strategy is determined from the second mapping relationship according to the node type of the NodeX node, and a decoding path metric value of the NodeX node is determined according to the decoding strategy of the NodeX node and the codeword sequence of the NodeX node;

[0187] In step S202H, a path metric value of the decoding path corresponding to the target codeword sequence is determined according to the soft bit path metric increment and the decoding path metric value.

[0188] Among them, for the decoding implementation process of the Rep-NodeX node in steps S202D to S202H, its basic principle is the same as the relevant content of the decoding strategy of the Rep-NodeX node described above. For the sake of brief description, for the parts not mentioned in the embodiments of the present invention, reference can be made to the corresponding content of the decoding strategy of the Rep-NodeX node, which will not be elaborated here.

[0189] In summary, the polar code decoding method provided by the embodiments of the present invention realizes that during the process of decoding the polar code to be decoded, the corresponding special nodes can be directly decoded with the set decoding strategy by establishing a first mapping relationship for distinguishing the types of special nodes in the binary tree diagram corresponding to the polar code in advance, and a second mapping relationship for distinguishing the decoding strategies of different types of special nodes. Even if the length of the codeword sequence or soft bit sequence input to the special node is very long, it can be ensured that a special node is used to decode the input data sequence through the corresponding decoding strategy, without having to distribute the data sequence to different multiple nodes for decoding, which can reduce the number of decoding nodes in the decoding binary tree diagram, shorten the traversal process between nodes, reduce the consumption of hardware resources, and improve the decoding efficiency. Especially for special nodes with longer lengths, their parallel decoding degree is higher and the decoding delay is lower.

[0190] In order to execute the corresponding steps in the above embodiments and various possible manners, an implementation manner of a polar code decoding device is given below. Optionally, the polar code decoding device may adopt the Figure 1 device structure of the electronic device shown above. Further, please refer to Figure 8 ,Figure 8 This is a functional module diagram of a polar code decoding device provided in an embodiment of the present invention. It should be noted that the basic principle and technical effects of the polar code decoding device provided in this embodiment are the same as those in the above embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference can be made to the corresponding contents in the above embodiment. The polar code decoding device 800 includes:

[0191] The determination module 801 is configured to: determine the position of the special node in the binary tree graph corresponding to the polar code to be decoded based on the information bit position parameter and the code length parameter of the polar code to be decoded, and determine the type of each special node from a pre-stored first mapping relationship;

[0192] The decoding module 802 is configured to: input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree graph, and perform recursive decoding processing from the root node in the order of accessing the root node of the binary tree graph, traversing the left subtree, and traversing the right subtree, so as to obtain a codeword sequence of the root node;

[0193] The output module 803 is configured to: output the information sequence of the polar code to be decoded based on the codeword sequence of the root node;

[0194] Among them, during the recursive decoding process performed by the decoding module 802, when the currently processed target node is a special node, the decoding strategy of the target node is determined from the pre-stored second mapping relationship according to the type of the target node, and the target node is decoded based on the decoding strategy, and the decoding process of the child nodes of the target node is abandoned.

[0195] Optionally, the above modules can be stored in the form of software or firmware. Figure 1 The memory shown in the figure or solidified in the operating system (OS) of the electronic device, and can be Figure 1 Meanwhile, the data and program codes required for executing the above modules can be stored in the memory.

[0196] In several embodiments provided in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and they can sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, as well as the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0197] In addition, each functional module in various embodiments of the present invention can be integrated together to form an independent part, or each module can exist alone, or two or more modules can be integrated to form an independent part.

[0198] If the above functions are implemented in the form of software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0199] The above is only the preferred embodiment of the present invention and is not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A polar code decoding method, characterized in that, it includes: Based on the information bit position parameter and code length parameter of the polar code to be decoded, determine the positions of special nodes in the binary tree diagram corresponding to the polar code to be decoded, and determine the type of each special node from the pre-stored first mapping relationship; Input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree diagram, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree diagram, traversing the left subtree, and traversing the right subtree to obtain the codeword sequence of the root node; Output the information sequence of the polar code to be decoded based on the codeword sequence of the root node; Wherein, during the recursive decoding process, when the target node being processed is a special node, determine the decoding strategy of the target node from the pre-stored second mapping relationship according to the type of the target node, and decode the target node based on the decoding strategy, and abandon the decoding process of the child nodes of the target node.

2. The method according to claim 1, characterized in that, When the type of the target node is a high code rate node, the step of decoding the target node based on the decoding strategy includes: Processing the soft bit sequence input to the target node to obtain the initial codeword sequence of the target node; Processing the values of the first set number of code elements corresponding to the first set number of variables with the smallest absolute values in the soft bit sequence corresponding to the target node in the initial codeword sequence to generate the second set number of groups of target codeword sequences; Based on the variables corresponding to the processed code elements in each target codeword sequence, determine the path metric increment corresponding to each target codeword sequence.

3. The method according to claim 2, characterized in that, The high code rate node includes a Rate1 node; when the type of the target node is a Rate1 node, the first set number is 2, the second set number is 4, and the process of processing the initial codeword sequence includes: Respectively invert the code elements corresponding to one of the variables in the initial codeword sequence, invert the code elements corresponding to another variable, and invert the code elements corresponding to both variables to obtain three groups of target codeword sequences respectively; and use the initial codeword sequence as a group of target codeword sequences to obtain four groups of target codeword sequences.

4. The method according to claim 2, characterized in that, The high code rate node includes a Spc node; when the type of the target node is a Spc node, the first set number is 3, the second set number is 4, and the process of processing the initial codeword sequence includes: Perform exclusive OR processing on the parity check values of the code elements corresponding to the first variable in the initial codeword sequence to obtain the first target codeword sequence; After performing exclusive OR processing on the parity check values of the code elements corresponding to the first variable in the initial codeword sequence and then inverting them, and inverting the code elements corresponding to the second variable, to obtain the second target codeword sequence; XOR the code elements corresponding to the first variable in the initial codeword sequence with the parity check value and then perform an inversion process, and invert the code elements corresponding to the third variable to obtain a third target codeword sequence; XOR the code elements corresponding to the first variable in the initial codeword sequence with the parity check value, and invert the two code elements corresponding to the other two variables to obtain a fourth target codeword sequence.

5. The method according to claim 2, wherein, the high code rate node includes a Spc2 node; when the type of the target node is a Spc2 node, the first set number is 4, the second set number is 4, and the process of processing the initial codeword sequence includes: Obtain an odd parity check value and an even parity check value based on the odd sequence and the even sequence of the initial codeword sequence respectively; XOR the two code elements corresponding to the two variables with the smallest absolute values in the initial codeword sequence with the odd parity check value and the even parity check value respectively to obtain a first target codeword sequence; Among the four variables, when the serial number of the variable with the second largest absolute value is odd, XOR the three code elements corresponding to the three variables with the smallest absolute values in the initial codeword sequence with the even parity check value, XOR with the odd parity check value and then perform an inversion process, and perform an inversion process to obtain a second target codeword sequence; when the serial number of the variable with the second largest absolute value is even, XOR the three code elements corresponding to the three variables with the smallest absolute values in the initial codeword sequence with the even parity check value and then perform an inversion process, XOR with the odd parity check value, and perform an inversion process to obtain a second target codeword sequence; Among the four variables, when the serial number of the variable with the largest absolute value is odd, XOR the three code elements corresponding to the two variables with the smallest absolute values and the variable with the largest absolute value in the initial codeword sequence with the even parity check value, XOR with the odd parity check value and then perform an inversion process, and perform an inversion process to obtain a third target codeword sequence; when the serial number of the variable with the largest absolute value is even, XOR the three code elements corresponding to the two variables with the smallest absolute values and the variable with the largest absolute value in the initial codeword sequence with the even parity check value and then perform an inversion process, XOR with the odd parity check value, and perform an inversion process to obtain a third target codeword sequence; When the serial numbers of the two variables with the largest absolute values are both odd or even, XOR the four code elements corresponding to the four variables in the initial codeword sequence with the even parity check value, XOR with the odd parity check value, perform an inversion process, and perform an inversion process to obtain a fourth target codeword sequence; when one of the serial numbers of the two variables with the largest absolute values is odd and the other is even, XOR the four code elements corresponding to the four variables in the initial codeword sequence with the even parity check value and then perform an inversion process, XOR with the odd parity check value and then perform an inversion process, and perform an inversion process to obtain a fourth target codeword sequence.

6. The method according to claim 2, wherein, The high code rate node includes a Spc4 node; when the type of the target node is a Spc4 node, the first set number is 4, the second set number is 4, and the process of processing the initial codeword sequence includes: Dividing the soft bit sequence input to the target node into four groups of subsequences that all satisfy parity check, and respectively determining the variable with the smallest absolute value in each group of subsequences to obtain four variables, and determining the fifth variable with the smallest absolute value in the soft bit sequence except for the four variables; Obtaining the parity check value corresponding to each group of subsequences; Performing exclusive OR processing on the four code elements in the initial codeword sequence corresponding to the four variables with their respective corresponding parity check values to obtain a first target codeword sequence; Performing exclusive OR processing on the four code elements in the initial codeword sequence corresponding to the four variables with their respective corresponding parity check values and then performing an inversion process to obtain a second target codeword sequence; Performing exclusive OR processing with the corresponding parity check value, performing exclusive OR processing with the corresponding parity check value and then performing an inversion process, and performing an inversion process on the three code elements in the initial codeword sequence corresponding to two of the four variables and the fifth variable to obtain a third target codeword sequence; Performing exclusive OR processing with the corresponding parity check value and then performing an inversion process, performing exclusive OR processing with the corresponding parity check value, and performing an inversion process on the three code elements in the initial codeword sequence corresponding to two of the four variables and the fifth variable to obtain a fourth target codeword sequence.

7. According to the method described in claim 1, It is characterized in that The second mapping relationship includes the correspondence between the codeword sequence and the path metric increment; When the type of the target node is a low code rate node, the step of decoding the target node based on the decoding strategy includes: Processing the soft bit sequence input to the target node to obtain the target codeword sequence of the target node; Determining the path metric increment corresponding to the target codeword sequence from the second mapping relationship.

8. According to what is described in claim 1, It is characterized in that When the type of the target node is a Rate0-NodeX node, the step of decoding the target node based on the decoding strategy includes: Performing soft bit value merging processing on the soft bit sequence input to the target node to obtain the target soft bit sequence of the NodeX node with a reduced length; Processing the target soft bit sequence to obtain the codeword sequence of the NodeX node, and processing the codeword sequence of the NodeX node to obtain the target codeword sequence of the target node; Determining the corresponding decoding strategy from the second mapping relationship according to the node type of the NodeX node, and determining the path metric value of the decoding path corresponding to the target codeword sequence according to the decoding strategy of the NodeX node and the codeword sequence of the NodeX node; Among them, the Rate0-NodeX node represents a polar code of length N, where N = 2 T ≥ 16, and the positions of (u 0 , u 1 ,..., u N-1 ) in the input codeword sequence (u 0 , u 1 ,..., u N-n-1 ) are all frozen bits; the remaining sequence (u N-n , u N-n+1 ,..., u N-1 ) forms the NodeX node; the node type of the NodeX node is a high code rate node or a low code rate node.

9. According to what is described in claim 1, It is characterized in that When the type of the target node is a Rep-NodeX node, the step of decoding the target node based on the decoding strategy includes: Performing soft bit value merging processing on the soft bit sequence input to the target node to obtain a soft bit merged sequence, and processing the soft bit merged sequence to obtain the soft bit sequence of the Rep node; Processing the soft bit merged sequence to obtain the soft bit sequence of the NodeX node, and processing the soft bit sequence of the Rep node to obtain the soft bit path metric increment of the NodeX node; Processing the soft bit sequence of the NodeX node to obtain the codeword sequence of the NodeX node, and processing the codeword sequence of the NodeX node to obtain the target codeword sequence of the target node; Determining the corresponding decoding strategy from the second mapping relationship according to the node type of the NodeX node, and determining the decoding path metric value of the NodeX node according to the decoding strategy of the NodeX node and the codeword sequence of the NodeX node; Determining the path metric value of the decoding path corresponding to the target codeword sequence according to the soft bit path metric increment and the decoding path metric value; Among them, the Rate0-NodeX node represents a polar code with a length of N = 2 T , and the positions of (u 0 , u 1 ,..., u N-1 ) in the input codeword sequence (u 0 , u 1 ,..., u N-n-2 ) are all frozen bits, the position of u N-n-1 is the information bit, and the last n values in the codeword sequence (u 0 , u 1 ,..., u N-1 ) form the NodeX node; the node type of the NodeX node is a high code rate node or a low code rate node.

10. A polar code decoding device Characterized in that It includes: A determination module configured to: based on the information bit position parameter and the code length parameter of the polar code to be decoded, determine the positions of special nodes in the binary tree graph corresponding to the polar code to be decoded, and determine the type of each special node from the pre-stored first mapping relationship; A decoding module configured to: input the channel soft bit sequence of the polar code to be decoded into the root node of the binary tree graph, and start recursive decoding processing from the root node in the order of accessing the root node of the binary tree graph, traversing the left subtree, and traversing the right subtree to obtain the codeword sequence of the root node; An output module configured to: output the information sequence of the polar code to be decoded based on the codeword sequence of the root node; Wherein, during the process of the decoding module performing recursive decoding processing, when the currently processed target node is a special node, determine the decoding strategy of the target node from the pre-stored second mapping relationship according to the type of the target node, and decode the target node based on the decoding strategy, and abandon the decoding processing of the child nodes of the target node.

11. An electronic device Characterized in that It includes a processor and a memory, the memory stores machine-executable instructions that can be executed by the processor, and the processor can execute the machine-executable instructions to implement the method according to any one of claims 1-9.

12. A computer-readable storage medium, on which a computer program is stored Characterized in that When the computer program is executed by a processor, it implements the method according to any one of claims 1-9.

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