A data link cross-network communication transmission method, device and system

Abstract

The present invention provides a data link cross-network communication transmission method, device and system. The system includes a data link terminal, an SCA deployment environment, a data link waveform application, a cross-network communication waveform application and a display and control host. The SCA deployment environment mainly consists of an SCA core framework and a soft radio middleware. The data link waveform application consists of a Link11 waveform application, a Link16 waveform application and a Link4a waveform application, which respectively implement the networking communication functions of the Link11 data link, the Link16 data link and the Link4a data link. The cross-network communication waveform application mainly consists of a Link11 and Link16 cross-network communication waveform application, a Link11 and Link4a cross-network communication waveform application, and a Link16 and Link4a cross-network communication waveform application. The solution of the present invention based on the SCA software communication architecture greatly improves the openness, interface unity and scalability of its architecture. The scalability, configurability, flexibility and dynamic reconfigurability of the system, network and device are difficult to achieve by traditional systems and devices.

Description

Technical Field

[0001] This application relates to the field of radio communication. Specifically, this application relates to a method, system, and device for cross-network communication transmission of data links. Background Art

[0002] Common data links include Link4a, Link11, and Link16. These three data links belong to different generations, with significant differences in design objectives and protocols. Link4A is an early ship-aircraft control link mainly used for one-way command transmission, Link11 is used for multi-platform situation sharing, and Link16 is a more advanced multi-functional link. The materials mention that their physical layers are very different. For example, the modulation methods, frequency bands, and rates are different. For example, Link4A uses FSK in the UHF band, Link11 uses MSK in the HF / UHF bands, and Link16 uses GMSK / CCSK in the L band, and the rate differences are also large, which makes direct interconnection difficult. In addition, the multiple access mechanisms are different. Link4A is polling, Link11 is mesh polling, and Link16 is TDMA, which brings problems of timing synchronization. For example, the time slot division of Link16 does not match the polling period of Link11, resulting in low encapsulation efficiency.

[0003] To achieve communication and information sharing among the Link4a, Link11, and Link16 networks in the prior art, usually a communication gateway is required for information forwarding, or interconnection is achieved through a command center. These two methods have high costs, lack flexibility, and are difficult to deploy. In short, there is no effective method to solve the problem of cross-network communication transmission of data links.

[0004] To solve cross-network communication transmission, as Figure 1 shown, the traditional method requires adding a communication gateway for information forwarding, or interconnection is achieved through a command center. During cross-network communication, information needs to be sent from the inside of the general wideband data link terminal to the external communication gateway or command center. The information processing process will add two external interfaces, and the information forwarding and storage will increase at least twice, adding data packing and unpacking operations for the two external interfaces, and the transmission delay will increase significantly. Summary of the Invention

[0005] To solve the technical problems existing in the prior art, the present invention provides a method, system, and device for cross-network communication transmission of data links, which can effectively solve the above technical problems.

[0006] To achieve the above object, the present invention provides a data link cross-network communication transmission system, which includes a general wideband data link terminal, an SCA deployment environment, a data link waveform application, a cross-network communication waveform application, and a display and control host. The SCA deployment environment mainly consists of an SCA core framework and a software radio middleware, and can be deployed on the hardware of the general wideband data link terminal, mainly providing the core framework and middleware environment required for the deployment of software radio waveform applications. The data link waveform application consists of Link11 waveform application, Link16 waveform application, and Link4a waveform application, which respectively implement the networking communication functions of Link11 data link, Link16 data link, and Link4a data link. The cross-network communication waveform application mainly consists of Link11 and Link16 cross-network communication waveform applications, Link11 and Link4a cross-network communication waveform applications, and Link16 and Link4a cross-network communication waveform applications. The cross-network communication waveform application mainly realizes the functions of receiving messages of two data links, message format conversion, and message forwarding.

[0007] Further, the system consists of multiple sets of general wideband data link terminals interconnected with the display and control host through LAN. The display and control host can manage and control the waveform applications and configuration files deployed on each general wideband data link terminal in the system through the interface of the SCA control framework and the software radio middleware, and monitor the status and hardware configuration of the general wideband data link terminal. One or more data link waveform applications can be deployed according to the configuration.

[0008] Further, the general wideband data link terminals deployed with the same data link waveform application can form a network for communication by themselves, and the general wideband data link terminals deployed with the cross-network communication waveform application can achieve cross-network communication and information sharing between different data link networks.

[0009] To achieve the above object, the present invention provides a data link cross-network communication transmission device, which includes a main control module, a signal processing module, a radio frequency power amplifier module, a chassis, a backplane, and an antenna. The signal processing module can be set with 2 to 3 pieces to support cross-network communication and data transmission. The backplane adopts a bus + switch architecture, including an IIC bus, a RapidIO switch, a network switch, and an SRIO bus. The main control module uses a general-purpose processor GPP and installs an operating system. The signal processing module mainly uses an SOC chip of ARM + FPGA, and an embedded operating system is installed on the ARM. The radio frequency power amplifier module supports segmented processing of radio frequency signals. The antenna includes antennas in the shortwave, ultra-shortwave, and satellite communication frequency bands.

[0010] Further, the main control module, signal processing module 1, and signal processing module 2 inside the chassis are interconnected through the backplane IIC bus, Ethernet switch chip, and RapidIO switch chip. The general-purpose processor of the main control module and the ARM of the signal processing module interact at the control level through the LAN. The general-purpose processor of the main control module and the FPGA of the signal processing module perform high-speed data interaction through SRIO or PCIE. The ARM and FPGA inside the signal processing module perform data interaction through the internal bus. The RF transceiver interface of the RF power amplifier module is interconnected with the FPGA through an RF cable, and the signal of the RF power amplifier module is interconnected with the antenna interface through an RF cable.

[0011] Further, the platform model of the device mainly consists of a main node and multiple slave node models. The main node model is a logical abstraction of the main control module, including a general wideband data link terminal domain manager, a general wideband data link terminal log service, a main node device manager, a main node GPP device, and a main node data transmission device.

[0012] Further, the slave node model is a logical abstraction of the signal processing module, including a slave node device manager, a slave node ARM device, a slave node FPGA device, a slave node RF device, and an MHAL device.

[0013] To achieve the above object, the present invention provides a data link cross-network communication transmission method, and the steps of the method are as follows.

[0014] S1. Deploy the data link waveform and cross-network communication waveform on the general wideband data link terminal hardware.

[0015] S2. According to the front-end requirements, detect whether there are relevant waveforms on the corresponding general wideband data link terminal hardware that can achieve networking.

[0016] S3. If there are relevant waveforms on the general wideband data link terminal hardware that can achieve networking, directly perform networking communication.

[0017] Further, the steps of the method also include.

[0018] S4. If there are no relevant waveforms on the general wideband data link terminal hardware that can achieve networking, stop and uninstall the relevant waveform applications through the SCA core framework control interface.

[0019] S5. Through the SCA core framework control interface, install, create, and start the relevant waveform applications.

[0020] S6. Configure the relevant information for the cross-network communication of the relevant waveforms to implement the cross-network communication function of the relevant waveforms.

[0021] Further, the data link waveform can be Link11 data link waveform, Link16 data link waveform or Link4a data link waveform.

[0022] Further, the cross-network communication waveform can be Link11 and Link16 cross-network communication waveform, Link11 and Link4a cross-network communication waveform or Link16 and Link4a cross-network communication waveform.

[0023] Further, when the Link11 data link waveform sends data, the M message packet assembly component mainly receives the service data of the display control software, completes the packet assembly according to the M message format, and sends it to the encoder component through the main node data transmission device. The encoder component completes the data BCH and CRC encoding and sends the encoded data into the link control component. The link control mainly realizes the network scheduling and timing control of the Link11 data link, coordinates the polling mechanism between the master / slave stations, and sends the data into the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is filtered and other processed, converted into a digital signal through the ADC, processed by the FPGA for baseband signal reception, sent into the link control component through the MHAL device component, sent into the decoder component for BCH and CRC decoding processing after link control processing, then sent into the M message unpacking processing through the main node data transmission device, and finally displayed through the display control software.

[0024] Further, when the Link16 data link waveform sends data, the J message packet assembly component mainly receives the service data of the display control software, completes the packet assembly according to the J message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes the data RS and CRC encoding and sends the encoded data into the link control component. The link control mainly realizes the network scheduling and timing control of the Link16 data link, coordinates the network synchronization and network participation group and time slot allocation, and sends the data into the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is filtered and other processed, converted into a digital signal through the ADC, processed by the FPGA for baseband signal reception, sent into the link control component through the MHAL device component, sent into the decoder component for RS and CRC decoding processing after link control processing, then sent into the M message unpacking processing through the main node data transmission device, and finally displayed through the display control software.

[0025] Further, when the Link4a data link waveform sends data, the V / R message packet assembly component mainly receives the service data of the display and control software, completes packet assembly according to the V / R message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes data CRC encoding and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link4a data link, coordinates the roll call mechanism between the master / slave stations, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, processed for baseband signal reception through the FPGA, sent to the link control component through the MHAL device component, decoded through the decoder component after link control processing, and then sent to the V / R message unpacking processing through the main node data transmission device, and finally displayed through the display and control software. The assembly controller mainly realizes the control and management of the waveform application component, including the creation / release, start, stop of the decoder component, encoder component, and link control component, as well as the dynamic configuration of waveform parameters.

[0026] Compared with the prior art, the present invention has the following advantages.

[0027] Traditional data link cross-network communication methods all realize data link cross-network communication through the complete process of hardware selection and matching, software deployment, platform deployment, waveform application deployment, and cross-network communication waveform application deployment. It is achieved through a complete redeployment method and belongs to the cold start of the system. The technical solution provided by the present invention is to switch waveforms to achieve cross-network communication when one or two waveforms have been deployed on the hardware platform. At the same time, based on the SCA software communication architecture, the openness, interface unity, and scalability of the architecture have been greatly improved. The scalability, configurability, flexibility, and dynamic reconfigurability of the system, network, and equipment are difficult to achieve for traditional systems and equipment. Brief Description of the Drawings

[0028] Figure 1 Schematic diagram of traditional data link cross-network communication transmission.

[0029] Figure 2 Structural diagram of a data link cross-network communication system provided by the present invention.

[0030] Figure 3 Schematic diagram of a data link cross-network communication networking provided by the present invention.

[0031] Figure 4 Schematic diagram of a data link cross-network communication transmission provided by the present invention.

[0032] Figure 5 Composition diagram of a data link cross-network communication device provided by the present invention.

[0033] Figure 6 Module connection relationship diagram of a data link cross-network communication device provided by the present invention.

[0034] Figure 7 Platform model diagram of a data link cross-network communication device provided by the present invention.

[0035] Figure 8 Link4a waveform application model diagram.

[0036] Figure 9 Link11 waveform application model diagram.

[0037] Figure 10 Link16 waveform application model diagram. Specific implementation manners

[0038] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application that is required to be protected, but only represents the selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative efforts belong to the scope of protection of the present application.

[0039] It should be noted that: similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, the terms "first", "second", etc. are only used for differential description and cannot be understood as indicating or implying relative importance.

[0040] First, some terms involved in the embodiments of the present application will be described to facilitate the understanding of those skilled in the art.

[0041] The SCA (Software Component Architecture) core framework is a component-based software architecture model that provides a standardized way to build, assemble, and manage components in a software system to achieve a highly scalable, maintainable, and flexible software system. Such as the SCA core framework (E-Spectra CF) independently developed by Chengdu Xieying Technology Co., Ltd.

[0042] Soft middleware: A component used to shield application and environmental details (such as hardware). It is generally located above the operating system and below the application software, forming a reusable part above the operating system, providing a running and development environment for the upper-layer application software, and helping users develop and integrate complex application software efficiently and flexibly. Based on CORBA, the development and maintenance of application programs can be isolated from the underlying hardware and system software, and only the corresponding middleware needs to be changed to adapt to different platforms. For example, the soft middleware (E-Spectra e*ORB) independently developed by Chengdu Xieying Technology Co., Ltd.

[0043] Link 16 waveform: The Link 16 waveform is a specific form used for signal transmission in this data link system. It consists of the TDMA protocol, JTIDS waveform, and TADIL J message standard.

[0044] Link 4a waveform: The history of the Link 4A waveform can be traced back to the late 1950s. The Link 4A waveform is a data link communication waveform applied to aviation and maritime command and control systems.

[0045] Embodiment 1.

[0046] As Figure 2 shown, to achieve the above object, the present invention provides a data link cross-network communication system, which includes a general wideband data link terminal, an SCA deployment environment, a data link waveform application, a cross-network communication waveform application, and a display and control host.

[0047] The SCA deployment environment is mainly composed of an SCA core framework and soft middleware, and can be deployed on the general wideband data link terminal hardware, mainly providing the core framework and middleware environment required for the deployment of soft waveform applications.

[0048] The data link waveform application consists of Link11 waveform application, Link16 waveform application, and Link4a waveform application, respectively implementing the networking communication functions of Link11 data link, Link16 data link, and Link4a data link.

[0049] The cross-network communication waveform application is mainly composed of Link11 and Link16 cross-network communication waveform applications, Link11 and Link4a cross-network communication waveform applications, and Link16 and Link4a cross-network communication waveform applications. The cross-network communication waveform application mainly realizes the functions of receiving messages of two data links, message format conversion, and message forwarding.

[0050] The working principle of the system is as follows.

[0051] The system consists of multiple sets of general wideband data link terminals, which are interconnected with the display and control host through LAN. The display and control host can manage the waveform applications and configuration files deployed in each general wideband data link terminal in the control system through the interface of the SCA control framework and the soft middleware, monitor the status and hardware configuration of the general wideband data link terminals, and deploy one or more data link waveform applications according to the configuration.

[0052] General wideband data link terminals deployed with the same data link waveform application can form a network for communication by themselves. General wideband data link terminals deployed with cross-network communication waveform applications can achieve cross-network communication and information sharing between different data link networks.

[0053] Specifically, as Figure 3 shown, Figure 3 the curves in it represent the relevant waveforms that can form a network.

[0054] General wideband data link terminals A, B, C, and D are all deployed with Link11 data link waveform applications. Therefore, these four general wideband data link terminals form a Link11 data link network, and the internal information can be shared through the network. General wideband data link terminals D, E, and G are deployed with Link4a data link waveform applications. Therefore, these three general wideband data link terminals form a Link4a data link network, and the internal information can be shared through the network. General wideband data link terminals F, G, H, and B are deployed with Link16 data link waveform applications. Therefore, these four general wideband data link terminals form a Link16 data link network, and the internal information can be shared through the network.

[0055] At the same time, general wideband data link terminal B is deployed with Link11 data link waveform applications, Link16 data link waveform applications, and Link11 and Link16 cross-network communication waveform applications. This general wideband data link terminal can transmit the information of the Link11 data link network and the Link16 data link network across the network to achieve information sharing between the two networks.

[0056] General wideband data link terminal D is deployed with Link11 data link waveform applications, Link4a data link waveform applications, and Link11 and Link4a cross-network communication waveform applications. This general wideband data link terminal can transmit the information of the Link11 data link network and the Link4a data link network across the network to achieve information sharing between the two networks.

[0057] The general wideband data link terminal G deploys Link16 data link waveform applications, Link4a data link waveform applications, and Link16 and Link4a cross-network communication waveform applications. This general wideband data link terminal can cross-network transmit information between the Link16 data link network and the Link4a data link network, realizing information sharing between the two networks.

[0058] The system built based on the SCA software communication architecture realizes the decoupling of software applications and hardware platforms. The functions and scale of the system can be dynamically adjusted according to needs. All general wideband data link terminals can deploy the same waveforms, different waveforms, or cross-network communication waveforms. They can be deployed into a data link network or three data link networks coexist simultaneously. The networking method and communication method of the entire system are both scalable, flexible, and configurable.

[0059] In one embodiment, to solve cross-network communication transmission, the traditional method requires adding a communication gateway for information forwarding or achieving interconnection through a command center. When performing cross-network communication, information needs to be sent from inside the general wideband data link terminal to the external communication gateway or command center. The information processing link will add two external interfaces, and the information forwarding and storage will increase at least twice. There will be two additional data packing and unpacking operations for the external interfaces, and the transmission delay will increase significantly. As Figure 4 shown, after the Link11 data link waveform and the Link16 data link waveform are successfully networked, only two internal interfaces are required, which will reduce the two external interfaces in the traditional method, and the transmission delay will be significantly reduced.

[0060] Embodiment 2.

[0061] The hardware device of the present invention is a general wideband data link terminal, with frequency bands covering shortwave, ultra-shortwave, L, S, and C (partial) frequency bands, including a main control module, a signal processing module, a radio frequency power amplifier module, a chassis, an antenna, etc. There are 2 to 3 signal processing modules inside the same chassis to support cross-network communication and data transmission.

[0062] The composition of the hardware device is as Figure 5 shown. Among them, the backplane adopts a bus + switch architecture, including IIC bus, RapidIO switch, network switch, and SRIO bus; the main control module mainly uses a general-purpose processor GPP and installs an operating system; the signal processing module mainly uses an ARM + FPGA SOC chip, and an embedded operating system is installed on the ARM; the radio frequency power amplifier module supports segmented processing of radio frequency signals, including functions such as filtering and amplification; the antenna includes antennas for shortwave, ultra-shortwave, satellite communication, and other frequency bands.

[0063] The connection relationship between the modules of the general wideband data link terminal of the present invention is as Figure 6As shown in the figure, the main control module, signal processing module 1, and signal processing module 2 inside the chassis are all interconnected through the backplane IIC bus, Ethernet switch chip, and RapidIO switch chip. The general-purpose processor of the main control module and the ARM of the signal processing module achieve control-level interaction through the LAN. The general-purpose processor of the main control module and the FPGA of the signal processing module achieve high-speed data interaction through SRIO or PCIE. The ARM and FPGA inside the signal processing module achieve data interaction through the internal bus, and at the same time, the FPGA and the radio frequency transceiver interface of the radio frequency power amplifier module are interconnected through the radio frequency cable. The signal of the radio frequency power amplifier module is interconnected with the antenna interface through the radio frequency cable.

[0064] Based on the above general wideband data link terminal, the key technology of the present invention is to abstract the hardware resources of the above general wideband data link terminal based on the SCA software communication architecture to form a platform model independent of the hardware platform, and its model composition structure is as Figure 7 shown.

[0065] The general wideband data link terminal platform model mainly consists of a main node and multiple slave node models. The main node model is a logical abstraction of the main control module, including the general wideband data link terminal domain manager, general wideband data link terminal log service, main node device manager, main node GPP device, and main node data transmission device. Among them, the general wideband data link terminal domain manager realizes the unified management of all components (including device components, service components), nodes, file systems, logs, events, etc. in the general wideband data link terminal, including component registration and cancellation, component deployment, component location and reference. The general wideband data link terminal log service mainly realizes the collection, recording, query, and storage of internal log information of the general wideband data link terminal. The log information includes device information, component registration cancellation and deployment, etc. The main node device manager mainly manages the devices and services on the main node, including the creation, registration, cancellation, and release of the general wideband data link terminal log service, main node GPP device, and main node data transmission device. The main node GPP device is an abstraction of the general-purpose processor GPP on the main control module, and provides an interface for the deployment of GPP application components on the main node as an agent of the hardware. The main node data transmission device is an abstract physical network interface, which realizes the function of network communication between the main control and the signal processing module.

[0066] The slave node model is a logical abstraction of the signal processing module, including the slave node device manager, the slave node ARM device, the slave node FPGA device, the slave node RF device, and the MHAL device. The slave node device manager mainly manages the devices on the slave node, including the creation, registration, cancellation, and release of the slave node ARM device, the slave node FPGA device, the slave node RF device, and the MHAL device. The slave node ARM device and the FPGA device are respectively resource abstractions of the ARM core and the FPGA logic in the SOC chip of the signal processing module, providing interfaces for the deployment of application components (waveforms) on the ARM and FPGA on the slave node as hardware agents. The RF device on the slave node is an abstraction and agent of the RF power amplifier module, providing interfaces for the configuration and query of RF parameters. The MHAL device on the slave node is a unified data interface for realizing the communication between the ARM and the FPGA, and realizes two-way data transceiver according to the format of the MAHL packet.

[0067] Embodiment 3.

[0068] Traditional methods all implement cross-network communication of the data link through the complete process of hardware selection and matching, software deployment, platform deployment, waveform application deployment, and cross-network communication waveform application deployment. It is achieved through a complete redeployment method, similar to the cold start of a system. The method provided by the present invention realizes cross-network communication by switching waveforms when one or two waveforms have been deployed on the hardware platform.

[0069] S1. Deploy the data link waveform and the cross-network communication waveform on the general wideband data link terminal hardware.

[0070] Specifically, the current general wideband data link terminal can deploy the Link4a data link waveform, the Link11 data link waveform, and the Link11 and Link4a cross-network communication waveforms.

[0071] S2. According to the front-end requirements, detect whether there are relevant waveforms that can realize networking on the corresponding general wideband data link terminal hardware.

[0072] S3. If there are relevant waveforms that can realize networking on the general wideband data link terminal hardware, directly perform networking communication.

[0073] Specifically, if the user now needs the cross-network communication function of Link11 and Link11, and it is detected that the Link11 and Link11 data link waveforms are both deployed on the corresponding general wideband data link terminal hardware, then communication can be directly formed. Figure 3 A waveform diagram showing that direct networking communication can be performed is given.

[0074] S4. If there are no relevant waveforms in the general wideband data link terminal hardware that can achieve networking, stop and uninstall the relevant waveform applications through the SCA core framework control interface.

[0075] Specifically, now the user needs the cross-network communication function of Link11 and Link16. Through the SCA core framework control interface, first stop and uninstall the cross-network communication waveform applications of Link11 and Link4a, and then stop and uninstall the Link4a data link waveform applications.

[0076] S5. Install, create, and start the relevant waveform applications through the SCA core framework control interface.

[0077] Specifically, through the SCA core framework control interface, first install, create, and start the data link Link16 waveform application, and then install, create, and start the cross-network communication waveform applications of Link11 and Link16.

[0078] S6. Configure the relevant information for the cross-network communication of the relevant waveforms to implement the cross-network communication function of the relevant waveforms.

[0079] Specifically, configure the relevant information for the cross-network communication of Link11 and Link16 to implement the cross-network communication function of Link11 and Link16.

[0080] The situation of other waveform networking communications is similar, and their waveform switching processes are the same, except that the selected data link waveforms and cross-network communication waveform applications are different, which will not be elaborated here.

[0081] Embodiment 4.

[0082] Based on Embodiments 1 and 2, the key technology of the present invention is to construct a data link waveform application model based on the SCA software communication architecture, and divide the Link4a, Link11, and Link16 data link waveforms into multiple waveform application components, mainly including three parts: waveform application components on the main node GPP, waveform application components on the slave node ARM, and waveform application components on the slave node FPGA, which respectively process message applications, encoding and decoding, network time slots and link control, and baseband signal physical layer transceiver. For different data link waveforms, the application components and their specific implementation codes in these three parts are different.

[0083] The waveform application model of the Link4a data link is as Figure 8As shown in the figure. When sending data, the V / R message packet assembly component mainly receives the service data from the display control software, completes packet assembly according to the V / R message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes data CRC encoding and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link4a data link, coordinates the polling call mechanism between the master / slave stations, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, processed for baseband signal reception through the FPGA, sent to the link control component through the MHAL device component, decoded through the link control processing and sent to the decoder component, then sent to the V / R message unpacking processing through the main node data transmission device, and finally displayed through the display control software. The assembly controller mainly realizes the control and management of the waveform application component, including the creation / release, start, stop of the decoder component, encoder component, and link control component, and the dynamic configuration of waveform parameters.

[0084] The waveform application model of the Link11 data link is as Figure 9 shown. When sending data, the M message packet assembly component mainly receives the service data from the display control software, completes packet assembly according to the M message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes data BCH and CRC encoding and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link11 data link, coordinates the polling mechanism between the master / slave stations, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, processed for baseband signal reception through the FPGA, sent to the link control component through the MHAL device component, decoded for BCH and CRC through the link control processing and sent to the decoder component, then sent to the M message unpacking processing through the main node data transmission device, and finally displayed through the display control software.

[0085] The waveform application model of the Link16 data link is as Figure 10As shown in the figure. When sending data, the J message packet assembly component mainly receives the service data of the display control software, completes packet assembly in the J message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes RS and CRC encoding of the data and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link16 data link, coordinates network synchronization and network participation group and time slot allocation, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, processed for baseband signal reception through the FPGA, sent to the link control component through the MHAL device component, sent to the decoder component for RS and CRC decoding processing after link control processing, then sent to the M message unpacking processing through the main node data transmission device, and finally displayed through the display control software.

[0086] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0087] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the processes and / or blocks in the flowchart and / or block diagram can also be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0088] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including instruction means, and the instruction means implements the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0089] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus, so that a series of operation steps are executed on the computer or other programmable apparatus to produce a computer-implemented process, and thus the instructions executed on the computer or other programmable apparatus provide steps for realizing the functions specified in one process or a plurality of processes and / or blocks Figure 1 One process or a plurality of processes and / or blocks Figure 1 and steps of the functions specified in one block or a plurality of blocks.

[0090] Although the preferred embodiments of the present application have been described, additional changes and modifications can be made to these embodiments by those skilled in the art once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present application.

[0091] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A data link cross-network communication system, characterized in that, The system includes a data link terminal, an SCA deployment environment, a data link waveform application, a cross-network communication waveform application, and a display and control host. The SCA deployment environment mainly consists of an SCA core framework and a software-defined radio middleware, which can be deployed on the terminal hardware and mainly provides the core framework and middleware environment required for the deployment of software-defined radio waveform applications. The data link waveform application consists of Link11 waveform application, Link16 waveform application, and Link4a waveform application, which respectively implement the networking communication functions of Link11 data link, Link16 data link, and Link4a data link. The cross-network communication waveform application mainly consists of Link11 and Link16 cross-network communication waveform applications, Link11 and Link4a cross-network communication waveform applications, and Link16 and Link4a cross-network communication waveform applications. The cross-network communication waveform application mainly realizes the functions of receiving messages of two data links, message format conversion, and message forwarding.

2. The data link cross-network communication system according to claim 1, characterized in that The system consists of multiple sets of data link general wideband data link terminals, which are interconnected with the display and control host through LAN. The display and control host can manage and control the waveform applications and configuration files deployed on each general wideband data link terminal in the system through the interface of the SCA control framework and the software-defined radio middleware, and monitor the status and hardware configuration of the data link general wideband data link terminal. One or more data link waveform applications can be deployed according to the configuration.

3. The data link cross-network communication system according to claim 2, characterized in that, The data link general wideband data link terminals deployed with the same data link waveform application can network and communicate by themselves. The data link general wideband data link terminals deployed with the cross-network communication waveform application can realize cross-network communication and information sharing between different data link networks.

4. The data link cross-network communication system according to claim 1, characterized in that, The data link terminal includes a main control module, a signal processing module, a radio frequency power amplifier module, a chassis, a backplane, and an antenna. The signal processing module can be set with 2 to 3 pieces to support cross-network communication and data transmission. The backplane adopts a bus + switch architecture, including an IIC bus, a RapidIO switch, a network switch, and an SRIO bus. The main control module adopts a general-purpose processor GPP and installs an operating system. The signal processing module mainly adopts an SOC chip of ARM + FPGA, and an embedded operating system is installed on the ARM. The radio frequency power amplifier module supports segmented processing of radio frequency signals. The antenna includes antennas in the shortwave, ultra-shortwave, and satellite communication frequency bands.

5. The data link cross-network communication system according to claim 4, wherein, The main control module, signal processing module 1, and signal processing module 2 inside the chassis are interconnected through the backplane IIC bus, Ethernet switch chip, and RapidIO switch chip. The general-purpose processor of the main control module and the ARM of the signal processing module achieve interaction at the control level through LAN. The general-purpose processor of the main control module and the FPGA of the signal processing module achieve high-speed data interaction through SRIO or PCIE. The ARM and FPGA inside the signal processing module achieve data interaction through an internal bus. The radio frequency transceiver interface of the radio frequency power amplifier module is interconnected with the FPGA through a radio frequency cable, and the signal of the radio frequency power amplifier module is interconnected with the antenna interface through a radio frequency cable.

6. The data link cross-network communication system according to claim 5, wherein, The platform model of the data link terminal mainly consists of a master node and multiple slave node models. The master node model is a logical abstraction of the main control module, including a general wideband data link terminal domain manager, a general wideband data link terminal log service, a master node device manager, a master node GPP device, and a master node data transmission device.

7. The data link cross-network communication system according to claim 6, wherein The slave node model is a logical abstraction of the signal processing module, including a slave node device manager, a slave node ARM device, a slave node FPGA device, a slave node RF device, and an MHAL device.

8. A data link cross-network communication transmission method applied to the data link cross-network communication system according to claim 1, characterized in that, The steps of the method are as follows: S1. Deploy the data link waveform and cross-network communication waveform on the general wideband data link terminal hardware; S2. According to the front-end requirements, detect whether there are relevant waveforms on the corresponding general wideband data link terminal hardware that can achieve networking; S3. If there are relevant waveforms on the general wideband data link terminal hardware that can achieve networking, directly perform networking communication.

9. The data link cross-network communication transmission method according to claim 8, wherein The steps of the method further include: S4. If there are no relevant waveforms on the general wideband data link terminal hardware that can achieve networking, stop and uninstall the relevant waveform applications through the SCA core framework control interface; S5. Through the SCA core framework control interface, install, create, and start the relevant waveform applications; S6. Configure the relevant information for cross-network communication of the relevant waveforms to implement the cross-network communication function of the relevant waveforms.

10. The data link cross-network communication transmission method according to claim 9, wherein, When the Link11 data link waveform sends data, the M message packet assembly component mainly receives the service data of the display control software, completes packet assembly in the M message format, and sends it to the encoder component through the master node data transmission device. The encoder component completes data BCH and CRC encoding and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link11 data link, coordinates the polling mechanism between the master / slave stations, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is filtered and other processed, converted into a digital signal through the ADC, subjected to baseband signal reception processing by the FPGA, sent to the link control component through the MHAL device component, processed by the link control and then sent to the decoder component for BCH and CRC decoding processing, and then sent to the M message unpacking processing through the master node data transmission device, and finally displayed through the display control software.

11. The data link cross-network communication transmission method according to claim 10, characterized in that, When the Link16 data link waveform transmits data, the J-message packet assembly component mainly receives the service data from the display and control software, completes packet assembly in accordance with the J-message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes RS and CRC encoding of the data and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link16 data link, coordinates network synchronization and network participation group and time slot allocation, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, subjected to baseband signal reception processing through the FPGA, sent to the link control component through the MHAL device component, sent to the decoder component for RS and CRC decoding processing after link control processing, sent to the M-message unpacking processing through the main node data transmission device, and finally displayed through the display and control software.

12. The data link cross-network communication transmission method according to claim 11, wherein, When the Link4a data link waveform transmits data, the V / R-message packet assembly component mainly receives the service data from the display and control software, completes packet assembly in accordance with the V / R-message format, and sends it to the encoder component through the main node data transmission device. The encoder component mainly completes CRC encoding of the data and sends the encoded data to the link control component. The link control mainly realizes the network scheduling and timing control of the Link4a data link, coordinates the roll call mechanism between the master / slave stations, and sends the data to the FPGA through the MHAL device component for baseband signal transmission processing, converts it into an analog signal through the DAC, and performs radio frequency transmission after signal amplification and other processing by the radio frequency power amplifier module. When receiving data, the radio frequency signal entering from the radio frequency power amplifier module is processed through filtering and other processes, converted into a digital signal through the ADC, subjected to baseband signal reception processing through the FPGA, sent to the link control component through the MHAL device component, sent to the decoder component for decoding processing after link control processing, sent to the V / R-message unpacking processing through the main node data transmission device, and finally displayed through the display and control software. The assembly controller mainly realizes the control and management of the waveform application component, including the creation / release, start, stop of the decoder component, encoder component, and link control component, as well as the dynamic configuration of waveform parameters.

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