Scanning pulse driving type plasma array excitation system

Abstract

The invention discloses a scanning pulse driving type plasma array excitation system, and relates to the technical field of electronics and communication. Comprising a plurality of addressing pulse modules and a plurality of driving pulse modules, and when and only when the addressing pulse modules of the columns corresponding to the target exciters in the plasma array provide positive pressure pulses for the target exciters and the driving pulse modules of the corresponding rows provide negative pressure pulses for the target exciters, the target exciters are excited. A small number of pulse modules are used for efficiently driving the large-scale plasma array, the larger-scale plasma array can be supported under the same physical resource, and the requirement for the number of driving sources of the plasma array is reduced.

Description

Technical Field

[0001] The present invention relates to the field of electronics and communication technologies, and particularly to a scanning pulse-driven plasma array excitation system. Background Art

[0002] The pulsed plasma array excitation technology mainly uses high-voltage pulse signals generated by a pulsed power supply to excite a plasma exciter, thereby generating a plasma jet. The pulsed plasma array excitation technology has characteristics such as a strong local heating effect and a wide perturbation range. By applying a pulsed high voltage to the cathode and anode of the plasma exciter for excitation, a jet is generated. The pulsed high voltage can be converted and adjusted through circuit elements such as transformers and rectifiers to meet the requirements of different application scenarios.

[0003] In an array layout, multiple exciters can be excited simultaneously to generate multiple plasma jets, thereby achieving a wider flow control and energy transfer effect. However, in the existing plasma array excitation technology, one exciter corresponds to one drive source, and the number of drive sources is numerous. Summary of the Invention

[0004] Based on this, it is necessary to provide a scanning pulse-driven plasma array excitation system for the above technical problems.

[0005] An embodiment of the present invention provides a scanning pulse-driven plasma array excitation system, including: a plurality of addressing pulse modules and a plurality of drive pulse modules, and the addressing pulse modules and the drive pulse modules both include a flyback boost circuit; The flyback boost circuits in the plurality of addressing pulse modules are used to provide positive voltage pulses to the exciters in each column of the plasma array through the positive voltage output terminal, and the flyback boost circuits in the plurality of drive pulse modules are used to provide negative voltage pulses to the exciters in each row of the plasma array through the negative voltage output terminal; Only when the addressing pulse module corresponding to the column of the target exciter in the plasma array provides a positive voltage pulse to the target exciter and the drive pulse module corresponding to the row of the target exciter provides a negative voltage pulse to the target exciter, the target exciter is excited.

[0006] Optionally, the control signals of the plurality of addressing pulse modules and the plurality of drive pulse modules are PWM signals entering from the gate of the field effect transistor of the flyback boost circuit; When the PWM signal is at a low level, the addressing pulse module and the drive pulse module are in an invalid working state; When the PWM signal is at a high level, the addressing pulse module and the drive pulse module are in an effective working state.

[0007] Optionally, the control signals of each addressing pulse module are all kept at a high level, and the control signals of each driving pulse module are sequentially converted from a low level to a high level to implement a line-by-line scan of the plasma array.

[0008] Optionally, the control signals of each addressing pulse module are sequentially changed from a low level to a high level. When the control signals of each addressing pulse module are at a high level, the control signals of each driving pulse module are sequentially changed from a low level to a high level to implement a point-by-point scan of the plasma array; The time when the control signal of the driving pulse module is at a high level is a preset multiple of the time when the control signal of the addressing pulse module is at a high level.

[0009] Optionally, the primary side and the secondary side of the transformer in the flyback boost circuit in the driving pulse module are wound forward, and a first resistor is connected in series with the capacitor of the flyback boost circuit in the driving pulse module and a second resistor is connected in parallel, so that the attenuation speed of the negative pressure pulse output by the driving pulse module is slower than the attenuation speed of the positive pressure pulse output by the addressing pulse module.

[0010] Optionally, the breakdown voltages of the exciters in the plasma array satisfy: V t <V breakdown <2V t ; wherein, V breakdown represents the breakdown voltage, V t represents the positive pressure pulse, and 2V t represents the pressure difference between the positive pressure pulse and the negative pressure pulse.

[0011] Optionally, the number of addressing pulse modules is the number of columns of the plasma array, and the number of driving pulse modules is the number of rows of the plasma array.

[0012] For the above-mentioned scanning pulse-driven plasma array excitation system provided by the embodiments of the present invention, compared with the prior art, its beneficial effects are as follows: Through row-column scan control, the present invention simplifies the number of driving sources required by the traditional plasma array excitation technology from N (the number of columns of the plasma array) × M (the number of rows of the plasma array) to N + M. This "few-to-many" topological structure adopts time-division multiplexing technology, uses a small number of pulse modules to efficiently drive a large-scale plasma array, can support a larger-scale plasma array under the same physical resources, reduces the requirement for the number of driving sources of the plasma array, and achieves a double breakthrough in control efficiency and resource utilization rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram of a flyback circuit of a scanning pulse-driven plasma array excitation system provided in an embodiment; Figure 2 Schematic diagram of array driving of a scanning pulse-driven plasma array excitation system provided in an embodiment; Figure 3 Schematic diagram of the pulse generation circuit of a scanning pulse-driven plasma array excitation system provided in an embodiment. Specific implementation manners

[0014] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0015] In an embodiment, a scanning pulse-driven plasma array excitation system is provided, which includes: a plurality of addressing pulse modules and a plurality of driving pulse modules, and the addressing pulse modules and the driving pulse modules both include flyback boost circuits. The flyback boost circuits in the plurality of addressing pulse modules are used to provide positive voltage pulses to the exciters in each column of the plasma array through the positive voltage output terminals, and the flyback boost circuits in the plurality of driving pulse modules are used to provide negative voltage pulses to the exciters in each row of the plasma array through the negative voltage output terminals. Only when the addressing pulse module corresponding to the column of the target exciter in the plasma array provides a positive voltage pulse to the target exciter and the driving pulse module corresponding to the row of the target exciter provides a negative voltage pulse to the target exciter, the target exciter is excited.

[0016] 1. Technical solution.

[0017] The present invention includes two implementation structures to respectively meet the different scanning requirements of line-by-line scanning and point-by-point scanning. The common link of the two implementation structures is the flyback boost circuit. The flyback boost circuit is used to generate the ±V t pulse voltage required for the exciters in the plasma array to be excited. The positive voltage pulse and the negative voltage pulse are respectively applied to both ends of the exciter to achieve a pressure difference of 2V t to excite the exciters in the plasma array.

[0018] The control signals of the plurality of addressing pulse modules and the plurality of driving pulse modules are PWM signals that enter through the gate of the field effect transistor of the flyback boost circuit. When the PWM signal is at a low level, the addressing pulse module and the driving pulse module are in an invalid working state; when the PWM signal is at a high level, the addressing pulse module and the driving pulse module are in an effective working state.

[0019] The number of addressing pulse modules is the number of columns of the plasma array, and the number of driving pulse modules is the number of rows of the plasma array.

[0020] The control signals of each addressing pulse module are all kept at high level, and the control signals of each driving pulse module are sequentially converted from low level to high level, so as to realize the progressive scanning of the plasma array.

[0021] The control signals of each addressing pulse module are sequentially changed from low level to high level. When the control signals of each addressing pulse module are at high level, the control signals of each driving pulse module are sequentially changed from low level to high level, so as to realize the dot-by-dot scanning of the plasma array. The time when the control signal of the driving pulse module is at high level is a preset multiple of the time when the control signal of the addressing pulse module is at high level.

[0022] In the flyback boost circuit of the driving pulse module, the primary side and the secondary side of the transformer are wound forward, and the capacitor C of the flyback boost circuit in the driving pulse module is connected in series with a first resistor R1 and in parallel with a second resistor R2, so that the attenuation speed of the negative voltage pulse output by the driving pulse module is slower than the attenuation speed of the positive voltage pulse output by the addressing pulse module.

[0023] The design of the flyback boost circuit is based on the existing structure of the flyback circuit. The existing structure of the flyback circuit is as Figure 1 shown. Corresponding modifications are made to the circuit composition and component parameters according to the design requirements, such as the turns ratio of the transformer, the resistor-capacitor circuit at the secondary end of the transformer, etc., so as to achieve the design goal.

[0024] The array exciter is as Figure 2 shown. In the progressive scanning mode, only one driving pulse module in the array is in the working state at the same moment, while all addressing pulse modules are in the working state. When and only when the control signals of the driving pulse module and the addressing pulse module in the effective working state control both to output pulses, the corresponding exciter will be excited. Otherwise, even if the row and column where the current exciter is located are both in the effective working state, the exciter will not be broken down.

[0025] The defining condition for the working state of the exciter is: whether the scanning reaches the row where the target exciter is located. When the scanning reaches the position of the target exciter in the plasma array, the driving pulse module and the addressing pulse module at the corresponding row and column positions of the target exciter enter the working state.

[0026] The working state of the exciter is divided into an effective working state and an ineffective working state. The defining condition is: whether the two columns of PWM signals of the addressing pulse module and the driving pulse module controlling the current exciter are both square wave pulse signals; if so, the exciter is in the effective working state; if not, it is in the ineffective working state.

[0027] The addressing pulse module is controlled by two columns of synchronous PWM signals to provide a positive voltage pulse to the target exciter, and the driving pulse module provides a negative voltage pulse to the same target exciter, and the corresponding exciter is excited.

[0028] If one or more of the addressing pulse module and the driving pulse module that control the actuator are in an invalid working state, that is, if one or more of the two columns of PWM signals remain low during the working time, the actuator will not be excited even if the actuator is scanned. Whether any actuator is excited is determined by the PWM signals of each pulse module in the user control input array.

[0029] Technical solution 1: The implementation structure under progressive scanning.

[0030] Under the design requirements of progressive scanning, the present invention introduces a capacitive energy storage circuit on the basis of a flyback boost circuit to achieve the expected design goal. The introduction of the capacitive energy storage circuit is to overcome the time delay problem existing between the excitation voltages of each in the same row during the array row scanning process. By introducing the capacitive energy storage circuit, the decay rate of the -V t voltage is slowed down, making it slower than the decay of the +V t voltage, so as to ensure the successful breakdown of each actuator in the same row.

[0031] The schematic diagram of the designed pulse generation circuit is as Figure 3 shown. The pulse generation circuit is a circuit obtained by specifically designing a flyback boost circuit according to the design goal.

[0032] The pulse generation circuit includes: a transformer. The primary side N1 of the transformer is connected to the power supply Vs, the source electrode of the field effect transistor Q, and the drain electrode of the field effect transistor Q. The PWM signal that controls the operation of the pulse generation circuit is input through the gate electrode of the field effect transistor Q. The secondary side N2 of the transformer is respectively connected to vo1 (negative voltage output terminal) and vo2 (positive voltage output terminal). The secondary side N2 of the transformer is connected to the output terminal vo2 through the diode D1. The diode D1 is in series with the first resistor R1 and the capacitor C, and the capacitor C is in parallel with the second resistor R2.

[0033] In the actual circuit, a forward-wound transformer is used, so the arrangement of the diodes is adjusted. The PWM signal that controls the operation of the circuit is sent into the module from the gate electrode of the field effect transistor Q to control the on / off of the field effect transistor. The introduction of the resistor R2 provides a discharge circuit for the capacitor C, and the resistor R1 is used to increase the amplitude of the output voltage. According to the requirement of the output positive / negative voltage, vo1 / vo2 is grounded, and the non-grounded output terminal can output the corresponding positive / negative voltage value.

[0034] vo1 and vo2 are the two output terminals of the circuit. Among them, the electric potential of vo2 is higher than that of vo1, and the potential difference between the two is V t . In the driving pulse module, vo2 is set as the grounded output terminal, and vo1 is the non-grounded output terminal. Connect vo1 to the actuator. At this time, measure the voltage of vo1 with respect to the ground, which is -V t. In the addressing pulse module, set vo1 as the grounded output terminal and vo2 as the non-grounded output terminal. Connect vo2 to the exciter. At this time, measure the voltage of vo2 with respect to ground, which is +V t .

[0035] Technical Solution 2: Implementation structure under the background of point-by-point scanning.

[0036] Under the design requirements of point-by-point scanning, the present invention introduces N-frequency division technology on the basis of the flyback boost circuit to achieve the design goal. In the N-frequency division technology, N is the number of columns of the plasma array. The present invention generates excitation pulses by using a high-frequency drive signal at the input end to compress the time required to complete the scanning target of each row in point-by-point scanning, so as to meet the requirements of the array excitation frequency.

[0037] The N-frequency division technology is a design concept, which means that the output frequency is reduced exponentially relative to the input frequency. In the present invention, within the working time of each row, the outputs of each column are scanned in sequence. For a 10*10 plasma array, the single-row scanning time = 10 * single-column scanning time. Correspondingly, the frequency will be divided by ten.

[0038] 2. Implementation Scheme Implementation Scheme 1: Implementation structure under the background of progressive scanning.

[0039] Each column of the plasma array is powered by an independent addressing pulse module, and each row of the plasma array is powered by an independent drive pulse module. When the circuit works, each addressing pulse module works simultaneously, while each drive pulse module works sequentially, thereby achieving the goal of progressive scanning.

[0040] The positioning idea for the target exciter is as follows: When scanning to the row where the target is located, control the two-column PWM signals of the addressing pulse module and the drive pulse module to change from low level to high level, and the corresponding drive pulse module outputs -V t pulse voltage. At the same time, the control PWM of the addressing pulse corresponding to the column is also valid, and the addressing pulse module outputs +V t pulse voltage to generate a 2V t pressure difference across the exciter. Correspondingly, the breakdown voltage of the exciter should be designed to satisfy V t <V breakdown <2V t relationship so that breakdown can occur and can only occur when both the row and column control signals are valid. Among them, V breakdown represents the breakdown voltage, V t represents the positive voltage pulse, and 2V t represents the pressure difference between the positive voltage pulse and the negative voltage pulse.

[0041] In an actual circuit, the time delay between driving signals is inevitable, which may cause the following problems: during the line scanning process, although there are multiple columns of valid signals to control the output of +V of the multi-column addressing pulse module t voltage, due to the asynchronous change of each addressing pulse, some exciters boost the voltage first and are excited, causing the exciters to break down. After the exciters break down, the -V t voltage of the driving pulse module quickly changes to 0, making the remaining exciters in the current line unable to be successfully excited because the maximum voltage drop across both ends is less than V breakdown Therefore, by designing a capacitive energy storage circuit, the discharge time of the driving pulse is significantly longer than that of the addressing pulse, and the attenuation speed of the negative voltage pulse output by the driving pulse module is slower than that of the positive voltage pulse output by the addressing pulse module, so as to achieve a certain degree of voltage stabilization of the driving pulse, enabling all exciters to be excited to break down successfully.

[0042] Embodiment 2: The implementation structure under the background of dot-by-dot scanning.

[0043] Each column of the plasma array is powered by an independent addressing pulse module, and each row of the plasma array is powered by an independent driving pulse module. When the circuit works, each addressing pulse module works in sequence, and each driving pulse module works in sequence, thus achieving the goal of dot-by-dot scanning. There are two nested scans in the working circuit. The longer scan period is the line scan, and within the line scan, each column is scanned in sequence to finally achieve the goal of dot-by-dot scanning.

[0044] The working mode is as follows: during the working time of a driving pulse module, each addressing pulse module enters the working state in sequence until all addressing pulse modules complete the scan. Then the next driving pulse module enters the working state, and thereafter each addressing pulse module enters the working state in sequence again. Taking Figure 2 as an example, the scanning order is G11 - G12 - G13 - G14 - G15 - G21 - G22 - …… - G64 - G65.

[0045] The large loop of the exciter scan is line-by-line scanning, and each row enters the scan cycle in sequence. The scan of each column is nested within the line scan, that is, within the scan cycle of each row, each column enters the scan state in sequence. At the same moment, only one row and one column are in the scan state, and the signals of the remaining rows and columns are set to invalid. When the control signals of the current row and column are both set to valid, the exciter is correspondingly excited.

[0046] The positioning idea for the target exciter is as follows: when scanning to the row where the target is located, the PWM signal of the driving pulse module changes from low level to high level, and the driving pulse module continuously outputs a -V t pulse voltage under the control of high-frequency PWM. At the same time, columns 1 to N are scanned in sequence, and the corresponding columns to be excited output +V t, and the rest of the scanning moments output 0 values to generate a pressure difference of 2V across the exciters to be excited in each row in turn t The corresponding exciter should be designed such that its breakdown voltage V breakdown Satisfies V t < V breakdown < 2V t To ensure that breakdown can occur only when both row and column control signals are valid.

[0047] A comparative embodiment of the present invention is provided. Taking a 10*10 plasma array as an example: The prior art requires 100 drive sources to excite 100 exciters in the plasma array. With the present invention, the number of drive sources used can be compressed to 20. 10 rows are powered by 10 drive pulse modules respectively, and 10 columns are powered by 10 addressing pulse modules respectively.

[0048] It can be seen that the present invention can achieve row-by-row and point-by-point scanning drive of the plasma array; in the row-by-row scanning drive, each target exciter in the row is excited in units of rows; in the point-by-point scanning drive, by using high-frequency PWM to control the drive pulse module, the PWM with its N-frequency division and duty cycle reduced to 1 / N of the original duty cycle is used to control the operation of each column in turn, achieving the design goals of N-frequency division of the row scanning frequency and sequential breakdown of each exciter. It can reduce the requirement for the number of drive sources for plasma array excitation, and reduce the space occupation and self-weight of the exciters.

[0049] The above embodiments only represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can be made, and these all belong to the protection scope of the present invention.

Claims

1. A scanning pulse driven plasma array excitation system, characterized in that: include: A plurality of addressing pulse modules and a plurality of driving pulse modules, wherein the addressing pulse modules and the driving pulse modules each include a flyback boost circuit; The flyback boost circuits in the plurality of address pulse modules are used to provide positive voltage pulses to the actuators of each column in the plasma array through the positive voltage output terminal, and the flyback boost circuits in the plurality of drive pulse modules are used to provide negative voltage pulses to the actuators of each row in the plasma array through the negative voltage output terminal; The target actuator is activated when and only when the address pulse module of the corresponding column of the target actuator in the plasma array provides a positive voltage pulse to the target actuator and the driving pulse module of the corresponding row provides a negative voltage pulse to the target actuator.

2. A scanning pulse driven plasma array excitation system as claimed in claim 1, characterized in that: The control signals of the plurality of addressing pulse modules and the plurality of driving pulse modules are PWM signals inputted from the gate of the field effect tube of the flyback boost circuit; When the PWM signal is at a low level, the addressing pulse module and the driving pulse module are in an invalid working state; When the PWM signal is at a high level, the addressing pulse module and the driving pulse module are in an effective working state.

3. A scanning pulse driven plasma array excitation system as claimed in claim 2, characterized in that: The control signals of each addressing pulse module are kept at a high level, and the control signals of each driving pulse module are sequentially converted from a low level to a high level, so as to realize the row-by-row scanning of the plasma array.

4. A scanning pulse driven plasma array excitation system as claimed in claim 2, characterized in that: The control signals of each addressing pulse module are sequentially changed from low level to high level, and when the control signals of each addressing pulse module are at high level, the control signals of each driving pulse module are sequentially changed from low level to high level, so as to realize point-by-point scanning of the plasma array; The time during which the control signal of the driving pulse module is at a high level is a preset multiple of the time during which the control signal of the addressing pulse module is at a high level.

5. A scanning pulse driven plasma array excitation system as claimed in claim 3 or 4, characterized in that: The primary and secondary sides of the transformer in the flyback boost circuit in the driving pulse module are forward wound, and the capacitor of the flyback boost circuit in the driving pulse module is connected in series with a first resistor and in parallel with a second resistor, so that the decay speed of the negative voltage pulse output by the driving pulse module is slower than the decay speed of the positive voltage pulse output by the addressing pulse module.

6. A scanning pulse driven plasma array excitation system as claimed in claim 1, characterized in that: The breakdown voltage of each actuator in the plasma array satisfies: V t <V breakdown <2V t ; Among them, V breakdown Indicates the breakdown voltage, V t Indicates positive voltage pulse, 2V t Indicates the pressure difference between the positive pressure pulse and the negative pressure pulse.

7. A scanning pulse driven plasma array excitation system as claimed in claim 1, characterized in that: The number of the addressing pulse modules is the number of columns of the plasma array, and the number of the driving pulse modules is the number of rows of the plasma array.

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