Preparation method of solar cell and solar cell

Abstract

The invention relates to the technical field of photovoltaic cells, in particular to a preparation method of a solar cell and the solar cell, the solar cell comprises grid lines, and the preparation method of the solar cell comprises the steps that a silicon substrate is prepared, and the back face of the silicon substrate is provided with a first area and a second area, projections of the grid lines in the thickness direction of the solar cell are located in the first area, and the second area is an area outside the first area; texturing the front surface and the back surface of the silicon substrate; generating an emitter on the front surface of the silicon substrate; sequentially generating a tunneling oxide layer and a doped conductive layer on the back surface of the silicon substrate; and removing the tunneling oxide layer and the doped conductive layer corresponding to the second region on the back surface of the silicon substrate. The second region is not provided with a tunneling oxide layer and a doped conductive layer, so that parasitic absorption of the second region can be reduced, the tunneling oxide layer and the doped conductive layer of the second region are prevented from absorbing more incident light, light energy is prevented from being converted into heat energy instead of electric energy, and the working efficiency of the solar cell can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and particularly relates to a preparation method of a solar cell and a solar cell. Background Art

[0002] Tunnel Oxide Passivating Contact (Topcon) cells are a type of photovoltaic solar cells, which have advantages such as high conversion efficiency, low attenuation performance, and high mass production cost performance. Topcon cells have metal electrodes, and the area corresponding to the metal electrodes is the metal contact area, and the remaining area is called the non-metal contact area. Tunneling oxide layers and doped conductive layers are provided in both the metal contact area and the non-metal contact area, resulting in relatively high parasitic absorption in the non-metal contact area, which affects the working efficiency of Topcon cells. Summary of the Invention

[0003] To solve the above technical problems, the present application provides a preparation method of a solar cell and a solar cell, which is beneficial to solving the problem of relatively high parasitic absorption in the non-metal contact area in the prior art.

[0004] In a first aspect, the present application provides a preparation method of a solar cell. The solar cell includes grid lines. The preparation method of the solar cell includes: Preparing a silicon substrate, the back surface of the silicon substrate has a first region and a second region, the projection of the grid lines along the thickness direction of the solar cell is located in the first region, and the second region is the region outside the first region; Texturing the front and back surfaces of the silicon substrate; Generating an emitter on the front surface of the silicon substrate; Sequentially generating a tunneling oxide layer and a doped conductive layer on the back surface of the silicon substrate; Removing the tunneling oxide layer and the doped conductive layer at the position corresponding to the second region on the back surface of the silicon substrate.

[0005] In this embodiment, after a tunneling oxide layer and a doped conductive layer are sequentially formed on the back surface of the silicon substrate, the beneficial effect of removing the tunneling oxide layer and the doped conductive layer at the position corresponding to the second region on the back surface of the silicon substrate is as follows: Since the second region does not correspond to the position of the gate line, the second region is a non-metal contact region. By not providing a tunneling oxide layer and a doped conductive layer in the second region, parasitic absorption in the second region can be reduced, and it can be avoided that the tunneling oxide layer and the doped conductive layer in the second region absorb a large amount of incident light, resulting in the conversion of light energy into heat energy rather than electrical energy, thereby improving the working efficiency of the solar cell. At the same time, in the method for manufacturing a solar cell provided in the embodiment of the present application, there is no need to perform an alkali polishing step on the back surface of the silicon substrate, so that the velvet structure on the back surface of the silicon substrate can be retained. During the use of the solar cell, when the first region of the silicon substrate is a velvet structure, the effective surface area can be increased, and the transport of carriers can be optimized, thereby improving the fill factor and further enhancing the working performance of the solar cell. In addition, compared with the method for manufacturing a solar cell in the related art, the method for manufacturing a solar cell provided in the embodiment of the present application can omit the alkali polishing process, simplify the manufacturing process, and reduce the manufacturing cost at the same time.

[0006] In a specific embodiment, in the step of removing the tunneling oxide layer and the doped conductive layer at the position corresponding to the second region on the back surface of the silicon substrate, the method for manufacturing the solar cell specifically includes: Laser is used to remove the tunneling oxide layer, the doped conductive layer, and a part of the structure on the back surface of the silicon substrate corresponding to the second region.

[0007] In a specific embodiment, the method for manufacturing the solar cell further includes: the laser frequency is 580KHz - 620KHz, and the speed is 48000mm / s - 52000mm / s.

[0008] In a specific embodiment, in the step of forming a tunneling oxide layer on the back surface of the silicon substrate, the method for manufacturing the solar cell satisfies at least one of the following conditions: the flow rate of the reaction gas introduced is 15750sccm - 28750sccm, the reaction time is 420s - 880s, and the reaction temperature is 593°C - 630°C.

[0009] In a specific embodiment, when forming the doped conductive layer on the tunneling oxide layer, the method for manufacturing the solar cell satisfies at least one of the following conditions: the flow rate of the reaction gas introduced is 1050sccm - 2300sccm, the reaction time is 1365s - 2420s, and the reaction temperature is 593°C - 650°C.

[0010] In a specific embodiment, in the step of forming an emitter on the front surface of the silicon substrate, the method for manufacturing the solar cell further includes: Form an emitter and a first glass layer on the front and back surfaces of the silicon substrate; Remove the first glass layer on the back surface of the silicon substrate by chain pickling.

[0011] In a specific embodiment, in the step of sequentially forming a tunneling oxide layer and the doped conductive layer on the back surface of the silicon substrate, the method for manufacturing the solar cell further includes: Sequentially form the tunneling oxide layer, the doped conductive layer, and the second glass layer on the front and back surfaces of the silicon substrate; After the step of removing the tunneling oxide layer and the doped conductive layer at the position corresponding to the second region on the back surface of the silicon substrate, the method for manufacturing the solar cell further includes: Remove the second glass layer on the front surface of the silicon substrate by chain pickling; Remove the tunneling oxide layer, the doped conductive layer, the first glass layer on the front surface of the silicon substrate, and the second glass layer on the back surface of the silicon substrate by wet chemical cleaning.

[0012] In a second aspect, an embodiment of the present application further provides a solar cell, which is manufactured by the method for manufacturing the solar cell described above; Among them, along the thickness direction of the solar cell, a tunneling oxide layer and a doped conductive layer are provided at the position corresponding to the first region on the back surface of the silicon substrate, and a polished surface is provided at the position corresponding to the second region on the back surface of the silicon substrate.

[0013] In this embodiment, the beneficial effects of the solar cell are as follows: The first region of the solar cell is a metal contact region, and the second region is a non-metal contact region. A tunneling oxide layer and a doped conductive layer are provided in the first region. Through the synergistic effect of the tunneling oxide layer and the doped conductive layer, high-efficiency passivation, low-resistance contact, and structural stability can be achieved, thereby ensuring the working efficiency of the solar cell. And the tunneling oxide layer and the doped conductive layer are not provided in the second region, which can reduce the parasitic absorption in the second region and avoid the tunneling oxide layer and the doped conductive layer in the second region absorbing too much incident light, resulting in the conversion of light energy into heat energy rather than electrical energy, thereby further improving the working efficiency of the solar cell. And a polished surface is provided at the position corresponding to the second region on the back surface of the silicon substrate, which can also improve the reflection performance at the position corresponding to the second region on the back surface of the silicon substrate, enhance the secondary reflection absorption of the incident light, thereby increasing the short-circuit current to improve the working efficiency of the solar cell.

[0014] In a specific embodiment, along the thickness direction of the solar cell, the back surface of the silicon substrate corresponding to the first region is a textured surface.

[0015] In a specific embodiment, the thickness of the silicon substrate at the position corresponding to the first region is greater than the thickness of the silicon substrate at the position corresponding to the second region; the difference between the thickness of the silicon substrate at the position corresponding to the first region and the thickness of the silicon substrate at the position corresponding to the second region is 3 mm - 5 mm. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0017] Figure 1 It is a schematic structural diagram of the solar cell provided by the present application in a specific embodiment; Figure 2 It is Figure 1 a schematic structural diagram of the silicon substrate in Figure 3 It is a schematic structural diagram corresponding to step S131 of the preparation method of the solar cell provided by the present application; Figure 4 It is a schematic structural diagram corresponding to step S132 of the preparation method of the solar cell provided by the present application; Figure 5 It is a schematic structural diagram corresponding to steps S141 and S142 of the preparation method of the solar cell provided by the present application; Figure 6 It is a schematic structural diagram corresponding to step S151 of the preparation method of the solar cell provided by the present application; Figure 7 It is a schematic structural diagram corresponding to step S16 of the preparation method of the solar cell provided by the present application; Figure 8 It is a schematic structural diagram corresponding to step S17 of the preparation method of the solar cell provided by the present application; Reference numerals: 1 - Solar cell; 11 - Silicon substrate; 111 - First region; 112 - Second region; 12 - Emitter; 13 - First glass layer; 14 - Tunneling oxide layer; 15 - Doped conductive layer; 16 - Second glass layer; 17 - First grid line; 18 - First passivation layer; 19 - Second passivation layer; 20 - Second gate line. Detailed implementation manners

[0018] For a better understanding of the technical solutions of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0019] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0020] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "the" and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0021] It should be understood that the term " / and / " used herein is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0022] Photovoltaic cells can convert solar energy into electrical energy, and have the advantages of being pollution-free, having no geographical restrictions, and being inexhaustible. They are the main direction for developing new energy in the future. As a type of photovoltaic cell, the back surface of a Topcon cell is provided with a tunneling oxide layer and a doped conductive layer, and the two together form a passivated contact structure, providing good interface passivation for the back surface of the silicon wafer. The Topcon cell also has gate lines, and the area corresponding to the gate lines is the metal contact area, and the remaining area is the non-metal contact area. Tunneling oxide layers and doped conductive layers are provided in both the metal contact area and the non-metal contact area of the Topcon cell, resulting in a relatively high parasitic absorption in the non-metal area, which affects the working efficiency of the Topcon cell.

[0023] To solve the above technical problems, as Figures 1 to 8 shown, the embodiments of the present application provide a preparation method of a solar cell 1. The solar cell 1 includes gate lines, and the preparation method of the solar cell 1 includes but is not limited to the following steps: S11: Prepare a silicon substrate 11. The back surface of the silicon substrate 11 has a first area 111 and a second area 112. The projection of the gate line along the thickness direction of the solar cell 1 is located in the first area 111, and the second area 112 is the area outside the first area 111; S12: Texturize the front and back surfaces of the silicon substrate 11; S13: Generate an emitter 12 on the front surface of the silicon substrate 11; S14: Sequentially generate a tunneling oxide layer 14 and a doped conductive layer 15 on the back surface of the silicon substrate 11; S15: Remove the tunneling oxide layer 14 and the doped conductive layer 15 at the position corresponding to the second region 112 on the back surface of the silicon substrate 11.

[0024] In this embodiment, after sequentially generating the tunneling oxide layer 14 and the doped conductive layer 15 on the back surface of the silicon substrate 11, the tunneling oxide layer 14 and the doped conductive layer 15 at the position corresponding to the second region 112 on the back surface of the silicon substrate 11 are removed. Since the second region 112 does not correspond to the position of the gate line, the second region 112 is a non-metal contact region. By not providing the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112, the parasitic absorption in the second region 112 can be reduced, and the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 can be prevented from absorbing too much incident light, resulting in the conversion of light energy into heat energy rather than electrical energy. Thus, the working efficiency of the solar cell 1 can be improved. At the same time, in the preparation method of the solar cell 1 provided in the embodiment of the present application, there is no need to perform an alkali polishing step on the back surface of the silicon substrate 11, so that the suede structure on the back surface of the silicon substrate 11 can be retained. During the use of the solar cell 1, the first region 111 of the silicon substrate 11 is in a suede structure, which can increase the effective surface area and optimize the carrier transport, thereby improving the fill factor and further enhancing the working performance of the solar cell 1.

[0025] In addition, compared with the preparation method of the solar cell in the related art, the preparation method of the solar cell 1 provided in the embodiment of the present application can omit the alkali polishing process, simplify the preparation process, and reduce the preparation cost at the same time.

[0026] In the above embodiment, the silicon substrate 11 can be an N-type silicon substrate or a P-type silicon substrate. When the silicon substrate 11 is an N-type silicon substrate, the emitter 12 on the front surface can be a boron-doped layer, and the doped conductive layer 15 on the back surface can be a phosphorus-doped layer. When the silicon substrate 11 is a P-type silicon substrate, the emitter 12 on the front surface can be a phosphorus-doped layer, and the doped conductive layer 15 on the back surface can be a boron-doped layer. In other embodiments, the emitter 12 on the front surface of the silicon substrate 11 and the doped conductive layer 15 on the back surface can also be formed by doping with other elements. The present application does not specifically limit the doping elements and can be adjusted according to the actual situation.

[0027] The embodiment of the present application also provides a solar cell 1, as Figure 1As shown, the solar cell 1 is fabricated by the above-mentioned method for fabricating the solar cell 1. The solar cell 1 may include a silicon substrate 11, and the silicon substrate 11 has a first region 111 and a second region 112. The solar cell 1 further includes grid lines, and the projection of the grid lines in the thickness direction of the solar cell 1 is located in the first region 111, and the second region 112 is the region outside the first region 111. Along the thickness direction of the solar cell 1, a tunneling oxide layer 14 and a doped conductive layer 15 are provided at the position corresponding to the first region 111 on the back surface of the silicon substrate 11, and the position corresponding to the second region 112 on the back surface of the silicon substrate 11 is a polished surface.

[0028] In this embodiment, the first region 111 of the solar cell 1 is a metal contact region, and the second region 112 is a non-metal contact region. A tunneling oxide layer 14 and a doped conductive layer 15 are provided in the first region 111. Through the synergistic effect of the tunneling oxide layer 14 and the doped conductive layer 15, high-efficiency passivation, low-resistance contact, and structural stability can be achieved, thereby ensuring the working efficiency of the solar cell 1. And the tunneling oxide layer 14 and the doped conductive layer 15 are not provided in the second region 112, which can reduce the parasitic absorption in the second region 112 and avoid the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 from absorbing more incident light, resulting in the conversion of light energy into heat energy rather than electrical energy, so as to further improve the working efficiency of the solar cell 1. And the position on the back surface of the silicon substrate 11 corresponding to the second region 112 is a polished surface, which can also improve the reflection performance of the position on the back surface of the silicon substrate 11 corresponding to the second region 112, enhance the secondary reflection absorption of the incident light, thereby increasing the short-circuit current to improve the working efficiency of the solar cell 1.

[0029] In a specific embodiment, as Figure 1 shown, along the thickness direction of the solar cell 1, the position on the back surface of the silicon substrate 11 corresponding to the first region 111 may be a textured surface.

[0030] In this embodiment, by omitting the alkaline polishing process, the textured surface structure at the position on the back surface of the silicon substrate 11 corresponding to the first region 111 can be retained to increase the effective surface area and optimize the carrier transport, so as to improve the fill factor and further improve the working performance of the solar cell 1.

[0031] The solar cell in the above embodiment may be a topcon cell, such as Figure 1As shown in the figure, the topcon cell may further include structures such as grid lines, a passivation layer, an emitter, etc. Along its thickness direction, the topcon cell may sequentially include a first grid line 17, a first passivation layer 18, an emitter 12, a silicon substrate 11, a tunneling oxide layer 14, a doped conductive layer 15, a second passivation layer 19, and a second grid line 20. Among them, the tunneling oxide layer 14 and the doped conductive layer 15 can jointly form a passivated contact structure, which can block the recombination of minority carrier holes and improve the open-circuit voltage of the solar cell 1. Specifically, the tunneling oxide layer 14 can enable majority carrier electrons to tunnel into the doped conductive layer 15 while blocking the recombination of minority carrier holes, having a good passivation effect. The doped conductive layer 15 can induce band bending, thereby forming a field passivation effect, greatly increasing the probability of electron tunneling, improving the open-circuit voltage of the solar cell 1, and thus improving the photoelectric conversion efficiency of the solar cell 1.

[0032] In a specific embodiment, as Figures 1 to 4 shown, the above step S13 may further include but is not limited to: S131: Generate an emitter 12 and a first glass layer 13 on the front and back surfaces of the silicon substrate 11 in sequence; After step S131, the method for manufacturing the solar cell 1 provided by the embodiment of the present application may further include: S132: Remove the first glass layer 13 and the emitter 12 on the back surface of the silicon substrate 11 by chain pickling.

[0033] In this embodiment, during the boron diffusion process, an emitter 12 and a by-product first glass layer 13 will be generated on the front and back surfaces of the silicon substrate 11 at the same time. Through chain pickling, the first glass layer 13 and the emitter 12 on the back surface of the silicon substrate 11 can be removed separately, so as to deposit a tunneling oxide layer 14 and a doped conductive layer 15 on the back surface of the silicon substrate 11 in the subsequent manufacturing process, so that the emitter 12 on the front surface of the silicon substrate 11 and the doped conductive layer 15 on the back surface of the silicon substrate 11 can form a PN junction.

[0034] In a specific embodiment, as Figure 4 and Figure 5 shown, when generating the tunneling oxide layer 14 and the doped conductive layer 15 on the back surface of the silicon substrate 11, the above step S14 may further include but is not limited to: S141: Generate a tunneling oxide layer 14 on the front and back surfaces of the silicon substrate 11; S142: Sequentially generate a doped conductive layer 15 and a second glass layer 16 on the tunneling oxide layer 14.

[0035] In the above embodiments, when the tunneling oxide layer 14 is formed on the back surface of the silicon substrate 11, at least one of the following conditions may be satisfied in the above step S141: the flow rate of the reaction gas introduced is 15750 sccm - 28750 sccm, the reaction time is 420 s - 880 s, and the reaction temperature is 593 °C - 630 °C.

[0036] In this embodiment, since the method for preparing a solar cell provided in the embodiments of the present application omits the alkali polishing step, the back surface of the silicon substrate 11 still retains the textured structure. When the tunneling oxide layer 14 is deposited on the back surface of the silicon substrate 11, a smooth and flat morphology is not formed on the back surface of the silicon substrate 11. Therefore, at least one of the following conditions is satisfied in step S141: the flow rate of the reaction gas introduced is 15750 sccm - 28750 sccm, the reaction time is 420 s - 880 s, and the reaction temperature is 593 °C - 630 °C, so as to improve the uniformity during the deposition of the tunneling oxide layer 14 to meet the usage requirements of the solar cell.

[0037] Optionally, the flow rate of the reaction gas introduced is 15750 sccm - 28750 sccm. For example, the flow rate of the reaction gas introduced can be 15750 sccm, 20000 sccm, 28750 sccm, etc. Compared with the related art, the flow rate of the reaction gas introduced can be increased by 5% - 15%. Alternatively, the reaction time is 420 s - 880 s. For example, the reaction time can be 420 s, 600 s, 880 s, etc. Compared with the related art, the reaction time can be increased by 5% - 10%. Alternatively, the reaction temperature is 593 °C - 630 °C. For example, the reaction temperature can be 593 °C, 610 °C, 630 °C, etc. Compared with the related art, the reaction temperature can be increased by 3 °C - 10 °C. By increasing at least one of the three conditions of the reaction gas flow rate, the reaction time, or the reaction temperature, the uniformity during the deposition of the tunneling oxide layer 14 can be improved, and the electrical properties of the tunneling oxide layer 14 can meet the usage requirements of the solar cell.

[0038] In other embodiments, the flow rate of the reaction gas, the reaction time, and the reaction temperature during the preparation of the tunneling oxide layer 14 can also be other values. The embodiments of the present application do not limit their specific values and can be adaptively adjusted according to the actual situation.

[0039] In the above embodiments, as Figure 5 shown, while the doped conductive layer 15 is formed on the tunneling oxide layer 14, a by-product, the second glass layer 16, is also formed. At least one of the following conditions may be satisfied in the above step S142: the flow rate of the reaction gas introduced is 1050 sccm - 2300 sccm, the reaction time is 1365 s - 2420 s, and the reaction temperature is 593 °C - 650 °C.

[0040] In this embodiment, since the alkali polishing step is omitted in the method for preparing a solar cell provided by the embodiment of the present application, the back surface of the silicon substrate 11 still retains the textured structure, so that the generated tunneling oxide layer 14 also has the textured structure characteristics. Therefore, at least one of the following conditions is satisfied for step S142: the flow rate of the reaction gas is 1050 sccm - 2300 sccm, the reaction time is 1365 s - 2420 s, and the reaction temperature is 593 °C - 650 °C, thereby improving the uniformity of the doped conductive layer 15 during deposition and doping, reducing the defect density, and meeting the usage requirements of the solar cell.

[0041] Optionally, the flow rate of the reaction gas is 1050 sccm - 2300 sccm. For example, the flow rate of the reaction gas can be 1050 sccm, 1800 sccm, 2300 sccm, etc. Compared with the related art, the flow rate of the reaction gas can be increased by 5% - 15%. Alternatively, the reaction time is 1365 s - 2420 s. For example, the reaction time can be 1365 s, 1800 s, 2420 s, etc. Compared with the related art, the reaction time can be increased by 5% - 10%. Alternatively, the reaction temperature is 593 °C - 650 °C. For example, the reaction temperature can be 593 °C, 610 °C, 650 °C, etc. Compared with the related art, the reaction temperature can be increased by 3 °C - 10 °C. By increasing at least one of the three conditions of the reaction gas flow rate, the reaction time, or the reaction temperature, the uniformity of the doped conductive layer 15 during deposition can be improved, the defect density can be reduced, and the electrical properties of the doped conductive layer 15 can meet the usage requirements of the solar cell.

[0042] In other embodiments, the flow rate of the reaction gas, the reaction time, and the reaction temperature during the preparation of the doped conductive layer 15 can also be other values. The embodiment of the present application does not limit the specific values thereof, and can be adaptively adjusted according to the actual situation.

[0043] In the above embodiment, as Figure 4 and Figure 5 shown, since the alkali polishing process is omitted in the preparation process of the solar cell and the textured structure on the back surface of the silicon substrate 11 is retained, when the tunneling oxide layer 14 and the doped conductive layer 15 are sequentially deposited on the back surface of the silicon substrate 11, at least one of the reaction conditions such as the temperature, the reaction gas flow rate, or the reaction time during the deposition process needs to be increased.

[0044] Meanwhile, compared with the preparation method in the prior art, where alkali polishing is performed first and then the metal contact area is re-textured separately, in the preparation method of the solar cell provided by the embodiments of the present application, by omitting the alkali polishing step and retaining the textured surface structure of the silicon substrate 11, it is possible to avoid damage to the silicon substrate 11 caused by reasons such as a high-temperature and high-pressure environment or uneven alkali solution corrosion during the alkali polishing and cleaning process, resulting in cracks on the surface of the silicon substrate 11 or uneven thickness of the silicon substrate 11, thereby affecting the yield. Moreover, compared with the preparation method in the related art, where a mask needs to be set to separately shield the non-metal contact area, in the preparation method of the solar cell provided by the embodiments of the present application, by using a laser to remove the textured surface structure of the non-metal contact area (i.e., the second area), the purpose of only retaining the textured surface structure of the metal contact area is achieved, and there is no need to set a mask, which can further simplify the preparation process.

[0045] In the above embodiments, as Figure 4 and Figure 5 shown, when the silicon substrate 11 is an N-type silicon substrate, the front emitter 12 can be a boron-doped layer, and the back doped conductive layer 15 can be a phosphorus-doped layer. At this time, the first glass layer 13 can be a borosilicate glass layer, and the second glass layer 16 can be a phosphosilicate glass layer. When the silicon substrate 11 is a P-type silicon substrate, the front emitter 12 can be a phosphorus-doped layer, and the back doped conductive layer 15 can be a boron-doped layer. At this time, the first glass layer 13 can be a phosphosilicate glass layer, and the second glass layer 16 can be a borosilicate glass layer. In other embodiments, the front emitter 12 and the back doped conductive layer 15 of the silicon substrate 11 can also be formed by doping with other elements, so that the first glass layer 13 and the second glass layer 16 can also have other structures. The embodiments of the present application do not limit their specific structures and can be adjusted according to actual situations.

[0046] In a specific embodiment, as Figure 6 shown, in the step of removing the tunneling oxide layer 14 and the doped conductive layer 15 at the position corresponding to the second area 112 on the back of the silicon substrate 11, the above step S15 may include but is not limited to: S151: Using a laser to remove the tunneling oxide layer 14, the doped conductive layer 15, and a part of the structure on the back of the silicon substrate 11 at the position corresponding to the second area 112.

[0047] In this embodiment, by laser patterning, the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed, which can reduce the parasitic absorption generated in the second region 112 during the use of the solar cell, thereby improving the light absorption efficiency and the working efficiency of the solar cell. Moreover, using laser for etching has the advantages of high precision, low preparation cost, and strong process flexibility. At the same time, when the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed by laser, some structures on the back of the silicon substrate 11 corresponding to the second region 112 can also be removed, which can not only ensure that the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed completely, but also remove the textured structure on the back of the silicon substrate 11 corresponding to the second region 112, providing a foundation for making the position of the silicon substrate 11 corresponding to the second region 112 a polished surface during the subsequent preparation process.

[0048] In a specific embodiment, as Figure 6 shown, for the solar cell prepared by the above step S151, the thickness of the silicon substrate 11 at the position corresponding to the first region 111 is greater than the thickness of the silicon substrate 11 at the position corresponding to the second region 112. The difference between the thickness of the silicon substrate 11 at the position corresponding to the first region 111 and the thickness of the silicon substrate 11 at the position corresponding to the second region 112 can be 3 mm - 5 mm.

[0049] In this embodiment, in the step of removing the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 by laser, some structures of the silicon substrate 11 on the back of the silicon substrate 11 corresponding to the second region 112 are also removed at the same time. Therefore, the thickness of the silicon substrate 11 at the position corresponding to the first region 111 is greater than the thickness of the silicon substrate 11 at the position corresponding to the second region 112. While ensuring that the tunneling oxide layer 14 and the doped conductive layer 15 in the second region 112 are removed completely, the textured structure on the back of the silicon substrate 11 corresponding to the second region 112 can also be removed, so that the position on the back of the silicon substrate 11 corresponding to the second region 112 can be a polished surface.

[0050] At the same time, the difference between the thickness of the silicon substrate 11 at the position corresponding to the first region 111 and the thickness of the silicon substrate 11 at the position corresponding to the second region 112 can be 3 mm - 5 mm. For example, the difference can be 3 mm, 4 mm, 5 mm, etc. It can not only ensure that the tunneling oxide layer 14, the doped conductive layer 15, and the textured structure in the second region 112 are removed completely, but also avoid removing too much structure of the silicon substrate 11 by laser, preventing it from affecting the light absorption efficiency of the solar cell and causing an increase in recombination loss, resulting in an impact on the working efficiency of the solar cell.

[0051] In other embodiments, the difference between the thickness of the silicon substrate 11 at the position corresponding to the first region 111 and the thickness of the silicon substrate 11 at the position corresponding to the second region 112 may also be other values. In the embodiments of the present application, the specific value of this difference is not limited and can be adjusted adaptively according to the actual situation.

[0052] In a specific embodiment, as Figure 6 shown, in the above step S151, the frequency of the laser may be 580 KHz - 620 KHz, and the speed may be 48000 mm / s - 52000 mm / s.

[0053] In this embodiment, making the laser a high-frequency laser in the range of 580 KHz - 620 KHz, for example, the frequency of the laser may be 580 KHz, 600 KHz, 620 KHz, etc., can improve the energy input efficiency of the laser, so as to achieve the effect of quickly removing the tunneling oxide layer 14, the doped conductive layer 15 and part of the silicon substrate 11 structure at the second region, and can also reduce the damage caused by heat accumulation to the material. At the same time, making the speed of the laser in the range of 48000 mm / s - 52000 mm / s, for example, the speed of the laser may be 48000 mm / s, 50000 mm / s, 52000 mm / s, etc., can reduce the residence time of the laser on the material surface, and avoid damaging the silicon substrate 11 or over-etching by the laser during the process of removing the tunneling oxide layer 14, the doped conductive layer 15 and part of the silicon substrate 11 structure of the second region 112, affecting the normal use of the silicon substrate 11.

[0054] In other embodiments, the frequency and speed during the laser treatment process may also be other values. In the embodiments of the present application, the specific values of the frequency and speed of the laser are not limited and can be adjusted adaptively according to the actual situation.

[0055] In a specific embodiment, as Figure 7 and Figure 8 shown, after step S15, the method for preparing a solar cell provided by the embodiments of the present application may further include: S16: Removing the second glass layer 16 on the front surface of the silicon substrate 11 by chain pickling; S17: Removing the tunneling oxide layer 14, the doped conductive layer 15 and the first glass layer 13 on the front surface of the silicon substrate 11 and the second glass layer 16 on the back surface of the silicon substrate 11 by wet chemical cleaning.

[0056] In this embodiment, in step S16, the second glass layer 16 on the front side of the silicon substrate 11 is first removed by chain pickling, and the second glass layer 16 at the position corresponding to the first region 111 on the back side of the silicon substrate 11 is retained, so that the second glass layer 16 protects the tunneling oxide layer 14 and the doped conductive layer 15 at the position corresponding to the first region 111 on the back side of the silicon substrate 11, and avoids being removed in the wet chemical cleaning of step 17. In step 17, the tunneling oxide layer 14, the doped conductive layer 15 and the first glass layer 13 on the front side of the silicon substrate 11 and the second glass layer 16 on the back side of the silicon substrate 11 are removed by wet chemical cleaning, so that only the emitter 12 structure is retained on the front side of the silicon substrate 11, and only the tunneling oxide layer 14 and the doped conductive layer 15 structure are retained at the position corresponding to the first region 111 on the back side of the silicon substrate 11. At the same time, in step 17, the wet chemical cleaning can further clean the position corresponding to the second region 112 on the back side of the silicon substrate 11, remove impurities, defects, etc. at this position, and further improve the reflection effect at the position corresponding to the second region 112 on the back side of the silicon substrate 11.

[0057] In a specific embodiment, as shown in Table 1 below, solar cell A is a solar cell 1 prepared by the preparation method provided in the embodiment of the present application. Solar cell B is a solar cell prepared by the preparation method provided in the related art, and the back side of the silicon substrate is a polished surface, and is covered with a tunneling oxide layer and a doped conductive layer. In the preparation process of solar cell A and solar cell B, except for the preparation parameters changed in the above embodiment, other parameters in the preparation process (such as silicon wafer thickness, resistivity, tunneling oxide layer thickness, etc.) remain consistent.

[0058] Table 1

[0059] In this embodiment, the test results of solar cell A and solar cell B are shown in Table 1. Compared with solar cell B, the open circuit voltage, short circuit current and fill factor of solar cell A are all improved, so that the overall working efficiency of solar cell A is also improved. It can be seen that compared with solar cell B prepared by the preparation method in the relevant technology, the solar cell A prepared by the preparation method provided in the embodiment of the present application has higher working efficiency, and can also save the alkali polishing step, avoid damage to the silicon substrate during the alkali polishing process, affect the yield rate, and simplify the steps and reduce costs. The above is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A method for preparing a solar cell, wherein the solar cell (1) comprises a grid line, characterized in that: The method for preparing the solar cell (1) comprises: A silicon substrate (11) is prepared, wherein the back surface of the silicon substrate (11) comprises a first region (111) and a second region (112), the projection of the grid line along the thickness direction of the solar cell (1) is located in the first region (111), and the second region (112) is a region outside the first region (111); Texturing the front and back sides of the silicon substrate (11); Generating an emitter (12) on the front side of the silicon substrate (11); Sequentially generating a tunneling oxide layer (14) and a doped conductive layer (15) on the back side of the silicon substrate (11); The tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11) are removed.

2. The method for preparing a solar cell according to claim 1, characterized in that: In the step of removing the tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) specifically comprises: The tunneling oxide layer (14) of the second region (112), the doped conductive layer (15) and a portion of the structure at a position corresponding to the second region (112) on the back side of the silicon substrate (11) are removed by laser.

3. The method for preparing a solar cell according to claim 2, characterized in that: The method for preparing the solar cell (1) further comprises: The laser frequency is 580KHz-620KHz, and the speed is 48000mm / s-52000mm / s.

4. The method for preparing a solar cell according to claim 1, characterized in that: In the step of generating a tunneling oxide layer (14) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) satisfies at least one of the following conditions: the flow rate of the introduced reaction gas is 15750 sccm-28750 sccm, the reaction time is 420 s-880 s, and the reaction temperature is 593° C.-630° C.

5. The method for preparing a solar cell according to claim 4, characterized in that: When the doped conductive layer (15) is generated on the tunneling oxide layer (14), the method for preparing the solar cell (1) satisfies at least one of the following conditions: the flow rate of the introduced reaction gas is 1050 sccm-2300 sccm, the reaction time is 1365 s-2420 s, and the reaction temperature is 593° C.-650° C.

6. The method for preparing a solar cell according to claim 1, characterized in that: In the step of generating an emitter (12) on the front side of the silicon substrate (11), the method for preparing the solar cell (1) further comprises: Generating the emitter (12) and the first glass layer (13) on the front and back sides of the silicon substrate (11); Chain pickling removes the first glass layer (13) on the back side of the silicon substrate (11).

7. The method for preparing a solar cell according to claim 6, characterized in that: In the step of sequentially generating a tunneling oxide layer (14) and a doped conductive layer (15) on the back side of the silicon substrate (11), the method for preparing the solar cell (1) further comprises: The tunneling oxide layer (14), the doped conductive layer (15) and the second glass layer (16) are sequentially generated on the front side and the back side of the silicon substrate (11); After the step of removing the tunneling oxide layer (14) and the doped conductive layer (15) at a position corresponding to the second region (112) on the back side of the silicon substrate (11), the method for preparing a solar cell further comprises: Removing the second glass layer (16) on the front side of the silicon substrate (11) by chain pickling; The tunneling oxide layer (14), the doped conductive layer (15) and the first glass layer (13) on the front side of the silicon substrate (11) and the second glass layer (16) on the back side of the silicon substrate are removed by a wet chemical cleaning method.

8. A solar cell, characterized in that: The solar cell (1) is manufactured by the method for manufacturing the solar cell (1) according to any one of claims 1 to 7; Wherein, along the thickness direction of the solar cell (1), a tunneling oxide layer (14) and a doped conductive layer (15) are provided at a position on the back side of the silicon substrate (11) corresponding to the first region (111), and a polished surface is provided at a position on the back side of the silicon substrate (11) corresponding to the second region (112).

9. The solar cell according to claim 8, characterized in that Along the thickness direction of the solar cell (1), the back surface of the silicon substrate (11) at a position corresponding to the first region (111) is a velvet surface.

10. The solar cell according to claim 9, characterized in that: The thickness of the silicon substrate (11) at a position corresponding to the first region (111) is greater than the thickness of the silicon substrate (11) at a position corresponding to the second region (112); The difference between the thickness of the silicon substrate (11) at a position corresponding to the first region (111) and the thickness of the silicon substrate (11) at a position corresponding to the second region (112) is 3 mm to 5 mm.

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