Miniature light emitting diode chip and micro display device

Abstract

The invention discloses a miniature light-emitting diode chip which comprises a light-emitting mesa, a passivation layer and a reflecting layer, the passivation layer is located between the light-emitting mesa and the reflecting layer and at least covers the side surface of the light-emitting mesa, the reflecting layer is arranged on the surface of the passivation layer, and at least one part of the surface, facing the passivation layer, of the reflecting layer is a first curved surface. By adopting the reflecting layer with the first curved surface, the proportion of small-angle emergent light can be increased, and the light collimation effect is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of light-emitting diodes, and particularly to a micro light-emitting diode chip and a micro display device. Background Art

[0002] A micro light-emitting diode (Micro LED) micro display chip is a new type of LED structure obtained by thinning, miniaturizing, and arraying the original LED structure. It integrates arrayed micron-level LED units on an active addressing driving panel to achieve the lighting and individual control of the LED units, thereby outputting the desired display image.

[0003] As Figure 1 shown, the core structure of the micro light-emitting diode is a light-emitting mesa 001, which is a PN junction diode composed of a direct bandgap semiconductor material. When a forward bias is applied to the micro light-emitting diode between the upper and lower electrodes to cause current to pass through, electrons and holes recombine in the active region, and at the same time, single-color light photons are emitted. Since the photons are emitted in all directions, in order to improve the light extraction efficiency of the micro light-emitting diode, a reflective layer 002 is usually provided below the light-emitting mesa 001 so that as much light as possible exits from the top surface of the light-emitting mesa.

[0004] Most of the existing reflective layers of micro light-emitting diodes are planar structures. As Figure 1 shown, this causes the direction of part of the light exiting from the light-emitting mesa to form a large angle with the top surface of the light-emitting mesa, thereby affecting the collimation effect of the light. Summary of the Invention

[0005] In view of some or all of the problems in the prior art, the present invention provides a micro light-emitting diode chip, including:

[0006] A light-emitting mesa;

[0007] A passivation layer, which is located between the light-emitting mesa and the reflective layer and at least covers the side surface of the light-emitting mesa; and

[0008] A reflective layer, which is disposed on the surface of the passivation layer, and at least a part of the inner surface of the reflective layer, that is, the surface facing the passivation layer, is a first curved surface.

[0009] Further, the light-emitting mesa includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer from bottom to top.

[0010] Further, the first curved surface at least corresponds to the side wall of the light-emitting layer.

[0011] Furthermore, an outer surface of a sidewall of the light-emitting layer has a second curved surface, and the second curved surface conforms to the first curved surface.

[0012] Furthermore, the first curved surface at least corresponds to a sidewall of the first semiconductor layer.

[0013] Furthermore, an outer surface of a sidewall of the first semiconductor layer has a third curved surface, and the third curved surface conforms to the first curved surface.

[0014] Furthermore, the first curved surface at least corresponds to a sidewall of the second semiconductor layer.

[0015] Furthermore, an outer surface of a sidewall of the second semiconductor layer has a fourth curved surface, and the fourth curved surface conforms to the first curved surface.

[0016] Furthermore, an entire outer surface of a sidewall of the light-emitting mesa is a fifth curved surface, and a geometric center of the fifth curved surface coincides with a geometric center of the first curved surface.

[0017] Furthermore, the geometric center of the first curved surface is inside the light-emitting mesa.

[0018] Furthermore, the geometric center of the first curved surface is above the light-emitting layer.

[0019] Furthermore, curvatures of points on the first curved surface are different.

[0020] Furthermore, the first curved surface is a spherical surface.

[0021] Furthermore, the light-emitting layer includes a plurality of stacked semiconductor material layers.

[0022] Furthermore, the plurality of stacked semiconductor material layers is a quantum well light-emitting layer; the quantum well light-emitting layer includes a pair of stacked quantum well layers and quantum barrier layers.

[0023] Furthermore, a light-emitting intensity of the light-emitting mesa decreases and then increases as a distance from the light-emitting layer to a bottom surface of the light-emitting mesa increases.

[0024] Furthermore, an inner surface shape of the reflective layer enables a distribution curve of an emission angle to include at least one peak, where a maximum peak corresponds to an emission angle of 0°, and among light rays emitted from a top surface of the light-emitting mesa, a proportion of light rays with an emission angle not greater than 18.5° is the highest and not less than 13%, where the emission angle refers to an angle between a light ray emitted from the top surface of the light-emitting mesa and the top surface of the light-emitting mesa.

[0025] Further, when the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.395 microns, the inner surface shape of the reflective layer is such that, among the light rays emitted from the top surface of the light-emitting mesa, the proportion of light rays with an emission angle not greater than 18.5° is 20.4%.

[0026] Further, when the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.435 microns, the inner surface shape of the reflective layer is such that:

[0027] The emission angle distribution curve further includes a second peak and at least one valley, where the second peak is between -30° and -20°, and between 20° and 30°, and the valley is between -40° and -30°, and between 30° and 40°; and

[0028] Among the light rays emitted from the top surface of the light-emitting mesa, the proportion of light rays with an emission angle not greater than 18.5° is 13.4%.

[0029] Further, when the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.475 microns, the inner surface shape of the reflective layer is such that:

[0030] The emission angle distribution curve further includes at least one valley, where the valley is between -40° and -30°, and between 30° and 40°; and

[0031] Among the light rays emitted from the top surface of the light-emitting mesa, the proportion of light rays with an emission angle not greater than 18.5° is 17.5%.

[0032] Further, the bottom width of the first semiconductor layer is smaller than the top width of the second semiconductor layer.

[0033] Further, the material of the first semiconductor layer is a material layer of a first conduction type composed of at least two or more elements including Ga, N, As, Al, In, P, and the second semiconductor layer is a material layer of a second conduction type composed of at least two or more elements including Ga, N, As, Al, In, P, and the first conduction type is different from the second conduction type.

[0034] Further, the surface of the passivation layer opposite to the reflective layer is the first surface, the surface of the reflective layer opposite to the passivation layer is the second surface, and the first surface and the second surface match.

[0035] The second aspect of the present invention provides a microdisplay device, such as a microdisplay panel, a microdisplay optical engine, which includes the micro light-emitting diode chip as described above.

[0036] A micro light-emitting diode chip provided by the present invention adopts a reflective layer with a curved surface, especially a spherical surface, so that most of the light can exit from the top surface of the light-emitting mesa at a small angle (i.e., the angle between the light and the optical axis of the microlens, where the small angle refers to an angle of 0° to 10°), thereby improving the light collimation effect. The collimated light beam can transmit light more effectively, reduce light scattering and loss, and thus flexibly control the distribution and direction of light. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] To further clarify the above and other advantages and features of the embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It can be understood that these drawings only depict typical embodiments of the present invention and will not be considered as limiting its scope. In the drawings, for clarity, the same or corresponding components will be denoted by the same or similar reference numerals.

[0038] Figure 1 A schematic structural diagram of a micro light-emitting diode chip in the prior art is shown;

[0039] Figure 2 A partial schematic structural diagram of a micro light-emitting diode chip according to an embodiment of the present invention is shown;

[0040] Figure 3 A schematic structural diagram of a micro light-emitting diode chip according to another embodiment of the present invention is shown;

[0041] Figure 4 A schematic structural diagram of a micro light-emitting diode chip according to still another embodiment of the present invention is shown;

[0042] Figure 5 A schematic structural diagram of a micro light-emitting diode chip according to still another embodiment of the present invention is shown;

[0043] Figure 6 A schematic structural diagram of a micro light-emitting diode chip according to still another embodiment of the present invention is shown; and

[0044] Figure 7 A comparison schematic diagram of the outgoing light angle distribution of a micro light-emitting diode chip according to an embodiment of the present invention and the prior art is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045] In the following description, the present invention is described with reference to the embodiments. However, those skilled in the art will recognize that the embodiments can be implemented without one or more specific details or in combination with other alternative and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the inventive aspects of the present invention. Similarly, for purposes of explanation, specific quantities, materials, and configurations are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, the present invention is not limited to these specific details. In addition, it should be understood that the embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0046] In this specification, the reference to "an embodiment" or "the embodiment" means that the specific features, structures, or characteristics described in connection with the embodiment are included in at least one embodiment of the present invention. The phrase "in an embodiment" appearing throughout this specification does not necessarily refer to the same embodiment.

[0047] It should be noted that the embodiments of the present invention describe the process steps in a specific order. However, this is only for the purpose of illustrating the specific embodiment and does not limit the order of the steps. On the contrary, in different embodiments of the present invention, the order of the steps can be adjusted according to the adjustment of the process.

[0048] In the present invention, the term "bottom-up" refers to the side from the side facing away from the light-emitting side of the micro light-emitting diode to the side facing the light-emitting side. Here, the "light-emitting side" refers to the side from which the light emitted by the micro light-emitting diode exits the micro light-emitting diode, for example, the side where the microlens is located. The term "upper surface of the light-emitting mesa" refers to the surface of the light-emitting mesa facing the light-emitting side, while the term "lower surface of the light-emitting mesa" refers to the surface of the light-emitting mesa facing away from the light-emitting side. The term "side surface of the light-emitting mesa" refers to the surface of the light-emitting mesa between the upper surface and the lower surface. The term "emission angle" refers to the angle between the light emission direction and the central axis of the light-emitting mesa. In the present invention, two curved surfaces or two surfaces "match" means the conformity or replication of the two curved surfaces or two surfaces. Specifically, conformity means that the shapes, sizes, and positions of the two curved surfaces or two surfaces are exactly the same and can fit perfectly, and replication means that the two curved surfaces or two surfaces are similar in shape but not necessarily exactly the same, but allow a certain amount of deformation or scaling as long as the overall shape is similar.

[0049] In the existing micro light-emitting diode chips, there are many large-angle emitted light rays when a planar reflective layer is used, resulting in a poor collimation effect. The present invention provides a micro light-emitting diode chip, in which the inner surface of the reflective layer is set as a curved surface, preferably a spherical surface, so as to reflect the point light source emitted from the quantum well MQW of the light-emitting layer as much as possible and make it emit at a small angle, thereby improving the collimation effect and reducing the scattering and loss of light.

[0050] The technical solution of the present invention will be further described below with reference to the accompanying drawings of the embodiments.

[0051] Figure 2 A partial structural schematic diagram of a micro light-emitting diode chip showing an embodiment of the present invention is as follows Figure 2 As shown, a micro light-emitting diode chip includes a reflective layer, and the reflective layer includes a bent portion 231, wherein at least a part of the inner surface of the bend, that is, the surface on the side facing the light-emitting mesa 201, is a first curved surface, and the first curved surface is preferably a spherical surface. In an embodiment of the present invention, the bent portion 231 includes the side wall of the reflective layer.

[0052] In the embodiments of the present invention, the size of each micro light-emitting diode chip does not exceed 1 cm, preferably does not exceed 20 microns. The micro light-emitting diode chip includes a driving backplane 209 and a micro light-emitting diode structure. The micro light-emitting diode structure is formed in an array form in the micro light-emitting diode chip, and the resolution ratio is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K or 4K. The diameter of the micro light-emitting diode structure is at the nanometer level, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel element on the micro light-emitting diode chip. In some embodiments, the micro light-emitting diode array may include blue micro light-emitting diodes. In some embodiments, the micro light-emitting diode array may include green micro light-emitting diodes. In some embodiments, the micro light-emitting diode array may include red micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, that is, the minimum center-to-center distance between micro light-emitting diodes, may be between about 2 microns and about 50 microns. In some embodiments, the number of pixels on the micro light-emitting diode chip may be between thousands and millions.

[0053] In some embodiments of the present invention, the driving backplane 209 can be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through a separate metal interconnect 291. In some embodiments, each micro light-emitting diode can be electrically controlled independently by the driving backplane. In some embodiments, the driving backplane can be electrically connected to the electrodes of the micro light-emitting diode chip through metal interconnects.

[0054] In some embodiments of the present invention, each micro light-emitting diode in the micro light-emitting diode array may include a light-emitting mesa, where the light-emitting mesa is a micron-scale structure. As Figure 2 shown, in one embodiment of the present invention, the light-emitting mesa 201 sequentially includes a first semiconductor layer 211, a light-emitting layer 212, and a second semiconductor layer 213 from bottom to top. That is to say, in the three-layer structure, the first semiconductor layer 211 is closest to the driving backplane 209, the light-emitting layer 212 is located above the first semiconductor layer 211 and is farther from the driving backplane 209, and the second semiconductor layer 213 is located above the light-emitting layer 212 and is the farthest from the driving backplane 209. In one embodiment of the present invention, the bottom width of the first semiconductor layer 211 is smaller than the top width of the second semiconductor layer 213. In one embodiment of the present invention, the thickness of the first semiconductor layer 211 is 0 to 0.41 microns. The second semiconductor layer 213 includes a stepped portion 2131 and a base portion 2132, where the stepped portion 2131 is electrically connected to the light-emitting layer 212, and the base portion 2132 extends from the stepped portion 2131 to both sides of the light-emitting mesa 201. In the actual manufacturing process, a relatively thick second semiconductor layer material can be deposited first, and the light-emitting layer 212 and the first semiconductor layer 211 are sequentially deposited thereon. Subsequently, etching of each light-emitting mesa is performed, and a certain thickness of the second epitaxial material at the bottom is reserved without being etched through, and thus the base portion 2132 can be obtained. In one embodiment of the present invention, the thickness of the stepped portion 2131 is 550 nm to 845 nm, and the thickness of the base portion 2132 is 0.845 um to 1.135 um. In one embodiment of the present invention, the thickness of the first semiconductor layer 211 is smaller than that of the second semiconductor layer 213. As mentioned above, in the embodiments of the present invention, at least a part of the reflective layer, such as the sidewall has a first curved surface such as a spherical surface. In some embodiments, the first curved surface at least corresponds to the sidewall of the light-emitting layer 212. In some embodiments, the first curved surface at least corresponds to the sidewall of the first semiconductor layer 211. In some embodiments, the first curved surface at least corresponds to the sidewall of the second semiconductor layer 213. For the convenience of processing, in one embodiment of the present invention, as Figure 2 and Figure 4As shown, the sidewall of the light-emitting mesa 201 may have a curved outer surface. Specifically, in some embodiments, the outer surface of the sidewall of the light-emitting layer 212 has a second curved surface, where the second curved surface conforms to the first curved surface. In some embodiments, the outer surface of the sidewall of the first semiconductor layer 211 has a third curved surface, where the third curved surface conforms to the first curved surface. In some embodiments, the outer surface of the sidewall of the second semiconductor layer 213 has a fourth curved surface, where the fourth curved surface conforms to the first curved surface. In some embodiments, the entire outer surface of the sidewall of the light-emitting mesa 201 is a fifth curved surface, and the geometric center of the fifth curved surface coincides with the geometric center of the first curved surface. Thus, in subsequent processes, a passivation layer can be directly deposited on the surface of the light-emitting mesa 201, and then a reflective layer can be deposited on the surface of the passivation layer, so as to obtain a reflective layer having at least a partially curved, preferably spherical inner surface. In some other embodiments of the present invention, as Figure 3 and Figure 5 shown, the cross-section of the light-emitting mesa 201 is an inverted trapezoid or approximately an inverted trapezoid, that is, the light-emitting mesa 201 may include a chamfer. In this embodiment, after the passivation layer is deposited on the light-emitting mesa 201, the passivation layer needs to be etched or polished to form at least a partially curved, preferably spherical outer surface, so that a reflective layer having a curved, preferably spherical inner surface can be further deposited on its surface.

[0055] In one embodiment of the present invention, the first semiconductor layer 211 has a semiconductor material of a first conductivity type and includes a plurality of semiconductor layers. The main matrix material of the first semiconductor layer 211 may be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first semiconductor layer 211 may include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer may be formed below the window layer. In some embodiments, the second semiconductor layer 213 has a semiconductor material of a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second semiconductor layer 213 may be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second semiconductor layer 213 may include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type. For example, in one embodiment of the present invention, if the light-emitting mesa 201 emits blue-green light, the first semiconductor layer 211 is an N-type GaN layer, an N-type AlGaN layer, or an N-type InGaN layer, and the second semiconductor layer 213 is a P-type GaN layer, a P-type AlGaN layer, or a P-type InGaN layer. If the light-emitting mesa 201 emits red light, the first semiconductor layer 211 is an N-type GaInP layer, or an N-type AlGaInP layer, and the second semiconductor layer 213 is a P-type GaInP layer, or a P-type AlGaInP layer.

[0056] In an embodiment of the present invention, one of the first semiconductor layer 211 and the second semiconductor layer 213 is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer. The doped N-type contact layer is configured to bond with the bonding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is from 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer formed on the doped N-type contact layer. The doped N-type contact layer is configured to bond with the bonding layer. The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is from 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e18 cm -3 to 1e 19 cm -3 。In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9 and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example 65 nm. In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer.

[0057] In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example x is 0.5. In such embodiments, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm.

[0058] In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example 20 nm.

[0059] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9 and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example 65 nm.

[0060] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3, and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is from 20 nm to 40 nm, such as 30 nm.

[0061] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, such as x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, such as 20 nm.

[0062] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0063] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0064] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0065] In one embodiment of the present invention, the light-emitting layer 212 is composed of multiple stacked semiconductor material layers, and the multiple stacked semiconductor material layers can be, for example, quantum well light-emitting layers, especially superlattice-stacked quantum well light-emitting layers. Preferably, the superlattice-stacked quantum well light-emitting layer includes multiple pairs of quantum well layers stacked with quantum barrier layers. In one embodiment of the present invention, the light-emitting layer 212 includes at least one quantum well light-emitting layer. The thickness of the quantum well light-emitting layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the light-emitting layer is a multi-quantum well (MQW) light-emitting layer. If it is a blue-green light-emitting diode, the multi-quantum well light-emitting layer is an InGaN / GaN multi-quantum well light-emitting layer or an InGaN / AlGaN multi-quantum well light-emitting layer or an InGaAs / AlGaAs multi-quantum well light-emitting layer. If it is a red light-emitting diode, the multi-quantum well light-emitting layer is an InGaN, AlInP, GaInP multi-quantum well light-emitting layer. In one embodiment of the present invention, the light-emitting layer 212 further includes an electron blocking layer, and the electron blocking layer is disposed on the first side of the quantum well light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In one embodiment of the present invention, the light extraction efficiency of the light-emitting mesa, that is, the distribution of the emission light angle, can be adjusted by adjusting the thickness of the first semiconductor layer 211, that is, the distance between the light-emitting layer 212 and the bottom surface of the light-emitting mesa 201. In some embodiments, the light emission intensity of the light-emitting mesa 201 decreases and then increases as the distance between the light-emitting layer 212 and the bottom surface of the light-emitting mesa 201 increases.

[0066] As Figure 2 shown, in one embodiment of the present invention, the micro light-emitting diode chip further includes a conductive layer 204, and the conductive layer 204 is disposed on the bottom surface of the light-emitting mesa 201. In one embodiment of the present invention, the conductive layer 204 can be a metal layer or a conductive transparent layer, such as ITO, FTO, copper layer, which is formed to improve conductivity and transparency. In one embodiment of the present invention, the conductive layer 204 is a transparent conductive layer, and its light transmittance is between 85% and 95%, and at the same time, it also has a resistivity as low as 10 -4 to 10 -3 Ω·cm.

[0067] As Figure 2As shown, the micro light-emitting diode chip further includes a passivation layer 202, and the passivation layer 202 includes a side surface portion 221 and an extension portion 222. The side surface portion 221 surrounds the side surfaces of the light-emitting mesa 201, that is, the side surfaces of the first semiconductor layer 211, the light-emitting layer 212, and the second semiconductor layer 213. The extension portion 222 extends from the side surface of the light-emitting mesa 201 to both sides of the light-emitting mesa 201 to cover the bottom surface of the base portion 2132 of the second semiconductor layer 213. In an embodiment of the present invention, the passivation layer 202 also covers a partial bottom surface of the first semiconductor layer 211. Specifically, it is the edge portion of the bottom surface of the first semiconductor layer 211, that is, there is an opening in the passivation layer 202 on the bottom surface of the first semiconductor layer 211, and the conductive layer 204 is formed in the opening. In the embodiments of the present invention, the passivation layer 202 mainly functions as an electrical isolation layer, and it can be, for example, an aluminum oxide (Al 2 O 3 ) thin film layer, a SiO 2 thin film layer, a SiON thin film layer, a SiN thin film layer, etc., which are insulating material layers with good light transmittance formed by an atomic layer deposition process, a chemical deposition process, etc. The passivation layer 202 is used for electrical isolation between the conductive layer 204 and the first semiconductor layer 211, the light-emitting layer 212, and the second semiconductor layer 213.

[0068] In an embodiment of the present invention, the thickness of the passivation layer 202 is 0.15 micrometers. The passivation layer 202 is formed by fitting to the light-emitting mesa, so the shape of its inner surface conforms to the shape of the outer surface of the light-emitting mesa. And the reflective layer is disposed on the surface of the passivation layer 202. Therefore, the surface of the passivation layer 202 opposite to the reflective layer is denoted as the first surface, and the surface of the reflective layer opposite to the passivation layer 202 is denoted as the second surface, then the first surface should conform to the second surface. Specifically, in order to form a reflective layer with a curved surface, preferably a spherical inner surface, the outer surface of the passivation layer 202 should be curved, preferably spherical, and the sphere preferably shares the same center with the sphere of the reflective layer.

[0069] As described above, the curved portion 231 of the reflective layer is disposed on the surface of the passivation layer 202. As Figure 2 shown, in an embodiment of the present invention, the reflective layer further includes a planar portion 232, and the planar portion 232 is formed on the bottom surface of the conductive layer 204, and the planar portion is electrically connected to the metal structure 291 on the driving backplane 209. As Figure 2As shown, in one embodiment of the present invention, the metal structure is a metal layer 2911 and / or a conductive pillar 2912. In one embodiment of the present invention, the material of the metal structure 291 is an alloy of one or more of the following metals: Ni, Al, Ti, Ni, Pt, Au, Cu.

[0070] In one embodiment of the present invention, the reflective layer 203 may be a conductive material layer having one or more layers with high reflectivity, which can reflect the light emitted from the light-emitting region, improving the brightness and light efficiency of the micro light-emitting diode chip. The reflective layer 203 may include, for example, one or more metal layers, such as Pt, Rh, Al, Au, and Ag, etc., or a stacked DBR layer of TiO2 / SiO 2 layers, or any other layer with total reflection characteristics, such as a multi-layer omnidirectional reflector ODR, or a combination thereof. In one embodiment of the present invention, the reflectivity of the material of the reflective layer should be not less than 90%. In addition, in one embodiment of the present invention, the root mean square roughness of the inner surface of the reflective layer 203 is between 1 and 10 nanometers.

[0071] As described above, in order to increase the proportion of light emitted at small angles, the geometric center of the first curved surface is inside the light-emitting mesa 201, and preferably, the geometric center of the first curved surface is above the light-emitting layer 212. In one embodiment of the present invention, the curvatures of the points on the first curved surface are different. In another embodiment of the present invention, the first curved surface is a spherical surface. In one embodiment of the present invention, the radius of the spherical surface is 1.2 micrometers. In one embodiment of the present invention, the ratio of the radius of the spherical surface to the thickness of the second semiconductor layer is 1.2, and the ratio of the radius of the spherical surface to the thickness of the light-emitting mesa is 0.29.

[0072] It should be understood that the outer surface shape of the bending portion 231 may not be limited, and it is preferably also spherical, but may also be trapezoidal or other shapes, such as Figure 4 and Figure 5 shown.

[0073] As Figure 2 shown, in one embodiment of the present invention, the micro light-emitting diode chip further includes a dielectric layer 205, and the dielectric layer 205 is disposed between two adjacent light-emitting mesas, covering the bottom surface of the exposed passivation layer 202 and the outer surface of the reflective layer. In one embodiment of the present invention, the dielectric layer 205 is made of a light-transmissive insulating material, such as Al 2 O 3 、SiO 2 、SiON、SiN and made of at least one of such materials.

[0074] As Figure 2As shown, in an embodiment of the present invention, the micro light-emitting diode chip further includes an electrode 206, and the electrode 206 is disposed on the top surface of the base of the second semiconductor layer 213 and is located between two adjacent light-emitting mesa surfaces. In an embodiment of the present invention, the electrode 206 is made of a conductive material, such as Ag, or Au, or Al, etc.

[0075] As Figure 2 shown, the micro light-emitting diode chip further includes a current spreading layer 207. The current spreading layer 207 is disposed at the bottom of the electrode 206. In an embodiment of the present invention, the current spreading layer 207 is a transparent conductive layer ITO.

[0076] As Figure 2 shown, in an embodiment of the present invention, the micro light-emitting diode chip further includes a microlens 208. The microlens 208 corresponds to the light-emitting mesa surface 201, and the horizontal contour of the microlens 208 is larger than the maximum horizontal contour of the light-emitting mesa surface 201. The microlens 208 is mainly used to converge and / or collimate optical fibers. For example, by adjusting parameters such as the thickness and curvature of the microlens 208, the focal point of the microlens 208 can be made to be located in the light-emitting mesa surface 201 of the micro light-emitting diode. In an embodiment of the present invention, the microlens 208 includes an upper curvature portion 281 and a lower spacer portion 282. It should be understood that in some embodiments of the present invention, the microlens 208 may not include the lower spacer portion, as Figure 6 shown. The lower spacer portion 282 covers the electrode 206, and its height is determined based on the curvature radius, spherical height, etc. of the upper curvature portion 281. In an embodiment of the present invention, the curvature radius of the upper curvature portion 281 is 1.5 to 2.2 microns, and the spherical height is 1.2 to 2 microns. Preferably, the upper curvature portion 281 may be, for example, a hemispherical shape. In an embodiment of the present invention, the microlens 208 is made of an insulating material with a light transmittance of not less than 95%, such as SiO 2 、or Al 2 O 3 、or SiON, or SiN, etc. In an embodiment of the present invention, the microlens 208 can be formed by multiple depositions. During the formation of the microlens, first, a SiO 2 film layer needs to be deposited, and then ion etching is performed.

[0077] Adopting the micro light-emitting diode structure in the embodiment of the present invention, that is, the reflective layer with the first curved inner surface can optimize the emission angle distribution curve of the light emitted from the top surface of the light-emitting mesa, so that the proportion of the light emitted at a small angle is further increased, thereby improving the overall light extraction efficiency. Generally speaking, after adopting the reflective layer with the first curved inner surface, the emission angle distribution curve of the light emitted from the top surface of the light-emitting mesa is similar to a normal distribution curve, which usually only includes one peak, located at 0°, the peak is not less than 2%, and the proportion of the light emitted from the top surface of the light-emitting mesa with an emission angle not greater than 18.5° is not less than 13%.

[0078] Figure 7 The figure shows a comparison schematic diagram of the emission light angle distribution of the micro light-emitting diode chip in an embodiment of the present invention and the prior art. It shows the emission angle distribution of the light at different Z_MQW values, where the Z_MQW value refers to the distance between the multi-quantum well of the light-emitting layer and the bottom surface of the light-emitting mesa, that is, the bottom of the first semiconductor layer. In the figure, the legend POR corresponds to the prior art, and the legend Sphere corresponds to the corresponding data of the embodiment of the present invention. Table 1 gives the specific values of the light extraction efficiency ER, the proportion of small-angle light, and the small-angle light extraction rate ER18.5 of the prior art and the technical solution of the present invention under various Z_MQW values, where the proportion of small-angle light refers to the proportion of the emitted light with an emission angle not greater than 18.5° in all the emitted light.

[0079] As Figure 7 As shown in the figure and Table 1, when the Z_MQW value is 0.395 microns and the existing planar reflective layer is adopted, the peak of the distribution curve is about 3.5%, the proportion of the light with an emission angle not greater than 18.5 is 17.2%, and the proportion of the light decreases gradually as the absolute value of the emission angle increases. In addition, when the Z_MQW value is 0.395 microns, the light extraction rate of the existing planar reflective layer is 5.0%, and thus the small-angle light extraction rate is 5.0% * 17.2% = 0.86%. If a reflective layer with a spherical inner surface is adopted, it can be seen that the peak is significantly increased, about 4.9%, and then the proportion of the light with an emission angle not greater than 18.5 is increased to 20.4%. At the same time, when the reflective layer with a spherical inner surface is adopted, its light extraction rate is also improved, about 5.8%, and thus the small-angle light extraction rate is 5.8% * 20.4% = 1.18%, showing a significant optimization compared with the prior art.

[0080] As Figure 7As shown in Table 1, when the value of Z_MQW is 0.435 μm and the existing planar reflective layer is used, there are multiple peaks in the distribution curve, and the differences between the peaks are small. As shown in the figure, the maximum peak is at 0°, about 1.8%, the secondary peak appears at about ±20°, about 1.6%, and there is also a third peak near ±40°, about 1.4%. The proportion of light rays with an emission angle not greater than 18.5° is 12.9%. It can be seen that its collimation efficiency is poor. When the value of Z_MQW is 0.435 μm, the light extraction efficiency using the existing planar reflective layer is 4.0%, and thus the small-angle light extraction efficiency is 4.0% * 12.9% = 0.52%. If a reflective layer with an inner spherical surface is used, it can be seen that the number of peaks is significantly reduced and the maximum peak is significantly increased. Specifically, the maximum peak at 0° is about 2.4%. In addition, the second peak is between -30° and -20°, and between 20° and 30°, and its value is significantly smaller than the maximum peak, about 1.4%. At the same time, there is a trough between -40° and -30°, and between 30° and 40°, about 1.2%. The proportion of light rays with an emission angle not greater than 18.5° is increased to 13.4%. At the same time, when using a reflective layer with an inner spherical surface, the light extraction efficiency can still be maintained at 4.0%, and thus the small-angle light extraction efficiency is 4.0% * 13.4% = 0.54%, showing a certain optimization compared with the prior art.

[0081] As Figure 7 As shown in Table 1, when the value of Z_MQW is 0.475 μm and the existing planar reflective layer is used, there are multiple peaks in the distribution curve. As shown in the figure, the maximum peak is at 0°, about 3.3%, the second peak is between -40° and -20°, and between 20° and 40°, and its value is about 1.8%. At the same time, there is a trough near ±20°, about 1.7%. The proportion of light rays with an emission angle not greater than 18.5° is 15.7%. When the value of Z_MQW is 0.475 μm, the light extraction efficiency using the existing planar reflective layer is 4.9%, and thus the small-angle light extraction efficiency is 4.9% * 15.7% = 0.77%. If a reflective layer with an inner spherical surface is used, it can be seen that there is basically one peak, about 3%. Although it is lower than that of the planar reflective layer, as the angle increases, the change rate of the light ray proportion slows down. There is a small trough between -40° and -30°, and between 30° and 40°, about 1.3%. Instead, the proportion of light rays with an actual emission angle not greater than 18.5° is increased to 17.5%. At the same time, when using a reflective layer with an inner spherical surface, the light extraction efficiency is slightly reduced to 4.5%, but its small-angle light extraction efficiency is 4.5% * 17.5% = 0.79%, still showing optimization compared with the prior art.

[0082]

[0083] Table 1

[0084] It can be seen that, compared with the prior art, the solution of the present invention has improved in both the light collimation effect and the small-angle light extraction rate.

[0085] Based on the micro light-emitting diode chip as described above, the present invention further provides a microdisplay device, which includes the micro light-emitting diode chip as described above, and the microdisplay device can be applied to electronic devices such as AR glasses.

[0086] Although the embodiments of the present invention have been described above, it should be understood that they are presented only as examples and not as limitations. It will be apparent to those skilled in the relevant art that various combinations, modifications, and changes can be made thereto without departing from the spirit and scope of the present invention. Therefore, the width and scope of the present invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined only by the appended claims and their equivalents.

Claims

1. A micro light emitting diode chip, characterized in that: include: Luminous countertops; a passivation layer, which is located between the light-emitting mesa and the reflective layer and at least covers the side surface of the light-emitting mesa; as well as The reflective layer is disposed on the surface of the passivation layer, and at least a portion of the inner surface of the reflective layer facing the passivation layer is a first curved surface.

2. The micro light emitting diode chip according to claim 1, characterized in that: The light-emitting mesa comprises, from bottom to top, a first semiconductor layer, a light-emitting layer and a second semiconductor layer.

3. The micro light emitting diode chip according to claim 2, characterized in that: The first curved surface at least corresponds to a side wall of the light-emitting layer.

4. The micro light emitting diode chip according to claim 3, characterized in that: The outer surface of the side wall of the light emitting layer has a second curved surface, and the second curved surface is consistent with the first curved surface.

5. The micro light emitting diode chip according to claim 2, characterized in that: The first curved surface at least corresponds to a side wall of the first semiconductor layer.

6. The micro light emitting diode chip according to claim 5, characterized in that: The outer surface of the side wall of the first semiconductor layer has a third curved surface, and the third curved surface is consistent with the first curved surface.

7. The micro light emitting diode chip according to claim 2, characterized in that: The first curved surface at least corresponds to a side wall of the second semiconductor layer.

8. The micro light emitting diode chip according to claim 7, characterized in that: The outer surface of the side wall of the second semiconductor layer has a fourth curved surface, and the fourth curved surface is consistent with the first curved surface.

9. The micro light emitting diode chip according to claim 6, characterized in that: The entire outer surface of the side wall of the light-emitting mesa is a fifth curved surface, and the geometric center of the fifth curved surface coincides with the geometric center of the first curved surface.

10. The micro light emitting diode chip according to claim 2, characterized in that: The geometric center of the first curved surface is inside the light-emitting table.

11. The micro light emitting diode chip according to claim 2, characterized in that: The geometric center of the first curved surface is above the light-emitting layer.

12. The micro light emitting diode chip according to claim 2, characterized in that: The curvature of each point on the first curved surface is different.

13. The micro light emitting diode chip according to claim 2, characterized in that: The first curved surface is a spherical surface.

14. The micro light emitting diode chip according to claim 2, characterized in that: The light emitting layer includes multiple stacked semiconductor material layers.

15. The micro light emitting diode chip according to claim 14, characterized in that: The multi-layer stacked semiconductor material layer is a quantum well light-emitting layer; the quantum well light-emitting layer includes a quantum well layer and a quantum barrier layer stacked in pairs.

16. The micro light emitting diode chip according to claim 2, characterized in that: The light emission intensity of the light emitting mesa decreases and then increases as the distance from the light emitting layer to the bottom surface of the light emitting mesa increases.

17. The micro light emitting diode chip according to claim 2, characterized in that: The inner surface shape of the reflective layer is configured such that: The angle between the light emitted from the top surface of the light-emitting mesa and the top surface of the light-emitting mesa is an emission angle, and the distribution curve of the emission angle includes at least one peak value, wherein the maximum peak value corresponds to a light emission angle of 0°; and The proportion of light emitted from the top surface of the light-emitting table with an emission angle of no greater than 18.5° is no less than 13%.

18. The micro light emitting diode chip according to claim 2, characterized in that: When the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.395 micrometers, the inner surface shape of the reflective layer is configured such that: Among the light rays emitted from the top surface of the light-emitting table, the light rays with an emission angle no greater than 18.5° accounted for 20.4%.

19. The micro light emitting diode chip according to claim 2, characterized in that: When the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.435 micrometers, the inner surface shape of the reflective layer is configured such that: The emission angle distribution curve of the light emitted from the top surface of the light-emitting mesa further includes a second peak and at least one valley, wherein the second peak is between -30° and -20°, and between 20° and 30°, and the valley is between -40° and -30°, and between 30° and 40°; and Among the light rays emitted from the top surface of the light-emitting table, the light rays with an emission angle no greater than 18.5° accounted for 13.4%.

20. The micro light emitting diode chip according to claim 2, characterized in that: When the distance between the light-emitting layer and the bottom surface of the light-emitting mesa is 0.475 micrometers, the inner surface shape of the reflective layer is configured such that: The emission angle distribution curve of the light emitted from the top surface of the light-emitting mesa further includes at least one valley value, and the valley value is between -40° and -30°, and between 30° and 40°; and Among the light rays emitted from the top surface of the light-emitting table, the light rays with an emission angle no greater than 18.5° account for 17.5%.

21. The micro light emitting diode chip according to claim 2, characterized in that: A bottom width of the first semiconductor layer is smaller than a top width of the second semiconductor layer.

22. The micro light emitting diode chip according to claim 2, characterized in that: The material of the first semiconductor layer is a material layer of a first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the second semiconductor layer is a material layer of a second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first conductivity type is different from the second conductivity type.

23. The micro light emitting diode chip according to claim 1, characterized in that: The surface of the passivation layer opposite to the reflective layer is a first surface, the surface of the reflective layer opposite to the passivation layer is a second surface, and the first surface and the second surface are consistent with each other.

24. A micro display device, characterized in that: It comprises a micro light emitting diode chip as described in any one of claims 1 to 23.

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