Large suede silicon perovskite laminated solar cell and preparation method thereof

Abstract

The invention relates to the technical field of laminated photovoltaic cells, in particular to a suede silicon perovskite laminated solar cell and a preparation method thereof. The structure of the large-suede silicon perovskite laminated solar cell comprises a back electrode, a large-suede heterojunction silicon bottom cell, a composite layer and a perovskite solar cell, wherein a preparation method of an electron transport layer in the perovskite solar cell comprises the following steps: spin-coating a PCBM solution on a perovskite absorption layer, and evaporating C60 after annealing. The invention can reduce the open voltage loss, improve the performance of the device and improve the long-term stability of the device.

Description

Technical Field

[0001] The present invention relates to the technical field of laminated photovoltaic cells, and particularly to a textured silicon perovskite laminated solar cell and a preparation method thereof. Background Art

[0002] In a perovskite-silicon laminated solar cell with a large-textured silicon wafer as the substrate, due to the complex surface morphology, each functional layer is usually prepared by a conformal deposition process to ensure uniform coverage. For example, the hole transport layer generally uses an evaporation process, and common materials include organic hole transport materials such as CuPc, Spiro-ttb, and TATM; the perovskite light-absorbing layer uses a full evaporation process or a mixed process of evaporation and solution method; the electron transport layer is usually prepared by evaporating C60 combined with atomic layer deposition (ALD) of SnO 2 .

[0003] However, there are serious recombination problems at the solid-solid interface formed between the evaporated C60 electron transport layer and the perovskite light-absorbing layer, resulting in a decrease in charge extraction efficiency. To solve the interface recombination problem in perovskite-silicon laminated devices, some studies have used evaporated LiF or MgF x and other interface modification materials to improve the interface transport performance and energy level matching, thereby improving the device efficiency. However, although LiF can improve the efficiency, due to its easy moisture absorption and easy migration into the perovskite lattice, it will lead to poor long-term stability of the device. Therefore, although large-textured silicon wafers have important applications in perovskite-silicon laminated devices, their complex surface morphology and interface recombination problems are still key challenges that need to be further solved. Summary of the Invention

[0004] In order to solve the defects existing in the prior art, the present invention provides a large-textured silicon perovskite laminated solar cell and a preparation method thereof. The inventors of the present application have creatively found that when preparing the electron transport layer of a large-textured silicon perovskite laminated solar cell, a layer of PCBM is first prepared by a wet process and then a layer of C60 is evaporated. The synergistic effect of the two can reduce the open-circuit voltage loss, improve the device performance, and enhance the long-term stability of the device.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] In the first aspect, the present invention provides a preparation method of a large-textured silicon perovskite laminated solar cell. The structure of the large-textured silicon perovskite laminated solar cell includes a back electrode, a large-textured heterojunction silicon bottom cell, a composite layer, and a perovskite solar cell. The preparation method of the electron transport layer in the perovskite solar cell includes: spin-coating a PCBM solution on the perovskite absorption layer and evaporating C60 after annealing.

[0007] PCBM, with the chemical name of [6,6]-phenyl-C61-butyric acid methyl ester, is a fullerene derivative. C60 is a spherical molecule composed of 60 carbon atoms, with a unique structure and excellent electronic properties.

[0008] Preferably, the height of the texture of the large-texture silicon calcium titanate perovskite tandem solar cell is 2 - 5 μm.

[0009] Preferably, the concentration of the PCBM solution is 1 - 10 mg / ml.

[0010] Preferably, the concentration of the PCBM solution is 1 - 5 mg / ml.

[0011] Preferably, the thickness of the C60 is 5 - 14 nm.

[0012] Preferably, the thickness of the C60 is 10 - 14 nm.

[0013] Preferably, the annealing temperature is 80 - 100 °C.

[0014] Preferably, the evaporation parameters are that the evaporation rate is controlled at 0.1 - 0.5 Å / s.

[0015] Preferably, the preparation method of the composite layer includes: sputtering the composite layer, with a sputtering power of 90 - 120 w and a working pressure of 0.3 Pa.

[0016] Preferably, the thickness of the composite layer is 10 - 20 nm, and the sheet resistance is 50 - 200 Ω / sq.

[0017] Preferably, the composite layer is selected from one or more of ITO, IZO, AZO, IWO, and ICO.

[0018] Preferably, the preparation of the perovskite solar cell further includes preparing a hole transport layer, a perovskite absorption layer, a blocking layer, a window layer, and a front metal grid electrode.

[0019] Preferably, the preparation process of the hole transport layer is: first, magnetron sputtering is used to prepare a NiOx thin film, then spin coating is used to prepare a SAM thin film, and annealing is carried out.

[0020] Preferably, the SAM is selected from one or more of common self-assembled monolayers such as Meo-2pacz, 4PADCB, Me-4pacz, 2pacz, and Meo-4pacz.

[0021] Preferably, the sputtering parameters are a working pressure of 0.2 Pa - 1 Pa and a sputtering power of 90 - 120 w.

[0022] Preferably, the thickness of the NiOx thin film is 5 - 15 nm.

[0023] Preferably, the precursor solution concentration of the perovskite absorption layer is 1.6 - 1.8 M.

[0024] Preferably, the material of the blocking layer is SnO 2 .

[0025] Preferably, the preparation process of the window layer is as follows: magnetron sputtering is used for preparation, the sputtering power is 90 - 120 w, the working pressure is 0.3 pa, and the final thickness of the film is 80 - 120 nm.

[0026] Preferably, the window layer material is selected from one or more of ITO, IZO, AZO, IWO, and ICO.

[0027] In a second aspect, the present invention provides a large-textured silicon perovskite tandem solar cell prepared by the above method.

[0028] The beneficial effects of the present invention are as follows:

[0029] The present invention proposes a preparation method for a large-textured silicon perovskite tandem solar cell. By first preparing a thin layer of PCBM through a wet process, good chimerism with the perovskite film layer is achieved, the interfacial contact resistance is reduced, and the charge transfer efficiency is improved. Compared with the evaporated C60 electron transport layer, the energy level of PCBM is more matched with that of perovskite, the open-circuit voltage loss is smaller, and at the same time, the long-term stability problem caused by the easy moisture absorption and migration of LiF in the conventional LiF interlayer to improve the C60 interfacial energy level mismatch scheme is avoided. Thus, while improving the device performance, the long-term operation stability is significantly improved. Although the PCBM spin-coated on the textured surface may not be completely covered, the coverage rate can be improved as much as possible by optimizing the wet process. In addition, the present invention also additionally evaporates an electron transport layer of C60 to form an electron transport layer combined with wet PCBM and dry C60, ensuring complete coverage of the perovskite layer, further reducing interfacial recombination, and improving the open-circuit voltage and device performance. This double-insurance design not only significantly reduces the interfacial recombination loss but also further improves the long-term stability of the device, providing a new direction for the development of future large-textured commercial perovskite-based tandem devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic structural diagram of the large-textured silicon perovskite tandem solar cell of the present invention;

[0031] Figure 2 is the electron-hole transport energy band diagram of the electron transport layer and the perovskite absorption layer of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0032] In order to enable those skilled in the art to better understand the technical solutions of the invention, the present invention will be further described in detail below in conjunction with specific embodiments.

[0033] Example 1

[0034] A large velvet-textured silicon-calcium titanate tandem solar cell, the structure of which is as Figure 1 shown, and successively includes from bottom to top: a back electrode, a large velvet-textured heterojunction silicon bottom cell, a composite layer, and a perovskite solar cell.

[0035] The structure of the perovskite solar cell includes: a hole transport layer, a perovskite absorption layer, an electron transport layer, a blocking layer, a window layer, and a front metal grid electrode.

[0036] The large velvet-textured heterojunction silicon bottom cell, in the order from bottom to top, includes: a back transparent conductive layer, a P-type amorphous silicon layer, a first intrinsic hydrogen-rich amorphous silicon layer, a silicon wafer, a second intrinsic hydrogen-rich amorphous silicon layer, and an N-type amorphous silicon layer.

[0037] The preparation method of the large velvet-textured silicon-calcium titanate tandem solar cell includes the following steps:

[0038] 1. Preparation of the back electrode and the velvet-textured heterojunction silicon bottom cell:

[0039] Prepare a back electrode (ITO) with a thickness of 80 nm. After the back electrode is completed, the silicon bottom cell is subjected to conventional screen printing metallization or vacuum evaporation metallization. The velvet-textured heterojunction silicon bottom cell uses a commercial M6 silicon heterojunction. The thickness range of the silicon wafer is 170 μm, and double-sided texturing is performed with a velvet surface undulation height of 2 - 5 μm. Then, the M6-sized semi-finished heterojunction cell is cut into several small and medium-sized silicon wafers of 25 * 25 mm as the bottom cell of the present invention and is treated with ultraviolet ozone for 20 min for standby.

[0040] 2. Preparation of the composite layer:

[0041] A composite layer ITO is prepared on the large velvet-textured heterojunction silicon bottom cell by magnetron sputtering. The sputtering power is 90 w, the working pressure is 0.3 pa, the thickness of the composite layer is 20 nm, and the sheet resistance is 150 Ω / □. After the preparation of the composite layer ITO is completed, it is annealed at 200 °C in air for 30 min to recover the sputtering damage.

[0042] 3. Preparation of the perovskite solar cell:

[0043] (1) A hole transport layer is prepared on the composite layer by magnetron sputtering. The hole transport layer is a combination of NiOx and SAM. First, a P-type NiOx thin film is prepared by magnetron sputtering. The working pressure is 0.3 Pa, the sputtering power is 100 w, and the thickness is 15 nm. Subsequently, the sample is transferred to a glove box, and Meo-2pacz is prepared by spin coating. The concentration of Meo-2pacz is 1 mg / ml, and the solvent is ethanol. The spin coating process is first low-speed and then high-speed. The low-speed parameters are 1000 r 10 s, the high-speed parameters are 3000 r 30 s, and then it is annealed at 100 °C for 10 min.

[0044] (2) Preparation of perovskite absorption layer (FA) on the hole transport layer 0.8 Cs 0.25 Pb(I 0.8 Br 0.2 ) 3 , 1.68ev wide band gap system), the solvent is DMF and DMSO (volume ratio is 4:1), due to the large velvet surface spin coating preparation, so the concentration is 1.6M, using two stages of slow and fast spin coating (800r / 10s, 4000r / 60s), the high-speed stage has 30s left to add anti-solvent ethyl acetate (EA), after the spin coating is completed, annealing treatment at 100℃ for 20min is obtained to obtain the perovskite absorption layer.

[0045] (3) An electron transport layer is prepared on the perovskite absorption layer. The electron transport layer is prepared by wet process deposition of PCBM and then evaporation of C60. Specifically, 120ul of PCBM chlorobenzene solution with a concentration of 5mg / ml is prepared and spin-coated on the perovskite absorption layer. The spin-coating process parameters are 3000r, 30s, annealing at 100℃ for 10min, and then evaporation of C60. A high vacuum thermal evaporation coating instrument is used for preparation, and the working pressure is 1*10 -4 Pa, the film thickness is 10 nm, and the evaporation rate is controlled at 0.1 A / s.

[0046] (4) Sputtering a blocking layer on the electron transport layer, SnO 2 The film was made using thermal ALD, with TDMASn as the tin source, a standard blow-in and blow-out procedure of 0.1 / 10 / 0.08 / 10s for one cycle, a total of 120 cycles, an operating temperature of 85°C, and a final film thickness of 12nm.

[0047] (5) A window layer is prepared on the barrier layer. The window layer material is ITO and is prepared by magnetron sputtering. The sputtering power is 90W, the working pressure is 0.3Pa, and the final thickness of the film is 80nm.

[0048] (6) Prepare the front metal grid electrode by high vacuum evaporation method with a thickness of 600 nm and an evaporation rate of 0.1 nm / s.

[0049] Example 2

[0050] The same as Example 1, the only difference is that in the step of preparing the electron transport layer of the perovskite solar cell, 120ul of PCBM chlorobenzene solution with a concentration of 1mg / ml is prepared and spin-coated on the perovskite absorption layer. The spin-coating process parameters are 3000r, 30s, annealing at 80℃ for 10min, and then C60 is evaporated after the end. A high vacuum thermal evaporation coating instrument is used for preparation, and the working pressure is 1*10 -4 Pa, the film thickness is 14 nm, and the evaporation rate is controlled at 0.1 A / s.

[0051] Example 3

[0052] Same as Example 1, except that in the step of preparing the electron transport layer of the perovskite solar cell, 120 μl of a PCBM chlorobenzene solution with a concentration of 10 mg / ml was prepared and spin-coated on the perovskite absorption layer. The process parameters of spin-coating were 3000 r, 30 s, and annealing at 100 °C for 10 min. After that, C60 was evaporated. A high-vacuum thermal evaporation coating instrument was used for preparation, with a working pressure of 1×10 - 4 Pa, the film thickness was 5 nm, and the evaporation rate was controlled at 0.1 Å / s.

[0053] Comparative Example 1

[0054] Same as Example 1, except that in the step of preparing the electron transport layer of the perovskite solar cell, only a layer of C60 with a thickness of 15 nm was evaporated.

[0055] Comparative Example 2

[0056] Same as Example 1, except that in the step of preparing the electron transport layer of the perovskite solar cell, only a layer of PCBM with a concentration of 15 mg / ml was deposited.

[0057] Comparative Example 3

[0058] Same as Example 1, except that a layer of C60 was evaporated for the electron transport layer, and a modification layer was deposited between the perovskite absorption layer and the electron transport layer. The modification layer was vacuum-evaporated with 1.5 nm of LiF, and the vacuum evaporation conditions were a working pressure of 1×10 -4 Pa, the film thickness was 1.5 nm, and the evaporation rate was controlled at 0.01 Å / s.

[0059] Effect Example 1 Battery Efficiency Test

[0060] The efficiency of the tandem cells prepared in Examples 1 to 3 and Comparative Examples 1 to 3 was tested. There were 20 cells in each group, and they were heated in an inert atmosphere at 80 °C. The remaining efficiency was counted at regular intervals, and the total monitoring time was set to 1000 h or until the battery completely failed, whichever came first. The champion efficiency and the percentage of the remaining efficiency of each group of tandem cells were counted. The results are shown in Table 1.

[0061] Table 1. Statistical Table of Champion Efficiency and Thermal Stability Tracking of Remaining Efficiency for 1000 h in Each Example and Comparative Example

[0062] Group <![CDATA[V oc (V)]]> <![CDATA[J sc (mA / cm 2 )]]> FF (%) PCE (%) Residual efficiency percentage Example 1 1.91 20.1 79.6 30.55 98.2％ Example 2 1.88 19.8 78.3 29.1 89％ Example 3 1.80 17.9 72 23.19 69％ Comparative Example 1 1.86 19.7 76.8 28.1 86.5％ Comparative Example 2 1.72 17.5 69 20.77 67.4％ Comparative Example 3 1.90 19.8 78.8 29.64 83％

[0063] As shown in Table 1, the stacked battery prepared in Example 1 of the present invention has a relatively high open-circuit voltage, short-circuit current and efficiency. After tracking at 80°C for 1000 h, it can still retain 98.2% of the initial efficiency, with the best effect. In Example 2, the electron transport layer uses a concentration of 1 mg / PCBM + 14 nm C60. The film has a relatively low coverage rate on the large-textured surface, and less PCBM is embedded in the perovskite, so the effect of reducing the open-circuit voltage loss is lower than that of Example 1. In Example 3, the electron transport layer uses a combination of a concentration of 10 mg / ml PCBM + 5 nm C60. Although PCBM can play a good embedding role and the energy levels are more matched, using ultra-thin C60 cannot ensure complete coverage on the large-textured surface. In addition, the scheme of using a slightly higher concentration of PCBM combined with ultra-thin C60 is more susceptible to damage from subsequent semi-transparent sputtering processes (the C60 film layer deposited by evaporation is denser than wet-process PCBM itself, and combined with ALD-SnO 2 The blocking layer has a better anti-sputtering damage effect), so the actual device has a greater open-circuit voltage loss and a lower fill factor, and thus the efficiency will be reduced.

[0064] In Comparative Example 1 where only one layer of C60 is deposited by evaporation, due to the reasons of energy band mismatch and relatively high contact resistance, the open-circuit voltage loss is obvious, which is about 50 mV lower than that of Example 1 of the present invention, and the efficiency is only 28.1%. Although Comparative Example 3 can significantly reduce the open-circuit voltage loss and finally obtain an open-circuit voltage of 1.90 V and an efficiency of 29.64%, due to the instability of the Li salt, only 83% of the initial efficiency can be retained after tracking at 80°C for 1000 h. Comparative Example 2 uses a single wet process to prepare the PCBM layer. Since it is difficult to solve the problem of PCBM coverage on the large-textured surface, all parameters of the device are poor, and only an efficiency of 20.77% is obtained. Due to severe recombination, the device can only retain 67.4% of the initial efficiency after tracking at 80°C for 1000 h.

[0065] The electron-hole transport energy band diagrams of the electron transport layer and the perovskite absorption layer of the present invention are shown in Figure 2It can be seen that for the PCBM layer introduced by the wet process, its LUMO energy level is about -3.9 eV, which is very close to the bottom of the conduction band of the perovskite material (the LUMO energy level is between -3.8 eV and -4.0 eV). This energy level matching enables electrons to be more effectively transferred from the perovskite layer to the PCBM layer, reducing the energy loss caused by energy level mismatch. Moreover, the PCBM layer prepared by the wet process has unique advantages. The prepared PCBM can better penetrate into the surface and grain boundaries of the perovskite layer, forming a "chimeric" structure. This structure not only increases the contact area between PCBM and perovskite, but also reduces the existence of interface defects and trap states, thus significantly reducing the interface contact resistance. A lower interface contact resistance means a reduction in the recombination loss of electrons and holes at the interface, and the charge extraction efficiency is improved. In addition, in this invention, an additional layer of C60 will be vapor-deposited to ensure double insurance that the electron transport layer composed of wet-process PCBM and dry-process C60 completely covers the perovskite layer. This realizes a reduction in the interface recombination between the large-textured silicon-calcium perovskite stacked electron transport layer and the perovskite light-absorbing layer in commercial applications, further increases the open-circuit voltage, and ultimately improves the device performance. Moreover, due to the reduction in interface recombination, the long-term stability of the device is also further improved.

[0066] As can be seen above, the large-textured silicon-calcium perovskite stacked solar cell prepared by this invention can effectively reduce the energy level mismatch at the interface between the perovskite and the vapor-deposited C60 electron transport layer. And because the wet-process PCBM can be embedded in the perovskite to reduce the contact resistance, the open-circuit voltage loss is small, and a good photoelectric conversion efficiency can be obtained. In addition, since this invention abandons the interlayer LiF that is conventionally reported to slow down the open-circuit voltage loss at the interface between the vapor-deposited C60 and the perovskite, the long-term stability of the device has also been greatly improved.

[0067] The above are only the preferred embodiments of this invention. It should be noted that the above preferred embodiments should not be regarded as limitations of this invention. The protection scope of this invention should be defined by the scope of the claims. For those of ordinary skill in the art of this technology, without departing from the spirit and scope of this invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of this invention.

Claims

1. A method for preparing a large textured silicon perovskite laminated solar cell, characterized in that: The structure of the large textured silicon perovskite laminated solar cell includes a back electrode, a large textured heterojunction silicon bottom cell, a composite layer and a perovskite solar cell, wherein the preparation method of the electron transport layer in the perovskite solar cell includes: spin coating a PCBM solution on the perovskite absorption layer, and evaporating C60 after annealing.

2. The preparation method according to claim 1, characterized in that: The texture height of the large textured silicon perovskite laminated solar cell is 2-5 μm.

3. The preparation method according to claim 1, characterized in that: The concentration of the PCBM solution is 1-10 mg / ml.

4. The preparation method according to claim 1, characterized in that: The thickness of the C60 is 5 to 14 nm.

5. The preparation method according to any one of claims 1 to 4, characterized in that: The annealing temperature is 80-100°C.

6. The preparation method according to any one of claims 1 to 4, characterized in that: The composite layer is selected from one or more of ITO, IZO, AZO, IWO, and ICO.

7. The preparation method according to any one of claims 1 to 4, characterized in that: The thickness of the composite layer is 10-20nm, and the square resistance is 50-200Ω / □.

8. The preparation method according to any one of claims 1 to 4, characterized in that: The preparation of the perovskite solar cell also includes preparing a hole transport layer, a perovskite absorption layer, a barrier layer, a window layer and a front metal grid electrode.

9. The preparation method according to claim 8, characterized in that: The window layer material is selected from one or more of ITO, IZO, AZO, IWO, and ICO.

10. A large textured silicon perovskite laminated solar cell prepared by the preparation method according to any one of claims 1 to 9.

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