System and method for decoding codewords

By calculating the correction subweight of the codeword during the decoding process and comparing it with the threshold, the decoding iteration is terminated in advance, the decoding delay and power consumption problems caused by the resultless iteration in the prior art are solved, and a more efficient decoding process is achieved.

CN120161990APending Publication Date: 2025-06-17INNOGRIT TECH CO LTD
View PDF 0 Cites 1 Cited by

Patent Information

Application Number
CN202411294745.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-17
Filing Date
2024-09-14
Publication Date
2025-06-17

AI Technical Summary

Technical Problem

The prior art tends to fall into fruitless iterations when decoding codewords, resulting in increased decoding delay and increased power consumption.

Method used

The decoding iteration is terminated early by calculating the corrected subweight of the codeword during the decoding process and comparing it with a predetermined threshold. When the correction subweight is greater than or not less than the threshold value, and the number of iterations reaches a predetermined threshold value, the decoding process is immediately terminated.

Benefits of technology

Effectively avoiding resultless decoding iteration, reducing overall decoding delay, and saving system power consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120161990A_ABST
    Figure CN120161990A_ABST
Patent Text Reader

Abstract

Systems and methods are disclosed herein that can avoid resultless decoding iterations by terminating the resultless decoding iterations at an early stage. A method includes iteratively decoding, by a decoder, a codeword until a number of iterations when a syndrome weight of the codeword exceeds a predetermined threshold. The method may also include comparing the syndrome weight of the codeword to a decoder syndrome weight threshold of the decoder; decoding of the codeword by the decoder is terminated in response to the syndrome weight of the codeword being greater than or not less than the decoder syndrome weight threshold.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present disclosure relates to the technical field of information decoding, and more particularly, to systems and methods that can avoid fruitless decoding iterations. Background Art

[0002] A solid-state drive (SSD) controller is an integral part of an SSD. The SSD controller is responsible for managing the operations and functions of the SSD and serves as an interface between the storage medium of the SSD and the host system. Low-density parity-check (LDPC) codes are a type of error-correcting code that can be used in error-correcting code (ECC) schemes because they have high error-correcting capabilities, low decoding complexity, and good adaptability to various applications and communication environments. Summary of the Invention

[0003] Disclosed herein is a method, including: iteratively decoding a codeword by a decoder until the number of iterations when the syndrome weight of the codeword is greater than or not less than a predetermined threshold.

[0004] In one embodiment, the method further includes: calculating the syndrome weight at each iteration.

[0005] In one embodiment, the method further includes: comparing the syndrome weight with a decoder syndrome weight threshold of the decoder; in response to the syndrome weight of the codeword being greater than or not less than the decoder syndrome weight threshold, terminating the decoding of the codeword by the decoder.

[0006] In one embodiment, the method further includes: determining whether the codeword is completely decoded by the decoder; in response to the codeword being completely decoded, terminating the decoding of the codeword by the decoder.

[0007] In one embodiment, the codeword is a low-density parity-check (LDPC) code, a convolutional code, a Turbo code, or a Polar code.

[0008] In one embodiment, the decoder is selected from the group consisting of a bit-flipping decoder, a minimum-sum decoder, a sum-product decoder, and a belief-propagation decoder.

[0009] Also disclosed herein is a method, which includes:

[0010] Step S1: comparing the syndrome weight of the codeword decoded by a first decoder with a syndrome weight threshold for iterative calculation of the first decoder;

[0011] Step S2: in response to the syndrome weight being less than or not greater than the syndrome weight threshold, performing Step S5; otherwise performing Step S3;

[0012] Step S3: increasing a counter value by an increment and comparing the counter value with a predetermined value;

[0013] Step S4: In response to the counter value being greater than or not less than a predetermined value, execute Step S7; otherwise, execute Step S5;

[0014] Step S5: Decode the codeword through iterative calculation;

[0015] Step S6: In response to the iterative calculation not fully decoding the codeword and the iterative calculation being the last iterative calculation of the first decoder, execute Step S7;

[0016] Step S7: Terminate the decoding of the codeword by the first decoder.

[0017] In one embodiment, the method further includes: calculating the syndrome weight of the codeword before Step S1.

[0018] In one embodiment, the codeword is a low-density parity-check (LDPC) code, a convolutional code, a Turbo code, or a Polar code.

[0019] In one embodiment, the method further includes: decoding the codeword by a second decoder after Step S7.

[0020] In one embodiment, before Step S1, the method further includes: Step S0: Comparing the syndrome weight of the codeword with the decoder syndrome weight threshold of the first decoder; in response to the syndrome weight of the codeword being greater than or not less than the decoder syndrome weight threshold of the first decoder, execute Step S7.

[0021] In one embodiment, the decoder is selected from the group consisting of a bit-flip decoder, a minimum-sum decoder, a sum-product decoder, and a belief-propagation decoder.

[0022] The present disclosure includes a system, the system includes a processor configured to execute any one of the above methods, wherein the system is a solid-state drive (SSD), a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device.

[0023] The present disclosure includes a non-transitory machine-readable medium having information, wherein when a hardware processor system reads the information, the information causes the hardware processor system to execute any one of the above methods. Description of the Drawings

[0024] Figure 1 A flowchart showing decoding of a codeword is shown.

[0025] Figure 2 A flowchart showing decoding of a codeword is shown.

[0026] Figure 3The flowchart of a codeword decoding method according to an embodiment is shown.

[0027] Figure 4 The flowchart of a codeword decoding method according to an embodiment is shown. Detailed description

[0028] Specific embodiments according to the present application will now be described in detail with reference to the accompanying drawings. For consistency, the same elements in the various drawings are denoted by the same reference numerals.

[0029] Several LDPC iterative decoders can be used in an SSD controller, including bit - flip decoders, min - sum decoders, sum - product decoders, belief - propagation decoders, etc. The process of decoding a codeword by an iterative decoder is as Figure 1 shown. First, in step 100, after the codeword is received by the iterative decoder, the iteration count i, which represents the number of iterations the decoder has run, is initialized to 0. Next, in step 101, the iterative decoder performs iterative decoding of the codeword. Then, in step 102, it is determined whether the codeword is completely decoded in the current iteration. The codeword being completely decoded means that the errors in the codeword are completely corrected, which can be indicated by the syndrome weight being zero. If it is determined in step 102 that the decoder completely decodes the codeword, the process proceeds to step 103, where decoding success is announced and the decoded codeword is made available for downstream processes. If it is determined in step 102 that the decoder fails to completely decode the codeword, the process proceeds to step 104. In step 104, it is determined whether the current iteration is the last iteration (i.e., whether the number of iterations executed by the decoder reaches the maximum number of iterations preset for the decoder). If the current iteration is not the last iteration, the iteration count i is incremented by 1, and then the process returns to step 101 and repeats the above steps until the codeword is completely decoded or the maximum number of iterations of the decoder is reached. If the current iteration is the last iteration, the process proceeds to step 105, where decoding failure is announced, or it is said that the current decoding process is a non - result decoding. According to the decoding method as Figure 1 shown, even if the decoder cannot decode the codeword, the decoder still performs all the iterations defined by the preset maximum number of iterations, which may result in a longer decoding delay.

[0030] An SSD controller may adopt a multi - level decoder architecture. In a multi - level decoder architecture, the decoding process is divided into multiple levels, and these levels are respectively restricted to different error - correction degrees or error - correction capabilities. The multi - level decoder architecture can be implemented by multiple decoders with different error - correction capabilities, such as the first, second, …, and the Nth decoder, where N is an integer greater than 2. The decoder with a smaller error - correction capability can be used first because it often has a higher decoding throughput and a shorter iterative delay. When the decoder with a smaller error - correction capability cannot decode the codeword, then another decoder with a larger error - correction capability can be used next.

[0031] Figure 2 A flowchart showing the decoding of a codeword by a decoding system with a multi - level decoder architecture is shown. The decoding system includes multiple decoders at different levels. In step 201, a first decoder is used to decode the codeword. Among the multiple decoders, the first decoder has the smallest error - correction capability. In step 202, it is determined whether the codeword is completely decoded by the first decoder (i.e., whether all errors in the codeword are corrected). If it is determined in step 202 that the first decoder completely decodes the codeword, the process proceeds to step 203, where decoding success is announced, and the decoded codeword can be made available to other systems. If it is determined in step 202 that the first decoder cannot completely decode the codeword, the process proceeds to step 204. In step 204, a second decoder is used to decode the codeword, where the second decoder has the second - smallest error - correction capability among the multiple decoders. Next, in step 205, it is determined whether the codeword is completely decoded by the second decoder. If it is determined in step 205 that the second decoder completely decodes the codeword, the process proceeds to step 203. If it is determined in step 205 that the second decoder cannot completely decode the codeword, the process executes step 206. In step 206, a third decoder is used to decode the codeword, where the third decoder has the third - smallest error - correction capability among the multiple decoders. The process iterates among the multiple decoders in a similar manner until the codeword is completely decoded or the last decoder among the multiple decoders fails to completely decode the codeword. The last decoder is used to decode the codeword in step 207. After step 207, it proceeds to step 208 to determine whether the codeword is completely decoded by the last decoder. If it is determined in step 208 that the last decoder completely decodes the codeword, the process proceeds to step 203; otherwise, decoding failure is announced in step 209.

[0032] In a decoding system as Figure 2 shown, one or more decoders may futilely attempt to decode the codeword before the codeword reaches one of the decoders with sufficient ability to completely decode it. These fruitless decoding attempts not only result in long decoding delays but also increase the power consumption of the decoding system.

[0033] First Embodiment

[0034] Figure 3 The flowchart of a codeword decoding method is shown. The codeword decoding method is implemented by an iterative decoder with an intelligent abort scheme. In one implementation, the iterative decoder can be a bit flip decoder, a minimum sum decoder, a sum product decoder, a belief propagation decoder. The iterative decoder can also be other types of decoders, including other existing decoders or decoders to be developed in the future. In this embodiment, for ease of description, it is assumed that the iterative decoder has a maximum number of iterations m, and m syndrome weight thresholds thr_SA_sw[i] are predefined for the m iterations of the decoder, where i = 0, 1, 2, …, (m - 1), and m is an integer greater than 2. That is, each iteration has a predefined syndrome weight threshold.

[0035] After the iterative decoder receives a codeword containing error information (e.g., with noise from the transmission channel), the codeword decoding method starts from step 300, in which the syndrome weight of the codeword is calculated, and the iteration count i and the counter value g are both initialized to zero (i.e., i = 0 and g = 0). The term "codeword" here refers to information encoded by an encoding scheme, such as a symbol or bit sequence generated by applying an error correction code to the original data. The codeword can be a low density parity check (LDPC) code, a convolutional code, a Turbo code, a Polar code, or any other suitable encoded information. The term "syndrome weight" here refers to the weight of the syndrome vector of the codeword (e.g., the number of non-zero elements or bits in the syndrome vector). The syndrome may change during the decoding process. The syndrome vector can be calculated by multiplying the codeword by the transpose of the parity check matrix. A non-zero syndrome vector indicates that there are some differences or errors in the codeword. The syndrome vector can include information about the presence and location of errors within the codeword. For example, when the codeword has no errors, or all errors in the codeword are corrected, the syndrome weight of the codeword can be zero. The iteration count i is used to calculate the number of iterations that the iterative decoder has run, and the counter value g is used to calculate the number of iterations when the syndrome weight is greater than or not less than the syndrome weight threshold thr_SA_sw[i] of iteration i.

[0036] In step 301, it is determined whether the syndrome weight of the codeword is greater than or not less than the syndrome weight threshold thr_SA_sw[i] of iteration i. If it is determined in step 301 that the syndrome weight is greater than or not less than the syndrome weight threshold thr_SA_sw[i], then the counter value g will be incremented by an increment Δg in step 308, i.e., g = g + Δg. The increment Δg can be 1. Then, in step 302, it is determined whether the counter value g is greater than or not less than a predetermined threshold thr_SA_g_cnt, where the predetermined threshold thr_SA_g_cnt is a threshold for the number of iterations when the syndrome weight is greater than the threshold thr_SA_sw[i]. If it is determined in step 302 that the counter value g is greater than or not less than the predetermined threshold thr_SA_g_cnt, the process proceeds to step 307, where decoding failure is declared; otherwise, the process proceeds to step 303.

[0037] Conversely, if it is determined in step 301 that the syndrome weight is not greater than or less than the syndrome weight threshold thr_SA_sw[i], the process proceeds to step 303. In step 303, iterative calculation of decoding the codeword is performed by the iterative decoder, and then the syndrome weight is recalculated. When the iterative calculation of iteration i is completed, the process proceeds to step 304. In step 304, it is determined whether the codeword is completely decoded in the iterative calculation of iteration i. A completely decoded codeword means that all errors in the codeword have been corrected, which can be indicated by a syndrome weight of zero. If it is determined at step 304 that the codeword is completely decoded, the process proceeds to step 305, where decoding success is declared; otherwise, the process proceeds to step 306. In step 306, it is determined whether the current iteration is the last iteration (i.e., whether the number of iterations passed by the decoder reaches the maximum number of iterations m, or i = m - 1). If it is determined in step 306 that the current iteration is not the last iteration, the iteration count i will be incremented by 1 in step 309, i.e., i = i + 1, and then the process returns to step 301. If it is determined in step 306 that the current iteration is the last iteration, the process proceeds to step 307, where decoding failure is declared.

[0038] As can be seen from the above, in each iteration, the syndrome weight of the codeword is checked to determine whether the syndrome weight is greater than or not less than the syndrome weight threshold of the current iteration. When the syndrome weight is greater than or not less than the syndrome weight threshold of the current iteration, and the number of iterations when the syndrome weight is greater than or not less than the syndrome weight threshold of the current iteration is greater than or not less than a predetermined threshold, the decoding process terminates prematurely (i.e., it is not necessary to perform the maximum number of m iterations). This premature termination can avoid or reduce fruitless decoding iterations, thereby reducing the overall decoding delay.

[0039] Second Embodiment

[0040] Figure 4 A flowchart showing a method for decoding a codeword is presented. The codeword decoding method is implemented by a multi - level decoder system with an intelligent decoder selection scheme. The multi - level decoder system includes multiple decoders at different levels. In one implementation, each of the multiple decoders can be a bit - flip decoder, a minimum - sum decoder, a sum - product decoder, or a belief - propagation decoder. In other implementations, the decoder can be other types of decoders, including other existing decoders or decoders to be developed in the future. The multiple decoders can be of the same type or different types. For example, in a multi - level decoder system including three decoders, all three decoders are bit - flip decoders; or, one of the three decoders is a bit - flip decoder, one is a minimum - sum decoder, and one is a belief - propagation decoder; or, two of the three decoders are bit - flip decoders and one is a minimum - sum decoder.

[0041] Each level of the multi - level decoder system can be responsible for different degrees of error correction, and decoders at different levels can have different error - correction capabilities. The decoder at the previous level may have a smaller error - correction capability than the decoder at the subsequent level. For example, in a multi - level decoder system including three decoders, the first - level decoder has the smallest error - correction capability, the second - level decoder has the second - smallest error - correction capability, and the third - level decoder has the largest error - correction capability. A decoder with a smaller error - correction capability can have a higher decoding throughput and a shorter iterative delay, and a decoder with a larger error - correction capability can have a lower decoding throughput and a longer iterative delay.

[0042] In this embodiment, for the sake of convenience of description, it is assumed that there are n decoders, where n is an integer greater than 2; and each decoder has a syndrome weight threshold corresponding to it. That is, there is a decoder syndrome weight threshold thr_SDS_sw[i] for decoder i, where i = 1, 2, …, n. The decoder syndrome weight threshold is a threshold for determining whether the corresponding decoder is used to decode the codeword.

[0043] After a multi - level decoder system receives a codeword, the codeword decoding method starts from step 400. At step 400, the syndrome weight of the codeword is calculated, and then the syndrome weight of the codeword is compared with the decoder syndrome weight threshold thr_SDS_sw[i] of decoder i to determine whether the syndrome weight is less than the decoder syndrome weight threshold thr_SDS_sw[i]. An n - bit decoder scheduling sequence can be generated according to the comparison result between the syndrome weight and the decoder syndrome weight threshold, where the i - th bit in the decoder scheduling sequence is the enable flag bit EF[i] of decoder i; other data structures can be used to store the comparison result. When the syndrome weight is less than the decoder syndrome weight threshold thr_SDS_sw[i], the enable flag bit EF[i] of decoder i has a value of 1. The enable flag bit EF[i] being 1 indicates that decoder i will be used to decode the codeword. When the syndrome weight is not less than the decoder syndrome weight threshold thr_SDS_sw[i], the enable flag bit EF[i] of decoder i has a value of 0. The enable flag bit EF[i] being 0 indicates that decoder i will not be used to decode the codeword (i.e., decoder i will be skipped). For example, assume that the multi - level decoder system includes 5 decoders, the syndrome weight of the received codeword is 987, thr_SDS_sw = [700, 800, 900, 1000, 1100], and a 5 - bit decoder scheduling sequence EF = [0, 0, 0, 1, 1] will be generated. The 5 - bit decoder scheduling sequence indicates that decoders 4 and 5 will be used to sequentially decode the received codeword.

[0044] At step 411, determine whether the value of the enable flag bit EF[1] of decoder 1, i.e., the first bit of the decoder scheduling sequence, is 1 or 0. If the first bit of the decoder scheduling sequence is 0, skip the decoding of the codeword by decoder 1, and the process proceeds to step 421. If the first bit of the decoder scheduling sequence is 1, it will proceed to step 412. At step 412, decoder 1 is used to decode the received codeword.

[0045] After decoder 1 decodes the received codeword in step 412, determine at step 413 whether the codeword is completely decoded by decoder 1. If it is determined at step 413 that the codeword is completely decoded, it will proceed to step 404, where decoding success is announced; otherwise, the process proceeds to step 421.

[0046] In step 421, determine whether the value of the enable flag bit EF[2] of decoder 2, i.e., the second bit of the decoder scheduling sequence, is 1 or 0. If the second bit of the decoder scheduling sequence is 0, then the decoding of the codeword by decoder 2 will be skipped, and the step of determining whether the third bit of the decoder scheduling sequence (i.e., the value of the enable flag bit EF[3] of decoder 3) is 1 or 0 (not shown in the figure) will be executed. If the second bit of the decoder scheduling sequence is 1, then it will proceed to step 422. In step 422, decoder 2 is used to decode the received codeword.

[0047] After step 422, in step 423, determine whether the codeword is completely decoded by decoder 2. If it is determined in step 423 that the codeword is completely decoded, then it will proceed to step 404 mentioned above; otherwise, the step of determining whether the third bit of the decoder scheduling sequence (i.e., the value of the enable flag bit EF[3] of decoder 3) is 1 or 0 will be executed. Similar steps are performed for decoders 3, 4, …, and (n - 1), which will not be elaborated here.

[0048] If none of decoders 1, 2, …, and (n - 1) completely decodes the codeword, then step 4n1 will be executed. In step 4n1, determine whether the value of the enable flag bit EF[n] of decoder n, i.e., the nth bit of the decoder scheduling sequence, is 1 or 0. If the nth bit of the decoder scheduling sequence is 0, then the decoding of the codeword by decoder n will be skipped, and it will proceed to step 405, where decoding failure is declared. If the nth bit of the decoder scheduling sequence is 1, then it will proceed to step 4n2. In step 4n2, decoder n is used to decode the received codeword. After step 4n2, in step 4n3, determine whether the codeword is completely decoded by decoder n. If it is determined in step 4n3 that the codeword is completely decoded, then it will proceed to step 404 mentioned above; otherwise, it will proceed to step 405 mentioned above.

[0049] According to the codeword decoding method using a multi - level decoder system with an intelligent decoder selection scheme provided in this embodiment, a decoder scheduling sequence is generated by comparing the syndrome weight of the received codeword and the decoder syndrome weight thresholds predefined for each decoder, so that fruitless decoders can be skipped, reducing the decoding delay and saving the power consumption of the entire system.

[0050] Example

[0051] In this example, three decoders (i.e., decoder 1, 2, and 3) are used to decode the codeword. Among the three decoders, the maximum number of iterations of decoder 1 is 8, and the delay for each iteration is 2t (t is the time unit of the clock), the maximum number of iterations of decoder 2 is 10, and the delay for each iteration is 3t, and the maximum number of iterations of decoder 3 is 12, and the delay for each iteration is 4t. The codeword is a codeword that cannot be corrected by decoder 1 and 2, but can be corrected by decoder 3 after 5 iterations.

[0052] When decoding the codeword using the decoding method as Figure 2 shown, the total decoding delay is 8×2t + 10×3t + 5×4t = 66t. In contrast, when using the codeword decoding method according to the first embodiment to decode the codeword, the iterative calculation of decoder 1 terminates after 4 iterations, and the iterative calculation of decoder 2 ends after 5 iterations. Therefore, the overall decoding delay is 4×2t + 5×3t + 5×4t = 43t, which is shorter than the overall decoding delay of 66t.

[0053] When using the codeword decoding method according to the second embodiment of the present disclosure to decode the codeword, by comparing the syndrome weight of the codeword with the decoder syndrome weight threshold of each decoder, it is determined to skip decoder 1 and 2, and only use decoder 3 to decode the codeword. In this case, the overall decoding delay is 5×4t = 20t, which is much shorter than the overall decoding delay of 66t using the existing codeword decoding method.

[0054] Although in this example the codeword decoding methods according to the first and second embodiments are used separately, these two codeword decoding methods can also be used in combination. Specifically, each decoder included in the multi-stage decoder system of the second embodiment can be an iterative decoder with the intelligent abort scheme described in the first embodiment, so that the intelligent abort scheme and the intelligent decoder selection scheme are simultaneously implemented in this codeword decoding method.

[0055] In an exemplary embodiment of the present disclosure, a system is provided. The system may include a processor configured to execute any of the above methods. For example, the system may be an SSD, a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device.

[0056] In an exemplary embodiment of the present disclosure, a non-transitory machine-readable medium having information is provided. When the information is read by a hardware processor system, the information can cause the hardware processor system to execute any of the above methods.

[0057] Although various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for illustrative purposes only and are not intended to be limiting, and the true scope and spirit are indicated by the appended claims.

Claims

1. A method, characterized in that include: The codeword is iteratively decoded by the decoder until the number of iterations when the syndrome weight of the codeword is greater than or not less than a predetermined threshold.

2. The method according to claim 1, characterized in that: Also includes: The syndrome weights are calculated at each iteration.

3. The method according to claim 1, characterized in that Also includes: The syndrome weight is compared with a decoder syndrome weight threshold of the decoder; and in response to the syndrome weight of the codeword being greater than or not less than the decoder syndrome weight threshold, the decoding of the codeword by the decoder is terminated.

4. The method according to claim 1, characterized in that: Also includes: determining whether the codeword is completely decoded by the decoder; and terminating decoding of the codeword by the decoder in response to the codeword being completely decoded.

5. The method according to claim 1, characterized in that The codeword is a low-density parity check (LDPC) code, a convolutional code, a Turbo code, or a Polar code.

6. The method according to claim 1, characterized in that The decoder is selected from the group consisting of a bit-flipping decoder, a min-sum decoder, a sum-product decoder, and a belief propagation decoder.

7. The method according to claim 1, characterized in that Also includes: The codeword is decoded by another decoder.

8. A system comprising a processor configured to execute the method according to any one of claims 1 to 7, characterized in that: The system is a solid state drive (SSD), a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device.

9. A non-transitory machine-readable medium having information, characterized in that: When the hardware processor system reads the information, the information causes the hardware processor system to execute the method according to any one of claims 1 to 7.

10. A method, characterized in that include: Step S1: comparing the syndrome weight of a codeword decoded by a first decoder with an iteratively calculated syndrome weight threshold for the first decoder; Step S2: In response to the syndrome weight being less than or not greater than the syndrome weight threshold, executing step S5; otherwise, executing step S3; Step S3: increasing the counter value by an increment, and comparing the counter value with a predetermined value; Step S4: In response to the counter value being greater than or not less than the predetermined value, executing step S7; Otherwise, execute step S5; Step S5: decoding the codeword by the iterative calculation; Step S6: In response to the iterative calculation not completely decoding the codeword, and the iterative calculation is the last iterative calculation of the first decoder, executing step S7; Step S7: terminating the decoding of the codeword by the first decoder.

11. The method according to claim 10, characterized in that Also includes: The syndrome weight of the codeword is calculated before step S1.

12. The method according to claim 10, characterized in that The codeword is a low-density parity check (LDPC) code, a convolutional code, a Turbo code, or a Polar code.

13. The method according to claim 10, characterized in that The method further comprises decoding the codeword by a second decoder after step S7.

14. The method according to claim 10, characterized in that Before step S1, the method further includes: Step S0: comparing the syndrome weight of the codeword with a decoder syndrome weight threshold of the first decoder; in response to the syndrome weight of the codeword being greater than or not less than the decoder syndrome weight threshold of the first decoder, executing step S7.

15. The method according to claim 10, characterized in that The decoder is selected from the group consisting of a bit-flipping decoder, a min-sum decoder, a sum-product decoder, and a belief propagation decoder.

16. A system comprising a processor configured to execute the method according to any one of claims 10 to 15, characterized in that: The system is a solid state drive (SSD), a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device.

17. A non-transitory machine-readable medium having information, characterized in that: When the hardware processor system reads the information, the information causes the hardware processor system to execute the method of any one of claims 10 to 15.

Citation Information

Cited By

  • Step-by-step decoding method and device, storage medium and electronic equipment

    CN120929301A